| commit | bd5ea513986dfe68d1828ddd9df20078e743638f | |
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | |
| Mon, 9 Feb 2009 16:50:00 +0000 (9 16:50 +0000) | ||
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | |
| Mon, 9 Feb 2009 16:50:00 +0000 (9 16:50 +0000) | ||
| tree | fe6ccb779ea2c5d2fefe5236b557d5bf5c203a7d | treesnapshot (tar.gz zip) |
| parent | 40569b7edc2959c7460211de0b30bbdbb87626e4 | commitdiff |
target-ppc: Model e500v{1,2} CPUs more accurately
The e500v1 chips only have single-precision floating point; don't say we
support the double-precision floating-point instructions on such chips.
Also add an e500v1 -cpu argument for a generic e500v1.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6576 c046a42c-6fe2-441c-8c8c-71466251a162
The e500v1 chips only have single-precision floating point; don't say we
support the double-precision floating-point instructions on such chips.
Also add an e500v1 -cpu argument for a generic e500v1.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6576 c046a42c-6fe2-441c-8c8c-71466251a162
| target-ppc/translate_init.c | diffblobblamehistory |