hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "console.h"
  35 #include "fw_cfg.h"
  36
  37 /* output Bochs bios info messages */
  38 //#define DEBUG_BIOS
  39
  40 #define BIOS_FILENAME "bios.bin"
  41 #define VGABIOS_FILENAME "vgabios.bin"
  42 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  43
  44 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  45
  46 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  47 #define ACPI_DATA_SIZE       0x10000
  48 #define BIOS_CFG_IOPORT 0x510
  49
  50 #define MAX_IDE_BUS 2
  51
  52 static fdctrl_t *floppy_controller;
  53 static RTCState *rtc_state;
  54 static PITState *pit;
  55 static IOAPICState *ioapic;
  56 static PCIDevice *i440fx_state;
  57
  58 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  59 {
  60 }
  61
  62 /* MSDOS compatibility mode FPU exception support */
  63 static qemu_irq ferr_irq;
  64 /* XXX: add IGNNE support */
  65 void cpu_set_ferr(CPUX86State *s)
  66 {
  67     qemu_irq_raise(ferr_irq);
  68 }
  69
  70 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  71 {
  72     qemu_irq_lower(ferr_irq);
  73 }
  74
  75 /* TSC handling */
  76 uint64_t cpu_get_tsc(CPUX86State *env)
  77 {
  78     /* Note: when using kqemu, it is more logical to return the host TSC
  79        because kqemu does not trap the RDTSC instruction for
  80        performance reasons */
  81 #ifdef USE_KQEMU
  82     if (env->kqemu_enabled) {
  83         return cpu_get_real_ticks();
  84     } else
  85 #endif
  86     {
  87         return cpu_get_ticks();
  88     }
  89 }
  90
  91 /* SMM support */
  92 void cpu_smm_update(CPUState *env)
  93 {
  94     if (i440fx_state && env == first_cpu)
  95         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
  96 }
  97
  98
  99 /* IRQ handling */
 100 int cpu_get_pic_interrupt(CPUState *env)
 101 {
 102     int intno;
 103
 104     intno = apic_get_interrupt(env);
 105     if (intno >= 0) {
 106         /* set irq request if a PIC irq is still pending */
 107         /* XXX: improve that */
 108         pic_update_irq(isa_pic);
 109         return intno;
 110     }
 111     /* read the irq from the PIC */
 112     if (!apic_accept_pic_intr(env))
 113         return -1;
 114
 115     intno = pic_read_irq(isa_pic);
 116     return intno;
 117 }
 118
 119 static void pic_irq_request(void *opaque, int irq, int level)
 120 {
 121     CPUState *env = first_cpu;
 122
 123     if (env->apic_state) {
 124         while (env) {
 125             if (apic_accept_pic_intr(env))
 126                 apic_deliver_pic_intr(env, level);
 127             env = env->next_cpu;
 128         }
 129     } else {
 130         if (level)
 131             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 132         else
 133             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 134     }
 135 }
 136
 137 /* PC cmos mappings */
 138
 139 #define REG_EQUIPMENT_BYTE          0x14
 140
 141 static int cmos_get_fd_drive_type(int fd0)
 142 {
 143     int val;
 144
 145     switch (fd0) {
 146     case 0:
 147         /* 1.44 Mb 3"5 drive */
 148         val = 4;
 149         break;
 150     case 1:
 151         /* 2.88 Mb 3"5 drive */
 152         val = 5;
 153         break;
 154     case 2:
 155         /* 1.2 Mb 5"5 drive */
 156         val = 2;
 157         break;
 158     default:
 159         val = 0;
 160         break;
 161     }
 162     return val;
 163 }
 164
 165 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 166 {
 167     RTCState *s = rtc_state;
 168     int cylinders, heads, sectors;
 169     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 170     rtc_set_memory(s, type_ofs, 47);
 171     rtc_set_memory(s, info_ofs, cylinders);
 172     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 173     rtc_set_memory(s, info_ofs + 2, heads);
 174     rtc_set_memory(s, info_ofs + 3, 0xff);
 175     rtc_set_memory(s, info_ofs + 4, 0xff);
 176     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 177     rtc_set_memory(s, info_ofs + 6, cylinders);
 178     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 179     rtc_set_memory(s, info_ofs + 8, sectors);
 180 }
 181
 182 /* convert boot_device letter to something recognizable by the bios */
 183 static int boot_device2nibble(char boot_device)
 184 {
 185     switch(boot_device) {
 186     case 'a':
 187     case 'b':
 188         return 0x01; /* floppy boot */
 189     case 'c':
 190         return 0x02; /* hard drive boot */
 191     case 'd':
 192         return 0x03; /* CD-ROM boot */
 193     case 'n':
 194         return 0x04; /* Network boot */
 195     }
 196     return 0;
 197 }
 198
 199 /* copy/pasted from cmos_init, should be made a general function
 200  and used there as well */
 201 static int pc_boot_set(void *opaque, const char *boot_device)
 202 {
 203 #define PC_MAX_BOOT_DEVICES 3
 204     RTCState *s = (RTCState *)opaque;
 205     int nbds, bds[3] = { 0, };
 206     int i;
 207
 208     nbds = strlen(boot_device);
 209     if (nbds > PC_MAX_BOOT_DEVICES) {
 210         term_printf("Too many boot devices for PC\n");
 211         return(1);
 212     }
 213     for (i = 0; i < nbds; i++) {
 214         bds[i] = boot_device2nibble(boot_device[i]);
 215         if (bds[i] == 0) {
 216             term_printf("Invalid boot device for PC: '%c'\n",
 217                     boot_device[i]);
 218             return(1);
 219         }
 220     }
 221     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 222     rtc_set_memory(s, 0x38, (bds[2] << 4));
 223     return(0);
 224 }
 225
 226 /* hd_table must contain 4 block drivers */
 227 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 228                       const char *boot_device, BlockDriverState **hd_table)
 229 {
 230     RTCState *s = rtc_state;
 231     int nbds, bds[3] = { 0, };
 232     int val;
 233     int fd0, fd1, nb;
 234     int i;
 235
 236     /* various important CMOS locations needed by PC/Bochs bios */
 237
 238     /* memory size */
 239     val = 640; /* base memory in K */
 240     rtc_set_memory(s, 0x15, val);
 241     rtc_set_memory(s, 0x16, val >> 8);
 242
 243     val = (ram_size / 1024) - 1024;
 244     if (val > 65535)
 245         val = 65535;
 246     rtc_set_memory(s, 0x17, val);
 247     rtc_set_memory(s, 0x18, val >> 8);
 248     rtc_set_memory(s, 0x30, val);
 249     rtc_set_memory(s, 0x31, val >> 8);
 250
 251     if (above_4g_mem_size) {
 252         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 253         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 254         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 255     }
 256
 257     if (ram_size > (16 * 1024 * 1024))
 258         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 259     else
 260         val = 0;
 261     if (val > 65535)
 262         val = 65535;
 263     rtc_set_memory(s, 0x34, val);
 264     rtc_set_memory(s, 0x35, val >> 8);
 265
 266     /* set the number of CPU */
 267     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 268
 269     /* set boot devices, and disable floppy signature check if requested */
 270 #define PC_MAX_BOOT_DEVICES 3
 271     nbds = strlen(boot_device);
 272     if (nbds > PC_MAX_BOOT_DEVICES) {
 273         fprintf(stderr, "Too many boot devices for PC\n");
 274         exit(1);
 275     }
 276     for (i = 0; i < nbds; i++) {
 277         bds[i] = boot_device2nibble(boot_device[i]);
 278         if (bds[i] == 0) {
 279             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 280                     boot_device[i]);
 281             exit(1);
 282         }
 283     }
 284     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 285     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 286
 287     /* floppy type */
 288
 289     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 290     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 291
 292     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 293     rtc_set_memory(s, 0x10, val);
 294
 295     val = 0;
 296     nb = 0;
 297     if (fd0 < 3)
 298         nb++;
 299     if (fd1 < 3)
 300         nb++;
 301     switch (nb) {
 302     case 0:
 303         break;
 304     case 1:
 305         val |= 0x01; /* 1 drive, ready for boot */
 306         break;
 307     case 2:
 308         val |= 0x41; /* 2 drives, ready for boot */
 309         break;
 310     }
 311     val |= 0x02; /* FPU is there */
 312     val |= 0x04; /* PS/2 mouse installed */
 313     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 314
 315     /* hard drives */
 316
 317     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 318     if (hd_table[0])
 319         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 320     if (hd_table[1])
 321         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 322
 323     val = 0;
 324     for (i = 0; i < 4; i++) {
 325         if (hd_table[i]) {
 326             int cylinders, heads, sectors, translation;
 327             /* NOTE: bdrv_get_geometry_hint() returns the physical
 328                 geometry.  It is always such that: 1 <= sects <= 63, 1
 329                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 330                 geometry can be different if a translation is done. */
 331             translation = bdrv_get_translation_hint(hd_table[i]);
 332             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 333                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 334                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 335                     /* No translation. */
 336                     translation = 0;
 337                 } else {
 338                     /* LBA translation. */
 339                     translation = 1;
 340                 }
 341             } else {
 342                 translation--;
 343             }
 344             val |= translation << (i * 2);
 345         }
 346     }
 347     rtc_set_memory(s, 0x39, val);
 348 }
 349
 350 void ioport_set_a20(int enable)
 351 {
 352     /* XXX: send to all CPUs ? */
 353     cpu_x86_set_a20(first_cpu, enable);
 354 }
 355
 356 int ioport_get_a20(void)
 357 {
 358     return ((first_cpu->a20_mask >> 20) & 1);
 359 }
 360
 361 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 362 {
 363     ioport_set_a20((val >> 1) & 1);
 364     /* XXX: bit 0 is fast reset */
 365 }
 366
 367 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 368 {
 369     return ioport_get_a20() << 1;
 370 }
 371
 372 /***********************************************************/
 373 /* Bochs BIOS debug ports */
 374
 375 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 376 {
 377     static const char shutdown_str[8] = "Shutdown";
 378     static int shutdown_index = 0;
 379
 380     switch(addr) {
 381         /* Bochs BIOS messages */
 382     case 0x400:
 383     case 0x401:
 384         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 385         exit(1);
 386     case 0x402:
 387     case 0x403:
 388 #ifdef DEBUG_BIOS
 389         fprintf(stderr, "%c", val);
 390 #endif
 391         break;
 392     case 0x8900:
 393         /* same as Bochs power off */
 394         if (val == shutdown_str[shutdown_index]) {
 395             shutdown_index++;
 396             if (shutdown_index == 8) {
 397                 shutdown_index = 0;
 398                 qemu_system_shutdown_request();
 399             }
 400         } else {
 401             shutdown_index = 0;
 402         }
 403         break;
 404
 405         /* LGPL'ed VGA BIOS messages */
 406     case 0x501:
 407     case 0x502:
 408         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 409         exit(1);
 410     case 0x500:
 411     case 0x503:
 412 #ifdef DEBUG_BIOS
 413         fprintf(stderr, "%c", val);
 414 #endif
 415         break;
 416     }
 417 }
 418
 419 static void bochs_bios_init(void)
 420 {
 421     void *fw_cfg;
 422
 423     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 424     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 425     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 426     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 427     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 428
 429     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 430     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 431     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 432     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 433
 434     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 435     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 436     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 437 }
 438
 439 /* Generate an initial boot sector which sets state and jump to
 440    a specified vector */
 441 static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 442 {
 443     uint8_t bootsect[512], *p;
 444     int i;
 445     int hda;
 446
 447     hda = drive_get_index(IF_IDE, 0, 0);
 448     if (hda == -1) {
 449         fprintf(stderr, "A disk image must be given for 'hda' when booting "
 450                 "a Linux kernel\n(if you really don't want it, use /dev/zero)\n");
 451         exit(1);
 452     }
 453
 454     memset(bootsect, 0, sizeof(bootsect));
 455
 456     /* Copy the MSDOS partition table if possible */
 457     bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1);
 458
 459     /* Make sure we have a partition signature */
 460     bootsect[510] = 0x55;
 461     bootsect[511] = 0xaa;
 462
 463     /* Actual code */
 464     p = bootsect;
 465     *p++ = 0xfa;                /* CLI */
 466     *p++ = 0xfc;                /* CLD */
 467
 468     for (i = 0; i < 6; i++) {
 469         if (i == 1)             /* Skip CS */
 470             continue;
 471
 472         *p++ = 0xb8;            /* MOV AX,imm16 */
 473         *p++ = segs[i];
 474         *p++ = segs[i] >> 8;
 475         *p++ = 0x8e;            /* MOV <seg>,AX */
 476         *p++ = 0xc0 + (i << 3);
 477     }
 478
 479     for (i = 0; i < 8; i++) {
 480         *p++ = 0x66;            /* 32-bit operand size */
 481         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 482         *p++ = gpr[i];
 483         *p++ = gpr[i] >> 8;
 484         *p++ = gpr[i] >> 16;
 485         *p++ = gpr[i] >> 24;
 486     }
 487
 488     *p++ = 0xea;                /* JMP FAR */
 489     *p++ = ip;                  /* IP */
 490     *p++ = ip >> 8;
 491     *p++ = segs[1];             /* CS */
 492     *p++ = segs[1] >> 8;
 493
 494     bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
 495 }
 496
 497 static long get_file_size(FILE *f)
 498 {
 499     long where, size;
 500
 501     /* XXX: on Unix systems, using fstat() probably makes more sense */
 502
 503     where = ftell(f);
 504     fseek(f, 0, SEEK_END);
 505     size = ftell(f);
 506     fseek(f, where, SEEK_SET);
 507
 508     return size;
 509 }
 510
 511 static void load_linux(const char *kernel_filename,
 512                        const char *initrd_filename,
 513                        const char *kernel_cmdline)
 514 {
 515     uint16_t protocol;
 516     uint32_t gpr[8];
 517     uint16_t seg[6];
 518     uint16_t real_seg;
 519     int setup_size, kernel_size, initrd_size, cmdline_size;
 520     uint32_t initrd_max;
 521     uint8_t header[1024];
 522     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 523     FILE *f, *fi;
 524
 525     /* Align to 16 bytes as a paranoia measure */
 526     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 527
 528     /* load the kernel header */
 529     f = fopen(kernel_filename, "rb");
 530     if (!f || !(kernel_size = get_file_size(f)) ||
 531         fread(header, 1, 1024, f) != 1024) {
 532         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 533                 kernel_filename);
 534         exit(1);
 535     }
 536
 537     /* kernel protocol version */
 538 #if 0
 539     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 540 #endif
 541     if (ldl_p(header+0x202) == 0x53726448)
 542         protocol = lduw_p(header+0x206);
 543     else
 544         protocol = 0;
 545
 546     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 547         /* Low kernel */
 548         real_addr    = 0x90000;
 549         cmdline_addr = 0x9a000 - cmdline_size;
 550         prot_addr    = 0x10000;
 551     } else if (protocol < 0x202) {
 552         /* High but ancient kernel */
 553         real_addr    = 0x90000;
 554         cmdline_addr = 0x9a000 - cmdline_size;
 555         prot_addr    = 0x100000;
 556     } else {
 557         /* High and recent kernel */
 558         real_addr    = 0x10000;
 559         cmdline_addr = 0x20000;
 560         prot_addr    = 0x100000;
 561     }
 562
 563 #if 0
 564     fprintf(stderr,
 565             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 566             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 567             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 568             real_addr,
 569             cmdline_addr,
 570             prot_addr);
 571 #endif
 572
 573     /* highest address for loading the initrd */
 574     if (protocol >= 0x203)
 575         initrd_max = ldl_p(header+0x22c);
 576     else
 577         initrd_max = 0x37ffffff;
 578
 579     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 580         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 581
 582     /* kernel command line */
 583     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 584
 585     if (protocol >= 0x202) {
 586         stl_p(header+0x228, cmdline_addr);
 587     } else {
 588         stw_p(header+0x20, 0xA33F);
 589         stw_p(header+0x22, cmdline_addr-real_addr);
 590     }
 591
 592     /* loader type */
 593     /* High nybble = B reserved for Qemu; low nybble is revision number.
 594        If this code is substantially changed, you may want to consider
 595        incrementing the revision. */
 596     if (protocol >= 0x200)
 597         header[0x210] = 0xB0;
 598
 599     /* heap */
 600     if (protocol >= 0x201) {
 601         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 602         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 603     }
 604
 605     /* load initrd */
 606     if (initrd_filename) {
 607         if (protocol < 0x200) {
 608             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 609             exit(1);
 610         }
 611
 612         fi = fopen(initrd_filename, "rb");
 613         if (!fi) {
 614             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 615                     initrd_filename);
 616             exit(1);
 617         }
 618
 619         initrd_size = get_file_size(fi);
 620         initrd_addr = (initrd_max-initrd_size) & ~4095;
 621
 622         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 623                 "\n", initrd_size, initrd_addr);
 624
 625         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 626             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 627                     initrd_filename);
 628             exit(1);
 629         }
 630         fclose(fi);
 631
 632         stl_p(header+0x218, initrd_addr);
 633         stl_p(header+0x21c, initrd_size);
 634     }
 635
 636     /* store the finalized header and load the rest of the kernel */
 637     cpu_physical_memory_write(real_addr, header, 1024);
 638
 639     setup_size = header[0x1f1];
 640     if (setup_size == 0)
 641         setup_size = 4;
 642
 643     setup_size = (setup_size+1)*512;
 644     kernel_size -= setup_size;  /* Size of protected-mode code */
 645
 646     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 647         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 648         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 649                 kernel_filename);
 650         exit(1);
 651     }
 652     fclose(f);
 653
 654     /* generate bootsector to set up the initial register state */
 655     real_seg = real_addr >> 4;
 656     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 657     seg[1] = real_seg+0x20;     /* CS */
 658     memset(gpr, 0, sizeof gpr);
 659     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 660
 661     generate_bootsect(gpr, seg, 0);
 662 }
 663
 664 static void main_cpu_reset(void *opaque)
 665 {
 666     CPUState *env = opaque;
 667     cpu_reset(env);
 668 }
 669
 670 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 671 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 672 static const int ide_irq[2] = { 14, 15 };
 673
 674 #define NE2000_NB_MAX 6
 675
 676 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 677 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 678
 679 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 680 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 681
 682 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 683 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 684
 685 #ifdef HAS_AUDIO
 686 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 687 {
 688     struct soundhw *c;
 689     int audio_enabled = 0;
 690
 691     for (c = soundhw; !audio_enabled && c->name; ++c) {
 692         audio_enabled = c->enabled;
 693     }
 694
 695     if (audio_enabled) {
 696         AudioState *s;
 697
 698         s = AUD_init ();
 699         if (s) {
 700             for (c = soundhw; c->name; ++c) {
 701                 if (c->enabled) {
 702                     if (c->isa) {
 703                         c->init.init_isa (s, pic);
 704                     }
 705                     else {
 706                         if (pci_bus) {
 707                             c->init.init_pci (pci_bus, s);
 708                         }
 709                     }
 710                 }
 711             }
 712         }
 713     }
 714 }
 715 #endif
 716
 717 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 718 {
 719     static int nb_ne2k = 0;
 720
 721     if (nb_ne2k == NE2000_NB_MAX)
 722         return;
 723     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 724     nb_ne2k++;
 725 }
 726
 727 /* PC hardware initialisation */
 728 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 729                      const char *boot_device, DisplayState *ds,
 730                      const char *kernel_filename, const char *kernel_cmdline,
 731                      const char *initrd_filename,
 732                      int pci_enabled, const char *cpu_model)
 733 {
 734     char buf[1024];
 735     int ret, linux_boot, i;
 736     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 737     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 738     int bios_size, isa_bios_size, vga_bios_size;
 739     PCIBus *pci_bus;
 740     int piix3_devfn = -1;
 741     CPUState *env;
 742     NICInfo *nd;
 743     qemu_irq *cpu_irq;
 744     qemu_irq *i8259;
 745     int index;
 746     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 747     BlockDriverState *fd[MAX_FD];
 748
 749     if (ram_size >= 0xe0000000 ) {
 750         above_4g_mem_size = ram_size - 0xe0000000;
 751         below_4g_mem_size = 0xe0000000;
 752     } else {
 753         below_4g_mem_size = ram_size;
 754     }
 755
 756     linux_boot = (kernel_filename != NULL);
 757
 758     /* init CPUs */
 759     if (cpu_model == NULL) {
 760 #ifdef TARGET_X86_64
 761         cpu_model = "qemu64";
 762 #else
 763         cpu_model = "qemu32";
 764 #endif
 765     }
 766
 767     for(i = 0; i < smp_cpus; i++) {
 768         env = cpu_init(cpu_model);
 769         if (!env) {
 770             fprintf(stderr, "Unable to find x86 CPU definition\n");
 771             exit(1);
 772         }
 773         if (i != 0)
 774             env->halted = 1;
 775         if (smp_cpus > 1) {
 776             /* XXX: enable it in all cases */
 777             env->cpuid_features |= CPUID_APIC;
 778         }
 779         qemu_register_reset(main_cpu_reset, env);
 780         if (pci_enabled) {
 781             apic_init(env);
 782         }
 783     }
 784
 785     vmport_init();
 786
 787     /* allocate RAM */
 788     ram_addr = qemu_ram_alloc(0xa0000);
 789     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 790
 791     /* Allocate, even though we won't register, so we don't break the
 792      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 793      * and some bios areas, which will be registered later
 794      */
 795     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 796     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 797     cpu_register_physical_memory(0x100000,
 798                  below_4g_mem_size - 0x100000,
 799                  ram_addr);
 800
 801     /* above 4giga memory allocation */
 802     if (above_4g_mem_size > 0) {
 803         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 804         cpu_register_physical_memory(0x100000000ULL,
 805                                      above_4g_mem_size,
 806                                      ram_addr);
 807     }
 808
 809
 810     /* allocate VGA RAM */
 811     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 812
 813     /* BIOS load */
 814     if (bios_name == NULL)
 815         bios_name = BIOS_FILENAME;
 816     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 817     bios_size = get_image_size(buf);
 818     if (bios_size <= 0 ||
 819         (bios_size % 65536) != 0) {
 820         goto bios_error;
 821     }
 822     bios_offset = qemu_ram_alloc(bios_size);
 823     ret = load_image(buf, phys_ram_base + bios_offset);
 824     if (ret != bios_size) {
 825     bios_error:
 826         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 827         exit(1);
 828     }
 829
 830     /* VGA BIOS load */
 831     if (cirrus_vga_enabled) {
 832         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 833     } else {
 834         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 835     }
 836     vga_bios_size = get_image_size(buf);
 837     if (vga_bios_size <= 0 || vga_bios_size > 65536)
 838         goto vga_bios_error;
 839     vga_bios_offset = qemu_ram_alloc(65536);
 840
 841     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 842     if (ret != vga_bios_size) {
 843     vga_bios_error:
 844         fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 845         exit(1);
 846     }
 847
 848     /* setup basic memory access */
 849     cpu_register_physical_memory(0xc0000, 0x10000,
 850                                  vga_bios_offset | IO_MEM_ROM);
 851
 852     /* map the last 128KB of the BIOS in ISA space */
 853     isa_bios_size = bios_size;
 854     if (isa_bios_size > (128 * 1024))
 855         isa_bios_size = 128 * 1024;
 856     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 857                                  IO_MEM_UNASSIGNED);
 858     cpu_register_physical_memory(0x100000 - isa_bios_size,
 859                                  isa_bios_size,
 860                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 861
 862     {
 863         ram_addr_t option_rom_offset;
 864         int size, offset;
 865
 866         offset = 0;
 867         for (i = 0; i < nb_option_roms; i++) {
 868             size = get_image_size(option_rom[i]);
 869             if (size < 0) {
 870                 fprintf(stderr, "Could not load option rom '%s'\n",
 871                         option_rom[i]);
 872                 exit(1);
 873             }
 874             if (size > (0x10000 - offset))
 875                 goto option_rom_error;
 876             option_rom_offset = qemu_ram_alloc(size);
 877             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 878             if (ret != size) {
 879             option_rom_error:
 880                 fprintf(stderr, "Too many option ROMS\n");
 881                 exit(1);
 882             }
 883             size = (size + 4095) & ~4095;
 884             cpu_register_physical_memory(0xd0000 + offset,
 885                                          size, option_rom_offset | IO_MEM_ROM);
 886             offset += size;
 887         }
 888     }
 889
 890     /* map all the bios at the top of memory */
 891     cpu_register_physical_memory((uint32_t)(-bios_size),
 892                                  bios_size, bios_offset | IO_MEM_ROM);
 893
 894     bochs_bios_init();
 895
 896     if (linux_boot)
 897         load_linux(kernel_filename, initrd_filename, kernel_cmdline);
 898
 899     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 900     i8259 = i8259_init(cpu_irq[0]);
 901     ferr_irq = i8259[13];
 902
 903     if (pci_enabled) {
 904         pci_bus = i440fx_init(&i440fx_state, i8259);
 905         piix3_devfn = piix3_init(pci_bus, -1);
 906     } else {
 907         pci_bus = NULL;
 908     }
 909
 910     /* init basic PC hardware */
 911     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 912
 913     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 914
 915     if (cirrus_vga_enabled) {
 916         if (pci_enabled) {
 917             pci_cirrus_vga_init(pci_bus,
 918                                 ds, phys_ram_base + vga_ram_addr,
 919                                 vga_ram_addr, vga_ram_size);
 920         } else {
 921             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
 922                                 vga_ram_addr, vga_ram_size);
 923         }
 924     } else if (vmsvga_enabled) {
 925         if (pci_enabled)
 926             pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 927                             vga_ram_addr, vga_ram_size);
 928         else
 929             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 930     } else {
 931         if (pci_enabled) {
 932             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 933                          vga_ram_addr, vga_ram_size, 0, 0);
 934         } else {
 935             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
 936                          vga_ram_addr, vga_ram_size);
 937         }
 938     }
 939
 940     rtc_state = rtc_init(0x70, i8259[8]);
 941
 942     qemu_register_boot_set(pc_boot_set, rtc_state);
 943
 944     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 945     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 946
 947     if (pci_enabled) {
 948         ioapic = ioapic_init();
 949     }
 950     pit = pit_init(0x40, i8259[0]);
 951     pcspk_init(pit);
 952     if (pci_enabled) {
 953         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 954     }
 955
 956     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 957         if (serial_hds[i]) {
 958             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
 959                         serial_hds[i]);
 960         }
 961     }
 962
 963     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 964         if (parallel_hds[i]) {
 965             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
 966                           parallel_hds[i]);
 967         }
 968     }
 969
 970     for(i = 0; i < nb_nics; i++) {
 971         nd = &nd_table[i];
 972         if (!nd->model) {
 973             if (pci_enabled) {
 974                 nd->model = "ne2k_pci";
 975             } else {
 976                 nd->model = "ne2k_isa";
 977             }
 978         }
 979         if (strcmp(nd->model, "ne2k_isa") == 0) {
 980             pc_init_ne2k_isa(nd, i8259);
 981         } else if (pci_enabled) {
 982             if (strcmp(nd->model, "?") == 0)
 983                 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 984             pci_nic_init(pci_bus, nd, -1);
 985         } else if (strcmp(nd->model, "?") == 0) {
 986             fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 987             exit(1);
 988         } else {
 989             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 990             exit(1);
 991         }
 992     }
 993
 994     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 995         fprintf(stderr, "qemu: too many IDE bus\n");
 996         exit(1);
 997     }
 998
 999     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1000         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1001         if (index != -1)
1002             hd[i] = drives_table[index].bdrv;
1003         else
1004             hd[i] = NULL;
1005     }
1006
1007     if (pci_enabled) {
1008         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1009     } else {
1010         for(i = 0; i < MAX_IDE_BUS; i++) {
1011             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1012                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1013         }
1014     }
1015
1016     i8042_init(i8259[1], i8259[12], 0x60);
1017     DMA_init(0);
1018 #ifdef HAS_AUDIO
1019     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1020 #endif
1021
1022     for(i = 0; i < MAX_FD; i++) {
1023         index = drive_get_index(IF_FLOPPY, 0, i);
1024         if (index != -1)
1025             fd[i] = drives_table[index].bdrv;
1026         else
1027             fd[i] = NULL;
1028     }
1029     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1030
1031     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1032
1033     if (pci_enabled && usb_enabled) {
1034         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1035     }
1036
1037     if (pci_enabled && acpi_enabled) {
1038         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1039         i2c_bus *smbus;
1040
1041         /* TODO: Populate SPD eeprom data.  */
1042         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1043         for (i = 0; i < 8; i++) {
1044             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1045         }
1046     }
1047
1048     if (i440fx_state) {
1049         i440fx_init_memory_mappings(i440fx_state);
1050     }
1051
1052     if (pci_enabled) {
1053         int max_bus;
1054         int bus, unit;
1055         void *scsi;
1056
1057         max_bus = drive_get_max_bus(IF_SCSI);
1058
1059         for (bus = 0; bus <= max_bus; bus++) {
1060             scsi = lsi_scsi_init(pci_bus, -1);
1061             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1062                 index = drive_get_index(IF_SCSI, bus, unit);
1063                 if (index == -1)
1064                     continue;
1065                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1066             }
1067         }
1068     }
1069 }
1070
1071 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1072                         const char *boot_device, DisplayState *ds,
1073                         const char *kernel_filename,
1074                         const char *kernel_cmdline,
1075                         const char *initrd_filename,
1076                         const char *cpu_model)
1077 {
1078     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1079              kernel_filename, kernel_cmdline,
1080              initrd_filename, 1, cpu_model);
1081 }
1082
1083 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1084                         const char *boot_device, DisplayState *ds,
1085                         const char *kernel_filename,
1086                         const char *kernel_cmdline,
1087                         const char *initrd_filename,
1088                         const char *cpu_model)
1089 {
1090     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1091              kernel_filename, kernel_cmdline,
1092              initrd_filename, 0, cpu_model);
1093 }
1094
1095 QEMUMachine pc_machine = {
1096     .name = "pc",
1097     .desc = "Standard PC",
1098     .init = pc_init_pci,
1099     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1100 };
1101
1102 QEMUMachine isapc_machine = {
1103     .name = "isapc",
1104     .desc = "ISA-only PC",
1105     .init = pc_init_isa,
1106     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1107 };