gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  19  */
  20 #include "config.h"
  21 #include "qemu-common.h"
  22 #ifdef CONFIG_USER_ONLY
  23 #include <stdlib.h>
  24 #include <stdio.h>
  25 #include <stdarg.h>
  26 #include <string.h>
  27 #include <errno.h>
  28 #include <unistd.h>
  29 #include <fcntl.h>
  30
  31 #include "qemu.h"
  32 #else
  33 #include "monitor.h"
  34 #include "qemu-char.h"
  35 #include "sysemu.h"
  36 #include "gdbstub.h"
  37 #endif
  38
  39 #define MAX_PACKET_LENGTH 4096
  40
  41 #include "qemu_socket.h"
  42 #include "kvm.h"
  43
  44
  45 enum {
  46     GDB_SIGNAL_0 = 0,
  47     GDB_SIGNAL_INT = 2,
  48     GDB_SIGNAL_TRAP = 5,
  49     GDB_SIGNAL_UNKNOWN = 143
  50 };
  51
  52 #ifdef CONFIG_USER_ONLY
  53
  54 /* Map target signal numbers to GDB protocol signal numbers and vice
  55  * versa.  For user emulation's currently supported systems, we can
  56  * assume most signals are defined.
  57  */
  58
  59 static int gdb_signal_table[] = {
  60     0,
  61     TARGET_SIGHUP,
  62     TARGET_SIGINT,
  63     TARGET_SIGQUIT,
  64     TARGET_SIGILL,
  65     TARGET_SIGTRAP,
  66     TARGET_SIGABRT,
  67     -1, /* SIGEMT */
  68     TARGET_SIGFPE,
  69     TARGET_SIGKILL,
  70     TARGET_SIGBUS,
  71     TARGET_SIGSEGV,
  72     TARGET_SIGSYS,
  73     TARGET_SIGPIPE,
  74     TARGET_SIGALRM,
  75     TARGET_SIGTERM,
  76     TARGET_SIGURG,
  77     TARGET_SIGSTOP,
  78     TARGET_SIGTSTP,
  79     TARGET_SIGCONT,
  80     TARGET_SIGCHLD,
  81     TARGET_SIGTTIN,
  82     TARGET_SIGTTOU,
  83     TARGET_SIGIO,
  84     TARGET_SIGXCPU,
  85     TARGET_SIGXFSZ,
  86     TARGET_SIGVTALRM,
  87     TARGET_SIGPROF,
  88     TARGET_SIGWINCH,
  89     -1, /* SIGLOST */
  90     TARGET_SIGUSR1,
  91     TARGET_SIGUSR2,
  92 #ifdef TARGET_SIGPWR
  93     TARGET_SIGPWR,
  94 #else
  95     -1,
  96 #endif
  97     -1, /* SIGPOLL */
  98     -1,
  99     -1,
 100     -1,
 101     -1,
 102     -1,
 103     -1,
 104     -1,
 105     -1,
 106     -1,
 107     -1,
 108     -1,
 109 #ifdef __SIGRTMIN
 110     __SIGRTMIN + 1,
 111     __SIGRTMIN + 2,
 112     __SIGRTMIN + 3,
 113     __SIGRTMIN + 4,
 114     __SIGRTMIN + 5,
 115     __SIGRTMIN + 6,
 116     __SIGRTMIN + 7,
 117     __SIGRTMIN + 8,
 118     __SIGRTMIN + 9,
 119     __SIGRTMIN + 10,
 120     __SIGRTMIN + 11,
 121     __SIGRTMIN + 12,
 122     __SIGRTMIN + 13,
 123     __SIGRTMIN + 14,
 124     __SIGRTMIN + 15,
 125     __SIGRTMIN + 16,
 126     __SIGRTMIN + 17,
 127     __SIGRTMIN + 18,
 128     __SIGRTMIN + 19,
 129     __SIGRTMIN + 20,
 130     __SIGRTMIN + 21,
 131     __SIGRTMIN + 22,
 132     __SIGRTMIN + 23,
 133     __SIGRTMIN + 24,
 134     __SIGRTMIN + 25,
 135     __SIGRTMIN + 26,
 136     __SIGRTMIN + 27,
 137     __SIGRTMIN + 28,
 138     __SIGRTMIN + 29,
 139     __SIGRTMIN + 30,
 140     __SIGRTMIN + 31,
 141     -1, /* SIGCANCEL */
 142     __SIGRTMIN,
 143     __SIGRTMIN + 32,
 144     __SIGRTMIN + 33,
 145     __SIGRTMIN + 34,
 146     __SIGRTMIN + 35,
 147     __SIGRTMIN + 36,
 148     __SIGRTMIN + 37,
 149     __SIGRTMIN + 38,
 150     __SIGRTMIN + 39,
 151     __SIGRTMIN + 40,
 152     __SIGRTMIN + 41,
 153     __SIGRTMIN + 42,
 154     __SIGRTMIN + 43,
 155     __SIGRTMIN + 44,
 156     __SIGRTMIN + 45,
 157     __SIGRTMIN + 46,
 158     __SIGRTMIN + 47,
 159     __SIGRTMIN + 48,
 160     __SIGRTMIN + 49,
 161     __SIGRTMIN + 50,
 162     __SIGRTMIN + 51,
 163     __SIGRTMIN + 52,
 164     __SIGRTMIN + 53,
 165     __SIGRTMIN + 54,
 166     __SIGRTMIN + 55,
 167     __SIGRTMIN + 56,
 168     __SIGRTMIN + 57,
 169     __SIGRTMIN + 58,
 170     __SIGRTMIN + 59,
 171     __SIGRTMIN + 60,
 172     __SIGRTMIN + 61,
 173     __SIGRTMIN + 62,
 174     __SIGRTMIN + 63,
 175     __SIGRTMIN + 64,
 176     __SIGRTMIN + 65,
 177     __SIGRTMIN + 66,
 178     __SIGRTMIN + 67,
 179     __SIGRTMIN + 68,
 180     __SIGRTMIN + 69,
 181     __SIGRTMIN + 70,
 182     __SIGRTMIN + 71,
 183     __SIGRTMIN + 72,
 184     __SIGRTMIN + 73,
 185     __SIGRTMIN + 74,
 186     __SIGRTMIN + 75,
 187     __SIGRTMIN + 76,
 188     __SIGRTMIN + 77,
 189     __SIGRTMIN + 78,
 190     __SIGRTMIN + 79,
 191     __SIGRTMIN + 80,
 192     __SIGRTMIN + 81,
 193     __SIGRTMIN + 82,
 194     __SIGRTMIN + 83,
 195     __SIGRTMIN + 84,
 196     __SIGRTMIN + 85,
 197     __SIGRTMIN + 86,
 198     __SIGRTMIN + 87,
 199     __SIGRTMIN + 88,
 200     __SIGRTMIN + 89,
 201     __SIGRTMIN + 90,
 202     __SIGRTMIN + 91,
 203     __SIGRTMIN + 92,
 204     __SIGRTMIN + 93,
 205     __SIGRTMIN + 94,
 206     __SIGRTMIN + 95,
 207     -1, /* SIGINFO */
 208     -1, /* UNKNOWN */
 209     -1, /* DEFAULT */
 210     -1,
 211     -1,
 212     -1,
 213     -1,
 214     -1,
 215     -1
 216 #endif
 217 };
 218 #else
 219 /* In system mode we only need SIGINT and SIGTRAP; other signals
 220    are not yet supported.  */
 221
 222 enum {
 223     TARGET_SIGINT = 2,
 224     TARGET_SIGTRAP = 5
 225 };
 226
 227 static int gdb_signal_table[] = {
 228     -1,
 229     -1,
 230     TARGET_SIGINT,
 231     -1,
 232     -1,
 233     TARGET_SIGTRAP
 234 };
 235 #endif
 236
 237 #ifdef CONFIG_USER_ONLY
 238 static int target_signal_to_gdb (int sig)
 239 {
 240     int i;
 241     for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
 242         if (gdb_signal_table[i] == sig)
 243             return i;
 244     return GDB_SIGNAL_UNKNOWN;
 245 }
 246 #endif
 247
 248 static int gdb_signal_to_target (int sig)
 249 {
 250     if (sig < ARRAY_SIZE (gdb_signal_table))
 251         return gdb_signal_table[sig];
 252     else
 253         return -1;
 254 }
 255
 256 //#define DEBUG_GDB
 257
 258 typedef struct GDBRegisterState {
 259     int base_reg;
 260     int num_regs;
 261     gdb_reg_cb get_reg;
 262     gdb_reg_cb set_reg;
 263     const char *xml;
 264     struct GDBRegisterState *next;
 265 } GDBRegisterState;
 266
 267 enum RSState {
 268     RS_INACTIVE,
 269     RS_IDLE,
 270     RS_GETLINE,
 271     RS_CHKSUM1,
 272     RS_CHKSUM2,
 273     RS_SYSCALL,
 274 };
 275 typedef struct GDBState {
 276     CPUState *c_cpu; /* current CPU for step/continue ops */
 277     CPUState *g_cpu; /* current CPU for other ops */
 278     CPUState *query_cpu; /* for q{f|s}ThreadInfo */
 279     enum RSState state; /* parsing state */
 280     char line_buf[MAX_PACKET_LENGTH];
 281     int line_buf_index;
 282     int line_csum;
 283     uint8_t last_packet[MAX_PACKET_LENGTH + 4];
 284     int last_packet_len;
 285     int signal;
 286 #ifdef CONFIG_USER_ONLY
 287     int fd;
 288     int running_state;
 289 #else
 290     CharDriverState *chr;
 291     CharDriverState *mon_chr;
 292 #endif
 293 } GDBState;
 294
 295 /* By default use no IRQs and no timers while single stepping so as to
 296  * make single stepping like an ICE HW step.
 297  */
 298 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
 299
 300 static GDBState *gdbserver_state;
 301
 302 /* This is an ugly hack to cope with both new and old gdb.
 303    If gdb sends qXfer:features:read then assume we're talking to a newish
 304    gdb that understands target descriptions.  */
 305 static int gdb_has_xml;
 306
 307 #ifdef CONFIG_USER_ONLY
 308 /* XXX: This is not thread safe.  Do we care?  */
 309 static int gdbserver_fd = -1;
 310
 311 static int get_char(GDBState *s)
 312 {
 313     uint8_t ch;
 314     int ret;
 315
 316     for(;;) {
 317         ret = recv(s->fd, &ch, 1, 0);
 318         if (ret < 0) {
 319             if (errno == ECONNRESET)
 320                 s->fd = -1;
 321             if (errno != EINTR && errno != EAGAIN)
 322                 return -1;
 323         } else if (ret == 0) {
 324             close(s->fd);
 325             s->fd = -1;
 326             return -1;
 327         } else {
 328             break;
 329         }
 330     }
 331     return ch;
 332 }
 333 #endif
 334
 335 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 336
 337 enum {
 338     GDB_SYS_UNKNOWN,
 339     GDB_SYS_ENABLED,
 340     GDB_SYS_DISABLED,
 341 } gdb_syscall_mode;
 342
 343 /* If gdb is connected when the first semihosting syscall occurs then use
 344    remote gdb syscalls.  Otherwise use native file IO.  */
 345 int use_gdb_syscalls(void)
 346 {
 347     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 348         gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
 349                                             : GDB_SYS_DISABLED);
 350     }
 351     return gdb_syscall_mode == GDB_SYS_ENABLED;
 352 }
 353
 354 /* Resume execution.  */
 355 static inline void gdb_continue(GDBState *s)
 356 {
 357 #ifdef CONFIG_USER_ONLY
 358     s->running_state = 1;
 359 #else
 360     vm_start();
 361 #endif
 362 }
 363
 364 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 365 {
 366 #ifdef CONFIG_USER_ONLY
 367     int ret;
 368
 369     while (len > 0) {
 370         ret = send(s->fd, buf, len, 0);
 371         if (ret < 0) {
 372             if (errno != EINTR && errno != EAGAIN)
 373                 return;
 374         } else {
 375             buf += ret;
 376             len -= ret;
 377         }
 378     }
 379 #else
 380     qemu_chr_write(s->chr, buf, len);
 381 #endif
 382 }
 383
 384 static inline int fromhex(int v)
 385 {
 386     if (v >= '0' && v <= '9')
 387         return v - '0';
 388     else if (v >= 'A' && v <= 'F')
 389         return v - 'A' + 10;
 390     else if (v >= 'a' && v <= 'f')
 391         return v - 'a' + 10;
 392     else
 393         return 0;
 394 }
 395
 396 static inline int tohex(int v)
 397 {
 398     if (v < 10)
 399         return v + '0';
 400     else
 401         return v - 10 + 'a';
 402 }
 403
 404 static void memtohex(char *buf, const uint8_t *mem, int len)
 405 {
 406     int i, c;
 407     char *q;
 408     q = buf;
 409     for(i = 0; i < len; i++) {
 410         c = mem[i];
 411         *q++ = tohex(c >> 4);
 412         *q++ = tohex(c & 0xf);
 413     }
 414     *q = '\0';
 415 }
 416
 417 static void hextomem(uint8_t *mem, const char *buf, int len)
 418 {
 419     int i;
 420
 421     for(i = 0; i < len; i++) {
 422         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 423         buf += 2;
 424     }
 425 }
 426
 427 /* return -1 if error, 0 if OK */
 428 static int put_packet_binary(GDBState *s, const char *buf, int len)
 429 {
 430     int csum, i;
 431     uint8_t *p;
 432
 433     for(;;) {
 434         p = s->last_packet;
 435         *(p++) = '$';
 436         memcpy(p, buf, len);
 437         p += len;
 438         csum = 0;
 439         for(i = 0; i < len; i++) {
 440             csum += buf[i];
 441         }
 442         *(p++) = '#';
 443         *(p++) = tohex((csum >> 4) & 0xf);
 444         *(p++) = tohex((csum) & 0xf);
 445
 446         s->last_packet_len = p - s->last_packet;
 447         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 448
 449 #ifdef CONFIG_USER_ONLY
 450         i = get_char(s);
 451         if (i < 0)
 452             return -1;
 453         if (i == '+')
 454             break;
 455 #else
 456         break;
 457 #endif
 458     }
 459     return 0;
 460 }
 461
 462 /* return -1 if error, 0 if OK */
 463 static int put_packet(GDBState *s, const char *buf)
 464 {
 465 #ifdef DEBUG_GDB
 466     printf("reply='%s'\n", buf);
 467 #endif
 468
 469     return put_packet_binary(s, buf, strlen(buf));
 470 }
 471
 472 /* The GDB remote protocol transfers values in target byte order.  This means
 473    we can use the raw memory access routines to access the value buffer.
 474    Conveniently, these also handle the case where the buffer is mis-aligned.
 475  */
 476 #define GET_REG8(val) do { \
 477     stb_p(mem_buf, val); \
 478     return 1; \
 479     } while(0)
 480 #define GET_REG16(val) do { \
 481     stw_p(mem_buf, val); \
 482     return 2; \
 483     } while(0)
 484 #define GET_REG32(val) do { \
 485     stl_p(mem_buf, val); \
 486     return 4; \
 487     } while(0)
 488 #define GET_REG64(val) do { \
 489     stq_p(mem_buf, val); \
 490     return 8; \
 491     } while(0)
 492
 493 #if TARGET_LONG_BITS == 64
 494 #define GET_REGL(val) GET_REG64(val)
 495 #define ldtul_p(addr) ldq_p(addr)
 496 #else
 497 #define GET_REGL(val) GET_REG32(val)
 498 #define ldtul_p(addr) ldl_p(addr)
 499 #endif
 500
 501 #if defined(TARGET_I386)
 502
 503 #ifdef TARGET_X86_64
 504 static const int gpr_map[16] = {
 505     R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
 506     8, 9, 10, 11, 12, 13, 14, 15
 507 };
 508 #else
 509 static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7};
 510 #endif
 511
 512 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
 513
 514 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 515 {
 516     if (n < CPU_NB_REGS) {
 517         GET_REGL(env->regs[gpr_map[n]]);
 518     } else if (n >= CPU_NB_REGS + 8 && n < CPU_NB_REGS + 16) {
 519         /* FIXME: byteswap float values.  */
 520 #ifdef USE_X86LDOUBLE
 521         memcpy(mem_buf, &env->fpregs[n - (CPU_NB_REGS + 8)], 10);
 522 #else
 523         memset(mem_buf, 0, 10);
 524 #endif
 525         return 10;
 526     } else if (n >= CPU_NB_REGS + 24) {
 527         n -= CPU_NB_REGS + 24;
 528         if (n < CPU_NB_REGS) {
 529             stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
 530             stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
 531             return 16;
 532         } else if (n == CPU_NB_REGS) {
 533             GET_REG32(env->mxcsr);
 534         }
 535     } else {
 536         n -= CPU_NB_REGS;
 537         switch (n) {
 538         case 0: GET_REGL(env->eip);
 539         case 1: GET_REG32(env->eflags);
 540         case 2: GET_REG32(env->segs[R_CS].selector);
 541         case 3: GET_REG32(env->segs[R_SS].selector);
 542         case 4: GET_REG32(env->segs[R_DS].selector);
 543         case 5: GET_REG32(env->segs[R_ES].selector);
 544         case 6: GET_REG32(env->segs[R_FS].selector);
 545         case 7: GET_REG32(env->segs[R_GS].selector);
 546         /* 8...15 x87 regs.  */
 547         case 16: GET_REG32(env->fpuc);
 548         case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11);
 549         case 18: GET_REG32(0); /* ftag */
 550         case 19: GET_REG32(0); /* fiseg */
 551         case 20: GET_REG32(0); /* fioff */
 552         case 21: GET_REG32(0); /* foseg */
 553         case 22: GET_REG32(0); /* fooff */
 554         case 23: GET_REG32(0); /* fop */
 555         /* 24+ xmm regs.  */
 556         }
 557     }
 558     return 0;
 559 }
 560
 561 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i)
 562 {
 563     uint32_t tmp;
 564
 565     if (i < CPU_NB_REGS) {
 566         env->regs[gpr_map[i]] = ldtul_p(mem_buf);
 567         return sizeof(target_ulong);
 568     } else if (i >= CPU_NB_REGS + 8 && i < CPU_NB_REGS + 16) {
 569         i -= CPU_NB_REGS + 8;
 570 #ifdef USE_X86LDOUBLE
 571         memcpy(&env->fpregs[i], mem_buf, 10);
 572 #endif
 573         return 10;
 574     } else if (i >= CPU_NB_REGS + 24) {
 575         i -= CPU_NB_REGS + 24;
 576         if (i < CPU_NB_REGS) {
 577             env->xmm_regs[i].XMM_Q(0) = ldq_p(mem_buf);
 578             env->xmm_regs[i].XMM_Q(1) = ldq_p(mem_buf + 8);
 579             return 16;
 580         } else if (i == CPU_NB_REGS) {
 581             env->mxcsr = ldl_p(mem_buf);
 582             return 4;
 583         }
 584     } else {
 585         i -= CPU_NB_REGS;
 586         switch (i) {
 587         case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong);
 588         case 1: env->eflags = ldl_p(mem_buf); return 4;
 589 #if defined(CONFIG_USER_ONLY)
 590 #define LOAD_SEG(index, sreg)\
 591             tmp = ldl_p(mem_buf);\
 592             if (tmp != env->segs[sreg].selector)\
 593                 cpu_x86_load_seg(env, sreg, tmp);
 594 #else
 595 /* FIXME: Honor segment registers.  Needs to avoid raising an exception
 596    when the selector is invalid.  */
 597 #define LOAD_SEG(index, sreg) do {} while(0)
 598 #endif
 599         case 2: LOAD_SEG(10, R_CS); return 4;
 600         case 3: LOAD_SEG(11, R_SS); return 4;
 601         case 4: LOAD_SEG(12, R_DS); return 4;
 602         case 5: LOAD_SEG(13, R_ES); return 4;
 603         case 6: LOAD_SEG(14, R_FS); return 4;
 604         case 7: LOAD_SEG(15, R_GS); return 4;
 605         /* 8...15 x87 regs.  */
 606         case 16: env->fpuc = ldl_p(mem_buf); return 4;
 607         case 17:
 608                  tmp = ldl_p(mem_buf);
 609                  env->fpstt = (tmp >> 11) & 7;
 610                  env->fpus = tmp & ~0x3800;
 611                  return 4;
 612         case 18: /* ftag */ return 4;
 613         case 19: /* fiseg */ return 4;
 614         case 20: /* fioff */ return 4;
 615         case 21: /* foseg */ return 4;
 616         case 22: /* fooff */ return 4;
 617         case 23: /* fop */ return 4;
 618         /* 24+ xmm regs.  */
 619         }
 620     }
 621     /* Unrecognised register.  */
 622     return 0;
 623 }
 624
 625 #elif defined (TARGET_PPC)
 626
 627 /* Old gdb always expects FP registers.  Newer (xml-aware) gdb only
 628    expects whatever the target description contains.  Due to a
 629    historical mishap the FP registers appear in between core integer
 630    regs and PC, MSR, CR, and so forth.  We hack round this by giving the
 631    FP regs zero size when talking to a newer gdb.  */
 632 #define NUM_CORE_REGS 71
 633 #if defined (TARGET_PPC64)
 634 #define GDB_CORE_XML "power64-core.xml"
 635 #else
 636 #define GDB_CORE_XML "power-core.xml"
 637 #endif
 638
 639 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 640 {
 641     if (n < 32) {
 642         /* gprs */
 643         GET_REGL(env->gpr[n]);
 644     } else if (n < 64) {
 645         /* fprs */
 646         if (gdb_has_xml)
 647             return 0;
 648         stfq_p(mem_buf, env->fpr[n-32]);
 649         return 8;
 650     } else {
 651         switch (n) {
 652         case 64: GET_REGL(env->nip);
 653         case 65: GET_REGL(env->msr);
 654         case 66:
 655             {
 656                 uint32_t cr = 0;
 657                 int i;
 658                 for (i = 0; i < 8; i++)
 659                     cr |= env->crf[i] << (32 - ((i + 1) * 4));
 660                 GET_REG32(cr);
 661             }
 662         case 67: GET_REGL(env->lr);
 663         case 68: GET_REGL(env->ctr);
 664         case 69: GET_REGL(env->xer);
 665         case 70:
 666             {
 667                 if (gdb_has_xml)
 668                     return 0;
 669                 GET_REG32(0); /* fpscr */
 670             }
 671         }
 672     }
 673     return 0;
 674 }
 675
 676 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 677 {
 678     if (n < 32) {
 679         /* gprs */
 680         env->gpr[n] = ldtul_p(mem_buf);
 681         return sizeof(target_ulong);
 682     } else if (n < 64) {
 683         /* fprs */
 684         if (gdb_has_xml)
 685             return 0;
 686         env->fpr[n-32] = ldfq_p(mem_buf);
 687         return 8;
 688     } else {
 689         switch (n) {
 690         case 64:
 691             env->nip = ldtul_p(mem_buf);
 692             return sizeof(target_ulong);
 693         case 65:
 694             ppc_store_msr(env, ldtul_p(mem_buf));
 695             return sizeof(target_ulong);
 696         case 66:
 697             {
 698                 uint32_t cr = ldl_p(mem_buf);
 699                 int i;
 700                 for (i = 0; i < 8; i++)
 701                     env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
 702                 return 4;
 703             }
 704         case 67:
 705             env->lr = ldtul_p(mem_buf);
 706             return sizeof(target_ulong);
 707         case 68:
 708             env->ctr = ldtul_p(mem_buf);
 709             return sizeof(target_ulong);
 710         case 69:
 711             env->xer = ldtul_p(mem_buf);
 712             return sizeof(target_ulong);
 713         case 70:
 714             /* fpscr */
 715             if (gdb_has_xml)
 716                 return 0;
 717             return 4;
 718         }
 719     }
 720     return 0;
 721 }
 722
 723 #elif defined (TARGET_SPARC)
 724
 725 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
 726 #define NUM_CORE_REGS 86
 727 #else
 728 #define NUM_CORE_REGS 72
 729 #endif
 730
 731 #ifdef TARGET_ABI32
 732 #define GET_REGA(val) GET_REG32(val)
 733 #else
 734 #define GET_REGA(val) GET_REGL(val)
 735 #endif
 736
 737 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 738 {
 739     if (n < 8) {
 740         /* g0..g7 */
 741         GET_REGA(env->gregs[n]);
 742     }
 743     if (n < 32) {
 744         /* register window */
 745         GET_REGA(env->regwptr[n - 8]);
 746     }
 747 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 748     if (n < 64) {
 749         /* fprs */
 750         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 751     }
 752     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 753     switch (n) {
 754     case 64: GET_REGA(env->y);
 755     case 65: GET_REGA(GET_PSR(env));
 756     case 66: GET_REGA(env->wim);
 757     case 67: GET_REGA(env->tbr);
 758     case 68: GET_REGA(env->pc);
 759     case 69: GET_REGA(env->npc);
 760     case 70: GET_REGA(env->fsr);
 761     case 71: GET_REGA(0); /* csr */
 762     default: GET_REGA(0);
 763     }
 764 #else
 765     if (n < 64) {
 766         /* f0-f31 */
 767         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 768     }
 769     if (n < 80) {
 770         /* f32-f62 (double width, even numbers only) */
 771         uint64_t val;
 772
 773         val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
 774         val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
 775         GET_REG64(val);
 776     }
 777     switch (n) {
 778     case 80: GET_REGL(env->pc);
 779     case 81: GET_REGL(env->npc);
 780     case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
 781                            ((env->asi & 0xff) << 24) |
 782                            ((env->pstate & 0xfff) << 8) |
 783                            GET_CWP64(env));
 784     case 83: GET_REGL(env->fsr);
 785     case 84: GET_REGL(env->fprs);
 786     case 85: GET_REGL(env->y);
 787     }
 788 #endif
 789     return 0;
 790 }
 791
 792 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 793 {
 794 #if defined(TARGET_ABI32)
 795     abi_ulong tmp;
 796
 797     tmp = ldl_p(mem_buf);
 798 #else
 799     target_ulong tmp;
 800
 801     tmp = ldtul_p(mem_buf);
 802 #endif
 803
 804     if (n < 8) {
 805         /* g0..g7 */
 806         env->gregs[n] = tmp;
 807     } else if (n < 32) {
 808         /* register window */
 809         env->regwptr[n - 8] = tmp;
 810     }
 811 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 812     else if (n < 64) {
 813         /* fprs */
 814         *((uint32_t *)&env->fpr[n - 32]) = tmp;
 815     } else {
 816         /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 817         switch (n) {
 818         case 64: env->y = tmp; break;
 819         case 65: PUT_PSR(env, tmp); break;
 820         case 66: env->wim = tmp; break;
 821         case 67: env->tbr = tmp; break;
 822         case 68: env->pc = tmp; break;
 823         case 69: env->npc = tmp; break;
 824         case 70: env->fsr = tmp; break;
 825         default: return 0;
 826         }
 827     }
 828     return 4;
 829 #else
 830     else if (n < 64) {
 831         /* f0-f31 */
 832         env->fpr[n] = ldfl_p(mem_buf);
 833         return 4;
 834     } else if (n < 80) {
 835         /* f32-f62 (double width, even numbers only) */
 836         *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
 837         *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
 838     } else {
 839         switch (n) {
 840         case 80: env->pc = tmp; break;
 841         case 81: env->npc = tmp; break;
 842         case 82:
 843             PUT_CCR(env, tmp >> 32);
 844             env->asi = (tmp >> 24) & 0xff;
 845             env->pstate = (tmp >> 8) & 0xfff;
 846             PUT_CWP64(env, tmp & 0xff);
 847             break;
 848         case 83: env->fsr = tmp; break;
 849         case 84: env->fprs = tmp; break;
 850         case 85: env->y = tmp; break;
 851         default: return 0;
 852         }
 853     }
 854     return 8;
 855 #endif
 856 }
 857 #elif defined (TARGET_ARM)
 858
 859 /* Old gdb always expect FPA registers.  Newer (xml-aware) gdb only expect
 860    whatever the target description contains.  Due to a historical mishap
 861    the FPA registers appear in between core integer regs and the CPSR.
 862    We hack round this by giving the FPA regs zero size when talking to a
 863    newer gdb.  */
 864 #define NUM_CORE_REGS 26
 865 #define GDB_CORE_XML "arm-core.xml"
 866
 867 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 868 {
 869     if (n < 16) {
 870         /* Core integer register.  */
 871         GET_REG32(env->regs[n]);
 872     }
 873     if (n < 24) {
 874         /* FPA registers.  */
 875         if (gdb_has_xml)
 876             return 0;
 877         memset(mem_buf, 0, 12);
 878         return 12;
 879     }
 880     switch (n) {
 881     case 24:
 882         /* FPA status register.  */
 883         if (gdb_has_xml)
 884             return 0;
 885         GET_REG32(0);
 886     case 25:
 887         /* CPSR */
 888         GET_REG32(cpsr_read(env));
 889     }
 890     /* Unknown register.  */
 891     return 0;
 892 }
 893
 894 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 895 {
 896     uint32_t tmp;
 897
 898     tmp = ldl_p(mem_buf);
 899
 900     /* Mask out low bit of PC to workaround gdb bugs.  This will probably
 901        cause problems if we ever implement the Jazelle DBX extensions.  */
 902     if (n == 15)
 903         tmp &= ~1;
 904
 905     if (n < 16) {
 906         /* Core integer register.  */
 907         env->regs[n] = tmp;
 908         return 4;
 909     }
 910     if (n < 24) { /* 16-23 */
 911         /* FPA registers (ignored).  */
 912         if (gdb_has_xml)
 913             return 0;
 914         return 12;
 915     }
 916     switch (n) {
 917     case 24:
 918         /* FPA status register (ignored).  */
 919         if (gdb_has_xml)
 920             return 0;
 921         return 4;
 922     case 25:
 923         /* CPSR */
 924         cpsr_write (env, tmp, 0xffffffff);
 925         return 4;
 926     }
 927     /* Unknown register.  */
 928     return 0;
 929 }
 930
 931 #elif defined (TARGET_M68K)
 932
 933 #define NUM_CORE_REGS 18
 934
 935 #define GDB_CORE_XML "cf-core.xml"
 936
 937 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 938 {
 939     if (n < 8) {
 940         /* D0-D7 */
 941         GET_REG32(env->dregs[n]);
 942     } else if (n < 16) {
 943         /* A0-A7 */
 944         GET_REG32(env->aregs[n - 8]);
 945     } else {
 946         switch (n) {
 947         case 16: GET_REG32(env->sr);
 948         case 17: GET_REG32(env->pc);
 949         }
 950     }
 951     /* FP registers not included here because they vary between
 952        ColdFire and m68k.  Use XML bits for these.  */
 953     return 0;
 954 }
 955
 956 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 957 {
 958     uint32_t tmp;
 959
 960     tmp = ldl_p(mem_buf);
 961
 962     if (n < 8) {
 963         /* D0-D7 */
 964         env->dregs[n] = tmp;
 965     } else if (n < 8) {
 966         /* A0-A7 */
 967         env->aregs[n - 8] = tmp;
 968     } else {
 969         switch (n) {
 970         case 16: env->sr = tmp; break;
 971         case 17: env->pc = tmp; break;
 972         default: return 0;
 973         }
 974     }
 975     return 4;
 976 }
 977 #elif defined (TARGET_MIPS)
 978
 979 #define NUM_CORE_REGS 73
 980
 981 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 982 {
 983     if (n < 32) {
 984         GET_REGL(env->active_tc.gpr[n]);
 985     }
 986     if (env->CP0_Config1 & (1 << CP0C1_FP)) {
 987         if (n >= 38 && n < 70) {
 988             if (env->CP0_Status & (1 << CP0St_FR))
 989                 GET_REGL(env->active_fpu.fpr[n - 38].d);
 990             else
 991                 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
 992         }
 993         switch (n) {
 994         case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
 995         case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
 996         }
 997     }
 998     switch (n) {
 999     case 32: GET_REGL((int32_t)env->CP0_Status);
1000     case 33: GET_REGL(env->active_tc.LO[0]);
1001     case 34: GET_REGL(env->active_tc.HI[0]);
1002     case 35: GET_REGL(env->CP0_BadVAddr);
1003     case 36: GET_REGL((int32_t)env->CP0_Cause);
1004     case 37: GET_REGL(env->active_tc.PC);
1005     case 72: GET_REGL(0); /* fp */
1006     case 89: GET_REGL((int32_t)env->CP0_PRid);
1007     }
1008     if (n >= 73 && n <= 88) {
1009         /* 16 embedded regs.  */
1010         GET_REGL(0);
1011     }
1012
1013     return 0;
1014 }
1015
1016 /* convert MIPS rounding mode in FCR31 to IEEE library */
1017 static unsigned int ieee_rm[] =
1018   {
1019     float_round_nearest_even,
1020     float_round_to_zero,
1021     float_round_up,
1022     float_round_down
1023   };
1024 #define RESTORE_ROUNDING_MODE \
1025     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1026
1027 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1028 {
1029     target_ulong tmp;
1030
1031     tmp = ldtul_p(mem_buf);
1032
1033     if (n < 32) {
1034         env->active_tc.gpr[n] = tmp;
1035         return sizeof(target_ulong);
1036     }
1037     if (env->CP0_Config1 & (1 << CP0C1_FP)
1038             && n >= 38 && n < 73) {
1039         if (n < 70) {
1040             if (env->CP0_Status & (1 << CP0St_FR))
1041               env->active_fpu.fpr[n - 38].d = tmp;
1042             else
1043               env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1044         }
1045         switch (n) {
1046         case 70:
1047             env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1048             /* set rounding mode */
1049             RESTORE_ROUNDING_MODE;
1050 #ifndef CONFIG_SOFTFLOAT
1051             /* no floating point exception for native float */
1052             SET_FP_ENABLE(env->active_fpu.fcr31, 0);
1053 #endif
1054             break;
1055         case 71: env->active_fpu.fcr0 = tmp; break;
1056         }
1057         return sizeof(target_ulong);
1058     }
1059     switch (n) {
1060     case 32: env->CP0_Status = tmp; break;
1061     case 33: env->active_tc.LO[0] = tmp; break;
1062     case 34: env->active_tc.HI[0] = tmp; break;
1063     case 35: env->CP0_BadVAddr = tmp; break;
1064     case 36: env->CP0_Cause = tmp; break;
1065     case 37: env->active_tc.PC = tmp; break;
1066     case 72: /* fp, ignored */ break;
1067     default:
1068         if (n > 89)
1069             return 0;
1070         /* Other registers are readonly.  Ignore writes.  */
1071         break;
1072     }
1073
1074     return sizeof(target_ulong);
1075 }
1076 #elif defined (TARGET_SH4)
1077
1078 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
1079 /* FIXME: We should use XML for this.  */
1080
1081 #define NUM_CORE_REGS 59
1082
1083 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1084 {
1085     if (n < 8) {
1086         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1087             GET_REGL(env->gregs[n + 16]);
1088         } else {
1089             GET_REGL(env->gregs[n]);
1090         }
1091     } else if (n < 16) {
1092         GET_REGL(env->gregs[n - 8]);
1093     } else if (n >= 25 && n < 41) {
1094         GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
1095     } else if (n >= 43 && n < 51) {
1096         GET_REGL(env->gregs[n - 43]);
1097     } else if (n >= 51 && n < 59) {
1098         GET_REGL(env->gregs[n - (51 - 16)]);
1099     }
1100     switch (n) {
1101     case 16: GET_REGL(env->pc);
1102     case 17: GET_REGL(env->pr);
1103     case 18: GET_REGL(env->gbr);
1104     case 19: GET_REGL(env->vbr);
1105     case 20: GET_REGL(env->mach);
1106     case 21: GET_REGL(env->macl);
1107     case 22: GET_REGL(env->sr);
1108     case 23: GET_REGL(env->fpul);
1109     case 24: GET_REGL(env->fpscr);
1110     case 41: GET_REGL(env->ssr);
1111     case 42: GET_REGL(env->spc);
1112     }
1113
1114     return 0;
1115 }
1116
1117 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1118 {
1119     uint32_t tmp;
1120
1121     tmp = ldl_p(mem_buf);
1122
1123     if (n < 8) {
1124         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1125             env->gregs[n + 16] = tmp;
1126         } else {
1127             env->gregs[n] = tmp;
1128         }
1129         return 4;
1130     } else if (n < 16) {
1131         env->gregs[n - 8] = tmp;
1132         return 4;
1133     } else if (n >= 25 && n < 41) {
1134         env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
1135     } else if (n >= 43 && n < 51) {
1136         env->gregs[n - 43] = tmp;
1137         return 4;
1138     } else if (n >= 51 && n < 59) {
1139         env->gregs[n - (51 - 16)] = tmp;
1140         return 4;
1141     }
1142     switch (n) {
1143     case 16: env->pc = tmp;
1144     case 17: env->pr = tmp;
1145     case 18: env->gbr = tmp;
1146     case 19: env->vbr = tmp;
1147     case 20: env->mach = tmp;
1148     case 21: env->macl = tmp;
1149     case 22: env->sr = tmp;
1150     case 23: env->fpul = tmp;
1151     case 24: env->fpscr = tmp;
1152     case 41: env->ssr = tmp;
1153     case 42: env->spc = tmp;
1154     default: return 0;
1155     }
1156
1157     return 4;
1158 }
1159 #elif defined (TARGET_CRIS)
1160
1161 #define NUM_CORE_REGS 49
1162
1163 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1164 {
1165     uint8_t srs;
1166
1167     srs = env->pregs[PR_SRS];
1168     if (n < 16) {
1169         GET_REG32(env->regs[n]);
1170     }
1171
1172     if (n >= 21 && n < 32) {
1173         GET_REG32(env->pregs[n - 16]);
1174     }
1175     if (n >= 33 && n < 49) {
1176         GET_REG32(env->sregs[srs][n - 33]);
1177     }
1178     switch (n) {
1179     case 16: GET_REG8(env->pregs[0]);
1180     case 17: GET_REG8(env->pregs[1]);
1181     case 18: GET_REG32(env->pregs[2]);
1182     case 19: GET_REG8(srs);
1183     case 20: GET_REG16(env->pregs[4]);
1184     case 32: GET_REG32(env->pc);
1185     }
1186
1187     return 0;
1188 }
1189
1190 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1191 {
1192     uint32_t tmp;
1193
1194     if (n > 49)
1195         return 0;
1196
1197     tmp = ldl_p(mem_buf);
1198
1199     if (n < 16) {
1200         env->regs[n] = tmp;
1201     }
1202
1203     if (n >= 21 && n < 32) {
1204         env->pregs[n - 16] = tmp;
1205     }
1206
1207     /* FIXME: Should support function regs be writable?  */
1208     switch (n) {
1209     case 16: return 1;
1210     case 17: return 1;
1211     case 18: env->pregs[PR_PID] = tmp; break;
1212     case 19: return 1;
1213     case 20: return 2;
1214     case 32: env->pc = tmp; break;
1215     }
1216
1217     return 4;
1218 }
1219 #elif defined (TARGET_ALPHA)
1220
1221 #define NUM_CORE_REGS 65
1222
1223 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1224 {
1225     if (n < 31) {
1226        GET_REGL(env->ir[n]);
1227     }
1228     else if (n == 31) {
1229        GET_REGL(0);
1230     }
1231     else if (n<63) {
1232        uint64_t val;
1233
1234        val=*((uint64_t *)&env->fir[n-32]);
1235        GET_REGL(val);
1236     }
1237     else if (n==63) {
1238        GET_REGL(env->fpcr);
1239     }
1240     else if (n==64) {
1241        GET_REGL(env->pc);
1242     }
1243     else {
1244        GET_REGL(0);
1245     }
1246
1247     return 0;
1248 }
1249
1250 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1251 {
1252     target_ulong tmp;
1253     tmp = ldtul_p(mem_buf);
1254
1255     if (n < 31) {
1256         env->ir[n] = tmp;
1257     }
1258
1259     if (n > 31 && n < 63) {
1260         env->fir[n - 32] = ldfl_p(mem_buf);
1261     }
1262
1263     if (n == 64 ) {
1264        env->pc=tmp;
1265     }
1266
1267     return 8;
1268 }
1269 #else
1270
1271 #define NUM_CORE_REGS 0
1272
1273 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1274 {
1275     return 0;
1276 }
1277
1278 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1279 {
1280     return 0;
1281 }
1282
1283 #endif
1284
1285 static int num_g_regs = NUM_CORE_REGS;
1286
1287 #ifdef GDB_CORE_XML
1288 /* Encode data using the encoding for 'x' packets.  */
1289 static int memtox(char *buf, const char *mem, int len)
1290 {
1291     char *p = buf;
1292     char c;
1293
1294     while (len--) {
1295         c = *(mem++);
1296         switch (c) {
1297         case '#': case '$': case '*': case '}':
1298             *(p++) = '}';
1299             *(p++) = c ^ 0x20;
1300             break;
1301         default:
1302             *(p++) = c;
1303             break;
1304         }
1305     }
1306     return p - buf;
1307 }
1308
1309 static const char *get_feature_xml(const char *p, const char **newp)
1310 {
1311     extern const char *const xml_builtin[][2];
1312     size_t len;
1313     int i;
1314     const char *name;
1315     static char target_xml[1024];
1316
1317     len = 0;
1318     while (p[len] && p[len] != ':')
1319         len++;
1320     *newp = p + len;
1321
1322     name = NULL;
1323     if (strncmp(p, "target.xml", len) == 0) {
1324         /* Generate the XML description for this CPU.  */
1325         if (!target_xml[0]) {
1326             GDBRegisterState *r;
1327
1328             snprintf(target_xml, sizeof(target_xml),
1329                      "<?xml version=\"1.0\"?>"
1330                      "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1331                      "<target>"
1332                      "<xi:include href=\"%s\"/>",
1333                      GDB_CORE_XML);
1334
1335             for (r = first_cpu->gdb_regs; r; r = r->next) {
1336                 strcat(target_xml, "<xi:include href=\"");
1337                 strcat(target_xml, r->xml);
1338                 strcat(target_xml, "\"/>");
1339             }
1340             strcat(target_xml, "</target>");
1341         }
1342         return target_xml;
1343     }
1344     for (i = 0; ; i++) {
1345         name = xml_builtin[i][0];
1346         if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
1347             break;
1348     }
1349     return name ? xml_builtin[i][1] : NULL;
1350 }
1351 #endif
1352
1353 static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
1354 {
1355     GDBRegisterState *r;
1356
1357     if (reg < NUM_CORE_REGS)
1358         return cpu_gdb_read_register(env, mem_buf, reg);
1359
1360     for (r = env->gdb_regs; r; r = r->next) {
1361         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1362             return r->get_reg(env, mem_buf, reg - r->base_reg);
1363         }
1364     }
1365     return 0;
1366 }
1367
1368 static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
1369 {
1370     GDBRegisterState *r;
1371
1372     if (reg < NUM_CORE_REGS)
1373         return cpu_gdb_write_register(env, mem_buf, reg);
1374
1375     for (r = env->gdb_regs; r; r = r->next) {
1376         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1377             return r->set_reg(env, mem_buf, reg - r->base_reg);
1378         }
1379     }
1380     return 0;
1381 }
1382
1383 /* Register a supplemental set of CPU registers.  If g_pos is nonzero it
1384    specifies the first register number and these registers are included in
1385    a standard "g" packet.  Direction is relative to gdb, i.e. get_reg is
1386    gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1387  */
1388
1389 void gdb_register_coprocessor(CPUState * env,
1390                              gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1391                              int num_regs, const char *xml, int g_pos)
1392 {
1393     GDBRegisterState *s;
1394     GDBRegisterState **p;
1395     static int last_reg = NUM_CORE_REGS;
1396
1397     s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
1398     s->base_reg = last_reg;
1399     s->num_regs = num_regs;
1400     s->get_reg = get_reg;
1401     s->set_reg = set_reg;
1402     s->xml = xml;
1403     p = &env->gdb_regs;
1404     while (*p) {
1405         /* Check for duplicates.  */
1406         if (strcmp((*p)->xml, xml) == 0)
1407             return;
1408         p = &(*p)->next;
1409     }
1410     /* Add to end of list.  */
1411     last_reg += num_regs;
1412     *p = s;
1413     if (g_pos) {
1414         if (g_pos != s->base_reg) {
1415             fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1416                     "Expected %d got %d\n", xml, g_pos, s->base_reg);
1417         } else {
1418             num_g_regs = last_reg;
1419         }
1420     }
1421 }
1422
1423 #ifndef CONFIG_USER_ONLY
1424 static const int xlat_gdb_type[] = {
1425     [GDB_WATCHPOINT_WRITE]  = BP_GDB | BP_MEM_WRITE,
1426     [GDB_WATCHPOINT_READ]   = BP_GDB | BP_MEM_READ,
1427     [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
1428 };
1429 #endif
1430
1431 static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
1432 {
1433     CPUState *env;
1434     int err = 0;
1435
1436     if (kvm_enabled())
1437         return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1438
1439     switch (type) {
1440     case GDB_BREAKPOINT_SW:
1441     case GDB_BREAKPOINT_HW:
1442         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1443             err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1444             if (err)
1445                 break;
1446         }
1447         return err;
1448 #ifndef CONFIG_USER_ONLY
1449     case GDB_WATCHPOINT_WRITE:
1450     case GDB_WATCHPOINT_READ:
1451     case GDB_WATCHPOINT_ACCESS:
1452         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1453             err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1454                                         NULL);
1455             if (err)
1456                 break;
1457         }
1458         return err;
1459 #endif
1460     default:
1461         return -ENOSYS;
1462     }
1463 }
1464
1465 static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
1466 {
1467     CPUState *env;
1468     int err = 0;
1469
1470     if (kvm_enabled())
1471         return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1472
1473     switch (type) {
1474     case GDB_BREAKPOINT_SW:
1475     case GDB_BREAKPOINT_HW:
1476         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1477             err = cpu_breakpoint_remove(env, addr, BP_GDB);
1478             if (err)
1479                 break;
1480         }
1481         return err;
1482 #ifndef CONFIG_USER_ONLY
1483     case GDB_WATCHPOINT_WRITE:
1484     case GDB_WATCHPOINT_READ:
1485     case GDB_WATCHPOINT_ACCESS:
1486         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1487             err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1488             if (err)
1489                 break;
1490         }
1491         return err;
1492 #endif
1493     default:
1494         return -ENOSYS;
1495     }
1496 }
1497
1498 static void gdb_breakpoint_remove_all(void)
1499 {
1500     CPUState *env;
1501
1502     if (kvm_enabled()) {
1503         kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
1504         return;
1505     }
1506
1507     for (env = first_cpu; env != NULL; env = env->next_cpu) {
1508         cpu_breakpoint_remove_all(env, BP_GDB);
1509 #ifndef CONFIG_USER_ONLY
1510         cpu_watchpoint_remove_all(env, BP_GDB);
1511 #endif
1512     }
1513 }
1514
1515 static int gdb_handle_packet(GDBState *s, const char *line_buf)
1516 {
1517     CPUState *env;
1518     const char *p;
1519     int ch, reg_size, type, res, thread;
1520     char buf[MAX_PACKET_LENGTH];
1521     uint8_t mem_buf[MAX_PACKET_LENGTH];
1522     uint8_t *registers;
1523     target_ulong addr, len;
1524
1525 #ifdef DEBUG_GDB
1526     printf("command='%s'\n", line_buf);
1527 #endif
1528     p = line_buf;
1529     ch = *p++;
1530     switch(ch) {
1531     case '?':
1532         /* TODO: Make this return the correct value for user-mode.  */
1533         snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
1534                  s->c_cpu->cpu_index+1);
1535         put_packet(s, buf);
1536         /* Remove all the breakpoints when this query is issued,
1537          * because gdb is doing and initial connect and the state
1538          * should be cleaned up.
1539          */
1540         gdb_breakpoint_remove_all();
1541         break;
1542     case 'c':
1543         if (*p != '\0') {
1544             addr = strtoull(p, (char **)&p, 16);
1545 #if defined(TARGET_I386)
1546             s->c_cpu->eip = addr;
1547             cpu_synchronize_state(s->c_cpu, 1);
1548 #elif defined (TARGET_PPC)
1549             s->c_cpu->nip = addr;
1550 #elif defined (TARGET_SPARC)
1551             s->c_cpu->pc = addr;
1552             s->c_cpu->npc = addr + 4;
1553 #elif defined (TARGET_ARM)
1554             s->c_cpu->regs[15] = addr;
1555 #elif defined (TARGET_SH4)
1556             s->c_cpu->pc = addr;
1557 #elif defined (TARGET_MIPS)
1558             s->c_cpu->active_tc.PC = addr;
1559 #elif defined (TARGET_CRIS)
1560             s->c_cpu->pc = addr;
1561 #elif defined (TARGET_ALPHA)
1562             s->c_cpu->pc = addr;
1563 #endif
1564         }
1565         s->signal = 0;
1566         gdb_continue(s);
1567         return RS_IDLE;
1568     case 'C':
1569         s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
1570         if (s->signal == -1)
1571             s->signal = 0;
1572         gdb_continue(s);
1573         return RS_IDLE;
1574     case 'k':
1575         /* Kill the target */
1576         fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1577         exit(0);
1578     case 'D':
1579         /* Detach packet */
1580         gdb_breakpoint_remove_all();
1581         gdb_continue(s);
1582         put_packet(s, "OK");
1583         break;
1584     case 's':
1585         if (*p != '\0') {
1586             addr = strtoull(p, (char **)&p, 16);
1587 #if defined(TARGET_I386)
1588             s->c_cpu->eip = addr;
1589             cpu_synchronize_state(s->c_cpu, 1);
1590 #elif defined (TARGET_PPC)
1591             s->c_cpu->nip = addr;
1592 #elif defined (TARGET_SPARC)
1593             s->c_cpu->pc = addr;
1594             s->c_cpu->npc = addr + 4;
1595 #elif defined (TARGET_ARM)
1596             s->c_cpu->regs[15] = addr;
1597 #elif defined (TARGET_SH4)
1598             s->c_cpu->pc = addr;
1599 #elif defined (TARGET_MIPS)
1600             s->c_cpu->active_tc.PC = addr;
1601 #elif defined (TARGET_CRIS)
1602             s->c_cpu->pc = addr;
1603 #elif defined (TARGET_ALPHA)
1604             s->c_cpu->pc = addr;
1605 #endif
1606         }
1607         cpu_single_step(s->c_cpu, sstep_flags);
1608         gdb_continue(s);
1609         return RS_IDLE;
1610     case 'F':
1611         {
1612             target_ulong ret;
1613             target_ulong err;
1614
1615             ret = strtoull(p, (char **)&p, 16);
1616             if (*p == ',') {
1617                 p++;
1618                 err = strtoull(p, (char **)&p, 16);
1619             } else {
1620                 err = 0;
1621             }
1622             if (*p == ',')
1623                 p++;
1624             type = *p;
1625             if (gdb_current_syscall_cb)
1626                 gdb_current_syscall_cb(s->c_cpu, ret, err);
1627             if (type == 'C') {
1628                 put_packet(s, "T02");
1629             } else {
1630                 gdb_continue(s);
1631             }
1632         }
1633         break;
1634     case 'g':
1635         cpu_synchronize_state(s->g_cpu, 0);
1636         len = 0;
1637         for (addr = 0; addr < num_g_regs; addr++) {
1638             reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1639             len += reg_size;
1640         }
1641         memtohex(buf, mem_buf, len);
1642         put_packet(s, buf);
1643         break;
1644     case 'G':
1645         registers = mem_buf;
1646         len = strlen(p) / 2;
1647         hextomem((uint8_t *)registers, p, len);
1648         for (addr = 0; addr < num_g_regs && len > 0; addr++) {
1649             reg_size = gdb_write_register(s->g_cpu, registers, addr);
1650             len -= reg_size;
1651             registers += reg_size;
1652         }
1653         cpu_synchronize_state(s->g_cpu, 1);
1654         put_packet(s, "OK");
1655         break;
1656     case 'm':
1657         addr = strtoull(p, (char **)&p, 16);
1658         if (*p == ',')
1659             p++;
1660         len = strtoull(p, NULL, 16);
1661         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) {
1662             put_packet (s, "E14");
1663         } else {
1664             memtohex(buf, mem_buf, len);
1665             put_packet(s, buf);
1666         }
1667         break;
1668     case 'M':
1669         addr = strtoull(p, (char **)&p, 16);
1670         if (*p == ',')
1671             p++;
1672         len = strtoull(p, (char **)&p, 16);
1673         if (*p == ':')
1674             p++;
1675         hextomem(mem_buf, p, len);
1676         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0)
1677             put_packet(s, "E14");
1678         else
1679             put_packet(s, "OK");
1680         break;
1681     case 'p':
1682         /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1683            This works, but can be very slow.  Anything new enough to
1684            understand XML also knows how to use this properly.  */
1685         if (!gdb_has_xml)
1686             goto unknown_command;
1687         addr = strtoull(p, (char **)&p, 16);
1688         reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1689         if (reg_size) {
1690             memtohex(buf, mem_buf, reg_size);
1691             put_packet(s, buf);
1692         } else {
1693             put_packet(s, "E14");
1694         }
1695         break;
1696     case 'P':
1697         if (!gdb_has_xml)
1698             goto unknown_command;
1699         addr = strtoull(p, (char **)&p, 16);
1700         if (*p == '=')
1701             p++;
1702         reg_size = strlen(p) / 2;
1703         hextomem(mem_buf, p, reg_size);
1704         gdb_write_register(s->g_cpu, mem_buf, addr);
1705         put_packet(s, "OK");
1706         break;
1707     case 'Z':
1708     case 'z':
1709         type = strtoul(p, (char **)&p, 16);
1710         if (*p == ',')
1711             p++;
1712         addr = strtoull(p, (char **)&p, 16);
1713         if (*p == ',')
1714             p++;
1715         len = strtoull(p, (char **)&p, 16);
1716         if (ch == 'Z')
1717             res = gdb_breakpoint_insert(addr, len, type);
1718         else
1719             res = gdb_breakpoint_remove(addr, len, type);
1720         if (res >= 0)
1721              put_packet(s, "OK");
1722         else if (res == -ENOSYS)
1723             put_packet(s, "");
1724         else
1725             put_packet(s, "E22");
1726         break;
1727     case 'H':
1728         type = *p++;
1729         thread = strtoull(p, (char **)&p, 16);
1730         if (thread == -1 || thread == 0) {
1731             put_packet(s, "OK");
1732             break;
1733         }
1734         for (env = first_cpu; env != NULL; env = env->next_cpu)
1735             if (env->cpu_index + 1 == thread)
1736                 break;
1737         if (env == NULL) {
1738             put_packet(s, "E22");
1739             break;
1740         }
1741         switch (type) {
1742         case 'c':
1743             s->c_cpu = env;
1744             put_packet(s, "OK");
1745             break;
1746         case 'g':
1747             s->g_cpu = env;
1748             put_packet(s, "OK");
1749             break;
1750         default:
1751              put_packet(s, "E22");
1752              break;
1753         }
1754         break;
1755     case 'T':
1756         thread = strtoull(p, (char **)&p, 16);
1757 #ifndef CONFIG_USER_ONLY
1758         if (thread > 0 && thread < smp_cpus + 1)
1759 #else
1760         if (thread == 1)
1761 #endif
1762              put_packet(s, "OK");
1763         else
1764             put_packet(s, "E22");
1765         break;
1766     case 'q':
1767     case 'Q':
1768         /* parse any 'q' packets here */
1769         if (!strcmp(p,"qemu.sstepbits")) {
1770             /* Query Breakpoint bit definitions */
1771             snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1772                      SSTEP_ENABLE,
1773                      SSTEP_NOIRQ,
1774                      SSTEP_NOTIMER);
1775             put_packet(s, buf);
1776             break;
1777         } else if (strncmp(p,"qemu.sstep",10) == 0) {
1778             /* Display or change the sstep_flags */
1779             p += 10;
1780             if (*p != '=') {
1781                 /* Display current setting */
1782                 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1783                 put_packet(s, buf);
1784                 break;
1785             }
1786             p++;
1787             type = strtoul(p, (char **)&p, 16);
1788             sstep_flags = type;
1789             put_packet(s, "OK");
1790             break;
1791         } else if (strcmp(p,"C") == 0) {
1792             /* "Current thread" remains vague in the spec, so always return
1793              *  the first CPU (gdb returns the first thread). */
1794             put_packet(s, "QC1");
1795             break;
1796         } else if (strcmp(p,"fThreadInfo") == 0) {
1797             s->query_cpu = first_cpu;
1798             goto report_cpuinfo;
1799         } else if (strcmp(p,"sThreadInfo") == 0) {
1800         report_cpuinfo:
1801             if (s->query_cpu) {
1802                 snprintf(buf, sizeof(buf), "m%x", s->query_cpu->cpu_index+1);
1803                 put_packet(s, buf);
1804                 s->query_cpu = s->query_cpu->next_cpu;
1805             } else
1806                 put_packet(s, "l");
1807             break;
1808         } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
1809             thread = strtoull(p+16, (char **)&p, 16);
1810             for (env = first_cpu; env != NULL; env = env->next_cpu)
1811                 if (env->cpu_index + 1 == thread) {
1812                     cpu_synchronize_state(env, 0);
1813                     len = snprintf((char *)mem_buf, sizeof(mem_buf),
1814                                    "CPU#%d [%s]", env->cpu_index,
1815                                    env->halted ? "halted " : "running");
1816                     memtohex(buf, mem_buf, len);
1817                     put_packet(s, buf);
1818                     break;
1819                 }
1820             break;
1821         }
1822 #ifdef CONFIG_USER_ONLY
1823         else if (strncmp(p, "Offsets", 7) == 0) {
1824             TaskState *ts = s->c_cpu->opaque;
1825
1826             snprintf(buf, sizeof(buf),
1827                      "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1828                      ";Bss=" TARGET_ABI_FMT_lx,
1829                      ts->info->code_offset,
1830                      ts->info->data_offset,
1831                      ts->info->data_offset);
1832             put_packet(s, buf);
1833             break;
1834         }
1835 #else /* !CONFIG_USER_ONLY */
1836         else if (strncmp(p, "Rcmd,", 5) == 0) {
1837             int len = strlen(p + 5);
1838
1839             if ((len % 2) != 0) {
1840                 put_packet(s, "E01");
1841                 break;
1842             }
1843             hextomem(mem_buf, p + 5, len);
1844             len = len / 2;
1845             mem_buf[len++] = 0;
1846             qemu_chr_read(s->mon_chr, mem_buf, len);
1847             put_packet(s, "OK");
1848             break;
1849         }
1850 #endif /* !CONFIG_USER_ONLY */
1851         if (strncmp(p, "Supported", 9) == 0) {
1852             snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
1853 #ifdef GDB_CORE_XML
1854             strcat(buf, ";qXfer:features:read+");
1855 #endif
1856             put_packet(s, buf);
1857             break;
1858         }
1859 #ifdef GDB_CORE_XML
1860         if (strncmp(p, "Xfer:features:read:", 19) == 0) {
1861             const char *xml;
1862             target_ulong total_len;
1863
1864             gdb_has_xml = 1;
1865             p += 19;
1866             xml = get_feature_xml(p, &p);
1867             if (!xml) {
1868                 snprintf(buf, sizeof(buf), "E00");
1869                 put_packet(s, buf);
1870                 break;
1871             }
1872
1873             if (*p == ':')
1874                 p++;
1875             addr = strtoul(p, (char **)&p, 16);
1876             if (*p == ',')
1877                 p++;
1878             len = strtoul(p, (char **)&p, 16);
1879
1880             total_len = strlen(xml);
1881             if (addr > total_len) {
1882                 snprintf(buf, sizeof(buf), "E00");
1883                 put_packet(s, buf);
1884                 break;
1885             }
1886             if (len > (MAX_PACKET_LENGTH - 5) / 2)
1887                 len = (MAX_PACKET_LENGTH - 5) / 2;
1888             if (len < total_len - addr) {
1889                 buf[0] = 'm';
1890                 len = memtox(buf + 1, xml + addr, len);
1891             } else {
1892                 buf[0] = 'l';
1893                 len = memtox(buf + 1, xml + addr, total_len - addr);
1894             }
1895             put_packet_binary(s, buf, len + 1);
1896             break;
1897         }
1898 #endif
1899         /* Unrecognised 'q' command.  */
1900         goto unknown_command;
1901
1902     default:
1903     unknown_command:
1904         /* put empty packet */
1905         buf[0] = '\0';
1906         put_packet(s, buf);
1907         break;
1908     }
1909     return RS_IDLE;
1910 }
1911
1912 void gdb_set_stop_cpu(CPUState *env)
1913 {
1914     gdbserver_state->c_cpu = env;
1915     gdbserver_state->g_cpu = env;
1916 }
1917
1918 #ifndef CONFIG_USER_ONLY
1919 static void gdb_vm_state_change(void *opaque, int running, int reason)
1920 {
1921     GDBState *s = gdbserver_state;
1922     CPUState *env = s->c_cpu;
1923     char buf[256];
1924     const char *type;
1925     int ret;
1926
1927     if (running || (reason != EXCP_DEBUG && reason != EXCP_INTERRUPT) ||
1928         s->state == RS_INACTIVE || s->state == RS_SYSCALL)
1929         return;
1930
1931     /* disable single step if it was enable */
1932     cpu_single_step(env, 0);
1933
1934     if (reason == EXCP_DEBUG) {
1935         if (env->watchpoint_hit) {
1936             switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
1937             case BP_MEM_READ:
1938                 type = "r";
1939                 break;
1940             case BP_MEM_ACCESS:
1941                 type = "a";
1942                 break;
1943             default:
1944                 type = "";
1945                 break;
1946             }
1947             snprintf(buf, sizeof(buf),
1948                      "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
1949                      GDB_SIGNAL_TRAP, env->cpu_index+1, type,
1950                      env->watchpoint_hit->vaddr);
1951             put_packet(s, buf);
1952             env->watchpoint_hit = NULL;
1953             return;
1954         }
1955         tb_flush(env);
1956         ret = GDB_SIGNAL_TRAP;
1957     } else {
1958         ret = GDB_SIGNAL_INT;
1959     }
1960     snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, env->cpu_index+1);
1961     put_packet(s, buf);
1962 }
1963 #endif
1964
1965 /* Send a gdb syscall request.
1966    This accepts limited printf-style format specifiers, specifically:
1967     %x  - target_ulong argument printed in hex.
1968     %lx - 64-bit argument printed in hex.
1969     %s  - string pointer (target_ulong) and length (int) pair.  */
1970 void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
1971 {
1972     va_list va;
1973     char buf[256];
1974     char *p;
1975     target_ulong addr;
1976     uint64_t i64;
1977     GDBState *s;
1978
1979     s = gdbserver_state;
1980     if (!s)
1981         return;
1982     gdb_current_syscall_cb = cb;
1983     s->state = RS_SYSCALL;
1984 #ifndef CONFIG_USER_ONLY
1985     vm_stop(EXCP_DEBUG);
1986 #endif
1987     s->state = RS_IDLE;
1988     va_start(va, fmt);
1989     p = buf;
1990     *(p++) = 'F';
1991     while (*fmt) {
1992         if (*fmt == '%') {
1993             fmt++;
1994             switch (*fmt++) {
1995             case 'x':
1996                 addr = va_arg(va, target_ulong);
1997                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
1998                 break;
1999             case 'l':
2000                 if (*(fmt++) != 'x')
2001                     goto bad_format;
2002                 i64 = va_arg(va, uint64_t);
2003                 p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
2004                 break;
2005             case 's':
2006                 addr = va_arg(va, target_ulong);
2007                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
2008                               addr, va_arg(va, int));
2009                 break;
2010             default:
2011             bad_format:
2012                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
2013                         fmt - 1);
2014                 break;
2015             }
2016         } else {
2017             *(p++) = *(fmt++);
2018         }
2019     }
2020     *p = 0;
2021     va_end(va);
2022     put_packet(s, buf);
2023 #ifdef CONFIG_USER_ONLY
2024     gdb_handlesig(s->c_cpu, 0);
2025 #else
2026     cpu_exit(s->c_cpu);
2027 #endif
2028 }
2029
2030 static void gdb_read_byte(GDBState *s, int ch)
2031 {
2032     int i, csum;
2033     uint8_t reply;
2034
2035 #ifndef CONFIG_USER_ONLY
2036     if (s->last_packet_len) {
2037         /* Waiting for a response to the last packet.  If we see the start
2038            of a new command then abandon the previous response.  */
2039         if (ch == '-') {
2040 #ifdef DEBUG_GDB
2041             printf("Got NACK, retransmitting\n");
2042 #endif
2043             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
2044         }
2045 #ifdef DEBUG_GDB
2046         else if (ch == '+')
2047             printf("Got ACK\n");
2048         else
2049             printf("Got '%c' when expecting ACK/NACK\n", ch);
2050 #endif
2051         if (ch == '+' || ch == '$')
2052             s->last_packet_len = 0;
2053         if (ch != '$')
2054             return;
2055     }
2056     if (vm_running) {
2057         /* when the CPU is running, we cannot do anything except stop
2058            it when receiving a char */
2059         vm_stop(EXCP_INTERRUPT);
2060     } else
2061 #endif
2062     {
2063         switch(s->state) {
2064         case RS_IDLE:
2065             if (ch == '$') {
2066                 s->line_buf_index = 0;
2067                 s->state = RS_GETLINE;
2068             }
2069             break;
2070         case RS_GETLINE:
2071             if (ch == '#') {
2072             s->state = RS_CHKSUM1;
2073             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
2074                 s->state = RS_IDLE;
2075             } else {
2076             s->line_buf[s->line_buf_index++] = ch;
2077             }
2078             break;
2079         case RS_CHKSUM1:
2080             s->line_buf[s->line_buf_index] = '\0';
2081             s->line_csum = fromhex(ch) << 4;
2082             s->state = RS_CHKSUM2;
2083             break;
2084         case RS_CHKSUM2:
2085             s->line_csum |= fromhex(ch);
2086             csum = 0;
2087             for(i = 0; i < s->line_buf_index; i++) {
2088                 csum += s->line_buf[i];
2089             }
2090             if (s->line_csum != (csum & 0xff)) {
2091                 reply = '-';
2092                 put_buffer(s, &reply, 1);
2093                 s->state = RS_IDLE;
2094             } else {
2095                 reply = '+';
2096                 put_buffer(s, &reply, 1);
2097                 s->state = gdb_handle_packet(s, s->line_buf);
2098             }
2099             break;
2100         default:
2101             abort();
2102         }
2103     }
2104 }
2105
2106 #ifdef CONFIG_USER_ONLY
2107 int
2108 gdb_queuesig (void)
2109 {
2110     GDBState *s;
2111
2112     s = gdbserver_state;
2113
2114     if (gdbserver_fd < 0 || s->fd < 0)
2115         return 0;
2116     else
2117         return 1;
2118 }
2119
2120 int
2121 gdb_handlesig (CPUState *env, int sig)
2122 {
2123   GDBState *s;
2124   char buf[256];
2125   int n;
2126
2127   s = gdbserver_state;
2128   if (gdbserver_fd < 0 || s->fd < 0)
2129     return sig;
2130
2131   /* disable single step if it was enabled */
2132   cpu_single_step(env, 0);
2133   tb_flush(env);
2134
2135   if (sig != 0)
2136     {
2137       snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig));
2138       put_packet(s, buf);
2139     }
2140   /* put_packet() might have detected that the peer terminated the
2141      connection.  */
2142   if (s->fd < 0)
2143       return sig;
2144
2145   sig = 0;
2146   s->state = RS_IDLE;
2147   s->running_state = 0;
2148   while (s->running_state == 0) {
2149       n = read (s->fd, buf, 256);
2150       if (n > 0)
2151         {
2152           int i;
2153
2154           for (i = 0; i < n; i++)
2155             gdb_read_byte (s, buf[i]);
2156         }
2157       else if (n == 0 || errno != EAGAIN)
2158         {
2159           /* XXX: Connection closed.  Should probably wait for annother
2160              connection before continuing.  */
2161           return sig;
2162         }
2163   }
2164   sig = s->signal;
2165   s->signal = 0;
2166   return sig;
2167 }
2168
2169 /* Tell the remote gdb that the process has exited.  */
2170 void gdb_exit(CPUState *env, int code)
2171 {
2172   GDBState *s;
2173   char buf[4];
2174
2175   s = gdbserver_state;
2176   if (gdbserver_fd < 0 || s->fd < 0)
2177     return;
2178
2179   snprintf(buf, sizeof(buf), "W%02x", code);
2180   put_packet(s, buf);
2181 }
2182
2183 /* Tell the remote gdb that the process has exited due to SIG.  */
2184 void gdb_signalled(CPUState *env, int sig)
2185 {
2186   GDBState *s;
2187   char buf[4];
2188
2189   s = gdbserver_state;
2190   if (gdbserver_fd < 0 || s->fd < 0)
2191     return;
2192
2193   snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig));
2194   put_packet(s, buf);
2195 }
2196
2197 static void gdb_accept(void)
2198 {
2199     GDBState *s;
2200     struct sockaddr_in sockaddr;
2201     socklen_t len;
2202     int val, fd;
2203
2204     for(;;) {
2205         len = sizeof(sockaddr);
2206         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
2207         if (fd < 0 && errno != EINTR) {
2208             perror("accept");
2209             return;
2210         } else if (fd >= 0) {
2211             break;
2212         }
2213     }
2214
2215     /* set short latency */
2216     val = 1;
2217     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
2218
2219     s = qemu_mallocz(sizeof(GDBState));
2220     s->c_cpu = first_cpu;
2221     s->g_cpu = first_cpu;
2222     s->fd = fd;
2223     gdb_has_xml = 0;
2224
2225     gdbserver_state = s;
2226
2227     fcntl(fd, F_SETFL, O_NONBLOCK);
2228 }
2229
2230 static int gdbserver_open(int port)
2231 {
2232     struct sockaddr_in sockaddr;
2233     int fd, val, ret;
2234
2235     fd = socket(PF_INET, SOCK_STREAM, 0);
2236     if (fd < 0) {
2237         perror("socket");
2238         return -1;
2239     }
2240
2241     /* allow fast reuse */
2242     val = 1;
2243     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
2244
2245     sockaddr.sin_family = AF_INET;
2246     sockaddr.sin_port = htons(port);
2247     sockaddr.sin_addr.s_addr = 0;
2248     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
2249     if (ret < 0) {
2250         perror("bind");
2251         return -1;
2252     }
2253     ret = listen(fd, 0);
2254     if (ret < 0) {
2255         perror("listen");
2256         return -1;
2257     }
2258     return fd;
2259 }
2260
2261 int gdbserver_start(int port)
2262 {
2263     gdbserver_fd = gdbserver_open(port);
2264     if (gdbserver_fd < 0)
2265         return -1;
2266     /* accept connections */
2267     gdb_accept();
2268     return 0;
2269 }
2270
2271 /* Disable gdb stub for child processes.  */
2272 void gdbserver_fork(CPUState *env)
2273 {
2274     GDBState *s = gdbserver_state;
2275     if (gdbserver_fd < 0 || s->fd < 0)
2276       return;
2277     close(s->fd);
2278     s->fd = -1;
2279     cpu_breakpoint_remove_all(env, BP_GDB);
2280     cpu_watchpoint_remove_all(env, BP_GDB);
2281 }
2282 #else
2283 static int gdb_chr_can_receive(void *opaque)
2284 {
2285   /* We can handle an arbitrarily large amount of data.
2286    Pick the maximum packet size, which is as good as anything.  */
2287   return MAX_PACKET_LENGTH;
2288 }
2289
2290 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
2291 {
2292     int i;
2293
2294     for (i = 0; i < size; i++) {
2295         gdb_read_byte(gdbserver_state, buf[i]);
2296     }
2297 }
2298
2299 static void gdb_chr_event(void *opaque, int event)
2300 {
2301     switch (event) {
2302     case CHR_EVENT_RESET:
2303         vm_stop(EXCP_INTERRUPT);
2304         gdb_has_xml = 0;
2305         break;
2306     default:
2307         break;
2308     }
2309 }
2310
2311 static void gdb_monitor_output(GDBState *s, const char *msg, int len)
2312 {
2313     char buf[MAX_PACKET_LENGTH];
2314
2315     buf[0] = 'O';
2316     if (len > (MAX_PACKET_LENGTH/2) - 1)
2317         len = (MAX_PACKET_LENGTH/2) - 1;
2318     memtohex(buf + 1, (uint8_t *)msg, len);
2319     put_packet(s, buf);
2320 }
2321
2322 static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len)
2323 {
2324     const char *p = (const char *)buf;
2325     int max_sz;
2326
2327     max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2;
2328     for (;;) {
2329         if (len <= max_sz) {
2330             gdb_monitor_output(gdbserver_state, p, len);
2331             break;
2332         }
2333         gdb_monitor_output(gdbserver_state, p, max_sz);
2334         p += max_sz;
2335         len -= max_sz;
2336     }
2337     return len;
2338 }
2339
2340 int gdbserver_start(const char *port)
2341 {
2342     GDBState *s;
2343     char gdbstub_port_name[128];
2344     int port_num;
2345     char *p;
2346     CharDriverState *chr = NULL;
2347     CharDriverState *mon_chr;
2348
2349     if (!port || !*port)
2350       return -1;
2351     if (strcmp(port, "none") != 0) {
2352         port_num = strtol(port, &p, 10);
2353         if (*p == 0) {
2354             /* A numeric value is interpreted as a port number.  */
2355             snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
2356                      "tcp::%d,nowait,nodelay,server", port_num);
2357             port = gdbstub_port_name;
2358         }
2359
2360         chr = qemu_chr_open("gdb", port, NULL);
2361         if (!chr)
2362             return -1;
2363
2364         qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2365                               gdb_chr_event, NULL);
2366     }
2367
2368     s = gdbserver_state;
2369     if (!s) {
2370         s = qemu_mallocz(sizeof(GDBState));
2371         gdbserver_state = s;
2372
2373         qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
2374
2375         /* Initialize a monitor terminal for gdb */
2376         mon_chr = qemu_mallocz(sizeof(*mon_chr));
2377         mon_chr->chr_write = gdb_monitor_write;
2378         monitor_init(mon_chr, 0);
2379     } else {
2380         if (s->chr)
2381             qemu_chr_close(s->chr);
2382         mon_chr = s->mon_chr;
2383         memset(s, 0, sizeof(GDBState));
2384     }
2385     s->c_cpu = first_cpu;
2386     s->g_cpu = first_cpu;
2387     s->chr = chr;
2388     s->state = chr ? RS_IDLE : RS_INACTIVE;
2389     s->mon_chr = mon_chr;
2390
2391     return 0;
2392 }
2393 #endif