2 * Renesas SH7751R R2D-PLUS emulation
4 * Copyright (c) 2007 Magnus Damm
5 * Copyright (c) 2008 Paul Mundt
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
32 #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */
33 #define SDRAM_SIZE 0x04000000
35 #define SM501_VRAM_SIZE 0x800000
37 #define PA_POWOFF 0x30
38 #define PA_VERREG 0x32
39 #define PA_OUTPORT 0x36
65 static uint32_t r2d_fpga_read(void *opaque
, target_phys_addr_t addr
)
67 r2d_fpga_t
*s
= opaque
;
82 r2d_fpga_write(void *opaque
, target_phys_addr_t addr
, uint32_t value
)
84 r2d_fpga_t
*s
= opaque
;
99 static CPUReadMemoryFunc
*r2d_fpga_readfn
[] = {
105 static CPUWriteMemoryFunc
*r2d_fpga_writefn
[] = {
111 static void r2d_fpga_init(target_phys_addr_t base
)
116 s
= qemu_mallocz(sizeof(r2d_fpga_t
));
120 iomemtype
= cpu_register_io_memory(0, r2d_fpga_readfn
,
121 r2d_fpga_writefn
, s
);
122 cpu_register_physical_memory(base
, 0x40, iomemtype
);
125 static void r2d_init(ram_addr_t ram_size
, int vga_ram_size
,
126 const char *boot_device
, DisplayState
* ds
,
127 const char *kernel_filename
, const char *kernel_cmdline
,
128 const char *initrd_filename
, const char *cpu_model
)
131 struct SH7750State
*s
;
132 ram_addr_t sdram_addr
, sm501_vga_ram_addr
;
135 cpu_model
= "SH7751R";
137 env
= cpu_init(cpu_model
);
139 fprintf(stderr
, "Unable to find CPU definition\n");
143 /* Allocate memory space */
144 sdram_addr
= qemu_ram_alloc(SDRAM_SIZE
);
145 cpu_register_physical_memory(SDRAM_BASE
, SDRAM_SIZE
, sdram_addr
);
146 /* Register peripherals */
147 r2d_fpga_init(0x04000000);
148 s
= sh7750_init(env
);
149 sm501_vga_ram_addr
= qemu_ram_alloc(SM501_VRAM_SIZE
);
150 sm501_init(ds
, 0x10000000, sm501_vga_ram_addr
, SM501_VRAM_SIZE
,
152 /* Todo: register on board registers */
156 kernel_size
= load_image(kernel_filename
, phys_ram_base
);
158 if (kernel_size
< 0) {
159 fprintf(stderr
, "qemu: could not load kernel '%s'\n", kernel_filename
);
163 env
->pc
= SDRAM_BASE
| 0xa0000000; /* Start from P2 area */
167 QEMUMachine r2d_machine
= {
169 .desc
= "r2d-plus board",
171 .ram_require
= (SDRAM_SIZE
+ SM501_VRAM_SIZE
) | RAMSIZE_FIXED
,