Preliminary AIX support
[qemu/mini2440.git] / target-ppc / op.c
blob10a22eba5e1c14f31e871ab954039355e072f6bc
1 /*
2 * PowerPC emulation micro-operations for qemu.
4 * Copyright (c) 2003-2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 //#define DEBUG_OP
23 #include "config.h"
24 #include "exec.h"
25 #include "host-utils.h"
26 #include "helper_regs.h"
27 #include "op_helper.h"
29 /* Generate exceptions */
30 void OPPROTO op_raise_exception_err (void)
32 do_raise_exception_err(PARAM1, PARAM2);
35 void OPPROTO op_debug (void)
37 do_raise_exception(EXCP_DEBUG);
40 #if !defined(CONFIG_USER_ONLY)
41 /* Segment registers load and store */
42 void OPPROTO op_load_sr (void)
44 T0 = env->sr[T1];
45 RETURN();
48 void OPPROTO op_store_sr (void)
50 do_store_sr(env, T1, T0);
51 RETURN();
54 #if defined(TARGET_PPC64)
55 void OPPROTO op_load_slb (void)
57 T0 = ppc_load_slb(env, T1);
58 RETURN();
61 void OPPROTO op_store_slb (void)
63 ppc_store_slb(env, T1, T0);
64 RETURN();
66 #endif /* defined(TARGET_PPC64) */
68 void OPPROTO op_load_sdr1 (void)
70 T0 = env->sdr1;
71 RETURN();
74 void OPPROTO op_store_sdr1 (void)
76 do_store_sdr1(env, T0);
77 RETURN();
80 #if defined (TARGET_PPC64)
81 void OPPROTO op_load_asr (void)
83 T0 = env->asr;
84 RETURN();
87 void OPPROTO op_store_asr (void)
89 ppc_store_asr(env, T0);
90 RETURN();
92 #endif
94 void OPPROTO op_load_msr (void)
96 T0 = env->msr;
97 RETURN();
100 void OPPROTO op_store_msr (void)
102 do_store_msr();
103 RETURN();
106 #if defined (TARGET_PPC64)
107 void OPPROTO op_store_msr_32 (void)
109 T0 = (env->msr & ~0xFFFFFFFFULL) | (T0 & 0xFFFFFFFF);
110 do_store_msr();
111 RETURN();
113 #endif
115 void OPPROTO op_update_riee (void)
117 /* We don't call do_store_msr here as we won't trigger
118 * any special case nor change hflags
120 T0 &= (1 << MSR_RI) | (1 << MSR_EE);
121 env->msr &= ~(1 << MSR_RI) | (1 << MSR_EE);
122 env->msr |= T0;
123 RETURN();
125 #endif
127 /* SPR */
128 void OPPROTO op_load_spr (void)
130 T0 = env->spr[PARAM1];
131 RETURN();
134 void OPPROTO op_store_spr (void)
136 env->spr[PARAM1] = T0;
137 RETURN();
140 void OPPROTO op_load_dump_spr (void)
142 T0 = ppc_load_dump_spr(PARAM1);
143 RETURN();
146 void OPPROTO op_store_dump_spr (void)
148 ppc_store_dump_spr(PARAM1, T0);
149 RETURN();
152 void OPPROTO op_mask_spr (void)
154 env->spr[PARAM1] &= ~T0;
155 RETURN();
158 void OPPROTO op_load_tbl (void)
160 T0 = cpu_ppc_load_tbl(env);
161 RETURN();
164 void OPPROTO op_load_tbu (void)
166 T0 = cpu_ppc_load_tbu(env);
167 RETURN();
170 void OPPROTO op_load_atbl (void)
172 T0 = cpu_ppc_load_atbl(env);
173 RETURN();
176 void OPPROTO op_load_atbu (void)
178 T0 = cpu_ppc_load_atbu(env);
179 RETURN();
182 #if !defined(CONFIG_USER_ONLY)
183 void OPPROTO op_store_tbl (void)
185 cpu_ppc_store_tbl(env, T0);
186 RETURN();
189 void OPPROTO op_store_tbu (void)
191 cpu_ppc_store_tbu(env, T0);
192 RETURN();
195 void OPPROTO op_store_atbl (void)
197 cpu_ppc_store_atbl(env, T0);
198 RETURN();
201 void OPPROTO op_store_atbu (void)
203 cpu_ppc_store_atbu(env, T0);
204 RETURN();
207 void OPPROTO op_load_decr (void)
209 T0 = cpu_ppc_load_decr(env);
210 RETURN();
213 void OPPROTO op_store_decr (void)
215 cpu_ppc_store_decr(env, T0);
216 RETURN();
219 void OPPROTO op_load_ibat (void)
221 T0 = env->IBAT[PARAM1][PARAM2];
222 RETURN();
225 void OPPROTO op_store_ibatu (void)
227 do_store_ibatu(env, PARAM1, T0);
228 RETURN();
231 void OPPROTO op_store_ibatl (void)
233 #if 1
234 env->IBAT[1][PARAM1] = T0;
235 #else
236 do_store_ibatl(env, PARAM1, T0);
237 #endif
238 RETURN();
241 void OPPROTO op_load_dbat (void)
243 T0 = env->DBAT[PARAM1][PARAM2];
244 RETURN();
247 void OPPROTO op_store_dbatu (void)
249 do_store_dbatu(env, PARAM1, T0);
250 RETURN();
253 void OPPROTO op_store_dbatl (void)
255 #if 1
256 env->DBAT[1][PARAM1] = T0;
257 #else
258 do_store_dbatl(env, PARAM1, T0);
259 #endif
260 RETURN();
262 #endif /* !defined(CONFIG_USER_ONLY) */
264 /* FPSCR */
265 #ifdef CONFIG_SOFTFLOAT
266 void OPPROTO op_reset_fpstatus (void)
268 env->fp_status.float_exception_flags = 0;
269 RETURN();
271 #endif
273 void OPPROTO op_compute_fprf (void)
275 do_compute_fprf(PARAM1);
276 RETURN();
279 #ifdef CONFIG_SOFTFLOAT
280 void OPPROTO op_float_check_status (void)
282 do_float_check_status();
283 RETURN();
285 #else
286 void OPPROTO op_float_check_status (void)
288 if (env->exception_index == POWERPC_EXCP_PROGRAM &&
289 (env->error_code & POWERPC_EXCP_FP)) {
290 /* Differred floating-point exception after target FPR update */
291 if (msr_fe0 != 0 || msr_fe1 != 0)
292 do_raise_exception_err(env->exception_index, env->error_code);
294 RETURN();
296 #endif
298 void OPPROTO op_load_fpscr_FT0 (void)
300 /* The 32 MSB of the target fpr are undefined.
301 * They'll be zero...
303 CPU_DoubleU u;
305 u.l.upper = 0;
306 u.l.lower = env->fpscr;
307 FT0 = u.d;
308 RETURN();
311 void OPPROTO op_fpscr_resetbit (void)
313 env->fpscr &= PARAM1;
314 RETURN();
317 void OPPROTO op_fpscr_setbit (void)
319 do_fpscr_setbit(PARAM1);
320 RETURN();
323 void OPPROTO op_store_fpscr (void)
325 do_store_fpscr(PARAM1);
326 RETURN();
329 /*** Integer shift ***/
330 void OPPROTO op_srli_T1 (void)
332 T1 = (uint32_t)T1 >> PARAM1;
333 RETURN();
336 /*** Floating-Point arithmetic ***/
337 /* fadd - fadd. */
338 void OPPROTO op_fadd (void)
340 #if USE_PRECISE_EMULATION
341 do_fadd();
342 #else
343 FT0 = float64_add(FT0, FT1, &env->fp_status);
344 #endif
345 RETURN();
348 /* fsub - fsub. */
349 void OPPROTO op_fsub (void)
351 #if USE_PRECISE_EMULATION
352 do_fsub();
353 #else
354 FT0 = float64_sub(FT0, FT1, &env->fp_status);
355 #endif
356 RETURN();
359 /* fmul - fmul. */
360 void OPPROTO op_fmul (void)
362 #if USE_PRECISE_EMULATION
363 do_fmul();
364 #else
365 FT0 = float64_mul(FT0, FT1, &env->fp_status);
366 #endif
367 RETURN();
370 /* fdiv - fdiv. */
371 void OPPROTO op_fdiv (void)
373 #if USE_PRECISE_EMULATION
374 do_fdiv();
375 #else
376 FT0 = float64_div(FT0, FT1, &env->fp_status);
377 #endif
378 RETURN();
381 /* fsqrt - fsqrt. */
382 void OPPROTO op_fsqrt (void)
384 do_fsqrt();
385 RETURN();
388 /* fre - fre. */
389 void OPPROTO op_fre (void)
391 do_fre();
392 RETURN();
395 /* fres - fres. */
396 void OPPROTO op_fres (void)
398 do_fres();
399 RETURN();
402 /* frsqrte - frsqrte. */
403 void OPPROTO op_frsqrte (void)
405 do_frsqrte();
406 RETURN();
409 /* fsel - fsel. */
410 void OPPROTO op_fsel (void)
412 do_fsel();
413 RETURN();
416 /*** Floating-Point multiply-and-add ***/
417 /* fmadd - fmadd. */
418 void OPPROTO op_fmadd (void)
420 #if USE_PRECISE_EMULATION
421 do_fmadd();
422 #else
423 FT0 = float64_mul(FT0, FT1, &env->fp_status);
424 FT0 = float64_add(FT0, FT2, &env->fp_status);
425 #endif
426 RETURN();
429 /* fmsub - fmsub. */
430 void OPPROTO op_fmsub (void)
432 #if USE_PRECISE_EMULATION
433 do_fmsub();
434 #else
435 FT0 = float64_mul(FT0, FT1, &env->fp_status);
436 FT0 = float64_sub(FT0, FT2, &env->fp_status);
437 #endif
438 RETURN();
441 /* fnmadd - fnmadd. - fnmadds - fnmadds. */
442 void OPPROTO op_fnmadd (void)
444 do_fnmadd();
445 RETURN();
448 /* fnmsub - fnmsub. */
449 void OPPROTO op_fnmsub (void)
451 do_fnmsub();
452 RETURN();
455 /*** Floating-Point round & convert ***/
456 /* frsp - frsp. */
457 void OPPROTO op_frsp (void)
459 #if USE_PRECISE_EMULATION
460 do_frsp();
461 #else
462 FT0 = float64_to_float32(FT0, &env->fp_status);
463 #endif
464 RETURN();
467 /* fctiw - fctiw. */
468 void OPPROTO op_fctiw (void)
470 do_fctiw();
471 RETURN();
474 /* fctiwz - fctiwz. */
475 void OPPROTO op_fctiwz (void)
477 do_fctiwz();
478 RETURN();
481 #if defined(TARGET_PPC64)
482 /* fcfid - fcfid. */
483 void OPPROTO op_fcfid (void)
485 do_fcfid();
486 RETURN();
489 /* fctid - fctid. */
490 void OPPROTO op_fctid (void)
492 do_fctid();
493 RETURN();
496 /* fctidz - fctidz. */
497 void OPPROTO op_fctidz (void)
499 do_fctidz();
500 RETURN();
502 #endif
504 void OPPROTO op_frin (void)
506 do_frin();
507 RETURN();
510 void OPPROTO op_friz (void)
512 do_friz();
513 RETURN();
516 void OPPROTO op_frip (void)
518 do_frip();
519 RETURN();
522 void OPPROTO op_frim (void)
524 do_frim();
525 RETURN();
528 /*** Floating-point move ***/
529 /* fabs */
530 void OPPROTO op_fabs (void)
532 FT0 = float64_abs(FT0);
533 RETURN();
536 /* fnabs */
537 void OPPROTO op_fnabs (void)
539 FT0 = float64_abs(FT0);
540 FT0 = float64_chs(FT0);
541 RETURN();
544 /* fneg */
545 void OPPROTO op_fneg (void)
547 FT0 = float64_chs(FT0);
548 RETURN();
551 /* Load and store */
552 #define MEMSUFFIX _raw
553 #include "op_helper.h"
554 #include "op_mem.h"
555 #if !defined(CONFIG_USER_ONLY)
556 #define MEMSUFFIX _user
557 #include "op_helper.h"
558 #include "op_mem.h"
559 #define MEMSUFFIX _kernel
560 #include "op_helper.h"
561 #include "op_mem.h"
562 #define MEMSUFFIX _hypv
563 #include "op_helper.h"
564 #include "op_mem.h"
565 #endif
567 /* Special op to check and maybe clear reservation */
568 void OPPROTO op_check_reservation (void)
570 if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003))
571 env->reserve = (target_ulong)-1ULL;
572 RETURN();
575 #if defined(TARGET_PPC64)
576 void OPPROTO op_check_reservation_64 (void)
578 if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003))
579 env->reserve = (target_ulong)-1ULL;
580 RETURN();
582 #endif
584 void OPPROTO op_wait (void)
586 env->halted = 1;
587 RETURN();
590 /* Return from interrupt */
591 #if !defined(CONFIG_USER_ONLY)
592 void OPPROTO op_rfi (void)
594 do_rfi();
595 RETURN();
598 #if defined(TARGET_PPC64)
599 void OPPROTO op_rfid (void)
601 do_rfid();
602 RETURN();
605 void OPPROTO op_hrfid (void)
607 do_hrfid();
608 RETURN();
610 #endif
612 /* Exception vectors */
613 void OPPROTO op_store_excp_prefix (void)
615 T0 &= env->ivpr_mask;
616 env->excp_prefix = T0;
617 RETURN();
620 void OPPROTO op_store_excp_vector (void)
622 T0 &= env->ivor_mask;
623 env->excp_vectors[PARAM1] = T0;
624 RETURN();
626 #endif
628 /* Trap word */
629 void OPPROTO op_tw (void)
631 do_tw(PARAM1);
632 RETURN();
635 #if defined(TARGET_PPC64)
636 void OPPROTO op_td (void)
638 do_td(PARAM1);
639 RETURN();
641 #endif
643 #if !defined(CONFIG_USER_ONLY)
644 /* tlbia */
645 void OPPROTO op_tlbia (void)
647 ppc_tlb_invalidate_all(env);
648 RETURN();
651 /* tlbie */
652 void OPPROTO op_tlbie (void)
654 ppc_tlb_invalidate_one(env, (uint32_t)T0);
655 RETURN();
658 #if defined(TARGET_PPC64)
659 void OPPROTO op_tlbie_64 (void)
661 ppc_tlb_invalidate_one(env, T0);
662 RETURN();
664 #endif
666 #if defined(TARGET_PPC64)
667 void OPPROTO op_slbia (void)
669 ppc_slb_invalidate_all(env);
670 RETURN();
673 void OPPROTO op_slbie (void)
675 ppc_slb_invalidate_one(env, (uint32_t)T0);
676 RETURN();
679 void OPPROTO op_slbie_64 (void)
681 ppc_slb_invalidate_one(env, T0);
682 RETURN();
684 #endif
685 #endif
687 #if !defined(CONFIG_USER_ONLY)
688 /* PowerPC 602/603/755 software TLB load instructions */
689 void OPPROTO op_6xx_tlbld (void)
691 do_load_6xx_tlb(0);
692 RETURN();
695 void OPPROTO op_6xx_tlbli (void)
697 do_load_6xx_tlb(1);
698 RETURN();
701 /* PowerPC 74xx software TLB load instructions */
702 void OPPROTO op_74xx_tlbld (void)
704 do_load_74xx_tlb(0);
705 RETURN();
708 void OPPROTO op_74xx_tlbli (void)
710 do_load_74xx_tlb(1);
711 RETURN();
713 #endif
715 /* 601 specific */
716 void OPPROTO op_load_601_rtcl (void)
718 T0 = cpu_ppc601_load_rtcl(env);
719 RETURN();
722 void OPPROTO op_load_601_rtcu (void)
724 T0 = cpu_ppc601_load_rtcu(env);
725 RETURN();
728 #if !defined(CONFIG_USER_ONLY)
729 void OPPROTO op_store_601_rtcl (void)
731 cpu_ppc601_store_rtcl(env, T0);
732 RETURN();
735 void OPPROTO op_store_601_rtcu (void)
737 cpu_ppc601_store_rtcu(env, T0);
738 RETURN();
741 void OPPROTO op_store_hid0_601 (void)
743 do_store_hid0_601();
744 RETURN();
747 void OPPROTO op_load_601_bat (void)
749 T0 = env->IBAT[PARAM1][PARAM2];
750 RETURN();
753 void OPPROTO op_store_601_batl (void)
755 do_store_ibatl_601(env, PARAM1, T0);
756 RETURN();
759 void OPPROTO op_store_601_batu (void)
761 do_store_ibatu_601(env, PARAM1, T0);
762 RETURN();
764 #endif /* !defined(CONFIG_USER_ONLY) */
766 /* PowerPC 601 specific instructions (POWER bridge) */
767 /* XXX: those micro-ops need tests ! */
768 void OPPROTO op_POWER_abs (void)
770 if ((int32_t)T0 == INT32_MIN)
771 T0 = INT32_MAX;
772 else if ((int32_t)T0 < 0)
773 T0 = -T0;
774 RETURN();
777 void OPPROTO op_POWER_abso (void)
779 do_POWER_abso();
780 RETURN();
783 void OPPROTO op_POWER_clcs (void)
785 do_POWER_clcs();
786 RETURN();
789 void OPPROTO op_POWER_div (void)
791 do_POWER_div();
792 RETURN();
795 void OPPROTO op_POWER_divo (void)
797 do_POWER_divo();
798 RETURN();
801 void OPPROTO op_POWER_divs (void)
803 do_POWER_divs();
804 RETURN();
807 void OPPROTO op_POWER_divso (void)
809 do_POWER_divso();
810 RETURN();
813 void OPPROTO op_POWER_doz (void)
815 if ((int32_t)T1 > (int32_t)T0)
816 T0 = T1 - T0;
817 else
818 T0 = 0;
819 RETURN();
822 void OPPROTO op_POWER_dozo (void)
824 do_POWER_dozo();
825 RETURN();
828 void OPPROTO op_load_xer_cmp (void)
830 T2 = xer_cmp;
831 RETURN();
834 void OPPROTO op_POWER_maskg (void)
836 do_POWER_maskg();
837 RETURN();
840 void OPPROTO op_POWER_maskir (void)
842 T0 = (T0 & ~T2) | (T1 & T2);
843 RETURN();
846 void OPPROTO op_POWER_mul (void)
848 uint64_t tmp;
850 tmp = (uint64_t)T0 * (uint64_t)T1;
851 env->spr[SPR_MQ] = tmp >> 32;
852 T0 = tmp;
853 RETURN();
856 void OPPROTO op_POWER_mulo (void)
858 do_POWER_mulo();
859 RETURN();
862 void OPPROTO op_POWER_nabs (void)
864 if (T0 > 0)
865 T0 = -T0;
866 RETURN();
869 void OPPROTO op_POWER_nabso (void)
871 /* nabs never overflows */
872 if (T0 > 0)
873 T0 = -T0;
874 env->xer &= ~(1 << XER_OV);
875 RETURN();
878 /* XXX: factorise POWER rotates... */
879 void OPPROTO op_POWER_rlmi (void)
881 T0 = rotl32(T0, T2) & PARAM1;
882 T0 |= T1 & (uint32_t)PARAM2;
883 RETURN();
886 void OPPROTO op_POWER_rrib (void)
888 T2 &= 0x1FUL;
889 T0 = rotl32(T0 & INT32_MIN, T2);
890 T0 |= T1 & ~rotl32(INT32_MIN, T2);
891 RETURN();
894 void OPPROTO op_POWER_sle (void)
896 T1 &= 0x1FUL;
897 env->spr[SPR_MQ] = rotl32(T0, T1);
898 T0 = T0 << T1;
899 RETURN();
902 void OPPROTO op_POWER_sleq (void)
904 uint32_t tmp = env->spr[SPR_MQ];
906 T1 &= 0x1FUL;
907 env->spr[SPR_MQ] = rotl32(T0, T1);
908 T0 = T0 << T1;
909 T0 |= tmp >> (32 - T1);
910 RETURN();
913 void OPPROTO op_POWER_sllq (void)
915 uint32_t msk = UINT32_MAX;
917 msk = msk << (T1 & 0x1FUL);
918 if (T1 & 0x20UL)
919 msk = ~msk;
920 T1 &= 0x1FUL;
921 T0 = (T0 << T1) & msk;
922 T0 |= env->spr[SPR_MQ] & ~msk;
923 RETURN();
926 void OPPROTO op_POWER_slq (void)
928 uint32_t msk = UINT32_MAX, tmp;
930 msk = msk << (T1 & 0x1FUL);
931 if (T1 & 0x20UL)
932 msk = ~msk;
933 T1 &= 0x1FUL;
934 tmp = rotl32(T0, T1);
935 T0 = tmp & msk;
936 env->spr[SPR_MQ] = tmp;
937 RETURN();
940 void OPPROTO op_POWER_sraq (void)
942 env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL));
943 if (T1 & 0x20UL)
944 T0 = UINT32_MAX;
945 else
946 T0 = (int32_t)T0 >> T1;
947 RETURN();
950 void OPPROTO op_POWER_sre (void)
952 T1 &= 0x1FUL;
953 env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
954 T0 = (int32_t)T0 >> T1;
955 RETURN();
958 void OPPROTO op_POWER_srea (void)
960 T1 &= 0x1FUL;
961 env->spr[SPR_MQ] = T0 >> T1;
962 T0 = (int32_t)T0 >> T1;
963 RETURN();
966 void OPPROTO op_POWER_sreq (void)
968 uint32_t tmp;
969 int32_t msk;
971 T1 &= 0x1FUL;
972 msk = INT32_MIN >> T1;
973 tmp = env->spr[SPR_MQ];
974 env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
975 T0 = T0 >> T1;
976 T0 |= tmp & msk;
977 RETURN();
980 void OPPROTO op_POWER_srlq (void)
982 uint32_t tmp;
983 int32_t msk;
985 msk = INT32_MIN >> (T1 & 0x1FUL);
986 if (T1 & 0x20UL)
987 msk = ~msk;
988 T1 &= 0x1FUL;
989 tmp = env->spr[SPR_MQ];
990 env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
991 T0 = T0 >> T1;
992 T0 &= msk;
993 T0 |= tmp & ~msk;
994 RETURN();
997 void OPPROTO op_POWER_srq (void)
999 T1 &= 0x1FUL;
1000 env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
1001 T0 = T0 >> T1;
1002 RETURN();
1005 /* POWER instructions not implemented in PowerPC 601 */
1006 #if !defined(CONFIG_USER_ONLY)
1007 void OPPROTO op_POWER_mfsri (void)
1009 T1 = T0 >> 28;
1010 T0 = env->sr[T1];
1011 RETURN();
1014 void OPPROTO op_POWER_rac (void)
1016 do_POWER_rac();
1017 RETURN();
1020 void OPPROTO op_POWER_rfsvc (void)
1022 do_POWER_rfsvc();
1023 RETURN();
1025 #endif
1027 /* PowerPC 602 specific instruction */
1028 #if !defined(CONFIG_USER_ONLY)
1029 void OPPROTO op_602_mfrom (void)
1031 do_op_602_mfrom();
1032 RETURN();
1034 #endif
1036 /* PowerPC 4xx specific micro-ops */
1037 void OPPROTO op_load_dcr (void)
1039 do_load_dcr();
1040 RETURN();
1043 void OPPROTO op_store_dcr (void)
1045 do_store_dcr();
1046 RETURN();
1049 #if !defined(CONFIG_USER_ONLY)
1050 /* Return from critical interrupt :
1051 * same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1
1053 void OPPROTO op_40x_rfci (void)
1055 do_40x_rfci();
1056 RETURN();
1059 void OPPROTO op_rfci (void)
1061 do_rfci();
1062 RETURN();
1065 void OPPROTO op_rfdi (void)
1067 do_rfdi();
1068 RETURN();
1071 void OPPROTO op_rfmci (void)
1073 do_rfmci();
1074 RETURN();
1077 void OPPROTO op_wrte (void)
1079 /* We don't call do_store_msr here as we won't trigger
1080 * any special case nor change hflags
1082 T0 &= 1 << MSR_EE;
1083 env->msr &= ~(1 << MSR_EE);
1084 env->msr |= T0;
1085 RETURN();
1088 void OPPROTO op_440_tlbre (void)
1090 do_440_tlbre(PARAM1);
1091 RETURN();
1094 void OPPROTO op_440_tlbsx (void)
1096 T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF);
1097 RETURN();
1100 void OPPROTO op_4xx_tlbsx_check (void)
1102 int tmp;
1104 tmp = xer_so;
1105 if ((int)T0 != -1)
1106 tmp |= 0x02;
1107 env->crf[0] = tmp;
1108 RETURN();
1111 void OPPROTO op_440_tlbwe (void)
1113 do_440_tlbwe(PARAM1);
1114 RETURN();
1117 void OPPROTO op_4xx_tlbre_lo (void)
1119 do_4xx_tlbre_lo();
1120 RETURN();
1123 void OPPROTO op_4xx_tlbre_hi (void)
1125 do_4xx_tlbre_hi();
1126 RETURN();
1129 void OPPROTO op_4xx_tlbsx (void)
1131 T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]);
1132 RETURN();
1135 void OPPROTO op_4xx_tlbwe_lo (void)
1137 do_4xx_tlbwe_lo();
1138 RETURN();
1141 void OPPROTO op_4xx_tlbwe_hi (void)
1143 do_4xx_tlbwe_hi();
1144 RETURN();
1146 #endif
1148 /* SPR micro-ops */
1149 /* 440 specific */
1150 void OPPROTO op_440_dlmzb (void)
1152 do_440_dlmzb();
1153 RETURN();
1156 void OPPROTO op_440_dlmzb_update_Rc (void)
1158 if (T0 == 8)
1159 T0 = 0x2;
1160 else if (T0 < 4)
1161 T0 = 0x4;
1162 else
1163 T0 = 0x8;
1164 RETURN();
1167 #if !defined(CONFIG_USER_ONLY)
1168 void OPPROTO op_store_pir (void)
1170 env->spr[SPR_PIR] = T0 & 0x0000000FUL;
1171 RETURN();
1174 void OPPROTO op_load_403_pb (void)
1176 do_load_403_pb(PARAM1);
1177 RETURN();
1180 void OPPROTO op_store_403_pb (void)
1182 do_store_403_pb(PARAM1);
1183 RETURN();
1186 void OPPROTO op_load_40x_pit (void)
1188 T0 = load_40x_pit(env);
1189 RETURN();
1192 void OPPROTO op_store_40x_pit (void)
1194 store_40x_pit(env, T0);
1195 RETURN();
1198 void OPPROTO op_store_40x_dbcr0 (void)
1200 store_40x_dbcr0(env, T0);
1201 RETURN();
1204 void OPPROTO op_store_40x_sler (void)
1206 store_40x_sler(env, T0);
1207 RETURN();
1210 void OPPROTO op_store_booke_tcr (void)
1212 store_booke_tcr(env, T0);
1213 RETURN();
1216 void OPPROTO op_store_booke_tsr (void)
1218 store_booke_tsr(env, T0);
1219 RETURN();
1221 #endif /* !defined(CONFIG_USER_ONLY) */
1223 /* SPE extension */
1224 void OPPROTO op_splatw_T1_64 (void)
1226 T1_64 = (T1_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL);
1227 RETURN();
1230 void OPPROTO op_extsh_T1_64 (void)
1232 T1_64 = (int32_t)((int16_t)T1_64);
1233 RETURN();
1236 void OPPROTO op_sli16_T1_64 (void)
1238 T1_64 = T1_64 << 16;
1239 RETURN();
1242 void OPPROTO op_sli32_T1_64 (void)
1244 T1_64 = T1_64 << 32;
1245 RETURN();
1248 void OPPROTO op_srli32_T1_64 (void)
1250 T1_64 = T1_64 >> 32;
1251 RETURN();
1254 void OPPROTO op_evfssub (void)
1256 do_evfssub();
1257 RETURN();
1260 void OPPROTO op_evfsadd (void)
1262 do_evfsadd();
1263 RETURN();
1266 void OPPROTO op_evfsnabs (void)
1268 do_evfsnabs();
1269 RETURN();
1272 void OPPROTO op_evfsabs (void)
1274 do_evfsabs();
1275 RETURN();
1278 void OPPROTO op_evfsneg (void)
1280 do_evfsneg();
1281 RETURN();
1284 void OPPROTO op_evfsdiv (void)
1286 do_evfsdiv();
1287 RETURN();
1290 void OPPROTO op_evfsmul (void)
1292 do_evfsmul();
1293 RETURN();
1296 void OPPROTO op_evfscmplt (void)
1298 do_evfscmplt();
1299 RETURN();
1302 void OPPROTO op_evfscmpgt (void)
1304 do_evfscmpgt();
1305 RETURN();
1308 void OPPROTO op_evfscmpeq (void)
1310 do_evfscmpeq();
1311 RETURN();
1314 void OPPROTO op_evfscfsi (void)
1316 do_evfscfsi();
1317 RETURN();
1320 void OPPROTO op_evfscfui (void)
1322 do_evfscfui();
1323 RETURN();
1326 void OPPROTO op_evfscfsf (void)
1328 do_evfscfsf();
1329 RETURN();
1332 void OPPROTO op_evfscfuf (void)
1334 do_evfscfuf();
1335 RETURN();
1338 void OPPROTO op_evfsctsi (void)
1340 do_evfsctsi();
1341 RETURN();
1344 void OPPROTO op_evfsctui (void)
1346 do_evfsctui();
1347 RETURN();
1350 void OPPROTO op_evfsctsf (void)
1352 do_evfsctsf();
1353 RETURN();
1356 void OPPROTO op_evfsctuf (void)
1358 do_evfsctuf();
1359 RETURN();
1362 void OPPROTO op_evfsctuiz (void)
1364 do_evfsctuiz();
1365 RETURN();
1368 void OPPROTO op_evfsctsiz (void)
1370 do_evfsctsiz();
1371 RETURN();
1374 void OPPROTO op_evfststlt (void)
1376 do_evfststlt();
1377 RETURN();
1380 void OPPROTO op_evfststgt (void)
1382 do_evfststgt();
1383 RETURN();
1386 void OPPROTO op_evfststeq (void)
1388 do_evfststeq();
1389 RETURN();
1392 void OPPROTO op_efssub (void)
1394 T0_64 = _do_efssub(T0_64, T1_64);
1395 RETURN();
1398 void OPPROTO op_efsadd (void)
1400 T0_64 = _do_efsadd(T0_64, T1_64);
1401 RETURN();
1404 void OPPROTO op_efsnabs (void)
1406 T0_64 = _do_efsnabs(T0_64);
1407 RETURN();
1410 void OPPROTO op_efsabs (void)
1412 T0_64 = _do_efsabs(T0_64);
1413 RETURN();
1416 void OPPROTO op_efsneg (void)
1418 T0_64 = _do_efsneg(T0_64);
1419 RETURN();
1422 void OPPROTO op_efsdiv (void)
1424 T0_64 = _do_efsdiv(T0_64, T1_64);
1425 RETURN();
1428 void OPPROTO op_efsmul (void)
1430 T0_64 = _do_efsmul(T0_64, T1_64);
1431 RETURN();
1434 void OPPROTO op_efscmplt (void)
1436 do_efscmplt();
1437 RETURN();
1440 void OPPROTO op_efscmpgt (void)
1442 do_efscmpgt();
1443 RETURN();
1446 void OPPROTO op_efscfd (void)
1448 do_efscfd();
1449 RETURN();
1452 void OPPROTO op_efscmpeq (void)
1454 do_efscmpeq();
1455 RETURN();
1458 void OPPROTO op_efscfsi (void)
1460 do_efscfsi();
1461 RETURN();
1464 void OPPROTO op_efscfui (void)
1466 do_efscfui();
1467 RETURN();
1470 void OPPROTO op_efscfsf (void)
1472 do_efscfsf();
1473 RETURN();
1476 void OPPROTO op_efscfuf (void)
1478 do_efscfuf();
1479 RETURN();
1482 void OPPROTO op_efsctsi (void)
1484 do_efsctsi();
1485 RETURN();
1488 void OPPROTO op_efsctui (void)
1490 do_efsctui();
1491 RETURN();
1494 void OPPROTO op_efsctsf (void)
1496 do_efsctsf();
1497 RETURN();
1500 void OPPROTO op_efsctuf (void)
1502 do_efsctuf();
1503 RETURN();
1506 void OPPROTO op_efsctsiz (void)
1508 do_efsctsiz();
1509 RETURN();
1512 void OPPROTO op_efsctuiz (void)
1514 do_efsctuiz();
1515 RETURN();
1518 void OPPROTO op_efststlt (void)
1520 T0 = _do_efststlt(T0_64, T1_64);
1521 RETURN();
1524 void OPPROTO op_efststgt (void)
1526 T0 = _do_efststgt(T0_64, T1_64);
1527 RETURN();
1530 void OPPROTO op_efststeq (void)
1532 T0 = _do_efststeq(T0_64, T1_64);
1533 RETURN();
1536 void OPPROTO op_efdsub (void)
1538 CPU_DoubleU u1, u2;
1539 u1.ll = T0_64;
1540 u2.ll = T1_64;
1541 u1.d = float64_sub(u1.d, u2.d, &env->spe_status);
1542 T0_64 = u1.ll;
1543 RETURN();
1546 void OPPROTO op_efdadd (void)
1548 CPU_DoubleU u1, u2;
1549 u1.ll = T0_64;
1550 u2.ll = T1_64;
1551 u1.d = float64_add(u1.d, u2.d, &env->spe_status);
1552 T0_64 = u1.ll;
1553 RETURN();
1556 void OPPROTO op_efdcfsid (void)
1558 do_efdcfsi();
1559 RETURN();
1562 void OPPROTO op_efdcfuid (void)
1564 do_efdcfui();
1565 RETURN();
1568 void OPPROTO op_efdnabs (void)
1570 T0_64 |= 0x8000000000000000ULL;
1571 RETURN();
1574 void OPPROTO op_efdabs (void)
1576 T0_64 &= ~0x8000000000000000ULL;
1577 RETURN();
1580 void OPPROTO op_efdneg (void)
1582 T0_64 ^= 0x8000000000000000ULL;
1583 RETURN();
1586 void OPPROTO op_efddiv (void)
1588 CPU_DoubleU u1, u2;
1589 u1.ll = T0_64;
1590 u2.ll = T1_64;
1591 u1.d = float64_div(u1.d, u2.d, &env->spe_status);
1592 T0_64 = u1.ll;
1593 RETURN();
1596 void OPPROTO op_efdmul (void)
1598 CPU_DoubleU u1, u2;
1599 u1.ll = T0_64;
1600 u2.ll = T1_64;
1601 u1.d = float64_mul(u1.d, u2.d, &env->spe_status);
1602 T0_64 = u1.ll;
1603 RETURN();
1606 void OPPROTO op_efdctsidz (void)
1608 do_efdctsiz();
1609 RETURN();
1612 void OPPROTO op_efdctuidz (void)
1614 do_efdctuiz();
1615 RETURN();
1618 void OPPROTO op_efdcmplt (void)
1620 do_efdcmplt();
1621 RETURN();
1624 void OPPROTO op_efdcmpgt (void)
1626 do_efdcmpgt();
1627 RETURN();
1630 void OPPROTO op_efdcfs (void)
1632 do_efdcfs();
1633 RETURN();
1636 void OPPROTO op_efdcmpeq (void)
1638 do_efdcmpeq();
1639 RETURN();
1642 void OPPROTO op_efdcfsi (void)
1644 do_efdcfsi();
1645 RETURN();
1648 void OPPROTO op_efdcfui (void)
1650 do_efdcfui();
1651 RETURN();
1654 void OPPROTO op_efdcfsf (void)
1656 do_efdcfsf();
1657 RETURN();
1660 void OPPROTO op_efdcfuf (void)
1662 do_efdcfuf();
1663 RETURN();
1666 void OPPROTO op_efdctsi (void)
1668 do_efdctsi();
1669 RETURN();
1672 void OPPROTO op_efdctui (void)
1674 do_efdctui();
1675 RETURN();
1678 void OPPROTO op_efdctsf (void)
1680 do_efdctsf();
1681 RETURN();
1684 void OPPROTO op_efdctuf (void)
1686 do_efdctuf();
1687 RETURN();
1690 void OPPROTO op_efdctuiz (void)
1692 do_efdctuiz();
1693 RETURN();
1696 void OPPROTO op_efdctsiz (void)
1698 do_efdctsiz();
1699 RETURN();
1702 void OPPROTO op_efdtstlt (void)
1704 T0 = _do_efdtstlt(T0_64, T1_64);
1705 RETURN();
1708 void OPPROTO op_efdtstgt (void)
1710 T0 = _do_efdtstgt(T0_64, T1_64);
1711 RETURN();
1714 void OPPROTO op_efdtsteq (void)
1716 T0 = _do_efdtsteq(T0_64, T1_64);
1717 RETURN();