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Kludge to support linux-user on a PPC64
[qemu/mini2440.git] / linux-user / main.c
blobbc8c1e6fe148087dfd32517345638885cd43dd0b
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28 #include "qemu-common.h"
29 /* For tb_lock */
30 #include "exec-all.h"
31
32 #define DEBUG_LOGFILE "/tmp/qemu.log"
33
34 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
35 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
36
37 #if defined(__i386__) && !defined(CONFIG_STATIC)
38 /* Force usage of an ELF interpreter even if it is an ELF shared
39 object ! */
40 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
41 #endif
42
43 /* for recent libc, we add these dummy symbols which are not declared
44 when generating a linked object (bug in ld ?) */
45 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
46 asm(".globl __preinit_array_start\n"
47 ".globl __preinit_array_end\n"
48 ".globl __init_array_start\n"
49 ".globl __init_array_end\n"
50 ".globl __fini_array_start\n"
51 ".globl __fini_array_end\n"
52 ".section \".rodata\"\n"
53 "__preinit_array_start:\n"
54 "__preinit_array_end:\n"
55 "__init_array_start:\n"
56 "__init_array_end:\n"
57 "__fini_array_start:\n"
58 "__fini_array_end:\n"
59 ".long 0\n"
60 ".previous\n");
61 #endif
62
63 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
64 we allocate a bigger stack. Need a better solution, for example
65 by remapping the process stack directly at the right place */
66 unsigned long x86_stack_size = 512 * 1024;
67
68 void gemu_log(const char *fmt, ...)
69 {
70 va_list ap;
71
72 va_start(ap, fmt);
73 vfprintf(stderr, fmt, ap);
74 va_end(ap);
75 }
76
77 void cpu_outb(CPUState *env, int addr, int val)
78 {
79 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
80 }
81
82 void cpu_outw(CPUState *env, int addr, int val)
83 {
84 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
85 }
86
87 void cpu_outl(CPUState *env, int addr, int val)
88 {
89 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
90 }
91
92 int cpu_inb(CPUState *env, int addr)
93 {
94 fprintf(stderr, "inb: port=0x%04x\n", addr);
95 return 0;
96 }
97
98 int cpu_inw(CPUState *env, int addr)
99 {
100 fprintf(stderr, "inw: port=0x%04x\n", addr);
101 return 0;
102 }
103
104 int cpu_inl(CPUState *env, int addr)
105 {
106 fprintf(stderr, "inl: port=0x%04x\n", addr);
107 return 0;
108 }
109
110 #if defined(TARGET_I386)
111 int cpu_get_pic_interrupt(CPUState *env)
112 {
113 return -1;
114 }
115 #endif
116
117 /* timers for rdtsc */
118
119 #if 0
120
121 static uint64_t emu_time;
122
123 int64_t cpu_get_real_ticks(void)
124 {
125 return emu_time++;
126 }
127
128 #endif
129
130 #if defined(USE_NPTL)
131 /***********************************************************/
132 /* Helper routines for implementing atomic operations. */
133
134 /* To implement exclusive operations we force all cpus to syncronise.
135 We don't require a full sync, only that no cpus are executing guest code.
136 The alternative is to map target atomic ops onto host equivalents,
137 which requires quite a lot of per host/target work. */
138 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
139 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
140 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
141 static int pending_cpus;
142
143 /* Make sure everything is in a consistent state for calling fork(). */
144 void fork_start(void)
145 {
146 mmap_fork_start();
147 pthread_mutex_lock(&tb_lock);
148 pthread_mutex_lock(&exclusive_lock);
149 }
150
151 void fork_end(int child)
152 {
153 if (child) {
154 /* Child processes created by fork() only have a single thread.
155 Discard information about the parent threads. */
156 first_cpu = thread_env;
157 thread_env->next_cpu = NULL;
158 pending_cpus = 0;
159 pthread_mutex_init(&exclusive_lock, NULL);
160 pthread_cond_init(&exclusive_cond, NULL);
161 pthread_cond_init(&exclusive_resume, NULL);
162 pthread_mutex_init(&tb_lock, NULL);
163 } else {
164 pthread_mutex_unlock(&exclusive_lock);
165 pthread_mutex_unlock(&tb_lock);
166 }
167 mmap_fork_end(child);
168 }
169
170 /* Wait for pending exclusive operations to complete. The exclusive lock
171 must be held. */
172 static inline void exclusive_idle(void)
173 {
174 while (pending_cpus) {
175 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
176 }
177 }
178
179 /* Start an exclusive operation.
180 Must only be called from outside cpu_arm_exec. */
181 static inline void start_exclusive(void)
182 {
183 CPUState *other;
184 pthread_mutex_lock(&exclusive_lock);
185 exclusive_idle();
186
187 pending_cpus = 1;
188 /* Make all other cpus stop executing. */
189 for (other = first_cpu; other; other = other->next_cpu) {
190 if (other->running) {
191 pending_cpus++;
192 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
193 }
194 }
195 if (pending_cpus > 1) {
196 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
197 }
198 }
199
200 /* Finish an exclusive operation. */
201 static inline void end_exclusive(void)
202 {
203 pending_cpus = 0;
204 pthread_cond_broadcast(&exclusive_resume);
205 pthread_mutex_unlock(&exclusive_lock);
206 }
207
208 /* Wait for exclusive ops to finish, and begin cpu execution. */
209 static inline void cpu_exec_start(CPUState *env)
210 {
211 pthread_mutex_lock(&exclusive_lock);
212 exclusive_idle();
213 env->running = 1;
214 pthread_mutex_unlock(&exclusive_lock);
215 }
216
217 /* Mark cpu as not executing, and release pending exclusive ops. */
218 static inline void cpu_exec_end(CPUState *env)
219 {
220 pthread_mutex_lock(&exclusive_lock);
221 env->running = 0;
222 if (pending_cpus > 1) {
223 pending_cpus--;
224 if (pending_cpus == 1) {
225 pthread_cond_signal(&exclusive_cond);
226 }
227 }
228 exclusive_idle();
229 pthread_mutex_unlock(&exclusive_lock);
230 }
231 #else /* if !USE_NPTL */
232 /* These are no-ops because we are not threadsafe. */
233 static inline void cpu_exec_start(CPUState *env)
234 {
235 }
236
237 static inline void cpu_exec_end(CPUState *env)
238 {
239 }
240
241 static inline void start_exclusive(void)
242 {
243 }
244
245 static inline void end_exclusive(void)
246 {
247 }
248
249 void fork_start(void)
250 {
251 }
252
253 void fork_end(int child)
254 {
255 }
256 #endif
257
258
259 #ifdef TARGET_I386
260 /***********************************************************/
261 /* CPUX86 core interface */
262
263 void cpu_smm_update(CPUState *env)
264 {
265 }
266
267 uint64_t cpu_get_tsc(CPUX86State *env)
268 {
269 return cpu_get_real_ticks();
270 }
271
272 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
273 int flags)
274 {
275 unsigned int e1, e2;
276 uint32_t *p;
277 e1 = (addr << 16) | (limit & 0xffff);
278 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
279 e2 |= flags;
280 p = ptr;
281 p[0] = tswap32(e1);
282 p[1] = tswap32(e2);
283 }
284
285 #if TARGET_X86_64
286 uint64_t idt_table[512];
287
288 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
289 uint64_t addr, unsigned int sel)
290 {
291 uint32_t *p, e1, e2;
292 e1 = (addr & 0xffff) | (sel << 16);
293 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
294 p = ptr;
295 p[0] = tswap32(e1);
296 p[1] = tswap32(e2);
297 p[2] = tswap32(addr >> 32);
298 p[3] = 0;
299 }
300 /* only dpl matters as we do only user space emulation */
301 static void set_idt(int n, unsigned int dpl)
302 {
303 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
304 }
305 #else
306 uint64_t idt_table[256];
307
308 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
309 uint32_t addr, unsigned int sel)
310 {
311 uint32_t *p, e1, e2;
312 e1 = (addr & 0xffff) | (sel << 16);
313 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
314 p = ptr;
315 p[0] = tswap32(e1);
316 p[1] = tswap32(e2);
317 }
318
319 /* only dpl matters as we do only user space emulation */
320 static void set_idt(int n, unsigned int dpl)
321 {
322 set_gate(idt_table + n, 0, dpl, 0, 0);
323 }
324 #endif
325
326 void cpu_loop(CPUX86State *env)
327 {
328 int trapnr;
329 abi_ulong pc;
330 target_siginfo_t info;
331
332 for(;;) {
333 trapnr = cpu_x86_exec(env);
334 switch(trapnr) {
335 case 0x80:
336 /* linux syscall from int $0x80 */
337 env->regs[R_EAX] = do_syscall(env,
338 env->regs[R_EAX],
339 env->regs[R_EBX],
340 env->regs[R_ECX],
341 env->regs[R_EDX],
342 env->regs[R_ESI],
343 env->regs[R_EDI],
344 env->regs[R_EBP]);
345 break;
346 #ifndef TARGET_ABI32
347 case EXCP_SYSCALL:
348 /* linux syscall from syscall intruction */
349 env->regs[R_EAX] = do_syscall(env,
350 env->regs[R_EAX],
351 env->regs[R_EDI],
352 env->regs[R_ESI],
353 env->regs[R_EDX],
354 env->regs[10],
355 env->regs[8],
356 env->regs[9]);
357 env->eip = env->exception_next_eip;
358 break;
359 #endif
360 case EXCP0B_NOSEG:
361 case EXCP0C_STACK:
362 info.si_signo = SIGBUS;
363 info.si_errno = 0;
364 info.si_code = TARGET_SI_KERNEL;
365 info._sifields._sigfault._addr = 0;
366 queue_signal(env, info.si_signo, &info);
367 break;
368 case EXCP0D_GPF:
369 /* XXX: potential problem if ABI32 */
370 #ifndef TARGET_X86_64
371 if (env->eflags & VM_MASK) {
372 handle_vm86_fault(env);
373 } else
374 #endif
375 {
376 info.si_signo = SIGSEGV;
377 info.si_errno = 0;
378 info.si_code = TARGET_SI_KERNEL;
379 info._sifields._sigfault._addr = 0;
380 queue_signal(env, info.si_signo, &info);
381 }
382 break;
383 case EXCP0E_PAGE:
384 info.si_signo = SIGSEGV;
385 info.si_errno = 0;
386 if (!(env->error_code & 1))
387 info.si_code = TARGET_SEGV_MAPERR;
388 else
389 info.si_code = TARGET_SEGV_ACCERR;
390 info._sifields._sigfault._addr = env->cr[2];
391 queue_signal(env, info.si_signo, &info);
392 break;
393 case EXCP00_DIVZ:
394 #ifndef TARGET_X86_64
395 if (env->eflags & VM_MASK) {
396 handle_vm86_trap(env, trapnr);
397 } else
398 #endif
399 {
400 /* division by zero */
401 info.si_signo = SIGFPE;
402 info.si_errno = 0;
403 info.si_code = TARGET_FPE_INTDIV;
404 info._sifields._sigfault._addr = env->eip;
405 queue_signal(env, info.si_signo, &info);
406 }
407 break;
408 case EXCP01_SSTP:
409 case EXCP03_INT3:
410 #ifndef TARGET_X86_64
411 if (env->eflags & VM_MASK) {
412 handle_vm86_trap(env, trapnr);
413 } else
414 #endif
415 {
416 info.si_signo = SIGTRAP;
417 info.si_errno = 0;
418 if (trapnr == EXCP01_SSTP) {
419 info.si_code = TARGET_TRAP_BRKPT;
420 info._sifields._sigfault._addr = env->eip;
421 } else {
422 info.si_code = TARGET_SI_KERNEL;
423 info._sifields._sigfault._addr = 0;
424 }
425 queue_signal(env, info.si_signo, &info);
426 }
427 break;
428 case EXCP04_INTO:
429 case EXCP05_BOUND:
430 #ifndef TARGET_X86_64
431 if (env->eflags & VM_MASK) {
432 handle_vm86_trap(env, trapnr);
433 } else
434 #endif
435 {
436 info.si_signo = SIGSEGV;
437 info.si_errno = 0;
438 info.si_code = TARGET_SI_KERNEL;
439 info._sifields._sigfault._addr = 0;
440 queue_signal(env, info.si_signo, &info);
441 }
442 break;
443 case EXCP06_ILLOP:
444 info.si_signo = SIGILL;
445 info.si_errno = 0;
446 info.si_code = TARGET_ILL_ILLOPN;
447 info._sifields._sigfault._addr = env->eip;
448 queue_signal(env, info.si_signo, &info);
449 break;
450 case EXCP_INTERRUPT:
451 /* just indicate that signals should be handled asap */
452 break;
453 case EXCP_DEBUG:
454 {
455 int sig;
456
457 sig = gdb_handlesig (env, TARGET_SIGTRAP);
458 if (sig)
459 {
460 info.si_signo = sig;
461 info.si_errno = 0;
462 info.si_code = TARGET_TRAP_BRKPT;
463 queue_signal(env, info.si_signo, &info);
464 }
465 }
466 break;
467 default:
468 pc = env->segs[R_CS].base + env->eip;
469 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
470 (long)pc, trapnr);
471 abort();
472 }
473 process_pending_signals(env);
474 }
475 }
476 #endif
477
478 #ifdef TARGET_ARM
479
480 /* XXX: find a better solution */
481 extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end);
482
483 static void arm_cache_flush(abi_ulong start, abi_ulong last)
484 {
485 abi_ulong addr, last1;
486
487 if (last < start)
488 return;
489 addr = start;
490 for(;;) {
491 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
492 if (last1 > last)
493 last1 = last;
494 tb_invalidate_page_range(addr, last1 + 1);
495 if (last1 == last)
496 break;
497 addr = last1 + 1;
498 }
499 }
500
501 /* Handle a jump to the kernel code page. */
502 static int
503 do_kernel_trap(CPUARMState *env)
504 {
505 uint32_t addr;
506 uint32_t cpsr;
507 uint32_t val;
508
509 switch (env->regs[15]) {
510 case 0xffff0fa0: /* __kernel_memory_barrier */
511 /* ??? No-op. Will need to do better for SMP. */
512 break;
513 case 0xffff0fc0: /* __kernel_cmpxchg */
514 /* XXX: This only works between threads, not between processes.
515 It's probably possible to implement this with native host
516 operations. However things like ldrex/strex are much harder so
517 there's not much point trying. */
518 start_exclusive();
519 cpsr = cpsr_read(env);
520 addr = env->regs[2];
521 /* FIXME: This should SEGV if the access fails. */
522 if (get_user_u32(val, addr))
523 val = ~env->regs[0];
524 if (val == env->regs[0]) {
525 val = env->regs[1];
526 /* FIXME: Check for segfaults. */
527 put_user_u32(val, addr);
528 env->regs[0] = 0;
529 cpsr |= CPSR_C;
530 } else {
531 env->regs[0] = -1;
532 cpsr &= ~CPSR_C;
533 }
534 cpsr_write(env, cpsr, CPSR_C);
535 end_exclusive();
536 break;
537 case 0xffff0fe0: /* __kernel_get_tls */
538 env->regs[0] = env->cp15.c13_tls2;
539 break;
540 default:
541 return 1;
542 }
543 /* Jump back to the caller. */
544 addr = env->regs[14];
545 if (addr & 1) {
546 env->thumb = 1;
547 addr &= ~1;
548 }
549 env->regs[15] = addr;
550
551 return 0;
552 }
553
554 void cpu_loop(CPUARMState *env)
555 {
556 int trapnr;
557 unsigned int n, insn;
558 target_siginfo_t info;
559 uint32_t addr;
560
561 for(;;) {
562 cpu_exec_start(env);
563 trapnr = cpu_arm_exec(env);
564 cpu_exec_end(env);
565 switch(trapnr) {
566 case EXCP_UDEF:
567 {
568 TaskState *ts = env->opaque;
569 uint32_t opcode;
570 int rc;
571
572 /* we handle the FPU emulation here, as Linux */
573 /* we get the opcode */
574 /* FIXME - what to do if get_user() fails? */
575 get_user_u32(opcode, env->regs[15]);
576
577 rc = EmulateAll(opcode, &ts->fpa, env);
578 if (rc == 0) { /* illegal instruction */
579 info.si_signo = SIGILL;
580 info.si_errno = 0;
581 info.si_code = TARGET_ILL_ILLOPN;
582 info._sifields._sigfault._addr = env->regs[15];
583 queue_signal(env, info.si_signo, &info);
584 } else if (rc < 0) { /* FP exception */
585 int arm_fpe=0;
586
587 /* translate softfloat flags to FPSR flags */
588 if (-rc & float_flag_invalid)
589 arm_fpe |= BIT_IOC;
590 if (-rc & float_flag_divbyzero)
591 arm_fpe |= BIT_DZC;
592 if (-rc & float_flag_overflow)
593 arm_fpe |= BIT_OFC;
594 if (-rc & float_flag_underflow)
595 arm_fpe |= BIT_UFC;
596 if (-rc & float_flag_inexact)
597 arm_fpe |= BIT_IXC;
598
599 FPSR fpsr = ts->fpa.fpsr;
600 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
601
602 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
603 info.si_signo = SIGFPE;
604 info.si_errno = 0;
605
606 /* ordered by priority, least first */
607 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
608 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
609 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
610 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
611 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
612
613 info._sifields._sigfault._addr = env->regs[15];
614 queue_signal(env, info.si_signo, &info);
615 } else {
616 env->regs[15] += 4;
617 }
618
619 /* accumulate unenabled exceptions */
620 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
621 fpsr |= BIT_IXC;
622 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
623 fpsr |= BIT_UFC;
624 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
625 fpsr |= BIT_OFC;
626 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
627 fpsr |= BIT_DZC;
628 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
629 fpsr |= BIT_IOC;
630 ts->fpa.fpsr=fpsr;
631 } else { /* everything OK */
632 /* increment PC */
633 env->regs[15] += 4;
634 }
635 }
636 break;
637 case EXCP_SWI:
638 case EXCP_BKPT:
639 {
640 env->eabi = 1;
641 /* system call */
642 if (trapnr == EXCP_BKPT) {
643 if (env->thumb) {
644 /* FIXME - what to do if get_user() fails? */
645 get_user_u16(insn, env->regs[15]);
646 n = insn & 0xff;
647 env->regs[15] += 2;
648 } else {
649 /* FIXME - what to do if get_user() fails? */
650 get_user_u32(insn, env->regs[15]);
651 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
652 env->regs[15] += 4;
653 }
654 } else {
655 if (env->thumb) {
656 /* FIXME - what to do if get_user() fails? */
657 get_user_u16(insn, env->regs[15] - 2);
658 n = insn & 0xff;
659 } else {
660 /* FIXME - what to do if get_user() fails? */
661 get_user_u32(insn, env->regs[15] - 4);
662 n = insn & 0xffffff;
663 }
664 }
665
666 if (n == ARM_NR_cacheflush) {
667 arm_cache_flush(env->regs[0], env->regs[1]);
668 } else if (n == ARM_NR_semihosting
669 || n == ARM_NR_thumb_semihosting) {
670 env->regs[0] = do_arm_semihosting (env);
671 } else if (n == 0 || n >= ARM_SYSCALL_BASE
672 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
673 /* linux syscall */
674 if (env->thumb || n == 0) {
675 n = env->regs[7];
676 } else {
677 n -= ARM_SYSCALL_BASE;
678 env->eabi = 0;
679 }
680 if ( n > ARM_NR_BASE) {
681 switch (n) {
682 case ARM_NR_cacheflush:
683 arm_cache_flush(env->regs[0], env->regs[1]);
684 break;
685 case ARM_NR_set_tls:
686 cpu_set_tls(env, env->regs[0]);
687 env->regs[0] = 0;
688 break;
689 default:
690 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
691 n);
692 env->regs[0] = -TARGET_ENOSYS;
693 break;
694 }
695 } else {
696 env->regs[0] = do_syscall(env,
697 n,
698 env->regs[0],
699 env->regs[1],
700 env->regs[2],
701 env->regs[3],
702 env->regs[4],
703 env->regs[5]);
704 }
705 } else {
706 goto error;
707 }
708 }
709 break;
710 case EXCP_INTERRUPT:
711 /* just indicate that signals should be handled asap */
712 break;
713 case EXCP_PREFETCH_ABORT:
714 addr = env->cp15.c6_insn;
715 goto do_segv;
716 case EXCP_DATA_ABORT:
717 addr = env->cp15.c6_data;
718 goto do_segv;
719 do_segv:
720 {
721 info.si_signo = SIGSEGV;
722 info.si_errno = 0;
723 /* XXX: check env->error_code */
724 info.si_code = TARGET_SEGV_MAPERR;
725 info._sifields._sigfault._addr = addr;
726 queue_signal(env, info.si_signo, &info);
727 }
728 break;
729 case EXCP_DEBUG:
730 {
731 int sig;
732
733 sig = gdb_handlesig (env, TARGET_SIGTRAP);
734 if (sig)
735 {
736 info.si_signo = sig;
737 info.si_errno = 0;
738 info.si_code = TARGET_TRAP_BRKPT;
739 queue_signal(env, info.si_signo, &info);
740 }
741 }
742 break;
743 case EXCP_KERNEL_TRAP:
744 if (do_kernel_trap(env))
745 goto error;
746 break;
747 default:
748 error:
749 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
750 trapnr);
751 cpu_dump_state(env, stderr, fprintf, 0);
752 abort();
753 }
754 process_pending_signals(env);
755 }
756 }
757
758 #endif
759
760 #ifdef TARGET_SPARC
761
762 //#define DEBUG_WIN
763
764 /* WARNING: dealing with register windows _is_ complicated. More info
765 can be found at http://www.sics.se/~psm/sparcstack.html */
766 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
767 {
768 index = (index + cwp * 16) % (16 * env->nwindows);
769 /* wrap handling : if cwp is on the last window, then we use the
770 registers 'after' the end */
771 if (index < 8 && env->cwp == env->nwindows - 1)
772 index += 16 * env->nwindows;
773 return index;
774 }
775
776 /* save the register window 'cwp1' */
777 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
778 {
779 unsigned int i;
780 abi_ulong sp_ptr;
781
782 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
783 #if defined(DEBUG_WIN)
784 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
785 sp_ptr, cwp1);
786 #endif
787 for(i = 0; i < 16; i++) {
788 /* FIXME - what to do if put_user() fails? */
789 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
790 sp_ptr += sizeof(abi_ulong);
791 }
792 }
793
794 static void save_window(CPUSPARCState *env)
795 {
796 #ifndef TARGET_SPARC64
797 unsigned int new_wim;
798 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
799 ((1LL << env->nwindows) - 1);
800 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
801 env->wim = new_wim;
802 #else
803 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
804 env->cansave++;
805 env->canrestore--;
806 #endif
807 }
808
809 static void restore_window(CPUSPARCState *env)
810 {
811 unsigned int new_wim, i, cwp1;
812 abi_ulong sp_ptr;
813
814 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
815 ((1LL << env->nwindows) - 1);
816
817 /* restore the invalid window */
818 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
819 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
820 #if defined(DEBUG_WIN)
821 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
822 sp_ptr, cwp1);
823 #endif
824 for(i = 0; i < 16; i++) {
825 /* FIXME - what to do if get_user() fails? */
826 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
827 sp_ptr += sizeof(abi_ulong);
828 }
829 env->wim = new_wim;
830 #ifdef TARGET_SPARC64
831 env->canrestore++;
832 if (env->cleanwin < env->nwindows - 1)
833 env->cleanwin++;
834 env->cansave--;
835 #endif
836 }
837
838 static void flush_windows(CPUSPARCState *env)
839 {
840 int offset, cwp1;
841
842 offset = 1;
843 for(;;) {
844 /* if restore would invoke restore_window(), then we can stop */
845 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
846 if (env->wim & (1 << cwp1))
847 break;
848 save_window_offset(env, cwp1);
849 offset++;
850 }
851 /* set wim so that restore will reload the registers */
852 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
853 env->wim = 1 << cwp1;
854 #if defined(DEBUG_WIN)
855 printf("flush_windows: nb=%d\n", offset - 1);
856 #endif
857 }
858
859 void cpu_loop (CPUSPARCState *env)
860 {
861 int trapnr, ret;
862 target_siginfo_t info;
863
864 while (1) {
865 trapnr = cpu_sparc_exec (env);
866
867 switch (trapnr) {
868 #ifndef TARGET_SPARC64
869 case 0x88:
870 case 0x90:
871 #else
872 case 0x110:
873 case 0x16d:
874 #endif
875 ret = do_syscall (env, env->gregs[1],
876 env->regwptr[0], env->regwptr[1],
877 env->regwptr[2], env->regwptr[3],
878 env->regwptr[4], env->regwptr[5]);
879 if ((unsigned int)ret >= (unsigned int)(-515)) {
880 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
881 env->xcc |= PSR_CARRY;
882 #else
883 env->psr |= PSR_CARRY;
884 #endif
885 ret = -ret;
886 } else {
887 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
888 env->xcc &= ~PSR_CARRY;
889 #else
890 env->psr &= ~PSR_CARRY;
891 #endif
892 }
893 env->regwptr[0] = ret;
894 /* next instruction */
895 env->pc = env->npc;
896 env->npc = env->npc + 4;
897 break;
898 case 0x83: /* flush windows */
899 #ifdef TARGET_ABI32
900 case 0x103:
901 #endif
902 flush_windows(env);
903 /* next instruction */
904 env->pc = env->npc;
905 env->npc = env->npc + 4;
906 break;
907 #ifndef TARGET_SPARC64
908 case TT_WIN_OVF: /* window overflow */
909 save_window(env);
910 break;
911 case TT_WIN_UNF: /* window underflow */
912 restore_window(env);
913 break;
914 case TT_TFAULT:
915 case TT_DFAULT:
916 {
917 info.si_signo = SIGSEGV;
918 info.si_errno = 0;
919 /* XXX: check env->error_code */
920 info.si_code = TARGET_SEGV_MAPERR;
921 info._sifields._sigfault._addr = env->mmuregs[4];
922 queue_signal(env, info.si_signo, &info);
923 }
924 break;
925 #else
926 case TT_SPILL: /* window overflow */
927 save_window(env);
928 break;
929 case TT_FILL: /* window underflow */
930 restore_window(env);
931 break;
932 case TT_TFAULT:
933 case TT_DFAULT:
934 {
935 info.si_signo = SIGSEGV;
936 info.si_errno = 0;
937 /* XXX: check env->error_code */
938 info.si_code = TARGET_SEGV_MAPERR;
939 if (trapnr == TT_DFAULT)
940 info._sifields._sigfault._addr = env->dmmuregs[4];
941 else
942 info._sifields._sigfault._addr = env->tsptr->tpc;
943 queue_signal(env, info.si_signo, &info);
944 }
945 break;
946 #ifndef TARGET_ABI32
947 case 0x16e:
948 flush_windows(env);
949 sparc64_get_context(env);
950 break;
951 case 0x16f:
952 flush_windows(env);
953 sparc64_set_context(env);
954 break;
955 #endif
956 #endif
957 case EXCP_INTERRUPT:
958 /* just indicate that signals should be handled asap */
959 break;
960 case EXCP_DEBUG:
961 {
962 int sig;
963
964 sig = gdb_handlesig (env, TARGET_SIGTRAP);
965 if (sig)
966 {
967 info.si_signo = sig;
968 info.si_errno = 0;
969 info.si_code = TARGET_TRAP_BRKPT;
970 queue_signal(env, info.si_signo, &info);
971 }
972 }
973 break;
974 default:
975 printf ("Unhandled trap: 0x%x\n", trapnr);
976 cpu_dump_state(env, stderr, fprintf, 0);
977 exit (1);
978 }
979 process_pending_signals (env);
980 }
981 }
982
983 #endif
984
985 #ifdef TARGET_PPC
986 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
987 {
988 /* TO FIX */
989 return 0;
990 }
991
992 uint32_t cpu_ppc_load_tbl (CPUState *env)
993 {
994 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
995 }
996
997 uint32_t cpu_ppc_load_tbu (CPUState *env)
998 {
999 return cpu_ppc_get_tb(env) >> 32;
1000 }
1001
1002 uint32_t cpu_ppc_load_atbl (CPUState *env)
1003 {
1004 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1005 }
1006
1007 uint32_t cpu_ppc_load_atbu (CPUState *env)
1008 {
1009 return cpu_ppc_get_tb(env) >> 32;
1010 }
1011
1012 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1013 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1014
1015 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1016 {
1017 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1018 }
1019
1020 /* XXX: to be fixed */
1021 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1022 {
1023 return -1;
1024 }
1025
1026 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1027 {
1028 return -1;
1029 }
1030
1031 #define EXCP_DUMP(env, fmt, args...) \
1032 do { \
1033 fprintf(stderr, fmt , ##args); \
1034 cpu_dump_state(env, stderr, fprintf, 0); \
1035 if (loglevel != 0) { \
1036 fprintf(logfile, fmt , ##args); \
1037 cpu_dump_state(env, logfile, fprintf, 0); \
1038 } \
1039 } while (0)
1040
1041 void cpu_loop(CPUPPCState *env)
1042 {
1043 target_siginfo_t info;
1044 int trapnr;
1045 uint32_t ret;
1046
1047 for(;;) {
1048 trapnr = cpu_ppc_exec(env);
1049 switch(trapnr) {
1050 case POWERPC_EXCP_NONE:
1051 /* Just go on */
1052 break;
1053 case POWERPC_EXCP_CRITICAL: /* Critical input */
1054 cpu_abort(env, "Critical interrupt while in user mode. "
1055 "Aborting\n");
1056 break;
1057 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1058 cpu_abort(env, "Machine check exception while in user mode. "
1059 "Aborting\n");
1060 break;
1061 case POWERPC_EXCP_DSI: /* Data storage exception */
1062 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1063 env->spr[SPR_DAR]);
1064 /* XXX: check this. Seems bugged */
1065 switch (env->error_code & 0xFF000000) {
1066 case 0x40000000:
1067 info.si_signo = TARGET_SIGSEGV;
1068 info.si_errno = 0;
1069 info.si_code = TARGET_SEGV_MAPERR;
1070 break;
1071 case 0x04000000:
1072 info.si_signo = TARGET_SIGILL;
1073 info.si_errno = 0;
1074 info.si_code = TARGET_ILL_ILLADR;
1075 break;
1076 case 0x08000000:
1077 info.si_signo = TARGET_SIGSEGV;
1078 info.si_errno = 0;
1079 info.si_code = TARGET_SEGV_ACCERR;
1080 break;
1081 default:
1082 /* Let's send a regular segfault... */
1083 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1084 env->error_code);
1085 info.si_signo = TARGET_SIGSEGV;
1086 info.si_errno = 0;
1087 info.si_code = TARGET_SEGV_MAPERR;
1088 break;
1089 }
1090 info._sifields._sigfault._addr = env->nip;
1091 queue_signal(env, info.si_signo, &info);
1092 break;
1093 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1094 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1095 env->spr[SPR_SRR0]);
1096 /* XXX: check this */
1097 switch (env->error_code & 0xFF000000) {
1098 case 0x40000000:
1099 info.si_signo = TARGET_SIGSEGV;
1100 info.si_errno = 0;
1101 info.si_code = TARGET_SEGV_MAPERR;
1102 break;
1103 case 0x10000000:
1104 case 0x08000000:
1105 info.si_signo = TARGET_SIGSEGV;
1106 info.si_errno = 0;
1107 info.si_code = TARGET_SEGV_ACCERR;
1108 break;
1109 default:
1110 /* Let's send a regular segfault... */
1111 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1112 env->error_code);
1113 info.si_signo = TARGET_SIGSEGV;
1114 info.si_errno = 0;
1115 info.si_code = TARGET_SEGV_MAPERR;
1116 break;
1117 }
1118 info._sifields._sigfault._addr = env->nip - 4;
1119 queue_signal(env, info.si_signo, &info);
1120 break;
1121 case POWERPC_EXCP_EXTERNAL: /* External input */
1122 cpu_abort(env, "External interrupt while in user mode. "
1123 "Aborting\n");
1124 break;
1125 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1126 EXCP_DUMP(env, "Unaligned memory access\n");
1127 /* XXX: check this */
1128 info.si_signo = TARGET_SIGBUS;
1129 info.si_errno = 0;
1130 info.si_code = TARGET_BUS_ADRALN;
1131 info._sifields._sigfault._addr = env->nip - 4;
1132 queue_signal(env, info.si_signo, &info);
1133 break;
1134 case POWERPC_EXCP_PROGRAM: /* Program exception */
1135 /* XXX: check this */
1136 switch (env->error_code & ~0xF) {
1137 case POWERPC_EXCP_FP:
1138 EXCP_DUMP(env, "Floating point program exception\n");
1139 info.si_signo = TARGET_SIGFPE;
1140 info.si_errno = 0;
1141 switch (env->error_code & 0xF) {
1142 case POWERPC_EXCP_FP_OX:
1143 info.si_code = TARGET_FPE_FLTOVF;
1144 break;
1145 case POWERPC_EXCP_FP_UX:
1146 info.si_code = TARGET_FPE_FLTUND;
1147 break;
1148 case POWERPC_EXCP_FP_ZX:
1149 case POWERPC_EXCP_FP_VXZDZ:
1150 info.si_code = TARGET_FPE_FLTDIV;
1151 break;
1152 case POWERPC_EXCP_FP_XX:
1153 info.si_code = TARGET_FPE_FLTRES;
1154 break;
1155 case POWERPC_EXCP_FP_VXSOFT:
1156 info.si_code = TARGET_FPE_FLTINV;
1157 break;
1158 case POWERPC_EXCP_FP_VXSNAN:
1159 case POWERPC_EXCP_FP_VXISI:
1160 case POWERPC_EXCP_FP_VXIDI:
1161 case POWERPC_EXCP_FP_VXIMZ:
1162 case POWERPC_EXCP_FP_VXVC:
1163 case POWERPC_EXCP_FP_VXSQRT:
1164 case POWERPC_EXCP_FP_VXCVI:
1165 info.si_code = TARGET_FPE_FLTSUB;
1166 break;
1167 default:
1168 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1169 env->error_code);
1170 break;
1171 }
1172 break;
1173 case POWERPC_EXCP_INVAL:
1174 EXCP_DUMP(env, "Invalid instruction\n");
1175 info.si_signo = TARGET_SIGILL;
1176 info.si_errno = 0;
1177 switch (env->error_code & 0xF) {
1178 case POWERPC_EXCP_INVAL_INVAL:
1179 info.si_code = TARGET_ILL_ILLOPC;
1180 break;
1181 case POWERPC_EXCP_INVAL_LSWX:
1182 info.si_code = TARGET_ILL_ILLOPN;
1183 break;
1184 case POWERPC_EXCP_INVAL_SPR:
1185 info.si_code = TARGET_ILL_PRVREG;
1186 break;
1187 case POWERPC_EXCP_INVAL_FP:
1188 info.si_code = TARGET_ILL_COPROC;
1189 break;
1190 default:
1191 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1192 env->error_code & 0xF);
1193 info.si_code = TARGET_ILL_ILLADR;
1194 break;
1195 }
1196 break;
1197 case POWERPC_EXCP_PRIV:
1198 EXCP_DUMP(env, "Privilege violation\n");
1199 info.si_signo = TARGET_SIGILL;
1200 info.si_errno = 0;
1201 switch (env->error_code & 0xF) {
1202 case POWERPC_EXCP_PRIV_OPC:
1203 info.si_code = TARGET_ILL_PRVOPC;
1204 break;
1205 case POWERPC_EXCP_PRIV_REG:
1206 info.si_code = TARGET_ILL_PRVREG;
1207 break;
1208 default:
1209 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1210 env->error_code & 0xF);
1211 info.si_code = TARGET_ILL_PRVOPC;
1212 break;
1213 }
1214 break;
1215 case POWERPC_EXCP_TRAP:
1216 cpu_abort(env, "Tried to call a TRAP\n");
1217 break;
1218 default:
1219 /* Should not happen ! */
1220 cpu_abort(env, "Unknown program exception (%02x)\n",
1221 env->error_code);
1222 break;
1223 }
1224 info._sifields._sigfault._addr = env->nip - 4;
1225 queue_signal(env, info.si_signo, &info);
1226 break;
1227 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1228 EXCP_DUMP(env, "No floating point allowed\n");
1229 info.si_signo = TARGET_SIGILL;
1230 info.si_errno = 0;
1231 info.si_code = TARGET_ILL_COPROC;
1232 info._sifields._sigfault._addr = env->nip - 4;
1233 queue_signal(env, info.si_signo, &info);
1234 break;
1235 case POWERPC_EXCP_SYSCALL: /* System call exception */
1236 cpu_abort(env, "Syscall exception while in user mode. "
1237 "Aborting\n");
1238 break;
1239 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1240 EXCP_DUMP(env, "No APU instruction allowed\n");
1241 info.si_signo = TARGET_SIGILL;
1242 info.si_errno = 0;
1243 info.si_code = TARGET_ILL_COPROC;
1244 info._sifields._sigfault._addr = env->nip - 4;
1245 queue_signal(env, info.si_signo, &info);
1246 break;
1247 case POWERPC_EXCP_DECR: /* Decrementer exception */
1248 cpu_abort(env, "Decrementer interrupt while in user mode. "
1249 "Aborting\n");
1250 break;
1251 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1252 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1253 "Aborting\n");
1254 break;
1255 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1256 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1257 "Aborting\n");
1258 break;
1259 case POWERPC_EXCP_DTLB: /* Data TLB error */
1260 cpu_abort(env, "Data TLB exception while in user mode. "
1261 "Aborting\n");
1262 break;
1263 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1264 cpu_abort(env, "Instruction TLB exception while in user mode. "
1265 "Aborting\n");
1266 break;
1267 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1268 /* XXX: check this */
1269 {
1270 int sig;
1271
1272 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1273 if (sig) {
1274 info.si_signo = sig;
1275 info.si_errno = 0;
1276 info.si_code = TARGET_TRAP_BRKPT;
1277 queue_signal(env, info.si_signo, &info);
1278 }
1279 }
1280 break;
1281 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1282 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1283 info.si_signo = TARGET_SIGILL;
1284 info.si_errno = 0;
1285 info.si_code = TARGET_ILL_COPROC;
1286 info._sifields._sigfault._addr = env->nip - 4;
1287 queue_signal(env, info.si_signo, &info);
1288 break;
1289 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1290 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1291 break;
1292 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1293 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1294 break;
1295 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1296 cpu_abort(env, "Performance monitor exception not handled\n");
1297 break;
1298 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1299 cpu_abort(env, "Doorbell interrupt while in user mode. "
1300 "Aborting\n");
1301 break;
1302 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1303 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1304 "Aborting\n");
1305 break;
1306 case POWERPC_EXCP_RESET: /* System reset exception */
1307 cpu_abort(env, "Reset interrupt while in user mode. "
1308 "Aborting\n");
1309 break;
1310 case POWERPC_EXCP_DSEG: /* Data segment exception */
1311 cpu_abort(env, "Data segment exception while in user mode. "
1312 "Aborting\n");
1313 break;
1314 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1315 cpu_abort(env, "Instruction segment exception "
1316 "while in user mode. Aborting\n");
1317 break;
1318 /* PowerPC 64 with hypervisor mode support */
1319 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1320 cpu_abort(env, "Hypervisor decrementer interrupt "
1321 "while in user mode. Aborting\n");
1322 break;
1323 case POWERPC_EXCP_TRACE: /* Trace exception */
1324 /* Nothing to do:
1325 * we use this exception to emulate step-by-step execution mode.
1326 */
1327 break;
1328 /* PowerPC 64 with hypervisor mode support */
1329 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1330 cpu_abort(env, "Hypervisor data storage exception "
1331 "while in user mode. Aborting\n");
1332 break;
1333 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1334 cpu_abort(env, "Hypervisor instruction storage exception "
1335 "while in user mode. Aborting\n");
1336 break;
1337 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1338 cpu_abort(env, "Hypervisor data segment exception "
1339 "while in user mode. Aborting\n");
1340 break;
1341 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1342 cpu_abort(env, "Hypervisor instruction segment exception "
1343 "while in user mode. Aborting\n");
1344 break;
1345 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1346 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1347 info.si_signo = TARGET_SIGILL;
1348 info.si_errno = 0;
1349 info.si_code = TARGET_ILL_COPROC;
1350 info._sifields._sigfault._addr = env->nip - 4;
1351 queue_signal(env, info.si_signo, &info);
1352 break;
1353 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1354 cpu_abort(env, "Programable interval timer interrupt "
1355 "while in user mode. Aborting\n");
1356 break;
1357 case POWERPC_EXCP_IO: /* IO error exception */
1358 cpu_abort(env, "IO error exception while in user mode. "
1359 "Aborting\n");
1360 break;
1361 case POWERPC_EXCP_RUNM: /* Run mode exception */
1362 cpu_abort(env, "Run mode exception while in user mode. "
1363 "Aborting\n");
1364 break;
1365 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1366 cpu_abort(env, "Emulation trap exception not handled\n");
1367 break;
1368 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1369 cpu_abort(env, "Instruction fetch TLB exception "
1370 "while in user-mode. Aborting");
1371 break;
1372 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1373 cpu_abort(env, "Data load TLB exception while in user-mode. "
1374 "Aborting");
1375 break;
1376 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1377 cpu_abort(env, "Data store TLB exception while in user-mode. "
1378 "Aborting");
1379 break;
1380 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1381 cpu_abort(env, "Floating-point assist exception not handled\n");
1382 break;
1383 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1384 cpu_abort(env, "Instruction address breakpoint exception "
1385 "not handled\n");
1386 break;
1387 case POWERPC_EXCP_SMI: /* System management interrupt */
1388 cpu_abort(env, "System management interrupt while in user mode. "
1389 "Aborting\n");
1390 break;
1391 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1392 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1393 "Aborting\n");
1394 break;
1395 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1396 cpu_abort(env, "Performance monitor exception not handled\n");
1397 break;
1398 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1399 cpu_abort(env, "Vector assist exception not handled\n");
1400 break;
1401 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1402 cpu_abort(env, "Soft patch exception not handled\n");
1403 break;
1404 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1405 cpu_abort(env, "Maintenance exception while in user mode. "
1406 "Aborting\n");
1407 break;
1408 case POWERPC_EXCP_STOP: /* stop translation */
1409 /* We did invalidate the instruction cache. Go on */
1410 break;
1411 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1412 /* We just stopped because of a branch. Go on */
1413 break;
1414 case POWERPC_EXCP_SYSCALL_USER:
1415 /* system call in user-mode emulation */
1416 /* WARNING:
1417 * PPC ABI uses overflow flag in cr0 to signal an error
1418 * in syscalls.
1419 */
1420 #if 0
1421 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1422 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1423 #endif
1424 env->crf[0] &= ~0x1;
1425 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1426 env->gpr[5], env->gpr[6], env->gpr[7],
1427 env->gpr[8]);
1428 if (ret > (uint32_t)(-515)) {
1429 env->crf[0] |= 0x1;
1430 ret = -ret;
1431 }
1432 env->gpr[3] = ret;
1433 #if 0
1434 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1435 #endif
1436 break;
1437 case EXCP_INTERRUPT:
1438 /* just indicate that signals should be handled asap */
1439 break;
1440 default:
1441 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1442 break;
1443 }
1444 process_pending_signals(env);
1445 }
1446 }
1447 #endif
1448
1449 #ifdef TARGET_MIPS
1450
1451 #define MIPS_SYS(name, args) args,
1452
1453 static const uint8_t mips_syscall_args[] = {
1454 MIPS_SYS(sys_syscall , 0) /* 4000 */
1455 MIPS_SYS(sys_exit , 1)
1456 MIPS_SYS(sys_fork , 0)
1457 MIPS_SYS(sys_read , 3)
1458 MIPS_SYS(sys_write , 3)
1459 MIPS_SYS(sys_open , 3) /* 4005 */
1460 MIPS_SYS(sys_close , 1)
1461 MIPS_SYS(sys_waitpid , 3)
1462 MIPS_SYS(sys_creat , 2)
1463 MIPS_SYS(sys_link , 2)
1464 MIPS_SYS(sys_unlink , 1) /* 4010 */
1465 MIPS_SYS(sys_execve , 0)
1466 MIPS_SYS(sys_chdir , 1)
1467 MIPS_SYS(sys_time , 1)
1468 MIPS_SYS(sys_mknod , 3)
1469 MIPS_SYS(sys_chmod , 2) /* 4015 */
1470 MIPS_SYS(sys_lchown , 3)
1471 MIPS_SYS(sys_ni_syscall , 0)
1472 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1473 MIPS_SYS(sys_lseek , 3)
1474 MIPS_SYS(sys_getpid , 0) /* 4020 */
1475 MIPS_SYS(sys_mount , 5)
1476 MIPS_SYS(sys_oldumount , 1)
1477 MIPS_SYS(sys_setuid , 1)
1478 MIPS_SYS(sys_getuid , 0)
1479 MIPS_SYS(sys_stime , 1) /* 4025 */
1480 MIPS_SYS(sys_ptrace , 4)
1481 MIPS_SYS(sys_alarm , 1)
1482 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1483 MIPS_SYS(sys_pause , 0)
1484 MIPS_SYS(sys_utime , 2) /* 4030 */
1485 MIPS_SYS(sys_ni_syscall , 0)
1486 MIPS_SYS(sys_ni_syscall , 0)
1487 MIPS_SYS(sys_access , 2)
1488 MIPS_SYS(sys_nice , 1)
1489 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1490 MIPS_SYS(sys_sync , 0)
1491 MIPS_SYS(sys_kill , 2)
1492 MIPS_SYS(sys_rename , 2)
1493 MIPS_SYS(sys_mkdir , 2)
1494 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1495 MIPS_SYS(sys_dup , 1)
1496 MIPS_SYS(sys_pipe , 0)
1497 MIPS_SYS(sys_times , 1)
1498 MIPS_SYS(sys_ni_syscall , 0)
1499 MIPS_SYS(sys_brk , 1) /* 4045 */
1500 MIPS_SYS(sys_setgid , 1)
1501 MIPS_SYS(sys_getgid , 0)
1502 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1503 MIPS_SYS(sys_geteuid , 0)
1504 MIPS_SYS(sys_getegid , 0) /* 4050 */
1505 MIPS_SYS(sys_acct , 0)
1506 MIPS_SYS(sys_umount , 2)
1507 MIPS_SYS(sys_ni_syscall , 0)
1508 MIPS_SYS(sys_ioctl , 3)
1509 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1510 MIPS_SYS(sys_ni_syscall , 2)
1511 MIPS_SYS(sys_setpgid , 2)
1512 MIPS_SYS(sys_ni_syscall , 0)
1513 MIPS_SYS(sys_olduname , 1)
1514 MIPS_SYS(sys_umask , 1) /* 4060 */
1515 MIPS_SYS(sys_chroot , 1)
1516 MIPS_SYS(sys_ustat , 2)
1517 MIPS_SYS(sys_dup2 , 2)
1518 MIPS_SYS(sys_getppid , 0)
1519 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1520 MIPS_SYS(sys_setsid , 0)
1521 MIPS_SYS(sys_sigaction , 3)
1522 MIPS_SYS(sys_sgetmask , 0)
1523 MIPS_SYS(sys_ssetmask , 1)
1524 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1525 MIPS_SYS(sys_setregid , 2)
1526 MIPS_SYS(sys_sigsuspend , 0)
1527 MIPS_SYS(sys_sigpending , 1)
1528 MIPS_SYS(sys_sethostname , 2)
1529 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1530 MIPS_SYS(sys_getrlimit , 2)
1531 MIPS_SYS(sys_getrusage , 2)
1532 MIPS_SYS(sys_gettimeofday, 2)
1533 MIPS_SYS(sys_settimeofday, 2)
1534 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1535 MIPS_SYS(sys_setgroups , 2)
1536 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1537 MIPS_SYS(sys_symlink , 2)
1538 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1539 MIPS_SYS(sys_readlink , 3) /* 4085 */
1540 MIPS_SYS(sys_uselib , 1)
1541 MIPS_SYS(sys_swapon , 2)
1542 MIPS_SYS(sys_reboot , 3)
1543 MIPS_SYS(old_readdir , 3)
1544 MIPS_SYS(old_mmap , 6) /* 4090 */
1545 MIPS_SYS(sys_munmap , 2)
1546 MIPS_SYS(sys_truncate , 2)
1547 MIPS_SYS(sys_ftruncate , 2)
1548 MIPS_SYS(sys_fchmod , 2)
1549 MIPS_SYS(sys_fchown , 3) /* 4095 */
1550 MIPS_SYS(sys_getpriority , 2)
1551 MIPS_SYS(sys_setpriority , 3)
1552 MIPS_SYS(sys_ni_syscall , 0)
1553 MIPS_SYS(sys_statfs , 2)
1554 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1555 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1556 MIPS_SYS(sys_socketcall , 2)
1557 MIPS_SYS(sys_syslog , 3)
1558 MIPS_SYS(sys_setitimer , 3)
1559 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1560 MIPS_SYS(sys_newstat , 2)
1561 MIPS_SYS(sys_newlstat , 2)
1562 MIPS_SYS(sys_newfstat , 2)
1563 MIPS_SYS(sys_uname , 1)
1564 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1565 MIPS_SYS(sys_vhangup , 0)
1566 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1567 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1568 MIPS_SYS(sys_wait4 , 4)
1569 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1570 MIPS_SYS(sys_sysinfo , 1)
1571 MIPS_SYS(sys_ipc , 6)
1572 MIPS_SYS(sys_fsync , 1)
1573 MIPS_SYS(sys_sigreturn , 0)
1574 MIPS_SYS(sys_clone , 0) /* 4120 */
1575 MIPS_SYS(sys_setdomainname, 2)
1576 MIPS_SYS(sys_newuname , 1)
1577 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1578 MIPS_SYS(sys_adjtimex , 1)
1579 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1580 MIPS_SYS(sys_sigprocmask , 3)
1581 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1582 MIPS_SYS(sys_init_module , 5)
1583 MIPS_SYS(sys_delete_module, 1)
1584 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1585 MIPS_SYS(sys_quotactl , 0)
1586 MIPS_SYS(sys_getpgid , 1)
1587 MIPS_SYS(sys_fchdir , 1)
1588 MIPS_SYS(sys_bdflush , 2)
1589 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1590 MIPS_SYS(sys_personality , 1)
1591 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1592 MIPS_SYS(sys_setfsuid , 1)
1593 MIPS_SYS(sys_setfsgid , 1)
1594 MIPS_SYS(sys_llseek , 5) /* 4140 */
1595 MIPS_SYS(sys_getdents , 3)
1596 MIPS_SYS(sys_select , 5)
1597 MIPS_SYS(sys_flock , 2)
1598 MIPS_SYS(sys_msync , 3)
1599 MIPS_SYS(sys_readv , 3) /* 4145 */
1600 MIPS_SYS(sys_writev , 3)
1601 MIPS_SYS(sys_cacheflush , 3)
1602 MIPS_SYS(sys_cachectl , 3)
1603 MIPS_SYS(sys_sysmips , 4)
1604 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1605 MIPS_SYS(sys_getsid , 1)
1606 MIPS_SYS(sys_fdatasync , 0)
1607 MIPS_SYS(sys_sysctl , 1)
1608 MIPS_SYS(sys_mlock , 2)
1609 MIPS_SYS(sys_munlock , 2) /* 4155 */
1610 MIPS_SYS(sys_mlockall , 1)
1611 MIPS_SYS(sys_munlockall , 0)
1612 MIPS_SYS(sys_sched_setparam, 2)
1613 MIPS_SYS(sys_sched_getparam, 2)
1614 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1615 MIPS_SYS(sys_sched_getscheduler, 1)
1616 MIPS_SYS(sys_sched_yield , 0)
1617 MIPS_SYS(sys_sched_get_priority_max, 1)
1618 MIPS_SYS(sys_sched_get_priority_min, 1)
1619 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1620 MIPS_SYS(sys_nanosleep, 2)
1621 MIPS_SYS(sys_mremap , 4)
1622 MIPS_SYS(sys_accept , 3)
1623 MIPS_SYS(sys_bind , 3)
1624 MIPS_SYS(sys_connect , 3) /* 4170 */
1625 MIPS_SYS(sys_getpeername , 3)
1626 MIPS_SYS(sys_getsockname , 3)
1627 MIPS_SYS(sys_getsockopt , 5)
1628 MIPS_SYS(sys_listen , 2)
1629 MIPS_SYS(sys_recv , 4) /* 4175 */
1630 MIPS_SYS(sys_recvfrom , 6)
1631 MIPS_SYS(sys_recvmsg , 3)
1632 MIPS_SYS(sys_send , 4)
1633 MIPS_SYS(sys_sendmsg , 3)
1634 MIPS_SYS(sys_sendto , 6) /* 4180 */
1635 MIPS_SYS(sys_setsockopt , 5)
1636 MIPS_SYS(sys_shutdown , 2)
1637 MIPS_SYS(sys_socket , 3)
1638 MIPS_SYS(sys_socketpair , 4)
1639 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1640 MIPS_SYS(sys_getresuid , 3)
1641 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1642 MIPS_SYS(sys_poll , 3)
1643 MIPS_SYS(sys_nfsservctl , 3)
1644 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1645 MIPS_SYS(sys_getresgid , 3)
1646 MIPS_SYS(sys_prctl , 5)
1647 MIPS_SYS(sys_rt_sigreturn, 0)
1648 MIPS_SYS(sys_rt_sigaction, 4)
1649 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1650 MIPS_SYS(sys_rt_sigpending, 2)
1651 MIPS_SYS(sys_rt_sigtimedwait, 4)
1652 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1653 MIPS_SYS(sys_rt_sigsuspend, 0)
1654 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1655 MIPS_SYS(sys_pwrite64 , 6)
1656 MIPS_SYS(sys_chown , 3)
1657 MIPS_SYS(sys_getcwd , 2)
1658 MIPS_SYS(sys_capget , 2)
1659 MIPS_SYS(sys_capset , 2) /* 4205 */
1660 MIPS_SYS(sys_sigaltstack , 0)
1661 MIPS_SYS(sys_sendfile , 4)
1662 MIPS_SYS(sys_ni_syscall , 0)
1663 MIPS_SYS(sys_ni_syscall , 0)
1664 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1665 MIPS_SYS(sys_truncate64 , 4)
1666 MIPS_SYS(sys_ftruncate64 , 4)
1667 MIPS_SYS(sys_stat64 , 2)
1668 MIPS_SYS(sys_lstat64 , 2)
1669 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1670 MIPS_SYS(sys_pivot_root , 2)
1671 MIPS_SYS(sys_mincore , 3)
1672 MIPS_SYS(sys_madvise , 3)
1673 MIPS_SYS(sys_getdents64 , 3)
1674 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1675 MIPS_SYS(sys_ni_syscall , 0)
1676 MIPS_SYS(sys_gettid , 0)
1677 MIPS_SYS(sys_readahead , 5)
1678 MIPS_SYS(sys_setxattr , 5)
1679 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1680 MIPS_SYS(sys_fsetxattr , 5)
1681 MIPS_SYS(sys_getxattr , 4)
1682 MIPS_SYS(sys_lgetxattr , 4)
1683 MIPS_SYS(sys_fgetxattr , 4)
1684 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1685 MIPS_SYS(sys_llistxattr , 3)
1686 MIPS_SYS(sys_flistxattr , 3)
1687 MIPS_SYS(sys_removexattr , 2)
1688 MIPS_SYS(sys_lremovexattr, 2)
1689 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1690 MIPS_SYS(sys_tkill , 2)
1691 MIPS_SYS(sys_sendfile64 , 5)
1692 MIPS_SYS(sys_futex , 2)
1693 MIPS_SYS(sys_sched_setaffinity, 3)
1694 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1695 MIPS_SYS(sys_io_setup , 2)
1696 MIPS_SYS(sys_io_destroy , 1)
1697 MIPS_SYS(sys_io_getevents, 5)
1698 MIPS_SYS(sys_io_submit , 3)
1699 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1700 MIPS_SYS(sys_exit_group , 1)
1701 MIPS_SYS(sys_lookup_dcookie, 3)
1702 MIPS_SYS(sys_epoll_create, 1)
1703 MIPS_SYS(sys_epoll_ctl , 4)
1704 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1705 MIPS_SYS(sys_remap_file_pages, 5)
1706 MIPS_SYS(sys_set_tid_address, 1)
1707 MIPS_SYS(sys_restart_syscall, 0)
1708 MIPS_SYS(sys_fadvise64_64, 7)
1709 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1710 MIPS_SYS(sys_fstatfs64 , 2)
1711 MIPS_SYS(sys_timer_create, 3)
1712 MIPS_SYS(sys_timer_settime, 4)
1713 MIPS_SYS(sys_timer_gettime, 2)
1714 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1715 MIPS_SYS(sys_timer_delete, 1)
1716 MIPS_SYS(sys_clock_settime, 2)
1717 MIPS_SYS(sys_clock_gettime, 2)
1718 MIPS_SYS(sys_clock_getres, 2)
1719 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1720 MIPS_SYS(sys_tgkill , 3)
1721 MIPS_SYS(sys_utimes , 2)
1722 MIPS_SYS(sys_mbind , 4)
1723 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1724 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1725 MIPS_SYS(sys_mq_open , 4)
1726 MIPS_SYS(sys_mq_unlink , 1)
1727 MIPS_SYS(sys_mq_timedsend, 5)
1728 MIPS_SYS(sys_mq_timedreceive, 5)
1729 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1730 MIPS_SYS(sys_mq_getsetattr, 3)
1731 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1732 MIPS_SYS(sys_waitid , 4)
1733 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1734 MIPS_SYS(sys_add_key , 5)
1735 MIPS_SYS(sys_request_key, 4)
1736 MIPS_SYS(sys_keyctl , 5)
1737 MIPS_SYS(sys_set_thread_area, 1)
1738 MIPS_SYS(sys_inotify_init, 0)
1739 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1740 MIPS_SYS(sys_inotify_rm_watch, 2)
1741 MIPS_SYS(sys_migrate_pages, 4)
1742 MIPS_SYS(sys_openat, 4)
1743 MIPS_SYS(sys_mkdirat, 3)
1744 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1745 MIPS_SYS(sys_fchownat, 5)
1746 MIPS_SYS(sys_futimesat, 3)
1747 MIPS_SYS(sys_fstatat64, 4)
1748 MIPS_SYS(sys_unlinkat, 3)
1749 MIPS_SYS(sys_renameat, 4) /* 4295 */
1750 MIPS_SYS(sys_linkat, 5)
1751 MIPS_SYS(sys_symlinkat, 3)
1752 MIPS_SYS(sys_readlinkat, 4)
1753 MIPS_SYS(sys_fchmodat, 3)
1754 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1755 MIPS_SYS(sys_pselect6, 6)
1756 MIPS_SYS(sys_ppoll, 5)
1757 MIPS_SYS(sys_unshare, 1)
1758 MIPS_SYS(sys_splice, 4)
1759 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1760 MIPS_SYS(sys_tee, 4)
1761 MIPS_SYS(sys_vmsplice, 4)
1762 MIPS_SYS(sys_move_pages, 6)
1763 MIPS_SYS(sys_set_robust_list, 2)
1764 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1765 MIPS_SYS(sys_kexec_load, 4)
1766 MIPS_SYS(sys_getcpu, 3)
1767 MIPS_SYS(sys_epoll_pwait, 6)
1768 MIPS_SYS(sys_ioprio_set, 3)
1769 MIPS_SYS(sys_ioprio_get, 2)
1770 };
1771
1772 #undef MIPS_SYS
1773
1774 void cpu_loop(CPUMIPSState *env)
1775 {
1776 target_siginfo_t info;
1777 int trapnr, ret;
1778 unsigned int syscall_num;
1779
1780 for(;;) {
1781 trapnr = cpu_mips_exec(env);
1782 switch(trapnr) {
1783 case EXCP_SYSCALL:
1784 syscall_num = env->active_tc.gpr[2] - 4000;
1785 env->active_tc.PC += 4;
1786 if (syscall_num >= sizeof(mips_syscall_args)) {
1787 ret = -ENOSYS;
1788 } else {
1789 int nb_args;
1790 abi_ulong sp_reg;
1791 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1792
1793 nb_args = mips_syscall_args[syscall_num];
1794 sp_reg = env->active_tc.gpr[29];
1795 switch (nb_args) {
1796 /* these arguments are taken from the stack */
1797 /* FIXME - what to do if get_user() fails? */
1798 case 8: get_user_ual(arg8, sp_reg + 28);
1799 case 7: get_user_ual(arg7, sp_reg + 24);
1800 case 6: get_user_ual(arg6, sp_reg + 20);
1801 case 5: get_user_ual(arg5, sp_reg + 16);
1802 default:
1803 break;
1804 }
1805 ret = do_syscall(env, env->active_tc.gpr[2],
1806 env->active_tc.gpr[4],
1807 env->active_tc.gpr[5],
1808 env->active_tc.gpr[6],
1809 env->active_tc.gpr[7],
1810 arg5, arg6/*, arg7, arg8*/);
1811 }
1812 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1813 env->active_tc.gpr[7] = 1; /* error flag */
1814 ret = -ret;
1815 } else {
1816 env->active_tc.gpr[7] = 0; /* error flag */
1817 }
1818 env->active_tc.gpr[2] = ret;
1819 break;
1820 case EXCP_TLBL:
1821 case EXCP_TLBS:
1822 case EXCP_CpU:
1823 case EXCP_RI:
1824 info.si_signo = TARGET_SIGILL;
1825 info.si_errno = 0;
1826 info.si_code = 0;
1827 queue_signal(env, info.si_signo, &info);
1828 break;
1829 case EXCP_INTERRUPT:
1830 /* just indicate that signals should be handled asap */
1831 break;
1832 case EXCP_DEBUG:
1833 {
1834 int sig;
1835
1836 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1837 if (sig)
1838 {
1839 info.si_signo = sig;
1840 info.si_errno = 0;
1841 info.si_code = TARGET_TRAP_BRKPT;
1842 queue_signal(env, info.si_signo, &info);
1843 }
1844 }
1845 break;
1846 default:
1847 // error:
1848 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1849 trapnr);
1850 cpu_dump_state(env, stderr, fprintf, 0);
1851 abort();
1852 }
1853 process_pending_signals(env);
1854 }
1855 }
1856 #endif
1857
1858 #ifdef TARGET_SH4
1859 void cpu_loop (CPUState *env)
1860 {
1861 int trapnr, ret;
1862 target_siginfo_t info;
1863
1864 while (1) {
1865 trapnr = cpu_sh4_exec (env);
1866
1867 switch (trapnr) {
1868 case 0x160:
1869 ret = do_syscall(env,
1870 env->gregs[3],
1871 env->gregs[4],
1872 env->gregs[5],
1873 env->gregs[6],
1874 env->gregs[7],
1875 env->gregs[0],
1876 env->gregs[1]);
1877 env->gregs[0] = ret;
1878 env->pc += 2;
1879 break;
1880 case EXCP_INTERRUPT:
1881 /* just indicate that signals should be handled asap */
1882 break;
1883 case EXCP_DEBUG:
1884 {
1885 int sig;
1886
1887 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1888 if (sig)
1889 {
1890 info.si_signo = sig;
1891 info.si_errno = 0;
1892 info.si_code = TARGET_TRAP_BRKPT;
1893 queue_signal(env, info.si_signo, &info);
1894 }
1895 }
1896 break;
1897 case 0xa0:
1898 case 0xc0:
1899 info.si_signo = SIGSEGV;
1900 info.si_errno = 0;
1901 info.si_code = TARGET_SEGV_MAPERR;
1902 info._sifields._sigfault._addr = env->tea;
1903 queue_signal(env, info.si_signo, &info);
1904 break;
1905
1906 default:
1907 printf ("Unhandled trap: 0x%x\n", trapnr);
1908 cpu_dump_state(env, stderr, fprintf, 0);
1909 exit (1);
1910 }
1911 process_pending_signals (env);
1912 }
1913 }
1914 #endif
1915
1916 #ifdef TARGET_CRIS
1917 void cpu_loop (CPUState *env)
1918 {
1919 int trapnr, ret;
1920 target_siginfo_t info;
1921
1922 while (1) {
1923 trapnr = cpu_cris_exec (env);
1924 switch (trapnr) {
1925 case 0xaa:
1926 {
1927 info.si_signo = SIGSEGV;
1928 info.si_errno = 0;
1929 /* XXX: check env->error_code */
1930 info.si_code = TARGET_SEGV_MAPERR;
1931 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1932 queue_signal(env, info.si_signo, &info);
1933 }
1934 break;
1935 case EXCP_INTERRUPT:
1936 /* just indicate that signals should be handled asap */
1937 break;
1938 case EXCP_BREAK:
1939 ret = do_syscall(env,
1940 env->regs[9],
1941 env->regs[10],
1942 env->regs[11],
1943 env->regs[12],
1944 env->regs[13],
1945 env->pregs[7],
1946 env->pregs[11]);
1947 env->regs[10] = ret;
1948 env->pc += 2;
1949 break;
1950 case EXCP_DEBUG:
1951 {
1952 int sig;
1953
1954 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1955 if (sig)
1956 {
1957 info.si_signo = sig;
1958 info.si_errno = 0;
1959 info.si_code = TARGET_TRAP_BRKPT;
1960 queue_signal(env, info.si_signo, &info);
1961 }
1962 }
1963 break;
1964 default:
1965 printf ("Unhandled trap: 0x%x\n", trapnr);
1966 cpu_dump_state(env, stderr, fprintf, 0);
1967 exit (1);
1968 }
1969 process_pending_signals (env);
1970 }
1971 }
1972 #endif
1973
1974 #ifdef TARGET_M68K
1975
1976 void cpu_loop(CPUM68KState *env)
1977 {
1978 int trapnr;
1979 unsigned int n;
1980 target_siginfo_t info;
1981 TaskState *ts = env->opaque;
1982
1983 for(;;) {
1984 trapnr = cpu_m68k_exec(env);
1985 switch(trapnr) {
1986 case EXCP_ILLEGAL:
1987 {
1988 if (ts->sim_syscalls) {
1989 uint16_t nr;
1990 nr = lduw(env->pc + 2);
1991 env->pc += 4;
1992 do_m68k_simcall(env, nr);
1993 } else {
1994 goto do_sigill;
1995 }
1996 }
1997 break;
1998 case EXCP_HALT_INSN:
1999 /* Semihosing syscall. */
2000 env->pc += 4;
2001 do_m68k_semihosting(env, env->dregs[0]);
2002 break;
2003 case EXCP_LINEA:
2004 case EXCP_LINEF:
2005 case EXCP_UNSUPPORTED:
2006 do_sigill:
2007 info.si_signo = SIGILL;
2008 info.si_errno = 0;
2009 info.si_code = TARGET_ILL_ILLOPN;
2010 info._sifields._sigfault._addr = env->pc;
2011 queue_signal(env, info.si_signo, &info);
2012 break;
2013 case EXCP_TRAP0:
2014 {
2015 ts->sim_syscalls = 0;
2016 n = env->dregs[0];
2017 env->pc += 2;
2018 env->dregs[0] = do_syscall(env,
2019 n,
2020 env->dregs[1],
2021 env->dregs[2],
2022 env->dregs[3],
2023 env->dregs[4],
2024 env->dregs[5],
2025 env->aregs[0]);
2026 }
2027 break;
2028 case EXCP_INTERRUPT:
2029 /* just indicate that signals should be handled asap */
2030 break;
2031 case EXCP_ACCESS:
2032 {
2033 info.si_signo = SIGSEGV;
2034 info.si_errno = 0;
2035 /* XXX: check env->error_code */
2036 info.si_code = TARGET_SEGV_MAPERR;
2037 info._sifields._sigfault._addr = env->mmu.ar;
2038 queue_signal(env, info.si_signo, &info);
2039 }
2040 break;
2041 case EXCP_DEBUG:
2042 {
2043 int sig;
2044
2045 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2046 if (sig)
2047 {
2048 info.si_signo = sig;
2049 info.si_errno = 0;
2050 info.si_code = TARGET_TRAP_BRKPT;
2051 queue_signal(env, info.si_signo, &info);
2052 }
2053 }
2054 break;
2055 default:
2056 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2057 trapnr);
2058 cpu_dump_state(env, stderr, fprintf, 0);
2059 abort();
2060 }
2061 process_pending_signals(env);
2062 }
2063 }
2064 #endif /* TARGET_M68K */
2065
2066 #ifdef TARGET_ALPHA
2067 void cpu_loop (CPUState *env)
2068 {
2069 int trapnr;
2070 target_siginfo_t info;
2071
2072 while (1) {
2073 trapnr = cpu_alpha_exec (env);
2074
2075 switch (trapnr) {
2076 case EXCP_RESET:
2077 fprintf(stderr, "Reset requested. Exit\n");
2078 exit(1);
2079 break;
2080 case EXCP_MCHK:
2081 fprintf(stderr, "Machine check exception. Exit\n");
2082 exit(1);
2083 break;
2084 case EXCP_ARITH:
2085 fprintf(stderr, "Arithmetic trap.\n");
2086 exit(1);
2087 break;
2088 case EXCP_HW_INTERRUPT:
2089 fprintf(stderr, "External interrupt. Exit\n");
2090 exit(1);
2091 break;
2092 case EXCP_DFAULT:
2093 fprintf(stderr, "MMU data fault\n");
2094 exit(1);
2095 break;
2096 case EXCP_DTB_MISS_PAL:
2097 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2098 exit(1);
2099 break;
2100 case EXCP_ITB_MISS:
2101 fprintf(stderr, "MMU instruction TLB miss\n");
2102 exit(1);
2103 break;
2104 case EXCP_ITB_ACV:
2105 fprintf(stderr, "MMU instruction access violation\n");
2106 exit(1);
2107 break;
2108 case EXCP_DTB_MISS_NATIVE:
2109 fprintf(stderr, "MMU data TLB miss\n");
2110 exit(1);
2111 break;
2112 case EXCP_UNALIGN:
2113 fprintf(stderr, "Unaligned access\n");
2114 exit(1);
2115 break;
2116 case EXCP_OPCDEC:
2117 fprintf(stderr, "Invalid instruction\n");
2118 exit(1);
2119 break;
2120 case EXCP_FEN:
2121 fprintf(stderr, "Floating-point not allowed\n");
2122 exit(1);
2123 break;
2124 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2125 fprintf(stderr, "Call to PALcode\n");
2126 call_pal(env, (trapnr >> 6) | 0x80);
2127 break;
2128 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2129 fprintf(stderr, "Privileged call to PALcode\n");
2130 exit(1);
2131 break;
2132 case EXCP_DEBUG:
2133 {
2134 int sig;
2135
2136 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2137 if (sig)
2138 {
2139 info.si_signo = sig;
2140 info.si_errno = 0;
2141 info.si_code = TARGET_TRAP_BRKPT;
2142 queue_signal(env, info.si_signo, &info);
2143 }
2144 }
2145 break;
2146 default:
2147 printf ("Unhandled trap: 0x%x\n", trapnr);
2148 cpu_dump_state(env, stderr, fprintf, 0);
2149 exit (1);
2150 }
2151 process_pending_signals (env);
2152 }
2153 }
2154 #endif /* TARGET_ALPHA */
2155
2156 static void usage(void)
2157 {
2158 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2159 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2160 "Linux CPU emulator (compiled for %s emulation)\n"
2161 "\n"
2162 "Standard options:\n"
2163 "-h print this help\n"
2164 "-g port wait gdb connection to port\n"
2165 "-L path set the elf interpreter prefix (default=%s)\n"
2166 "-s size set the stack size in bytes (default=%ld)\n"
2167 "-cpu model select CPU (-cpu ? for list)\n"
2168 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2169 "\n"
2170 "Debug options:\n"
2171 "-d options activate log (logfile=%s)\n"
2172 "-p pagesize set the host page size to 'pagesize'\n"
2173 "-strace log system calls\n"
2174 "\n"
2175 "Environment variables:\n"
2176 "QEMU_STRACE Print system calls and arguments similar to the\n"
2177 " 'strace' program. Enable by setting to any value.\n"
2178 ,
2179 TARGET_ARCH,
2180 interp_prefix,
2181 x86_stack_size,
2182 DEBUG_LOGFILE);
2183 _exit(1);
2184 }
2185
2186 THREAD CPUState *thread_env;
2187
2188 /* Assumes contents are already zeroed. */
2189 void init_task_state(TaskState *ts)
2190 {
2191 int i;
2192
2193 ts->used = 1;
2194 ts->first_free = ts->sigqueue_table;
2195 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2196 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2197 }
2198 ts->sigqueue_table[i].next = NULL;
2199 }
2200
2201 int main(int argc, char **argv)
2202 {
2203 const char *filename;
2204 const char *cpu_model;
2205 struct target_pt_regs regs1, *regs = &regs1;
2206 struct image_info info1, *info = &info1;
2207 TaskState ts1, *ts = &ts1;
2208 CPUState *env;
2209 int optind;
2210 const char *r;
2211 int gdbstub_port = 0;
2212 int drop_ld_preload = 0, environ_count = 0;
2213 char **target_environ, **wrk, **dst;
2214
2215 if (argc <= 1)
2216 usage();
2217
2218 /* init debug */
2219 cpu_set_log_filename(DEBUG_LOGFILE);
2220
2221 cpu_model = NULL;
2222 optind = 1;
2223 for(;;) {
2224 if (optind >= argc)
2225 break;
2226 r = argv[optind];
2227 if (r[0] != '-')
2228 break;
2229 optind++;
2230 r++;
2231 if (!strcmp(r, "-")) {
2232 break;
2233 } else if (!strcmp(r, "d")) {
2234 int mask;
2235 CPULogItem *item;
2236
2237 if (optind >= argc)
2238 break;
2239
2240 r = argv[optind++];
2241 mask = cpu_str_to_log_mask(r);
2242 if (!mask) {
2243 printf("Log items (comma separated):\n");
2244 for(item = cpu_log_items; item->mask != 0; item++) {
2245 printf("%-10s %s\n", item->name, item->help);
2246 }
2247 exit(1);
2248 }
2249 cpu_set_log(mask);
2250 } else if (!strcmp(r, "s")) {
2251 r = argv[optind++];
2252 x86_stack_size = strtol(r, (char **)&r, 0);
2253 if (x86_stack_size <= 0)
2254 usage();
2255 if (*r == 'M')
2256 x86_stack_size *= 1024 * 1024;
2257 else if (*r == 'k' || *r == 'K')
2258 x86_stack_size *= 1024;
2259 } else if (!strcmp(r, "L")) {
2260 interp_prefix = argv[optind++];
2261 } else if (!strcmp(r, "p")) {
2262 qemu_host_page_size = atoi(argv[optind++]);
2263 if (qemu_host_page_size == 0 ||
2264 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2265 fprintf(stderr, "page size must be a power of two\n");
2266 exit(1);
2267 }
2268 } else if (!strcmp(r, "g")) {
2269 gdbstub_port = atoi(argv[optind++]);
2270 } else if (!strcmp(r, "r")) {
2271 qemu_uname_release = argv[optind++];
2272 } else if (!strcmp(r, "cpu")) {
2273 cpu_model = argv[optind++];
2274 if (strcmp(cpu_model, "?") == 0) {
2275 /* XXX: implement xxx_cpu_list for targets that still miss it */
2276 #if defined(cpu_list)
2277 cpu_list(stdout, &fprintf);
2278 #endif
2279 _exit(1);
2280 }
2281 } else if (!strcmp(r, "drop-ld-preload")) {
2282 drop_ld_preload = 1;
2283 } else if (!strcmp(r, "strace")) {
2284 do_strace = 1;
2285 } else
2286 {
2287 usage();
2288 }
2289 }
2290 if (optind >= argc)
2291 usage();
2292 filename = argv[optind];
2293
2294 /* Zero out regs */
2295 memset(regs, 0, sizeof(struct target_pt_regs));
2296
2297 /* Zero out image_info */
2298 memset(info, 0, sizeof(struct image_info));
2299
2300 /* Scan interp_prefix dir for replacement files. */
2301 init_paths(interp_prefix);
2302
2303 if (cpu_model == NULL) {
2304 #if defined(TARGET_I386)
2305 #ifdef TARGET_X86_64
2306 cpu_model = "qemu64";
2307 #else
2308 cpu_model = "qemu32";
2309 #endif
2310 #elif defined(TARGET_ARM)
2311 cpu_model = "arm926";
2312 #elif defined(TARGET_M68K)
2313 cpu_model = "any";
2314 #elif defined(TARGET_SPARC)
2315 #ifdef TARGET_SPARC64
2316 cpu_model = "TI UltraSparc II";
2317 #else
2318 cpu_model = "Fujitsu MB86904";
2319 #endif
2320 #elif defined(TARGET_MIPS)
2321 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2322 cpu_model = "20Kc";
2323 #else
2324 cpu_model = "24Kf";
2325 #endif
2326 #elif defined(TARGET_PPC)
2327 #ifdef TARGET_PPC64
2328 cpu_model = "970";
2329 #else
2330 cpu_model = "750";
2331 #endif
2332 #else
2333 cpu_model = "any";
2334 #endif
2335 }
2336 cpu_exec_init_all(0);
2337 /* NOTE: we need to init the CPU at this stage to get
2338 qemu_host_page_size */
2339 env = cpu_init(cpu_model);
2340 if (!env) {
2341 fprintf(stderr, "Unable to find CPU definition\n");
2342 exit(1);
2343 }
2344 thread_env = env;
2345
2346 if (getenv("QEMU_STRACE")) {
2347 do_strace = 1;
2348 }
2349
2350 wrk = environ;
2351 while (*(wrk++))
2352 environ_count++;
2353
2354 target_environ = malloc((environ_count + 1) * sizeof(char *));
2355 if (!target_environ)
2356 abort();
2357 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2358 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2359 continue;
2360 *(dst++) = strdup(*wrk);
2361 }
2362 *dst = NULL; /* NULL terminate target_environ */
2363
2364 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2365 printf("Error loading %s\n", filename);
2366 _exit(1);
2367 }
2368
2369 for (wrk = target_environ; *wrk; wrk++) {
2370 free(*wrk);
2371 }
2372
2373 free(target_environ);
2374
2375 if (loglevel) {
2376 page_dump(logfile);
2377
2378 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2379 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2380 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2381 info->start_code);
2382 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2383 info->start_data);
2384 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2385 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2386 info->start_stack);
2387 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2388 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2389 }
2390
2391 target_set_brk(info->brk);
2392 syscall_init();
2393 signal_init();
2394
2395 /* build Task State */
2396 memset(ts, 0, sizeof(TaskState));
2397 init_task_state(ts);
2398 ts->info = info;
2399 env->opaque = ts;
2400 env->user_mode_only = 1;
2401
2402 #if defined(TARGET_I386)
2403 cpu_x86_set_cpl(env, 3);
2404
2405 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2406 env->hflags |= HF_PE_MASK;
2407 if (env->cpuid_features & CPUID_SSE) {
2408 env->cr[4] |= CR4_OSFXSR_MASK;
2409 env->hflags |= HF_OSFXSR_MASK;
2410 }
2411 #ifndef TARGET_ABI32
2412 /* enable 64 bit mode if possible */
2413 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2414 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2415 exit(1);
2416 }
2417 env->cr[4] |= CR4_PAE_MASK;
2418 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2419 env->hflags |= HF_LMA_MASK;
2420 #endif
2421
2422 /* flags setup : we activate the IRQs by default as in user mode */
2423 env->eflags |= IF_MASK;
2424
2425 /* linux register setup */
2426 #ifndef TARGET_ABI32
2427 env->regs[R_EAX] = regs->rax;
2428 env->regs[R_EBX] = regs->rbx;
2429 env->regs[R_ECX] = regs->rcx;
2430 env->regs[R_EDX] = regs->rdx;
2431 env->regs[R_ESI] = regs->rsi;
2432 env->regs[R_EDI] = regs->rdi;
2433 env->regs[R_EBP] = regs->rbp;
2434 env->regs[R_ESP] = regs->rsp;
2435 env->eip = regs->rip;
2436 #else
2437 env->regs[R_EAX] = regs->eax;
2438 env->regs[R_EBX] = regs->ebx;
2439 env->regs[R_ECX] = regs->ecx;
2440 env->regs[R_EDX] = regs->edx;
2441 env->regs[R_ESI] = regs->esi;
2442 env->regs[R_EDI] = regs->edi;
2443 env->regs[R_EBP] = regs->ebp;
2444 env->regs[R_ESP] = regs->esp;
2445 env->eip = regs->eip;
2446 #endif
2447
2448 /* linux interrupt setup */
2449 env->idt.base = h2g(idt_table);
2450 env->idt.limit = sizeof(idt_table) - 1;
2451 set_idt(0, 0);
2452 set_idt(1, 0);
2453 set_idt(2, 0);
2454 set_idt(3, 3);
2455 set_idt(4, 3);
2456 set_idt(5, 0);
2457 set_idt(6, 0);
2458 set_idt(7, 0);
2459 set_idt(8, 0);
2460 set_idt(9, 0);
2461 set_idt(10, 0);
2462 set_idt(11, 0);
2463 set_idt(12, 0);
2464 set_idt(13, 0);
2465 set_idt(14, 0);
2466 set_idt(15, 0);
2467 set_idt(16, 0);
2468 set_idt(17, 0);
2469 set_idt(18, 0);
2470 set_idt(19, 0);
2471 set_idt(0x80, 3);
2472
2473 /* linux segment setup */
2474 {
2475 uint64_t *gdt_table;
2476 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
2477 env->gdt.base = h2g((unsigned long)gdt_table);
2478 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2479 #ifdef TARGET_ABI32
2480 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2481 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2482 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2483 #else
2484 /* 64 bit code segment */
2485 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2486 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2487 DESC_L_MASK |
2488 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2489 #endif
2490 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2491 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2492 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2493 }
2494 cpu_x86_load_seg(env, R_CS, __USER_CS);
2495 cpu_x86_load_seg(env, R_SS, __USER_DS);
2496 #ifdef TARGET_ABI32
2497 cpu_x86_load_seg(env, R_DS, __USER_DS);
2498 cpu_x86_load_seg(env, R_ES, __USER_DS);
2499 cpu_x86_load_seg(env, R_FS, __USER_DS);
2500 cpu_x86_load_seg(env, R_GS, __USER_DS);
2501 /* This hack makes Wine work... */
2502 env->segs[R_FS].selector = 0;
2503 #else
2504 cpu_x86_load_seg(env, R_DS, 0);
2505 cpu_x86_load_seg(env, R_ES, 0);
2506 cpu_x86_load_seg(env, R_FS, 0);
2507 cpu_x86_load_seg(env, R_GS, 0);
2508 #endif
2509 #elif defined(TARGET_ARM)
2510 {
2511 int i;
2512 cpsr_write(env, regs->uregs[16], 0xffffffff);
2513 for(i = 0; i < 16; i++) {
2514 env->regs[i] = regs->uregs[i];
2515 }
2516 }
2517 #elif defined(TARGET_SPARC)
2518 {
2519 int i;
2520 env->pc = regs->pc;
2521 env->npc = regs->npc;
2522 env->y = regs->y;
2523 for(i = 0; i < 8; i++)
2524 env->gregs[i] = regs->u_regs[i];
2525 for(i = 0; i < 8; i++)
2526 env->regwptr[i] = regs->u_regs[i + 8];
2527 }
2528 #elif defined(TARGET_PPC)
2529 {
2530 int i;
2531
2532 #if defined(TARGET_PPC64)
2533 #if defined(TARGET_ABI32)
2534 env->msr &= ~((target_ulong)1 << MSR_SF);
2535 #else
2536 env->msr |= (target_ulong)1 << MSR_SF;
2537 #endif
2538 #endif
2539 env->nip = regs->nip;
2540 for(i = 0; i < 32; i++) {
2541 env->gpr[i] = regs->gpr[i];
2542 }
2543 }
2544 #elif defined(TARGET_M68K)
2545 {
2546 env->pc = regs->pc;
2547 env->dregs[0] = regs->d0;
2548 env->dregs[1] = regs->d1;
2549 env->dregs[2] = regs->d2;
2550 env->dregs[3] = regs->d3;
2551 env->dregs[4] = regs->d4;
2552 env->dregs[5] = regs->d5;
2553 env->dregs[6] = regs->d6;
2554 env->dregs[7] = regs->d7;
2555 env->aregs[0] = regs->a0;
2556 env->aregs[1] = regs->a1;
2557 env->aregs[2] = regs->a2;
2558 env->aregs[3] = regs->a3;
2559 env->aregs[4] = regs->a4;
2560 env->aregs[5] = regs->a5;
2561 env->aregs[6] = regs->a6;
2562 env->aregs[7] = regs->usp;
2563 env->sr = regs->sr;
2564 ts->sim_syscalls = 1;
2565 }
2566 #elif defined(TARGET_MIPS)
2567 {
2568 int i;
2569
2570 for(i = 0; i < 32; i++) {
2571 env->active_tc.gpr[i] = regs->regs[i];
2572 }
2573 env->active_tc.PC = regs->cp0_epc;
2574 }
2575 #elif defined(TARGET_SH4)
2576 {
2577 int i;
2578
2579 for(i = 0; i < 16; i++) {
2580 env->gregs[i] = regs->regs[i];
2581 }
2582 env->pc = regs->pc;
2583 }
2584 #elif defined(TARGET_ALPHA)
2585 {
2586 int i;
2587
2588 for(i = 0; i < 28; i++) {
2589 env->ir[i] = ((abi_ulong *)regs)[i];
2590 }
2591 env->ipr[IPR_USP] = regs->usp;
2592 env->ir[30] = regs->usp;
2593 env->pc = regs->pc;
2594 env->unique = regs->unique;
2595 }
2596 #elif defined(TARGET_CRIS)
2597 {
2598 env->regs[0] = regs->r0;
2599 env->regs[1] = regs->r1;
2600 env->regs[2] = regs->r2;
2601 env->regs[3] = regs->r3;
2602 env->regs[4] = regs->r4;
2603 env->regs[5] = regs->r5;
2604 env->regs[6] = regs->r6;
2605 env->regs[7] = regs->r7;
2606 env->regs[8] = regs->r8;
2607 env->regs[9] = regs->r9;
2608 env->regs[10] = regs->r10;
2609 env->regs[11] = regs->r11;
2610 env->regs[12] = regs->r12;
2611 env->regs[13] = regs->r13;
2612 env->regs[14] = info->start_stack;
2613 env->regs[15] = regs->acr;
2614 env->pc = regs->erp;
2615 }
2616 #else
2617 #error unsupported target CPU
2618 #endif
2619
2620 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2621 ts->stack_base = info->start_stack;
2622 ts->heap_base = info->brk;
2623 /* This will be filled in on the first SYS_HEAPINFO call. */
2624 ts->heap_limit = 0;
2625 #endif
2626
2627 if (gdbstub_port) {
2628 gdbserver_start (gdbstub_port);
2629 gdb_handlesig(env, 0);
2630 }
2631 cpu_loop(env);
2632 /* never exits */
2633 return 0;
2634 }
Samsung s3c2440 and arm920t support for the mini2440 dev board