SD card emulation (initial implementation by Andrzei Zaborowski).
[qemu/mini2440.git] / gdbstub.c
blob4d62a889162ef88affc5de9c336233d3f5d82a17
1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #endif
35 #include "qemu_socket.h"
36 #ifdef _WIN32
37 /* XXX: these constants may be independent of the host ones even for Unix */
38 #ifndef SIGTRAP
39 #define SIGTRAP 5
40 #endif
41 #ifndef SIGINT
42 #define SIGINT 2
43 #endif
44 #else
45 #include <signal.h>
46 #endif
48 //#define DEBUG_GDB
50 enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
55 RS_SYSCALL,
57 typedef struct GDBState {
58 CPUState *env; /* current CPU */
59 enum RSState state; /* parsing state */
60 char line_buf[4096];
61 int line_buf_index;
62 int line_csum;
63 char last_packet[4100];
64 int last_packet_len;
65 #ifdef CONFIG_USER_ONLY
66 int fd;
67 int running_state;
68 #else
69 CharDriverState *chr;
70 #endif
71 } GDBState;
73 #ifdef CONFIG_USER_ONLY
74 /* XXX: This is not thread safe. Do we care? */
75 static int gdbserver_fd = -1;
77 /* XXX: remove this hack. */
78 static GDBState gdbserver_state;
80 static int get_char(GDBState *s)
82 uint8_t ch;
83 int ret;
85 for(;;) {
86 ret = recv(s->fd, &ch, 1, 0);
87 if (ret < 0) {
88 if (errno != EINTR && errno != EAGAIN)
89 return -1;
90 } else if (ret == 0) {
91 return -1;
92 } else {
93 break;
96 return ch;
98 #endif
100 /* GDB stub state for use by semihosting syscalls. */
101 static GDBState *gdb_syscall_state;
102 static gdb_syscall_complete_cb gdb_current_syscall_cb;
104 enum {
105 GDB_SYS_UNKNOWN,
106 GDB_SYS_ENABLED,
107 GDB_SYS_DISABLED,
108 } gdb_syscall_mode;
110 /* If gdb is connected when the first semihosting syscall occurs then use
111 remote gdb syscalls. Otherwise use native file IO. */
112 int use_gdb_syscalls(void)
114 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
115 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
116 : GDB_SYS_DISABLED);
118 return gdb_syscall_mode == GDB_SYS_ENABLED;
121 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
123 #ifdef CONFIG_USER_ONLY
124 int ret;
126 while (len > 0) {
127 ret = send(s->fd, buf, len, 0);
128 if (ret < 0) {
129 if (errno != EINTR && errno != EAGAIN)
130 return;
131 } else {
132 buf += ret;
133 len -= ret;
136 #else
137 qemu_chr_write(s->chr, buf, len);
138 #endif
141 static inline int fromhex(int v)
143 if (v >= '0' && v <= '9')
144 return v - '0';
145 else if (v >= 'A' && v <= 'F')
146 return v - 'A' + 10;
147 else if (v >= 'a' && v <= 'f')
148 return v - 'a' + 10;
149 else
150 return 0;
153 static inline int tohex(int v)
155 if (v < 10)
156 return v + '0';
157 else
158 return v - 10 + 'a';
161 static void memtohex(char *buf, const uint8_t *mem, int len)
163 int i, c;
164 char *q;
165 q = buf;
166 for(i = 0; i < len; i++) {
167 c = mem[i];
168 *q++ = tohex(c >> 4);
169 *q++ = tohex(c & 0xf);
171 *q = '\0';
174 static void hextomem(uint8_t *mem, const char *buf, int len)
176 int i;
178 for(i = 0; i < len; i++) {
179 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
180 buf += 2;
184 /* return -1 if error, 0 if OK */
185 static int put_packet(GDBState *s, char *buf)
187 int len, csum, i;
188 char *p;
190 #ifdef DEBUG_GDB
191 printf("reply='%s'\n", buf);
192 #endif
194 for(;;) {
195 p = s->last_packet;
196 *(p++) = '$';
197 len = strlen(buf);
198 memcpy(p, buf, len);
199 p += len;
200 csum = 0;
201 for(i = 0; i < len; i++) {
202 csum += buf[i];
204 *(p++) = '#';
205 *(p++) = tohex((csum >> 4) & 0xf);
206 *(p++) = tohex((csum) & 0xf);
208 s->last_packet_len = p - s->last_packet;
209 put_buffer(s, s->last_packet, s->last_packet_len);
211 #ifdef CONFIG_USER_ONLY
212 i = get_char(s);
213 if (i < 0)
214 return -1;
215 if (i == '+')
216 break;
217 #else
218 break;
219 #endif
221 return 0;
224 #if defined(TARGET_I386)
226 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
228 uint32_t *registers = (uint32_t *)mem_buf;
229 int i, fpus;
231 for(i = 0; i < 8; i++) {
232 registers[i] = env->regs[i];
234 registers[8] = env->eip;
235 registers[9] = env->eflags;
236 registers[10] = env->segs[R_CS].selector;
237 registers[11] = env->segs[R_SS].selector;
238 registers[12] = env->segs[R_DS].selector;
239 registers[13] = env->segs[R_ES].selector;
240 registers[14] = env->segs[R_FS].selector;
241 registers[15] = env->segs[R_GS].selector;
242 /* XXX: convert floats */
243 for(i = 0; i < 8; i++) {
244 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
246 registers[36] = env->fpuc;
247 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
248 registers[37] = fpus;
249 registers[38] = 0; /* XXX: convert tags */
250 registers[39] = 0; /* fiseg */
251 registers[40] = 0; /* fioff */
252 registers[41] = 0; /* foseg */
253 registers[42] = 0; /* fooff */
254 registers[43] = 0; /* fop */
256 for(i = 0; i < 16; i++)
257 tswapls(&registers[i]);
258 for(i = 36; i < 44; i++)
259 tswapls(&registers[i]);
260 return 44 * 4;
263 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
265 uint32_t *registers = (uint32_t *)mem_buf;
266 int i;
268 for(i = 0; i < 8; i++) {
269 env->regs[i] = tswapl(registers[i]);
271 env->eip = tswapl(registers[8]);
272 env->eflags = tswapl(registers[9]);
273 #if defined(CONFIG_USER_ONLY)
274 #define LOAD_SEG(index, sreg)\
275 if (tswapl(registers[index]) != env->segs[sreg].selector)\
276 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
277 LOAD_SEG(10, R_CS);
278 LOAD_SEG(11, R_SS);
279 LOAD_SEG(12, R_DS);
280 LOAD_SEG(13, R_ES);
281 LOAD_SEG(14, R_FS);
282 LOAD_SEG(15, R_GS);
283 #endif
286 #elif defined (TARGET_PPC)
287 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
289 uint32_t *registers = (uint32_t *)mem_buf, tmp;
290 int i;
292 /* fill in gprs */
293 for(i = 0; i < 32; i++) {
294 registers[i] = tswapl(env->gpr[i]);
296 /* fill in fprs */
297 for (i = 0; i < 32; i++) {
298 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
299 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
301 /* nip, msr, ccr, lnk, ctr, xer, mq */
302 registers[96] = tswapl(env->nip);
303 registers[97] = tswapl(do_load_msr(env));
304 tmp = 0;
305 for (i = 0; i < 8; i++)
306 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
307 registers[98] = tswapl(tmp);
308 registers[99] = tswapl(env->lr);
309 registers[100] = tswapl(env->ctr);
310 registers[101] = tswapl(ppc_load_xer(env));
311 registers[102] = 0;
313 return 103 * 4;
316 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
318 uint32_t *registers = (uint32_t *)mem_buf;
319 int i;
321 /* fill in gprs */
322 for (i = 0; i < 32; i++) {
323 env->gpr[i] = tswapl(registers[i]);
325 /* fill in fprs */
326 for (i = 0; i < 32; i++) {
327 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
328 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
330 /* nip, msr, ccr, lnk, ctr, xer, mq */
331 env->nip = tswapl(registers[96]);
332 do_store_msr(env, tswapl(registers[97]));
333 registers[98] = tswapl(registers[98]);
334 for (i = 0; i < 8; i++)
335 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
336 env->lr = tswapl(registers[99]);
337 env->ctr = tswapl(registers[100]);
338 ppc_store_xer(env, tswapl(registers[101]));
340 #elif defined (TARGET_SPARC)
341 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
343 target_ulong *registers = (target_ulong *)mem_buf;
344 int i;
346 /* fill in g0..g7 */
347 for(i = 0; i < 8; i++) {
348 registers[i] = tswapl(env->gregs[i]);
350 /* fill in register window */
351 for(i = 0; i < 24; i++) {
352 registers[i + 8] = tswapl(env->regwptr[i]);
354 #ifndef TARGET_SPARC64
355 /* fill in fprs */
356 for (i = 0; i < 32; i++) {
357 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
359 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
360 registers[64] = tswapl(env->y);
362 target_ulong tmp;
364 tmp = GET_PSR(env);
365 registers[65] = tswapl(tmp);
367 registers[66] = tswapl(env->wim);
368 registers[67] = tswapl(env->tbr);
369 registers[68] = tswapl(env->pc);
370 registers[69] = tswapl(env->npc);
371 registers[70] = tswapl(env->fsr);
372 registers[71] = 0; /* csr */
373 registers[72] = 0;
374 return 73 * sizeof(target_ulong);
375 #else
376 /* fill in fprs */
377 for (i = 0; i < 64; i += 2) {
378 uint64_t tmp;
380 tmp = (uint64_t)tswap32(*((uint32_t *)&env->fpr[i])) << 32;
381 tmp |= tswap32(*((uint32_t *)&env->fpr[i + 1]));
382 registers[i/2 + 32] = tmp;
384 registers[64] = tswapl(env->pc);
385 registers[65] = tswapl(env->npc);
386 registers[66] = tswapl(env->tstate[env->tl]);
387 registers[67] = tswapl(env->fsr);
388 registers[68] = tswapl(env->fprs);
389 registers[69] = tswapl(env->y);
390 return 70 * sizeof(target_ulong);
391 #endif
394 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
396 target_ulong *registers = (target_ulong *)mem_buf;
397 int i;
399 /* fill in g0..g7 */
400 for(i = 0; i < 7; i++) {
401 env->gregs[i] = tswapl(registers[i]);
403 /* fill in register window */
404 for(i = 0; i < 24; i++) {
405 env->regwptr[i] = tswapl(registers[i + 8]);
407 #ifndef TARGET_SPARC64
408 /* fill in fprs */
409 for (i = 0; i < 32; i++) {
410 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
412 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
413 env->y = tswapl(registers[64]);
414 PUT_PSR(env, tswapl(registers[65]));
415 env->wim = tswapl(registers[66]);
416 env->tbr = tswapl(registers[67]);
417 env->pc = tswapl(registers[68]);
418 env->npc = tswapl(registers[69]);
419 env->fsr = tswapl(registers[70]);
420 #else
421 for (i = 0; i < 64; i += 2) {
422 *((uint32_t *)&env->fpr[i]) = tswap32(registers[i/2 + 32] >> 32);
423 *((uint32_t *)&env->fpr[i + 1]) = tswap32(registers[i/2 + 32] & 0xffffffff);
425 env->pc = tswapl(registers[64]);
426 env->npc = tswapl(registers[65]);
427 env->tstate[env->tl] = tswapl(registers[66]);
428 env->fsr = tswapl(registers[67]);
429 env->fprs = tswapl(registers[68]);
430 env->y = tswapl(registers[69]);
431 #endif
433 #elif defined (TARGET_ARM)
434 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
436 int i;
437 uint8_t *ptr;
439 ptr = mem_buf;
440 /* 16 core integer registers (4 bytes each). */
441 for (i = 0; i < 16; i++)
443 *(uint32_t *)ptr = tswapl(env->regs[i]);
444 ptr += 4;
446 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
447 Not yet implemented. */
448 memset (ptr, 0, 8 * 12 + 4);
449 ptr += 8 * 12 + 4;
450 /* CPSR (4 bytes). */
451 *(uint32_t *)ptr = tswapl (cpsr_read(env));
452 ptr += 4;
454 return ptr - mem_buf;
457 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
459 int i;
460 uint8_t *ptr;
462 ptr = mem_buf;
463 /* Core integer registers. */
464 for (i = 0; i < 16; i++)
466 env->regs[i] = tswapl(*(uint32_t *)ptr);
467 ptr += 4;
469 /* Ignore FPA regs and scr. */
470 ptr += 8 * 12 + 4;
471 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
473 #elif defined (TARGET_M68K)
474 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
476 int i;
477 uint8_t *ptr;
478 CPU_DoubleU u;
480 ptr = mem_buf;
481 /* D0-D7 */
482 for (i = 0; i < 8; i++) {
483 *(uint32_t *)ptr = tswapl(env->dregs[i]);
484 ptr += 4;
486 /* A0-A7 */
487 for (i = 0; i < 8; i++) {
488 *(uint32_t *)ptr = tswapl(env->aregs[i]);
489 ptr += 4;
491 *(uint32_t *)ptr = tswapl(env->sr);
492 ptr += 4;
493 *(uint32_t *)ptr = tswapl(env->pc);
494 ptr += 4;
495 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
496 ColdFire has 8-bit double precision registers. */
497 for (i = 0; i < 8; i++) {
498 u.d = env->fregs[i];
499 *(uint32_t *)ptr = tswap32(u.l.upper);
500 *(uint32_t *)ptr = tswap32(u.l.lower);
502 /* FP control regs (not implemented). */
503 memset (ptr, 0, 3 * 4);
504 ptr += 3 * 4;
506 return ptr - mem_buf;
509 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
511 int i;
512 uint8_t *ptr;
513 CPU_DoubleU u;
515 ptr = mem_buf;
516 /* D0-D7 */
517 for (i = 0; i < 8; i++) {
518 env->dregs[i] = tswapl(*(uint32_t *)ptr);
519 ptr += 4;
521 /* A0-A7 */
522 for (i = 0; i < 8; i++) {
523 env->aregs[i] = tswapl(*(uint32_t *)ptr);
524 ptr += 4;
526 env->sr = tswapl(*(uint32_t *)ptr);
527 ptr += 4;
528 env->pc = tswapl(*(uint32_t *)ptr);
529 ptr += 4;
530 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
531 ColdFire has 8-bit double precision registers. */
532 for (i = 0; i < 8; i++) {
533 u.l.upper = tswap32(*(uint32_t *)ptr);
534 u.l.lower = tswap32(*(uint32_t *)ptr);
535 env->fregs[i] = u.d;
537 /* FP control regs (not implemented). */
538 ptr += 3 * 4;
540 #elif defined (TARGET_MIPS)
541 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
543 int i;
544 uint8_t *ptr;
546 ptr = mem_buf;
547 for (i = 0; i < 32; i++)
549 *(uint32_t *)ptr = tswapl(env->gpr[i]);
550 ptr += 4;
553 *(uint32_t *)ptr = tswapl(env->CP0_Status);
554 ptr += 4;
556 *(uint32_t *)ptr = tswapl(env->LO);
557 ptr += 4;
559 *(uint32_t *)ptr = tswapl(env->HI);
560 ptr += 4;
562 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
563 ptr += 4;
565 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
566 ptr += 4;
568 *(uint32_t *)ptr = tswapl(env->PC);
569 ptr += 4;
571 if (env->CP0_Config1 & (1 << CP0C1_FP))
573 for (i = 0; i < 32; i++)
575 *(uint32_t *)ptr = tswapl(FPR_W (env, i));
576 ptr += 4;
579 *(uint32_t *)ptr = tswapl(env->fcr31);
580 ptr += 4;
582 *(uint32_t *)ptr = tswapl(env->fcr0);
583 ptr += 4;
586 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
587 /* what's 'fp' mean here? */
589 return ptr - mem_buf;
592 /* convert MIPS rounding mode in FCR31 to IEEE library */
593 static unsigned int ieee_rm[] =
595 float_round_nearest_even,
596 float_round_to_zero,
597 float_round_up,
598 float_round_down
600 #define RESTORE_ROUNDING_MODE \
601 set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
603 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
605 int i;
606 uint8_t *ptr;
608 ptr = mem_buf;
609 for (i = 0; i < 32; i++)
611 env->gpr[i] = tswapl(*(uint32_t *)ptr);
612 ptr += 4;
615 env->CP0_Status = tswapl(*(uint32_t *)ptr);
616 ptr += 4;
618 env->LO = tswapl(*(uint32_t *)ptr);
619 ptr += 4;
621 env->HI = tswapl(*(uint32_t *)ptr);
622 ptr += 4;
624 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
625 ptr += 4;
627 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
628 ptr += 4;
630 env->PC = tswapl(*(uint32_t *)ptr);
631 ptr += 4;
633 if (env->CP0_Config1 & (1 << CP0C1_FP))
635 for (i = 0; i < 32; i++)
637 FPR_W (env, i) = tswapl(*(uint32_t *)ptr);
638 ptr += 4;
641 env->fcr31 = tswapl(*(uint32_t *)ptr) & 0x0183FFFF;
642 ptr += 4;
644 env->fcr0 = tswapl(*(uint32_t *)ptr);
645 ptr += 4;
647 /* set rounding mode */
648 RESTORE_ROUNDING_MODE;
650 #ifndef CONFIG_SOFTFLOAT
651 /* no floating point exception for native float */
652 SET_FP_ENABLE(env->fcr31, 0);
653 #endif
656 #elif defined (TARGET_SH4)
657 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
659 uint32_t *ptr = (uint32_t *)mem_buf;
660 int i;
662 #define SAVE(x) *ptr++=tswapl(x)
663 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
664 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
665 } else {
666 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
668 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
669 SAVE (env->pc);
670 SAVE (env->pr);
671 SAVE (env->gbr);
672 SAVE (env->vbr);
673 SAVE (env->mach);
674 SAVE (env->macl);
675 SAVE (env->sr);
676 SAVE (0); /* TICKS */
677 SAVE (0); /* STALLS */
678 SAVE (0); /* CYCLES */
679 SAVE (0); /* INSTS */
680 SAVE (0); /* PLR */
682 return ((uint8_t *)ptr - mem_buf);
685 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
687 uint32_t *ptr = (uint32_t *)mem_buf;
688 int i;
690 #define LOAD(x) (x)=*ptr++;
691 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
692 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
693 } else {
694 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
696 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
697 LOAD (env->pc);
698 LOAD (env->pr);
699 LOAD (env->gbr);
700 LOAD (env->vbr);
701 LOAD (env->mach);
702 LOAD (env->macl);
703 LOAD (env->sr);
705 #else
706 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
708 return 0;
711 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
715 #endif
717 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
719 const char *p;
720 int ch, reg_size, type;
721 char buf[4096];
722 uint8_t mem_buf[2000];
723 uint32_t *registers;
724 target_ulong addr, len;
726 #ifdef DEBUG_GDB
727 printf("command='%s'\n", line_buf);
728 #endif
729 p = line_buf;
730 ch = *p++;
731 switch(ch) {
732 case '?':
733 /* TODO: Make this return the correct value for user-mode. */
734 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
735 put_packet(s, buf);
736 break;
737 case 'c':
738 if (*p != '\0') {
739 addr = strtoull(p, (char **)&p, 16);
740 #if defined(TARGET_I386)
741 env->eip = addr;
742 #elif defined (TARGET_PPC)
743 env->nip = addr;
744 #elif defined (TARGET_SPARC)
745 env->pc = addr;
746 env->npc = addr + 4;
747 #elif defined (TARGET_ARM)
748 env->regs[15] = addr;
749 #elif defined (TARGET_SH4)
750 env->pc = addr;
751 #endif
753 #ifdef CONFIG_USER_ONLY
754 s->running_state = 1;
755 #else
756 vm_start();
757 #endif
758 return RS_IDLE;
759 case 's':
760 if (*p != '\0') {
761 addr = strtoul(p, (char **)&p, 16);
762 #if defined(TARGET_I386)
763 env->eip = addr;
764 #elif defined (TARGET_PPC)
765 env->nip = addr;
766 #elif defined (TARGET_SPARC)
767 env->pc = addr;
768 env->npc = addr + 4;
769 #elif defined (TARGET_ARM)
770 env->regs[15] = addr;
771 #elif defined (TARGET_SH4)
772 env->pc = addr;
773 #endif
775 cpu_single_step(env, 1);
776 #ifdef CONFIG_USER_ONLY
777 s->running_state = 1;
778 #else
779 vm_start();
780 #endif
781 return RS_IDLE;
782 case 'F':
784 target_ulong ret;
785 target_ulong err;
787 ret = strtoull(p, (char **)&p, 16);
788 if (*p == ',') {
789 p++;
790 err = strtoull(p, (char **)&p, 16);
791 } else {
792 err = 0;
794 if (*p == ',')
795 p++;
796 type = *p;
797 if (gdb_current_syscall_cb)
798 gdb_current_syscall_cb(s->env, ret, err);
799 if (type == 'C') {
800 put_packet(s, "T02");
801 } else {
802 #ifdef CONFIG_USER_ONLY
803 s->running_state = 1;
804 #else
805 vm_start();
806 #endif
809 break;
810 case 'g':
811 reg_size = cpu_gdb_read_registers(env, mem_buf);
812 memtohex(buf, mem_buf, reg_size);
813 put_packet(s, buf);
814 break;
815 case 'G':
816 registers = (void *)mem_buf;
817 len = strlen(p) / 2;
818 hextomem((uint8_t *)registers, p, len);
819 cpu_gdb_write_registers(env, mem_buf, len);
820 put_packet(s, "OK");
821 break;
822 case 'm':
823 addr = strtoull(p, (char **)&p, 16);
824 if (*p == ',')
825 p++;
826 len = strtoull(p, NULL, 16);
827 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
828 put_packet (s, "E14");
829 } else {
830 memtohex(buf, mem_buf, len);
831 put_packet(s, buf);
833 break;
834 case 'M':
835 addr = strtoull(p, (char **)&p, 16);
836 if (*p == ',')
837 p++;
838 len = strtoull(p, (char **)&p, 16);
839 if (*p == ':')
840 p++;
841 hextomem(mem_buf, p, len);
842 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
843 put_packet(s, "E14");
844 else
845 put_packet(s, "OK");
846 break;
847 case 'Z':
848 type = strtoul(p, (char **)&p, 16);
849 if (*p == ',')
850 p++;
851 addr = strtoull(p, (char **)&p, 16);
852 if (*p == ',')
853 p++;
854 len = strtoull(p, (char **)&p, 16);
855 if (type == 0 || type == 1) {
856 if (cpu_breakpoint_insert(env, addr) < 0)
857 goto breakpoint_error;
858 put_packet(s, "OK");
859 #ifndef CONFIG_USER_ONLY
860 } else if (type == 2) {
861 if (cpu_watchpoint_insert(env, addr) < 0)
862 goto breakpoint_error;
863 put_packet(s, "OK");
864 #endif
865 } else {
866 breakpoint_error:
867 put_packet(s, "E22");
869 break;
870 case 'z':
871 type = strtoul(p, (char **)&p, 16);
872 if (*p == ',')
873 p++;
874 addr = strtoull(p, (char **)&p, 16);
875 if (*p == ',')
876 p++;
877 len = strtoull(p, (char **)&p, 16);
878 if (type == 0 || type == 1) {
879 cpu_breakpoint_remove(env, addr);
880 put_packet(s, "OK");
881 #ifndef CONFIG_USER_ONLY
882 } else if (type == 2) {
883 cpu_watchpoint_remove(env, addr);
884 put_packet(s, "OK");
885 #endif
886 } else {
887 goto breakpoint_error;
889 break;
890 #ifdef CONFIG_LINUX_USER
891 case 'q':
892 if (strncmp(p, "Offsets", 7) == 0) {
893 TaskState *ts = env->opaque;
895 sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
896 ts->info->data_offset, ts->info->data_offset);
897 put_packet(s, buf);
898 break;
900 /* Fall through. */
901 #endif
902 default:
903 // unknown_command:
904 /* put empty packet */
905 buf[0] = '\0';
906 put_packet(s, buf);
907 break;
909 return RS_IDLE;
912 extern void tb_flush(CPUState *env);
914 #ifndef CONFIG_USER_ONLY
915 static void gdb_vm_stopped(void *opaque, int reason)
917 GDBState *s = opaque;
918 char buf[256];
919 int ret;
921 if (s->state == RS_SYSCALL)
922 return;
924 /* disable single step if it was enable */
925 cpu_single_step(s->env, 0);
927 if (reason == EXCP_DEBUG) {
928 if (s->env->watchpoint_hit) {
929 snprintf(buf, sizeof(buf), "T%02xwatch:%x;", SIGTRAP,
930 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
931 put_packet(s, buf);
932 s->env->watchpoint_hit = 0;
933 return;
935 tb_flush(s->env);
936 ret = SIGTRAP;
937 } else if (reason == EXCP_INTERRUPT) {
938 ret = SIGINT;
939 } else {
940 ret = 0;
942 snprintf(buf, sizeof(buf), "S%02x", ret);
943 put_packet(s, buf);
945 #endif
947 /* Send a gdb syscall request.
948 This accepts limited printf-style format specifiers, specifically:
949 %x - target_ulong argument printed in hex.
950 %s - string pointer (target_ulong) and length (int) pair. */
951 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
953 va_list va;
954 char buf[256];
955 char *p;
956 target_ulong addr;
957 GDBState *s;
959 s = gdb_syscall_state;
960 if (!s)
961 return;
962 gdb_current_syscall_cb = cb;
963 s->state = RS_SYSCALL;
964 #ifndef CONFIG_USER_ONLY
965 vm_stop(EXCP_DEBUG);
966 #endif
967 s->state = RS_IDLE;
968 va_start(va, fmt);
969 p = buf;
970 *(p++) = 'F';
971 while (*fmt) {
972 if (*fmt == '%') {
973 fmt++;
974 switch (*fmt++) {
975 case 'x':
976 addr = va_arg(va, target_ulong);
977 p += sprintf(p, TARGET_FMT_lx, addr);
978 break;
979 case 's':
980 addr = va_arg(va, target_ulong);
981 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
982 break;
983 default:
984 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
985 fmt - 1);
986 break;
988 } else {
989 *(p++) = *(fmt++);
992 va_end(va);
993 put_packet(s, buf);
994 #ifdef CONFIG_USER_ONLY
995 gdb_handlesig(s->env, 0);
996 #else
997 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
998 #endif
1001 static void gdb_read_byte(GDBState *s, int ch)
1003 CPUState *env = s->env;
1004 int i, csum;
1005 char reply[1];
1007 #ifndef CONFIG_USER_ONLY
1008 if (s->last_packet_len) {
1009 /* Waiting for a response to the last packet. If we see the start
1010 of a new command then abandon the previous response. */
1011 if (ch == '-') {
1012 #ifdef DEBUG_GDB
1013 printf("Got NACK, retransmitting\n");
1014 #endif
1015 put_buffer(s, s->last_packet, s->last_packet_len);
1017 #ifdef DEBUG_GDB
1018 else if (ch == '+')
1019 printf("Got ACK\n");
1020 else
1021 printf("Got '%c' when expecting ACK/NACK\n", ch);
1022 #endif
1023 if (ch == '+' || ch == '$')
1024 s->last_packet_len = 0;
1025 if (ch != '$')
1026 return;
1028 if (vm_running) {
1029 /* when the CPU is running, we cannot do anything except stop
1030 it when receiving a char */
1031 vm_stop(EXCP_INTERRUPT);
1032 } else
1033 #endif
1035 switch(s->state) {
1036 case RS_IDLE:
1037 if (ch == '$') {
1038 s->line_buf_index = 0;
1039 s->state = RS_GETLINE;
1041 break;
1042 case RS_GETLINE:
1043 if (ch == '#') {
1044 s->state = RS_CHKSUM1;
1045 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1046 s->state = RS_IDLE;
1047 } else {
1048 s->line_buf[s->line_buf_index++] = ch;
1050 break;
1051 case RS_CHKSUM1:
1052 s->line_buf[s->line_buf_index] = '\0';
1053 s->line_csum = fromhex(ch) << 4;
1054 s->state = RS_CHKSUM2;
1055 break;
1056 case RS_CHKSUM2:
1057 s->line_csum |= fromhex(ch);
1058 csum = 0;
1059 for(i = 0; i < s->line_buf_index; i++) {
1060 csum += s->line_buf[i];
1062 if (s->line_csum != (csum & 0xff)) {
1063 reply[0] = '-';
1064 put_buffer(s, reply, 1);
1065 s->state = RS_IDLE;
1066 } else {
1067 reply[0] = '+';
1068 put_buffer(s, reply, 1);
1069 s->state = gdb_handle_packet(s, env, s->line_buf);
1071 break;
1072 default:
1073 abort();
1078 #ifdef CONFIG_USER_ONLY
1080 gdb_handlesig (CPUState *env, int sig)
1082 GDBState *s;
1083 char buf[256];
1084 int n;
1086 if (gdbserver_fd < 0)
1087 return sig;
1089 s = &gdbserver_state;
1091 /* disable single step if it was enabled */
1092 cpu_single_step(env, 0);
1093 tb_flush(env);
1095 if (sig != 0)
1097 snprintf(buf, sizeof(buf), "S%02x", sig);
1098 put_packet(s, buf);
1101 sig = 0;
1102 s->state = RS_IDLE;
1103 s->running_state = 0;
1104 while (s->running_state == 0) {
1105 n = read (s->fd, buf, 256);
1106 if (n > 0)
1108 int i;
1110 for (i = 0; i < n; i++)
1111 gdb_read_byte (s, buf[i]);
1113 else if (n == 0 || errno != EAGAIN)
1115 /* XXX: Connection closed. Should probably wait for annother
1116 connection before continuing. */
1117 return sig;
1120 return sig;
1123 /* Tell the remote gdb that the process has exited. */
1124 void gdb_exit(CPUState *env, int code)
1126 GDBState *s;
1127 char buf[4];
1129 if (gdbserver_fd < 0)
1130 return;
1132 s = &gdbserver_state;
1134 snprintf(buf, sizeof(buf), "W%02x", code);
1135 put_packet(s, buf);
1139 static void gdb_accept(void *opaque)
1141 GDBState *s;
1142 struct sockaddr_in sockaddr;
1143 socklen_t len;
1144 int val, fd;
1146 for(;;) {
1147 len = sizeof(sockaddr);
1148 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1149 if (fd < 0 && errno != EINTR) {
1150 perror("accept");
1151 return;
1152 } else if (fd >= 0) {
1153 break;
1157 /* set short latency */
1158 val = 1;
1159 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1161 s = &gdbserver_state;
1162 memset (s, 0, sizeof (GDBState));
1163 s->env = first_cpu; /* XXX: allow to change CPU */
1164 s->fd = fd;
1166 gdb_syscall_state = s;
1168 fcntl(fd, F_SETFL, O_NONBLOCK);
1171 static int gdbserver_open(int port)
1173 struct sockaddr_in sockaddr;
1174 int fd, val, ret;
1176 fd = socket(PF_INET, SOCK_STREAM, 0);
1177 if (fd < 0) {
1178 perror("socket");
1179 return -1;
1182 /* allow fast reuse */
1183 val = 1;
1184 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1186 sockaddr.sin_family = AF_INET;
1187 sockaddr.sin_port = htons(port);
1188 sockaddr.sin_addr.s_addr = 0;
1189 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1190 if (ret < 0) {
1191 perror("bind");
1192 return -1;
1194 ret = listen(fd, 0);
1195 if (ret < 0) {
1196 perror("listen");
1197 return -1;
1199 return fd;
1202 int gdbserver_start(int port)
1204 gdbserver_fd = gdbserver_open(port);
1205 if (gdbserver_fd < 0)
1206 return -1;
1207 /* accept connections */
1208 gdb_accept (NULL);
1209 return 0;
1211 #else
1212 static int gdb_chr_can_recieve(void *opaque)
1214 return 1;
1217 static void gdb_chr_recieve(void *opaque, const uint8_t *buf, int size)
1219 GDBState *s = opaque;
1220 int i;
1222 for (i = 0; i < size; i++) {
1223 gdb_read_byte(s, buf[i]);
1227 static void gdb_chr_event(void *opaque, int event)
1229 switch (event) {
1230 case CHR_EVENT_RESET:
1231 vm_stop(EXCP_INTERRUPT);
1232 gdb_syscall_state = opaque;
1233 break;
1234 default:
1235 break;
1239 int gdbserver_start(const char *port)
1241 GDBState *s;
1242 char gdbstub_port_name[128];
1243 int port_num;
1244 char *p;
1245 CharDriverState *chr;
1247 if (!port || !*port)
1248 return -1;
1250 port_num = strtol(port, &p, 10);
1251 if (*p == 0) {
1252 /* A numeric value is interpreted as a port number. */
1253 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1254 "tcp::%d,nowait,nodelay,server", port_num);
1255 port = gdbstub_port_name;
1258 chr = qemu_chr_open(port);
1259 if (!chr)
1260 return -1;
1262 s = qemu_mallocz(sizeof(GDBState));
1263 if (!s) {
1264 return -1;
1266 s->env = first_cpu; /* XXX: allow to change CPU */
1267 s->chr = chr;
1268 qemu_chr_add_handlers(chr, gdb_chr_can_recieve, gdb_chr_recieve,
1269 gdb_chr_event, s);
1270 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1271 return 0;
1273 #endif