Relax qemu_ld/st constraints for !SOFTMMU case
[qemu/mini2440.git] / qemu-char.h
blob2746472d58a0df633a60bbbf7838ac37170fda48
1 #ifndef QEMU_CHAR_H
2 #define QEMU_CHAR_H
4 /* character device */
6 #define CHR_EVENT_BREAK 0 /* serial break char */
7 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
8 #define CHR_EVENT_RESET 2 /* new connection established */
11 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
12 typedef struct {
13 int speed;
14 int parity;
15 int data_bits;
16 int stop_bits;
17 } QEMUSerialSetParams;
19 #define CHR_IOCTL_SERIAL_SET_BREAK 2
21 #define CHR_IOCTL_PP_READ_DATA 3
22 #define CHR_IOCTL_PP_WRITE_DATA 4
23 #define CHR_IOCTL_PP_READ_CONTROL 5
24 #define CHR_IOCTL_PP_WRITE_CONTROL 6
25 #define CHR_IOCTL_PP_READ_STATUS 7
26 #define CHR_IOCTL_PP_EPP_READ_ADDR 8
27 #define CHR_IOCTL_PP_EPP_READ 9
28 #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
29 #define CHR_IOCTL_PP_EPP_WRITE 11
31 #define CHR_IOCTL_SERIAL_SET_TIOCM 12
32 #define CHR_IOCTL_SERIAL_GET_TIOCM 13
34 #define CHR_TIOCM_CTS 0x020
35 #define CHR_TIOCM_CAR 0x040
36 #define CHR_TIOCM_DSR 0x100
37 #define CHR_TIOCM_RI 0x080
38 #define CHR_TIOCM_DTR 0x002
39 #define CHR_TIOCM_RTS 0x004
41 typedef void IOEventHandler(void *opaque, int event);
43 struct CharDriverState {
44 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
45 void (*chr_update_read_handler)(struct CharDriverState *s);
46 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
47 IOEventHandler *chr_event;
48 IOCanRWHandler *chr_can_read;
49 IOReadHandler *chr_read;
50 void *handler_opaque;
51 void (*chr_send_event)(struct CharDriverState *chr, int event);
52 void (*chr_close)(struct CharDriverState *chr);
53 void (*chr_accept_input)(struct CharDriverState *chr);
54 void *opaque;
55 int focus;
56 QEMUBH *bh;
59 CharDriverState *qemu_chr_open(const char *filename);
60 void qemu_chr_close(CharDriverState *chr);
61 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
62 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
63 void qemu_chr_send_event(CharDriverState *s, int event);
64 void qemu_chr_add_handlers(CharDriverState *s,
65 IOCanRWHandler *fd_can_read,
66 IOReadHandler *fd_read,
67 IOEventHandler *fd_event,
68 void *opaque);
69 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
70 void qemu_chr_reset(CharDriverState *s);
71 int qemu_chr_can_read(CharDriverState *s);
72 void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
73 void qemu_chr_accept_input(CharDriverState *s);
75 /* async I/O support */
77 int qemu_set_fd_handler2(int fd,
78 IOCanRWHandler *fd_read_poll,
79 IOHandler *fd_read,
80 IOHandler *fd_write,
81 void *opaque);
82 int qemu_set_fd_handler(int fd,
83 IOHandler *fd_read,
84 IOHandler *fd_write,
85 void *opaque);
87 #endif