hw/mips_jazz.c

   1 /*
   2  * QEMU MIPS Jazz support
   3  *
   4  * Copyright (c) 2007-2008 Hervé Poussineau
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "mips.h"
  27 #include "pc.h"
  28 #include "isa.h"
  29 #include "fdc.h"
  30 #include "sysemu.h"
  31 #include "audio/audio.h"
  32 #include "boards.h"
  33 #include "net.h"
  34 #include "scsi.h"
  35
  36 #ifdef TARGET_WORDS_BIGENDIAN
  37 #define BIOS_FILENAME "mips_bios.bin"
  38 #else
  39 #define BIOS_FILENAME "mipsel_bios.bin"
  40 #endif
  41
  42 enum jazz_model_e
  43 {
  44     JAZZ_MAGNUM,
  45     JAZZ_PICA61,
  46 };
  47
  48 static void main_cpu_reset(void *opaque)
  49 {
  50     CPUState *env = opaque;
  51     cpu_reset(env);
  52 }
  53
  54 static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
  55 {
  56     CPUState *env = opaque;
  57     return cpu_inw(env, 0x71);
  58 }
  59
  60 static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
  61 {
  62     CPUState *env = opaque;
  63     cpu_outw(env, 0x71, val & 0xff);
  64 }
  65
  66 static CPUReadMemoryFunc *rtc_read[3] = {
  67     rtc_readb,
  68     rtc_readb,
  69     rtc_readb,
  70 };
  71
  72 static CPUWriteMemoryFunc *rtc_write[3] = {
  73     rtc_writeb,
  74     rtc_writeb,
  75     rtc_writeb,
  76 };
  77
  78 static void dma_dummy_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
  79 {
  80     /* Nothing to do. That is only to ensure that
  81      * the current DMA acknowledge cycle is completed. */
  82 }
  83
  84 static CPUReadMemoryFunc *dma_dummy_read[3] = {
  85     NULL,
  86     NULL,
  87     NULL,
  88 };
  89
  90 static CPUWriteMemoryFunc *dma_dummy_write[3] = {
  91     dma_dummy_writeb,
  92     dma_dummy_writeb,
  93     dma_dummy_writeb,
  94 };
  95
  96 #ifdef HAS_AUDIO
  97 static void audio_init(qemu_irq *pic)
  98 {
  99     struct soundhw *c;
 100     int audio_enabled = 0;
 101
 102     for (c = soundhw; !audio_enabled && c->name; ++c) {
 103         audio_enabled = c->enabled;
 104     }
 105
 106     if (audio_enabled) {
 107         for (c = soundhw; c->name; ++c) {
 108             if (c->enabled) {
 109                 if (c->isa) {
 110                     c->init.init_isa(pic);
 111                 }
 112             }
 113         }
 114     }
 115 }
 116 #endif
 117
 118 #define MAGNUM_BIOS_SIZE_MAX 0x7e000
 119 #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
 120
 121 static
 122 void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
 123                      const char *cpu_model,
 124                      enum jazz_model_e jazz_model)
 125 {
 126     char buf[1024];
 127     int bios_size, n;
 128     CPUState *env;
 129     qemu_irq *rc4030, *i8259;
 130     rc4030_dma *dmas;
 131     void* rc4030_opaque;
 132     void *scsi_hba;
 133     int hd;
 134     int s_rtc, s_dma_dummy;
 135     NICInfo *nd;
 136     PITState *pit;
 137     BlockDriverState *fds[MAX_FD];
 138     qemu_irq esp_reset;
 139     ram_addr_t ram_offset;
 140     ram_addr_t bios_offset;
 141
 142     /* init CPUs */
 143     if (cpu_model == NULL) {
 144 #ifdef TARGET_MIPS64
 145         cpu_model = "R4000";
 146 #else
 147         /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
 148         cpu_model = "24Kf";
 149 #endif
 150     }
 151     env = cpu_init(cpu_model);
 152     if (!env) {
 153         fprintf(stderr, "Unable to find CPU definition\n");
 154         exit(1);
 155     }
 156     qemu_register_reset(main_cpu_reset, env);
 157
 158     /* allocate RAM */
 159     ram_offset = qemu_ram_alloc(ram_size);
 160     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 161
 162     bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE);
 163     cpu_register_physical_memory(0x1fc00000LL,
 164                                  MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
 165     cpu_register_physical_memory(0xfff00000LL,
 166                                  MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
 167
 168     /* load the BIOS image. */
 169     if (bios_name == NULL)
 170         bios_name = BIOS_FILENAME;
 171     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 172     bios_size = load_image_targphys(buf, 0xfff00000LL, MAGNUM_BIOS_SIZE);
 173     if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) {
 174         fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n",
 175                 buf);
 176         exit(1);
 177     }
 178
 179     /* Init CPU internal devices */
 180     cpu_mips_irq_init_cpu(env);
 181     cpu_mips_clock_init(env);
 182
 183     /* Chipset */
 184     rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas);
 185     s_dma_dummy = cpu_register_io_memory(0, dma_dummy_read, dma_dummy_write, NULL);
 186     cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
 187
 188     /* ISA devices */
 189     i8259 = i8259_init(env->irq[4]);
 190     DMA_init(0);
 191     pit = pit_init(0x40, i8259[0]);
 192     pcspk_init(pit);
 193
 194     /* ISA IO space at 0x90000000 */
 195     isa_mmio_init(0x90000000, 0x01000000);
 196     isa_mem_base = 0x11000000;
 197
 198     /* Video card */
 199     switch (jazz_model) {
 200     case JAZZ_MAGNUM:
 201         g364fb_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0, rc4030[3]);
 202         break;
 203     case JAZZ_PICA61:
 204         isa_vga_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0);
 205         break;
 206     default:
 207         break;
 208     }
 209
 210     /* Network controller */
 211     for (n = 0; n < nb_nics; n++) {
 212         nd = &nd_table[n];
 213         if (!nd->model)
 214             nd->model = "dp83932";
 215         if (strcmp(nd->model, "dp83932") == 0) {
 216             dp83932_init(nd, 0x80001000, 2, rc4030[4],
 217                          rc4030_opaque, rc4030_dma_memory_rw);
 218             break;
 219         } else if (strcmp(nd->model, "?") == 0) {
 220             fprintf(stderr, "qemu: Supported NICs: dp83932\n");
 221             exit(1);
 222         } else {
 223             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 224             exit(1);
 225         }
 226     }
 227
 228     /* SCSI adapter */
 229     scsi_hba = esp_init(0x80002000, 0,
 230                         rc4030_dma_read, rc4030_dma_write, dmas[0],
 231                         rc4030[5], &esp_reset);
 232     for (n = 0; n < ESP_MAX_DEVS; n++) {
 233         hd = drive_get_index(IF_SCSI, 0, n);
 234         if (hd != -1) {
 235             esp_scsi_attach(scsi_hba, drives_table[hd].bdrv, n);
 236         }
 237     }
 238
 239     /* Floppy */
 240     if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
 241         fprintf(stderr, "qemu: too many floppy drives\n");
 242         exit(1);
 243     }
 244     for (n = 0; n < MAX_FD; n++) {
 245         int fd = drive_get_index(IF_FLOPPY, 0, n);
 246         if (fd != -1)
 247             fds[n] = drives_table[fd].bdrv;
 248         else
 249             fds[n] = NULL;
 250     }
 251     fdctrl_init(rc4030[1], 0, 1, 0x80003000, fds);
 252
 253     /* Real time clock */
 254     rtc_init(0x70, i8259[8], 1980);
 255     s_rtc = cpu_register_io_memory(0, rtc_read, rtc_write, env);
 256     cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
 257
 258     /* Keyboard (i8042) */
 259     i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0x1000, 0x1);
 260
 261     /* Serial ports */
 262     if (serial_hds[0])
 263         serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1);
 264     if (serial_hds[1])
 265         serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1);
 266
 267     /* Parallel port */
 268     if (parallel_hds[0])
 269         parallel_mm_init(0x80008000, 0, rc4030[0], parallel_hds[0]);
 270
 271     /* Sound card */
 272     /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
 273 #ifdef HAS_AUDIO
 274     audio_init(i8259);
 275 #endif
 276
 277     /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
 278     ds1225y_init(0x80009000, "nvram");
 279
 280     /* LED indicator */
 281     jazz_led_init(0x8000f000);
 282 }
 283
 284 static
 285 void mips_magnum_init (ram_addr_t ram_size, int vga_ram_size,
 286                        const char *boot_device,
 287                        const char *kernel_filename, const char *kernel_cmdline,
 288                        const char *initrd_filename, const char *cpu_model)
 289 {
 290     mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_MAGNUM);
 291 }
 292
 293 static
 294 void mips_pica61_init (ram_addr_t ram_size, int vga_ram_size,
 295                        const char *boot_device,
 296                        const char *kernel_filename, const char *kernel_cmdline,
 297                        const char *initrd_filename, const char *cpu_model)
 298 {
 299     mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_PICA61);
 300 }
 301
 302 QEMUMachine mips_magnum_machine = {
 303     .name = "magnum",
 304     .desc = "MIPS Magnum",
 305     .init = mips_magnum_init,
 306     .use_scsi = 1,
 307 };
 308
 309 QEMUMachine mips_pica61_machine = {
 310     .name = "pica61",
 311     .desc = "Acer Pica 61",
 312     .init = mips_pica61_init,
 313     .use_scsi = 1,
 314 };