Model more parts of the ETRAX mmu (still alot missing).
[qemu/malc.git] / translate-all.c
blob6a273a852fb83ec921c372bb1d2fbc45f2e30f76
1 /*
2 * Host code generation
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <stdarg.h>
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <string.h>
24 #include <inttypes.h>
26 #include "config.h"
28 #define NO_CPU_IO_DEFS
29 #include "cpu.h"
30 #include "exec-all.h"
31 #include "disas.h"
32 #include "tcg.h"
34 /* code generation context */
35 TCGContext tcg_ctx;
37 uint16_t gen_opc_buf[OPC_BUF_SIZE];
38 TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
40 target_ulong gen_opc_pc[OPC_BUF_SIZE];
41 uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
42 #if defined(TARGET_I386)
43 uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
44 #elif defined(TARGET_SPARC)
45 target_ulong gen_opc_npc[OPC_BUF_SIZE];
46 target_ulong gen_opc_jump_pc[2];
47 #elif defined(TARGET_MIPS) || defined(TARGET_SH4)
48 uint32_t gen_opc_hflags[OPC_BUF_SIZE];
49 #endif
51 int code_copy_enabled = 1;
53 #ifdef CONFIG_PROFILER
54 int64_t dyngen_tb_count1;
55 int64_t dyngen_tb_count;
56 int64_t dyngen_op_count;
57 int64_t dyngen_old_op_count;
58 int64_t dyngen_tcg_del_op_count;
59 int dyngen_op_count_max;
60 int64_t dyngen_code_in_len;
61 int64_t dyngen_code_out_len;
62 int64_t dyngen_interm_time;
63 int64_t dyngen_code_time;
64 int64_t dyngen_restore_count;
65 int64_t dyngen_restore_time;
66 #endif
68 /* XXX: suppress that */
69 unsigned long code_gen_max_block_size(void)
71 static unsigned long max;
73 if (max == 0) {
74 #define DEF(s, n, copy_size) max = copy_size > max? copy_size : max;
75 #include "tcg-opc.h"
76 #undef DEF
77 max *= OPC_MAX_SIZE;
80 return max;
83 void cpu_gen_init(void)
85 tcg_context_init(&tcg_ctx);
86 tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
87 128 * sizeof(long));
90 /* return non zero if the very first instruction is invalid so that
91 the virtual CPU can trigger an exception.
93 '*gen_code_size_ptr' contains the size of the generated code (host
94 code).
96 int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
98 TCGContext *s = &tcg_ctx;
99 uint8_t *gen_code_buf;
100 int gen_code_size;
101 #ifdef CONFIG_PROFILER
102 int64_t ti;
103 #endif
105 #ifdef CONFIG_PROFILER
106 dyngen_tb_count1++; /* includes aborted translations because of
107 exceptions */
108 ti = profile_getclock();
109 #endif
110 tcg_func_start(s);
112 if (gen_intermediate_code(env, tb) < 0)
113 return -1;
115 /* generate machine code */
116 gen_code_buf = tb->tc_ptr;
117 tb->tb_next_offset[0] = 0xffff;
118 tb->tb_next_offset[1] = 0xffff;
119 s->tb_next_offset = tb->tb_next_offset;
120 #ifdef USE_DIRECT_JUMP
121 s->tb_jmp_offset = tb->tb_jmp_offset;
122 s->tb_next = NULL;
123 /* the following two entries are optional (only used for string ops) */
124 /* XXX: not used ? */
125 tb->tb_jmp_offset[2] = 0xffff;
126 tb->tb_jmp_offset[3] = 0xffff;
127 #else
128 s->tb_jmp_offset = NULL;
129 s->tb_next = tb->tb_next;
130 #endif
132 #ifdef CONFIG_PROFILER
133 dyngen_tb_count++;
134 dyngen_interm_time += profile_getclock() - ti;
135 dyngen_code_time -= profile_getclock();
136 #endif
137 gen_code_size = dyngen_code(s, gen_code_buf);
138 *gen_code_size_ptr = gen_code_size;
139 #ifdef CONFIG_PROFILER
140 dyngen_code_time += profile_getclock();
141 dyngen_code_in_len += tb->size;
142 dyngen_code_out_len += gen_code_size;
143 #endif
145 #ifdef DEBUG_DISAS
146 if (loglevel & CPU_LOG_TB_OUT_ASM) {
147 fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
148 disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
149 fprintf(logfile, "\n");
150 fflush(logfile);
152 #endif
153 return 0;
156 /* The cpu state corresponding to 'searched_pc' is restored.
158 int cpu_restore_state(TranslationBlock *tb,
159 CPUState *env, unsigned long searched_pc,
160 void *puc)
162 TCGContext *s = &tcg_ctx;
163 int j;
164 unsigned long tc_ptr;
165 #ifdef CONFIG_PROFILER
166 int64_t ti;
167 #endif
169 #ifdef CONFIG_PROFILER
170 ti = profile_getclock();
171 #endif
172 tcg_func_start(s);
174 if (gen_intermediate_code_pc(env, tb) < 0)
175 return -1;
177 /* find opc index corresponding to search_pc */
178 tc_ptr = (unsigned long)tb->tc_ptr;
179 if (searched_pc < tc_ptr)
180 return -1;
182 s->tb_next_offset = tb->tb_next_offset;
183 #ifdef USE_DIRECT_JUMP
184 s->tb_jmp_offset = tb->tb_jmp_offset;
185 s->tb_next = NULL;
186 #else
187 s->tb_jmp_offset = NULL;
188 s->tb_next = tb->tb_next;
189 #endif
190 j = dyngen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
191 if (j < 0)
192 return -1;
193 /* now find start of instruction before */
194 while (gen_opc_instr_start[j] == 0)
195 j--;
196 #if defined(TARGET_I386)
198 int cc_op;
199 #ifdef DEBUG_DISAS
200 if (loglevel & CPU_LOG_TB_OP) {
201 int i;
202 fprintf(logfile, "RESTORE:\n");
203 for(i=0;i<=j; i++) {
204 if (gen_opc_instr_start[i]) {
205 fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
208 fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
209 searched_pc, j, gen_opc_pc[j] - tb->cs_base,
210 (uint32_t)tb->cs_base);
212 #endif
213 env->eip = gen_opc_pc[j] - tb->cs_base;
214 cc_op = gen_opc_cc_op[j];
215 if (cc_op != CC_OP_DYNAMIC)
216 env->cc_op = cc_op;
218 #elif defined(TARGET_ARM)
219 env->regs[15] = gen_opc_pc[j];
220 #elif defined(TARGET_SPARC)
222 target_ulong npc;
223 env->pc = gen_opc_pc[j];
224 npc = gen_opc_npc[j];
225 if (npc == 1) {
226 /* dynamic NPC: already stored */
227 } else if (npc == 2) {
228 target_ulong t2 = (target_ulong)(unsigned long)puc;
229 /* jump PC: use T2 and the jump targets of the translation */
230 if (t2)
231 env->npc = gen_opc_jump_pc[0];
232 else
233 env->npc = gen_opc_jump_pc[1];
234 } else {
235 env->npc = npc;
238 #elif defined(TARGET_PPC)
240 int type, c;
241 /* for PPC, we need to look at the micro operation to get the
242 access type */
243 env->nip = gen_opc_pc[j];
244 c = gen_opc_buf[j];
245 switch(c) {
246 #if defined(CONFIG_USER_ONLY)
247 #define CASE3(op)\
248 case INDEX_op_ ## op ## _raw
249 #else
250 #define CASE3(op)\
251 case INDEX_op_ ## op ## _user:\
252 case INDEX_op_ ## op ## _kernel:\
253 case INDEX_op_ ## op ## _hypv
254 #endif
256 CASE3(stfd):
257 CASE3(stfs):
258 CASE3(lfd):
259 CASE3(lfs):
260 type = ACCESS_FLOAT;
261 break;
262 CASE3(lwarx):
263 type = ACCESS_RES;
264 break;
265 CASE3(stwcx):
266 type = ACCESS_RES;
267 break;
268 CASE3(eciwx):
269 CASE3(ecowx):
270 type = ACCESS_EXT;
271 break;
272 default:
273 type = ACCESS_INT;
274 break;
276 env->access_type = type;
278 #elif defined(TARGET_M68K)
279 env->pc = gen_opc_pc[j];
280 #elif defined(TARGET_MIPS)
281 env->PC[env->current_tc] = gen_opc_pc[j];
282 env->hflags &= ~MIPS_HFLAG_BMASK;
283 env->hflags |= gen_opc_hflags[j];
284 #elif defined(TARGET_ALPHA)
285 env->pc = gen_opc_pc[j];
286 #elif defined(TARGET_SH4)
287 env->pc = gen_opc_pc[j];
288 env->flags = gen_opc_hflags[j];
289 #elif defined(TARGET_CRIS)
290 env->pregs[PR_ERP] = gen_opc_pc[j];
291 #endif
293 #ifdef CONFIG_PROFILER
294 dyngen_restore_time += profile_getclock() - ti;
295 dyngen_restore_count++;
296 #endif
297 return 0;