block: fix deadlock in bdrv_co_flush
[qemu/kevin.git] / hw / intc / ioapic_common.c
blob1b7ec5ec2046eab9573f8cf5fb849531aa5ecc45
1 /*
2 * IOAPIC emulation logic - common bits of emulated and KVM kernel model
4 * Copyright (c) 2004-2005 Fabrice Bellard
5 * Copyright (c) 2009 Xiantao Zhang, Intel
6 * Copyright (c) 2011 Jan Kiszka, Siemens AG
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "qemu/osdep.h"
23 #include "qapi/error.h"
24 #include "monitor/monitor.h"
25 #include "hw/i386/ioapic.h"
26 #include "hw/i386/ioapic_internal.h"
27 #include "hw/sysbus.h"
29 /* ioapic_no count start from 0 to MAX_IOAPICS,
30 * remove as static variable from ioapic_common_init.
31 * now as a global variable, let child to increase the counter
32 * then we can drop the 'instance_no' argument
33 * and convert to our QOM's realize function
35 int ioapic_no;
37 static void ioapic_irr_dump(Monitor *mon, const char *name, uint32_t bitmap)
39 int i;
41 monitor_printf(mon, "%-10s ", name);
42 if (bitmap == 0) {
43 monitor_printf(mon, "(none)\n");
44 return;
46 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
47 if (bitmap & (1 << i)) {
48 monitor_printf(mon, "%-2u ", i);
51 monitor_printf(mon, "\n");
54 void ioapic_print_redtbl(Monitor *mon, IOAPICCommonState *s)
56 static const char *delm_str[] = {
57 "fixed", "lowest", "SMI", "...", "NMI", "INIT", "...", "extINT"};
58 uint32_t remote_irr = 0;
59 int i;
61 monitor_printf(mon, "ioapic id=0x%02x sel=0x%02x", s->id, s->ioregsel);
62 if (s->ioregsel) {
63 monitor_printf(mon, " (redir[%u])\n",
64 (s->ioregsel - IOAPIC_REG_REDTBL_BASE) >> 1);
65 } else {
66 monitor_printf(mon, "\n");
68 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
69 uint64_t entry = s->ioredtbl[i];
70 uint32_t delm = (uint32_t)((entry & IOAPIC_LVT_DELIV_MODE) >>
71 IOAPIC_LVT_DELIV_MODE_SHIFT);
72 monitor_printf(mon, "pin %-2u 0x%016"PRIx64" dest=%"PRIx64
73 " vec=%-3"PRIu64" %s %-5s %-6s %-6s %s\n",
74 i, entry,
75 (entry >> IOAPIC_LVT_DEST_SHIFT) &
76 (entry & IOAPIC_LVT_DEST_MODE ? 0xff : 0xf),
77 entry & IOAPIC_VECTOR_MASK,
78 entry & IOAPIC_LVT_POLARITY ? "active-lo" : "active-hi",
79 entry & IOAPIC_LVT_TRIGGER_MODE ? "level" : "edge",
80 entry & IOAPIC_LVT_MASKED ? "masked" : "",
81 delm_str[delm],
82 entry & IOAPIC_LVT_DEST_MODE ? "logical" : "physical");
84 remote_irr |= entry & IOAPIC_LVT_TRIGGER_MODE ?
85 (entry & IOAPIC_LVT_REMOTE_IRR ? (1 << i) : 0) : 0;
87 ioapic_irr_dump(mon, "IRR", s->irr);
88 ioapic_irr_dump(mon, "Remote IRR", remote_irr);
91 void ioapic_reset_common(DeviceState *dev)
93 IOAPICCommonState *s = IOAPIC_COMMON(dev);
94 int i;
96 s->id = 0;
97 s->ioregsel = 0;
98 s->irr = 0;
99 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
100 s->ioredtbl[i] = 1 << IOAPIC_LVT_MASKED_SHIFT;
104 static void ioapic_dispatch_pre_save(void *opaque)
106 IOAPICCommonState *s = IOAPIC_COMMON(opaque);
107 IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
109 if (info->pre_save) {
110 info->pre_save(s);
114 static int ioapic_dispatch_post_load(void *opaque, int version_id)
116 IOAPICCommonState *s = IOAPIC_COMMON(opaque);
117 IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
119 if (info->post_load) {
120 info->post_load(s);
122 return 0;
125 static void ioapic_common_realize(DeviceState *dev, Error **errp)
127 IOAPICCommonState *s = IOAPIC_COMMON(dev);
128 IOAPICCommonClass *info;
130 if (ioapic_no >= MAX_IOAPICS) {
131 error_setg(errp, "Only %d ioapics allowed", MAX_IOAPICS);
132 return;
135 info = IOAPIC_COMMON_GET_CLASS(s);
136 info->realize(dev, errp);
138 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->io_memory);
139 ioapic_no++;
142 static const VMStateDescription vmstate_ioapic_common = {
143 .name = "ioapic",
144 .version_id = 3,
145 .minimum_version_id = 1,
146 .pre_save = ioapic_dispatch_pre_save,
147 .post_load = ioapic_dispatch_post_load,
148 .fields = (VMStateField[]) {
149 VMSTATE_UINT8(id, IOAPICCommonState),
150 VMSTATE_UINT8(ioregsel, IOAPICCommonState),
151 VMSTATE_UNUSED_V(2, 8), /* to account for qemu-kvm's v2 format */
152 VMSTATE_UINT32_V(irr, IOAPICCommonState, 2),
153 VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICCommonState, IOAPIC_NUM_PINS),
154 VMSTATE_END_OF_LIST()
158 static void ioapic_common_class_init(ObjectClass *klass, void *data)
160 DeviceClass *dc = DEVICE_CLASS(klass);
162 dc->realize = ioapic_common_realize;
163 dc->vmsd = &vmstate_ioapic_common;
166 static const TypeInfo ioapic_common_type = {
167 .name = TYPE_IOAPIC_COMMON,
168 .parent = TYPE_SYS_BUS_DEVICE,
169 .instance_size = sizeof(IOAPICCommonState),
170 .class_size = sizeof(IOAPICCommonClass),
171 .class_init = ioapic_common_class_init,
172 .abstract = true,
175 static void ioapic_common_register_types(void)
177 type_register_static(&ioapic_common_type);
180 type_init(ioapic_common_register_types)