?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
usb-bot: hotplug support
[qemu/kevin.git] / hw / i386 / pc_piix.c
blob53bc968bd071e798381493d4f2d79cc5a9c9dcfe
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26
27 #include "hw/hw.h"
28 #include "hw/loader.h"
29 #include "hw/i386/pc.h"
30 #include "hw/i386/apic.h"
31 #include "hw/smbios/smbios.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_ids.h"
34 #include "hw/usb.h"
35 #include "net/net.h"
36 #include "hw/boards.h"
37 #include "hw/ide.h"
38 #include "sysemu/kvm.h"
39 #include "hw/kvm/clock.h"
40 #include "sysemu/sysemu.h"
41 #include "hw/sysbus.h"
42 #include "sysemu/arch_init.h"
43 #include "sysemu/block-backend.h"
44 #include "hw/i2c/smbus.h"
45 #include "hw/xen/xen.h"
46 #include "exec/memory.h"
47 #include "exec/address-spaces.h"
48 #include "hw/acpi/acpi.h"
49 #include "cpu.h"
50 #include "qemu/error-report.h"
51 #ifdef CONFIG_XEN
52 #include <xen/hvm/hvm_info_table.h>
53 #include "hw/xen/xen_pt.h"
54 #endif
55 #include "migration/migration.h"
56 #include "kvm_i386.h"
57
58 #define MAX_IDE_BUS 2
59
60 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
61 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
62 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
63
64 /* PC hardware initialisation */
65 static void pc_init1(MachineState *machine,
66 const char *host_type, const char *pci_type)
67 {
68 PCMachineState *pcms = PC_MACHINE(machine);
69 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
70 MemoryRegion *system_memory = get_system_memory();
71 MemoryRegion *system_io = get_system_io();
72 int i;
73 PCIBus *pci_bus;
74 ISABus *isa_bus;
75 PCII440FXState *i440fx_state;
76 int piix3_devfn = -1;
77 qemu_irq *gsi;
78 qemu_irq *i8259;
79 qemu_irq smi_irq;
80 GSIState *gsi_state;
81 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
82 BusState *idebus[MAX_IDE_BUS];
83 ISADevice *rtc_state;
84 MemoryRegion *ram_memory;
85 MemoryRegion *pci_memory;
86 MemoryRegion *rom_memory;
87 ram_addr_t lowmem;
88
89 /*
90 * Calculate ram split, for memory below and above 4G. It's a bit
91 * complicated for backward compatibility reasons ...
92 *
93 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
94 * default value for max_ram_below_4g now.
95 *
96 * - Then, to gigabyte align the memory, we move the split to 3G
97 * (lowmem = 0xc0000000). But only in case we have to split in
98 * the first place, i.e. ram_size is larger than (traditional)
99 * lowmem. And for new machine types (gigabyte_align = true)
100 * only, for live migration compatibility reasons.
101 *
102 * - Next the max-ram-below-4g option was added, which allowed to
103 * reduce lowmem to a smaller value, to allow a larger PCI I/O
104 * window below 4G. qemu doesn't enforce gigabyte alignment here,
105 * but prints a warning.
106 *
107 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
108 * so legacy non-PAE guests can get as much memory as possible in
109 * the 32bit address space below 4G.
110 *
111 * Examples:
112 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
113 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
114 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
115 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
116 */
117 lowmem = pcms->max_ram_below_4g;
118 if (machine->ram_size >= pcms->max_ram_below_4g) {
119 if (pcmc->gigabyte_align) {
120 if (lowmem > 0xc0000000) {
121 lowmem = 0xc0000000;
122 }
123 if (lowmem & ((1ULL << 30) - 1)) {
124 error_report("Warning: Large machine and max_ram_below_4g "
125 "(%" PRIu64 ") not a multiple of 1G; "
126 "possible bad performance.",
127 pcms->max_ram_below_4g);
128 }
129 }
130 }
131
132 if (machine->ram_size >= lowmem) {
133 pcms->above_4g_mem_size = machine->ram_size - lowmem;
134 pcms->below_4g_mem_size = lowmem;
135 } else {
136 pcms->above_4g_mem_size = 0;
137 pcms->below_4g_mem_size = machine->ram_size;
138 }
139
140 if (xen_enabled()) {
141 xen_hvm_init(pcms, &ram_memory);
142 }
143
144 pc_cpus_init(pcms);
145
146 if (kvm_enabled() && pcmc->kvmclock_enabled) {
147 kvmclock_create();
148 }
149
150 if (pcmc->pci_enabled) {
151 pci_memory = g_new(MemoryRegion, 1);
152 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
153 rom_memory = pci_memory;
154 } else {
155 pci_memory = NULL;
156 rom_memory = system_memory;
157 }
158
159 pc_guest_info_init(pcms);
160
161 if (pcmc->smbios_defaults) {
162 MachineClass *mc = MACHINE_GET_CLASS(machine);
163 /* These values are guest ABI, do not change */
164 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
165 mc->name, pcmc->smbios_legacy_mode,
166 pcmc->smbios_uuid_encoded,
167 SMBIOS_ENTRY_POINT_21);
168 }
169
170 /* allocate ram and load rom/bios */
171 if (!xen_enabled()) {
172 pc_memory_init(pcms, system_memory,
173 rom_memory, &ram_memory);
174 } else if (machine->kernel_filename != NULL) {
175 /* For xen HVM direct kernel boot, load linux here */
176 xen_load_linux(pcms);
177 }
178
179 gsi_state = g_malloc0(sizeof(*gsi_state));
180 if (kvm_ioapic_in_kernel()) {
181 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
182 gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
183 GSI_NUM_PINS);
184 } else {
185 gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
186 }
187
188 if (pcmc->pci_enabled) {
189 pci_bus = i440fx_init(host_type,
190 pci_type,
191 &i440fx_state, &piix3_devfn, &isa_bus, gsi,
192 system_memory, system_io, machine->ram_size,
193 pcms->below_4g_mem_size,
194 pcms->above_4g_mem_size,
195 pci_memory, ram_memory);
196 pcms->bus = pci_bus;
197 } else {
198 pci_bus = NULL;
199 i440fx_state = NULL;
200 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
201 &error_abort);
202 no_hpet = 1;
203 }
204 isa_bus_irqs(isa_bus, gsi);
205
206 if (kvm_pic_in_kernel()) {
207 i8259 = kvm_i8259_init(isa_bus);
208 } else if (xen_enabled()) {
209 i8259 = xen_interrupt_controller_init();
210 } else {
211 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
212 }
213
214 for (i = 0; i < ISA_NUM_IRQS; i++) {
215 gsi_state->i8259_irq[i] = i8259[i];
216 }
217 g_free(i8259);
218 if (pcmc->pci_enabled) {
219 ioapic_init_gsi(gsi_state, "i440fx");
220 }
221
222 pc_register_ferr_irq(gsi[13]);
223
224 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
225
226 assert(pcms->vmport != ON_OFF_AUTO__MAX);
227 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
228 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
229 }
230
231 /* init basic PC hardware */
232 pc_basic_device_init(isa_bus, gsi, &rtc_state, true,
233 (pcms->vmport != ON_OFF_AUTO_ON), 0x4);
234
235 pc_nic_init(isa_bus, pci_bus);
236
237 ide_drive_get(hd, ARRAY_SIZE(hd));
238 if (pcmc->pci_enabled) {
239 PCIDevice *dev;
240 if (xen_enabled()) {
241 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
242 } else {
243 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
244 }
245 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
246 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
247 } else {
248 for(i = 0; i < MAX_IDE_BUS; i++) {
249 ISADevice *dev;
250 char busname[] = "ide.0";
251 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
252 ide_irq[i],
253 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
254 /*
255 * The ide bus name is ide.0 for the first bus and ide.1 for the
256 * second one.
257 */
258 busname[4] = '0' + i;
259 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
260 }
261 }
262
263 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
264
265 if (pcmc->pci_enabled && machine_usb(machine)) {
266 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
267 }
268
269 if (pcmc->pci_enabled && acpi_enabled) {
270 DeviceState *piix4_pm;
271 I2CBus *smbus;
272
273 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
274 /* TODO: Populate SPD eeprom data. */
275 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
276 gsi[9], smi_irq,
277 pc_machine_is_smm_enabled(pcms),
278 &piix4_pm);
279 smbus_eeprom_init(smbus, 8, NULL, 0);
280
281 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
282 TYPE_HOTPLUG_HANDLER,
283 (Object **)&pcms->acpi_dev,
284 object_property_allow_set_link,
285 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
286 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
287 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
288 }
289
290 if (pcmc->pci_enabled) {
291 pc_pci_device_init(pci_bus);
292 }
293
294 if (pcms->acpi_nvdimm_state.is_enabled) {
295 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
296 pcms->fw_cfg, OBJECT(pcms));
297 }
298 }
299
300 /* Looking for a pc_compat_2_4() function? It doesn't exist.
301 * pc_compat_*() functions that run on machine-init time and
302 * change global QEMU state are deprecated. Please don't create
303 * one, and implement any pc-*-2.4 (and newer) compat code in
304 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
305 */
306
307 static void pc_compat_2_3(MachineState *machine)
308 {
309 PCMachineState *pcms = PC_MACHINE(machine);
310 savevm_skip_section_footers();
311 if (kvm_enabled()) {
312 pcms->smm = ON_OFF_AUTO_OFF;
313 }
314 global_state_set_optional();
315 savevm_skip_configuration();
316 }
317
318 static void pc_compat_2_2(MachineState *machine)
319 {
320 pc_compat_2_3(machine);
321 machine->suppress_vmdesc = true;
322 }
323
324 static void pc_compat_2_1(MachineState *machine)
325 {
326 pc_compat_2_2(machine);
327 x86_cpu_change_kvm_default("svm", NULL);
328 }
329
330 static void pc_compat_2_0(MachineState *machine)
331 {
332 pc_compat_2_1(machine);
333 }
334
335 static void pc_compat_1_7(MachineState *machine)
336 {
337 pc_compat_2_0(machine);
338 x86_cpu_change_kvm_default("x2apic", NULL);
339 }
340
341 static void pc_compat_1_6(MachineState *machine)
342 {
343 pc_compat_1_7(machine);
344 }
345
346 static void pc_compat_1_5(MachineState *machine)
347 {
348 pc_compat_1_6(machine);
349 }
350
351 static void pc_compat_1_4(MachineState *machine)
352 {
353 pc_compat_1_5(machine);
354 }
355
356 static void pc_compat_1_3(MachineState *machine)
357 {
358 pc_compat_1_4(machine);
359 enable_compat_apic_id_mode();
360 }
361
362 /* PC compat function for pc-0.14 to pc-1.2 */
363 static void pc_compat_1_2(MachineState *machine)
364 {
365 pc_compat_1_3(machine);
366 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
367 }
368
369 /* PC compat function for pc-0.10 to pc-0.13 */
370 static void pc_compat_0_13(MachineState *machine)
371 {
372 pc_compat_1_2(machine);
373 }
374
375 static void pc_init_isa(MachineState *machine)
376 {
377 if (!machine->cpu_model) {
378 machine->cpu_model = "486";
379 }
380 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
381 enable_compat_apic_id_mode();
382 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
383 }
384
385 #ifdef CONFIG_XEN
386 static void pc_xen_hvm_init_pci(MachineState *machine)
387 {
388 const char *pci_type = has_igd_gfx_passthru ?
389 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
390
391 pc_init1(machine,
392 TYPE_I440FX_PCI_HOST_BRIDGE,
393 pci_type);
394 }
395
396 static void pc_xen_hvm_init(MachineState *machine)
397 {
398 PCIBus *bus;
399
400 if (!xen_enabled()) {
401 error_report("xenfv machine requires the xen accelerator");
402 exit(1);
403 }
404
405 pc_xen_hvm_init_pci(machine);
406
407 bus = pci_find_primary_bus();
408 if (bus != NULL) {
409 pci_create_simple(bus, -1, "xen-platform");
410 }
411 }
412 #endif
413
414 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
415 static void pc_init_##suffix(MachineState *machine) \
416 { \
417 void (*compat)(MachineState *m) = (compatfn); \
418 if (compat) { \
419 compat(machine); \
420 } \
421 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
422 TYPE_I440FX_PCI_DEVICE); \
423 } \
424 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
425
426 static void pc_i440fx_machine_options(MachineClass *m)
427 {
428 m->family = "pc_piix";
429 m->desc = "Standard PC (i440FX + PIIX, 1996)";
430 m->hot_add_cpu = pc_hot_add_cpu;
431 m->default_machine_opts = "firmware=bios-256k.bin";
432 m->default_display = "std";
433 }
434
435 static void pc_i440fx_2_7_machine_options(MachineClass *m)
436 {
437 pc_i440fx_machine_options(m);
438 m->alias = "pc";
439 m->is_default = 1;
440 }
441
442 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
443 pc_i440fx_2_7_machine_options);
444
445
446 static void pc_i440fx_2_6_machine_options(MachineClass *m)
447 {
448 pc_i440fx_2_7_machine_options(m);
449 m->is_default = 0;
450 m->alias = NULL;
451 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
452 }
453
454 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
455 pc_i440fx_2_6_machine_options);
456
457
458 static void pc_i440fx_2_5_machine_options(MachineClass *m)
459 {
460 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
461 pc_i440fx_2_6_machine_options(m);
462 pcmc->save_tsc_khz = false;
463 m->legacy_fw_cfg_order = 1;
464 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
465 }
466
467 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
468 pc_i440fx_2_5_machine_options);
469
470
471 static void pc_i440fx_2_4_machine_options(MachineClass *m)
472 {
473 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
474 pc_i440fx_2_5_machine_options(m);
475 m->hw_version = "2.4.0";
476 pcmc->broken_reserved_end = true;
477 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
478 }
479
480 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
481 pc_i440fx_2_4_machine_options)
482
483
484 static void pc_i440fx_2_3_machine_options(MachineClass *m)
485 {
486 pc_i440fx_2_4_machine_options(m);
487 m->hw_version = "2.3.0";
488 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
489 }
490
491 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3,
492 pc_i440fx_2_3_machine_options);
493
494
495 static void pc_i440fx_2_2_machine_options(MachineClass *m)
496 {
497 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
498 pc_i440fx_2_3_machine_options(m);
499 m->hw_version = "2.2.0";
500 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
501 pcmc->rsdp_in_ram = false;
502 }
503
504 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2,
505 pc_i440fx_2_2_machine_options);
506
507
508 static void pc_i440fx_2_1_machine_options(MachineClass *m)
509 {
510 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
511 pc_i440fx_2_2_machine_options(m);
512 m->hw_version = "2.1.0";
513 m->default_display = NULL;
514 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
515 pcmc->smbios_uuid_encoded = false;
516 pcmc->enforce_aligned_dimm = false;
517 }
518
519 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1,
520 pc_i440fx_2_1_machine_options);
521
522
523
524 static void pc_i440fx_2_0_machine_options(MachineClass *m)
525 {
526 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
527 pc_i440fx_2_1_machine_options(m);
528 m->hw_version = "2.0.0";
529 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
530 pcmc->smbios_legacy_mode = true;
531 pcmc->has_reserved_memory = false;
532 /* This value depends on the actual DSDT and SSDT compiled into
533 * the source QEMU; unfortunately it depends on the binary and
534 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
535 * both QEMU 1.7 and QEMU 2.0.
536 *
537 * Large variations cause migration to fail for more than one
538 * consecutive value of the "-smp" maxcpus option.
539 *
540 * For small variations of the kind caused by different iasl versions,
541 * the 4k rounding usually leaves slack. However, there could be still
542 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
543 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
544 *
545 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
546 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
547 */
548 pcmc->legacy_acpi_table_size = 6652;
549 pcmc->acpi_data_size = 0x10000;
550 }
551
552 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0,
553 pc_i440fx_2_0_machine_options);
554
555
556 static void pc_i440fx_1_7_machine_options(MachineClass *m)
557 {
558 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
559 pc_i440fx_2_0_machine_options(m);
560 m->hw_version = "1.7.0";
561 m->default_machine_opts = NULL;
562 m->option_rom_has_mr = true;
563 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
564 pcmc->smbios_defaults = false;
565 pcmc->gigabyte_align = false;
566 pcmc->legacy_acpi_table_size = 6414;
567 }
568
569 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7,
570 pc_i440fx_1_7_machine_options);
571
572
573 static void pc_i440fx_1_6_machine_options(MachineClass *m)
574 {
575 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
576 pc_i440fx_1_7_machine_options(m);
577 m->hw_version = "1.6.0";
578 m->rom_file_has_mr = false;
579 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
580 pcmc->has_acpi_build = false;
581 }
582
583 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6,
584 pc_i440fx_1_6_machine_options);
585
586
587 static void pc_i440fx_1_5_machine_options(MachineClass *m)
588 {
589 pc_i440fx_1_6_machine_options(m);
590 m->hw_version = "1.5.0";
591 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
592 }
593
594 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5,
595 pc_i440fx_1_5_machine_options);
596
597
598 static void pc_i440fx_1_4_machine_options(MachineClass *m)
599 {
600 pc_i440fx_1_5_machine_options(m);
601 m->hw_version = "1.4.0";
602 m->hot_add_cpu = NULL;
603 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
604 }
605
606 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4,
607 pc_i440fx_1_4_machine_options);
608
609
610 #define PC_COMPAT_1_3 \
611 PC_CPU_MODEL_IDS("1.3.0") \
612 {\
613 .driver = "usb-tablet",\
614 .property = "usb_version",\
615 .value = stringify(1),\
616 },{\
617 .driver = "virtio-net-pci",\
618 .property = "ctrl_mac_addr",\
619 .value = "off", \
620 },{ \
621 .driver = "virtio-net-pci", \
622 .property = "mq", \
623 .value = "off", \
624 }, {\
625 .driver = "e1000",\
626 .property = "autonegotiation",\
627 .value = "off",\
628 },
629
630
631 static void pc_i440fx_1_3_machine_options(MachineClass *m)
632 {
633 pc_i440fx_1_4_machine_options(m);
634 m->hw_version = "1.3.0";
635 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3);
636 }
637
638 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
639 pc_i440fx_1_3_machine_options);
640
641
642 #define PC_COMPAT_1_2 \
643 PC_CPU_MODEL_IDS("1.2.0") \
644 {\
645 .driver = "nec-usb-xhci",\
646 .property = "msi",\
647 .value = "off",\
648 },{\
649 .driver = "nec-usb-xhci",\
650 .property = "msix",\
651 .value = "off",\
652 },{\
653 .driver = "ivshmem",\
654 .property = "use64",\
655 .value = "0",\
656 },{\
657 .driver = "qxl",\
658 .property = "revision",\
659 .value = stringify(3),\
660 },{\
661 .driver = "qxl-vga",\
662 .property = "revision",\
663 .value = stringify(3),\
664 },{\
665 .driver = "VGA",\
666 .property = "mmio",\
667 .value = "off",\
668 },
669
670 static void pc_i440fx_1_2_machine_options(MachineClass *m)
671 {
672 pc_i440fx_1_3_machine_options(m);
673 m->hw_version = "1.2.0";
674 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2);
675 }
676
677 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
678 pc_i440fx_1_2_machine_options);
679
680
681 #define PC_COMPAT_1_1 \
682 PC_CPU_MODEL_IDS("1.1.0") \
683 {\
684 .driver = "virtio-scsi-pci",\
685 .property = "hotplug",\
686 .value = "off",\
687 },{\
688 .driver = "virtio-scsi-pci",\
689 .property = "param_change",\
690 .value = "off",\
691 },{\
692 .driver = "VGA",\
693 .property = "vgamem_mb",\
694 .value = stringify(8),\
695 },{\
696 .driver = "vmware-svga",\
697 .property = "vgamem_mb",\
698 .value = stringify(8),\
699 },{\
700 .driver = "qxl-vga",\
701 .property = "vgamem_mb",\
702 .value = stringify(8),\
703 },{\
704 .driver = "qxl",\
705 .property = "vgamem_mb",\
706 .value = stringify(8),\
707 },{\
708 .driver = "virtio-blk-pci",\
709 .property = "config-wce",\
710 .value = "off",\
711 },
712
713 static void pc_i440fx_1_1_machine_options(MachineClass *m)
714 {
715 pc_i440fx_1_2_machine_options(m);
716 m->hw_version = "1.1.0";
717 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1);
718 }
719
720 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
721 pc_i440fx_1_1_machine_options);
722
723
724 #define PC_COMPAT_1_0 \
725 PC_CPU_MODEL_IDS("1.0") \
726 {\
727 .driver = TYPE_ISA_FDC,\
728 .property = "check_media_rate",\
729 .value = "off",\
730 }, {\
731 .driver = "virtio-balloon-pci",\
732 .property = "class",\
733 .value = stringify(PCI_CLASS_MEMORY_RAM),\
734 },{\
735 .driver = "apic-common",\
736 .property = "vapic",\
737 .value = "off",\
738 },{\
739 .driver = TYPE_USB_DEVICE,\
740 .property = "full-path",\
741 .value = "no",\
742 },
743
744 static void pc_i440fx_1_0_machine_options(MachineClass *m)
745 {
746 pc_i440fx_1_1_machine_options(m);
747 m->hw_version = "1.0";
748 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0);
749 }
750
751 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
752 pc_i440fx_1_0_machine_options);
753
754
755 #define PC_COMPAT_0_15 \
756 PC_CPU_MODEL_IDS("0.15")
757
758 static void pc_i440fx_0_15_machine_options(MachineClass *m)
759 {
760 pc_i440fx_1_0_machine_options(m);
761 m->hw_version = "0.15";
762 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15);
763 }
764
765 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
766 pc_i440fx_0_15_machine_options);
767
768
769 #define PC_COMPAT_0_14 \
770 PC_CPU_MODEL_IDS("0.14") \
771 {\
772 .driver = "virtio-blk-pci",\
773 .property = "event_idx",\
774 .value = "off",\
775 },{\
776 .driver = "virtio-serial-pci",\
777 .property = "event_idx",\
778 .value = "off",\
779 },{\
780 .driver = "virtio-net-pci",\
781 .property = "event_idx",\
782 .value = "off",\
783 },{\
784 .driver = "virtio-balloon-pci",\
785 .property = "event_idx",\
786 .value = "off",\
787 },{\
788 .driver = "qxl",\
789 .property = "revision",\
790 .value = stringify(2),\
791 },{\
792 .driver = "qxl-vga",\
793 .property = "revision",\
794 .value = stringify(2),\
795 },
796
797 static void pc_i440fx_0_14_machine_options(MachineClass *m)
798 {
799 pc_i440fx_0_15_machine_options(m);
800 m->hw_version = "0.14";
801 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14);
802 }
803
804 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
805 pc_i440fx_0_14_machine_options);
806
807
808 #define PC_COMPAT_0_13 \
809 PC_CPU_MODEL_IDS("0.13") \
810 {\
811 .driver = TYPE_PCI_DEVICE,\
812 .property = "command_serr_enable",\
813 .value = "off",\
814 },{\
815 .driver = "AC97",\
816 .property = "use_broken_id",\
817 .value = stringify(1),\
818 },{\
819 .driver = "virtio-9p-pci",\
820 .property = "vectors",\
821 .value = stringify(0),\
822 },{\
823 .driver = "VGA",\
824 .property = "rombar",\
825 .value = stringify(0),\
826 },{\
827 .driver = "vmware-svga",\
828 .property = "rombar",\
829 .value = stringify(0),\
830 },
831
832 static void pc_i440fx_0_13_machine_options(MachineClass *m)
833 {
834 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
835 pc_i440fx_0_14_machine_options(m);
836 m->hw_version = "0.13";
837 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13);
838 pcmc->kvmclock_enabled = false;
839 }
840
841 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
842 pc_i440fx_0_13_machine_options);
843
844
845 #define PC_COMPAT_0_12 \
846 PC_CPU_MODEL_IDS("0.12") \
847 {\
848 .driver = "virtio-serial-pci",\
849 .property = "max_ports",\
850 .value = stringify(1),\
851 },{\
852 .driver = "virtio-serial-pci",\
853 .property = "vectors",\
854 .value = stringify(0),\
855 },{\
856 .driver = "usb-mouse",\
857 .property = "serial",\
858 .value = "1",\
859 },{\
860 .driver = "usb-tablet",\
861 .property = "serial",\
862 .value = "1",\
863 },{\
864 .driver = "usb-kbd",\
865 .property = "serial",\
866 .value = "1",\
867 },
868
869 static void pc_i440fx_0_12_machine_options(MachineClass *m)
870 {
871 pc_i440fx_0_13_machine_options(m);
872 m->hw_version = "0.12";
873 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12);
874 }
875
876 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
877 pc_i440fx_0_12_machine_options);
878
879
880 #define PC_COMPAT_0_11 \
881 PC_CPU_MODEL_IDS("0.11") \
882 {\
883 .driver = "virtio-blk-pci",\
884 .property = "vectors",\
885 .value = stringify(0),\
886 },{\
887 .driver = TYPE_PCI_DEVICE,\
888 .property = "rombar",\
889 .value = stringify(0),\
890 },{\
891 .driver = "ide-drive",\
892 .property = "ver",\
893 .value = "0.11",\
894 },{\
895 .driver = "scsi-disk",\
896 .property = "ver",\
897 .value = "0.11",\
898 },
899
900 static void pc_i440fx_0_11_machine_options(MachineClass *m)
901 {
902 pc_i440fx_0_12_machine_options(m);
903 m->hw_version = "0.11";
904 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11);
905 }
906
907 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13,
908 pc_i440fx_0_11_machine_options);
909
910
911 #define PC_COMPAT_0_10 \
912 PC_CPU_MODEL_IDS("0.10") \
913 {\
914 .driver = "virtio-blk-pci",\
915 .property = "class",\
916 .value = stringify(PCI_CLASS_STORAGE_OTHER),\
917 },{\
918 .driver = "virtio-serial-pci",\
919 .property = "class",\
920 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\
921 },{\
922 .driver = "virtio-net-pci",\
923 .property = "vectors",\
924 .value = stringify(0),\
925 },{\
926 .driver = "ide-drive",\
927 .property = "ver",\
928 .value = "0.10",\
929 },{\
930 .driver = "scsi-disk",\
931 .property = "ver",\
932 .value = "0.10",\
933 },
934
935 static void pc_i440fx_0_10_machine_options(MachineClass *m)
936 {
937 pc_i440fx_0_11_machine_options(m);
938 m->hw_version = "0.10";
939 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10);
940 }
941
942 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13,
943 pc_i440fx_0_10_machine_options);
944
945 typedef struct {
946 uint16_t gpu_device_id;
947 uint16_t pch_device_id;
948 uint8_t pch_revision_id;
949 } IGDDeviceIDInfo;
950
951 /* In real world different GPU should have different PCH. But actually
952 * the different PCH DIDs likely map to different PCH SKUs. We do the
953 * same thing for the GPU. For PCH, the different SKUs are going to be
954 * all the same silicon design and implementation, just different
955 * features turn on and off with fuses. The SW interfaces should be
956 * consistent across all SKUs in a given family (eg LPT). But just same
957 * features may not be supported.
958 *
959 * Most of these different PCH features probably don't matter to the
960 * Gfx driver, but obviously any difference in display port connections
961 * will so it should be fine with any PCH in case of passthrough.
962 *
963 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
964 * scenarios, 0x9cc3 for BDW(Broadwell).
965 */
966 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
967 /* HSW Classic */
968 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
969 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
970 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
971 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
972 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
973 /* HSW ULT */
974 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
975 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
976 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
977 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
978 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
979 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
980 /* HSW CRW */
981 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
982 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
983 /* HSW Server */
984 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
985 /* HSW SRVR */
986 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
987 /* BSW */
988 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
989 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
990 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
991 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
992 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
993 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
994 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
995 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
996 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
997 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
998 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
999 };
1000
1001 static void isa_bridge_class_init(ObjectClass *klass, void *data)
1002 {
1003 DeviceClass *dc = DEVICE_CLASS(klass);
1004 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1005
1006 dc->desc = "ISA bridge faked to support IGD PT";
1007 k->vendor_id = PCI_VENDOR_ID_INTEL;
1008 k->class_id = PCI_CLASS_BRIDGE_ISA;
1009 };
1010
1011 static TypeInfo isa_bridge_info = {
1012 .name = "igd-passthrough-isa-bridge",
1013 .parent = TYPE_PCI_DEVICE,
1014 .instance_size = sizeof(PCIDevice),
1015 .class_init = isa_bridge_class_init,
1016 };
1017
1018 static void pt_graphics_register_types(void)
1019 {
1020 type_register_static(&isa_bridge_info);
1021 }
1022 type_init(pt_graphics_register_types)
1023
1024 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
1025 {
1026 struct PCIDevice *bridge_dev;
1027 int i, num;
1028 uint16_t pch_dev_id = 0xffff;
1029 uint8_t pch_rev_id;
1030
1031 num = ARRAY_SIZE(igd_combo_id_infos);
1032 for (i = 0; i < num; i++) {
1033 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
1034 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
1035 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
1036 }
1037 }
1038
1039 if (pch_dev_id == 0xffff) {
1040 return;
1041 }
1042
1043 /* Currently IGD drivers always need to access PCH by 1f.0. */
1044 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
1045 "igd-passthrough-isa-bridge");
1046
1047 /*
1048 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
1049 */
1050 if (!bridge_dev) {
1051 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
1052 return;
1053 }
1054 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
1055 pci_config_set_revision(bridge_dev->config, pch_rev_id);
1056 }
1057
1058 static void isapc_machine_options(MachineClass *m)
1059 {
1060 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
1061 m->desc = "ISA-only PC";
1062 m->max_cpus = 1;
1063 m->option_rom_has_mr = true;
1064 m->rom_file_has_mr = false;
1065 pcmc->pci_enabled = false;
1066 pcmc->has_acpi_build = false;
1067 pcmc->smbios_defaults = false;
1068 pcmc->gigabyte_align = false;
1069 pcmc->smbios_legacy_mode = true;
1070 pcmc->has_reserved_memory = false;
1071 }
1072
1073 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
1074 isapc_machine_options);
1075
1076
1077 #ifdef CONFIG_XEN
1078 static void xenfv_machine_options(MachineClass *m)
1079 {
1080 m->desc = "Xen Fully-virtualized PC";
1081 m->max_cpus = HVM_MAX_VCPUS;
1082 m->default_machine_opts = "accel=xen";
1083 m->hot_add_cpu = pc_hot_add_cpu;
1084 }
1085
1086 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
1087 xenfv_machine_options);
1088 #endif
Random patches