hw/i386/microvm.c

   1 /*
   2  * Copyright (c) 2018 Intel Corporation
   3  * Copyright (c) 2019 Red Hat, Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2 or later, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "qemu/osdep.h"
  19 #include "qemu/error-report.h"
  20 #include "qemu/cutils.h"
  21 #include "qemu/units.h"
  22 #include "qapi/error.h"
  23 #include "qapi/visitor.h"
  24 #include "qapi/qapi-visit-common.h"
  25 #include "sysemu/sysemu.h"
  26 #include "sysemu/cpus.h"
  27 #include "sysemu/numa.h"
  28 #include "sysemu/reset.h"
  29 #include "sysemu/runstate.h"
  30 #include "acpi-microvm.h"
  31 #include "microvm-dt.h"
  32
  33 #include "hw/loader.h"
  34 #include "hw/irq.h"
  35 #include "hw/i386/kvm/clock.h"
  36 #include "hw/i386/microvm.h"
  37 #include "hw/i386/x86.h"
  38 #include "target/i386/cpu.h"
  39 #include "hw/intc/i8259.h"
  40 #include "hw/timer/i8254.h"
  41 #include "hw/rtc/mc146818rtc.h"
  42 #include "hw/char/serial.h"
  43 #include "hw/display/ramfb.h"
  44 #include "hw/i386/topology.h"
  45 #include "hw/i386/e820_memory_layout.h"
  46 #include "hw/i386/fw_cfg.h"
  47 #include "hw/virtio/virtio-mmio.h"
  48 #include "hw/acpi/acpi.h"
  49 #include "hw/acpi/generic_event_device.h"
  50 #include "hw/pci-host/gpex.h"
  51 #include "hw/usb/xhci.h"
  52
  53 #include "elf.h"
  54 #include "kvm/kvm_i386.h"
  55 #include "hw/xen/start_info.h"
  56
  57 #define MICROVM_QBOOT_FILENAME "qboot.rom"
  58 #define MICROVM_BIOS_FILENAME  "bios-microvm.bin"
  59
  60 static void microvm_set_rtc(MicrovmMachineState *mms, MC146818RtcState *s)
  61 {
  62     X86MachineState *x86ms = X86_MACHINE(mms);
  63     int val;
  64
  65     val = MIN(x86ms->below_4g_mem_size / KiB, 640);
  66     mc146818rtc_set_cmos_data(s, 0x15, val);
  67     mc146818rtc_set_cmos_data(s, 0x16, val >> 8);
  68     /* extended memory (next 64MiB) */
  69     if (x86ms->below_4g_mem_size > 1 * MiB) {
  70         val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
  71     } else {
  72         val = 0;
  73     }
  74     if (val > 65535) {
  75         val = 65535;
  76     }
  77     mc146818rtc_set_cmos_data(s, 0x17, val);
  78     mc146818rtc_set_cmos_data(s, 0x18, val >> 8);
  79     mc146818rtc_set_cmos_data(s, 0x30, val);
  80     mc146818rtc_set_cmos_data(s, 0x31, val >> 8);
  81     /* memory between 16MiB and 4GiB */
  82     if (x86ms->below_4g_mem_size > 16 * MiB) {
  83         val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
  84     } else {
  85         val = 0;
  86     }
  87     if (val > 65535) {
  88         val = 65535;
  89     }
  90     mc146818rtc_set_cmos_data(s, 0x34, val);
  91     mc146818rtc_set_cmos_data(s, 0x35, val >> 8);
  92     /* memory above 4GiB */
  93     val = x86ms->above_4g_mem_size / 65536;
  94     mc146818rtc_set_cmos_data(s, 0x5b, val);
  95     mc146818rtc_set_cmos_data(s, 0x5c, val >> 8);
  96     mc146818rtc_set_cmos_data(s, 0x5d, val >> 16);
  97 }
  98
  99 static void create_gpex(MicrovmMachineState *mms)
 100 {
 101     X86MachineState *x86ms = X86_MACHINE(mms);
 102     MemoryRegion *mmio32_alias;
 103     MemoryRegion *mmio64_alias;
 104     MemoryRegion *mmio_reg;
 105     MemoryRegion *ecam_alias;
 106     MemoryRegion *ecam_reg;
 107     DeviceState *dev;
 108     int i;
 109
 110     dev = qdev_new(TYPE_GPEX_HOST);
 111     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 112
 113     /* Map only the first size_ecam bytes of ECAM space */
 114     ecam_alias = g_new0(MemoryRegion, 1);
 115     ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
 116     memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
 117                              ecam_reg, 0, mms->gpex.ecam.size);
 118     memory_region_add_subregion(get_system_memory(),
 119                                 mms->gpex.ecam.base, ecam_alias);
 120
 121     /* Map the MMIO window into system address space so as to expose
 122      * the section of PCI MMIO space which starts at the same base address
 123      * (ie 1:1 mapping for that part of PCI MMIO space visible through
 124      * the window).
 125      */
 126     mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
 127     if (mms->gpex.mmio32.size) {
 128         mmio32_alias = g_new0(MemoryRegion, 1);
 129         memory_region_init_alias(mmio32_alias, OBJECT(dev), "pcie-mmio32", mmio_reg,
 130                                  mms->gpex.mmio32.base, mms->gpex.mmio32.size);
 131         memory_region_add_subregion(get_system_memory(),
 132                                     mms->gpex.mmio32.base, mmio32_alias);
 133     }
 134     if (mms->gpex.mmio64.size) {
 135         mmio64_alias = g_new0(MemoryRegion, 1);
 136         memory_region_init_alias(mmio64_alias, OBJECT(dev), "pcie-mmio64", mmio_reg,
 137                                  mms->gpex.mmio64.base, mms->gpex.mmio64.size);
 138         memory_region_add_subregion(get_system_memory(),
 139                                     mms->gpex.mmio64.base, mmio64_alias);
 140     }
 141
 142     for (i = 0; i < GPEX_NUM_IRQS; i++) {
 143         sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
 144                            x86ms->gsi[mms->gpex.irq + i]);
 145     }
 146 }
 147
 148 static int microvm_ioapics(MicrovmMachineState *mms)
 149 {
 150     if (!x86_machine_is_acpi_enabled(X86_MACHINE(mms))) {
 151         return 1;
 152     }
 153     if (mms->ioapic2 == ON_OFF_AUTO_OFF) {
 154         return 1;
 155     }
 156     return 2;
 157 }
 158
 159 static void microvm_devices_init(MicrovmMachineState *mms)
 160 {
 161     const char *default_firmware;
 162     X86MachineState *x86ms = X86_MACHINE(mms);
 163     ISABus *isa_bus;
 164     GSIState *gsi_state;
 165     int ioapics;
 166     int i;
 167
 168     /* Core components */
 169     ioapics = microvm_ioapics(mms);
 170     gsi_state = g_malloc0(sizeof(*gsi_state));
 171     x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state,
 172                                     IOAPIC_NUM_PINS * ioapics);
 173
 174     isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(),
 175                           &error_abort);
 176     isa_bus_register_input_irqs(isa_bus, x86ms->gsi);
 177
 178     ioapic_init_gsi(gsi_state, OBJECT(mms));
 179     if (ioapics > 1) {
 180         x86ms->ioapic2 = ioapic_init_secondary(gsi_state);
 181     }
 182
 183     if (kvm_enabled()) {
 184         kvmclock_create(true);
 185     }
 186
 187     mms->virtio_irq_base = 5;
 188     mms->virtio_num_transports = 8;
 189     if (x86ms->ioapic2) {
 190         mms->pcie_irq_base = 16;    /* 16 -> 19 */
 191         /* use second ioapic (24 -> 47) for virtio-mmio irq lines */
 192         mms->virtio_irq_base = IO_APIC_SECONDARY_IRQBASE;
 193         mms->virtio_num_transports = IOAPIC_NUM_PINS;
 194     } else if (x86_machine_is_acpi_enabled(x86ms)) {
 195         mms->pcie_irq_base = 12;    /* 12 -> 15 */
 196         mms->virtio_irq_base = 16;  /* 16 -> 23 */
 197     }
 198
 199     for (i = 0; i < mms->virtio_num_transports; i++) {
 200         sysbus_create_simple("virtio-mmio",
 201                              VIRTIO_MMIO_BASE + i * 512,
 202                              x86ms->gsi[mms->virtio_irq_base + i]);
 203     }
 204
 205     /* Optional and legacy devices */
 206     if (x86_machine_is_acpi_enabled(x86ms)) {
 207         DeviceState *dev = qdev_new(TYPE_ACPI_GED);
 208         qdev_prop_set_uint32(dev, "ged-event", ACPI_GED_PWR_DOWN_EVT);
 209         sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
 210         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, GED_MMIO_BASE);
 211         /* sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, GED_MMIO_BASE_MEMHP); */
 212         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, GED_MMIO_BASE_REGS);
 213         sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
 214                            x86ms->gsi[GED_MMIO_IRQ]);
 215         x86ms->acpi_dev = HOTPLUG_HANDLER(dev);
 216     }
 217
 218     if (x86_machine_is_acpi_enabled(x86ms) && machine_usb(MACHINE(mms))) {
 219         DeviceState *dev = qdev_new(TYPE_XHCI_SYSBUS);
 220         qdev_prop_set_uint32(dev, "intrs", 1);
 221         qdev_prop_set_uint32(dev, "slots", XHCI_MAXSLOTS);
 222         qdev_prop_set_uint32(dev, "p2", 8);
 223         qdev_prop_set_uint32(dev, "p3", 8);
 224         sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
 225         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MICROVM_XHCI_BASE);
 226         sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
 227                            x86ms->gsi[MICROVM_XHCI_IRQ]);
 228     }
 229
 230     if (x86_machine_is_acpi_enabled(x86ms) && mms->pcie == ON_OFF_AUTO_ON) {
 231         /* use topmost 25% of the address space available */
 232         hwaddr phys_size = (hwaddr)1 << X86_CPU(first_cpu)->phys_bits;
 233         if (phys_size > 0x1000000ll) {
 234             mms->gpex.mmio64.size = phys_size / 4;
 235             mms->gpex.mmio64.base = phys_size - mms->gpex.mmio64.size;
 236         }
 237         mms->gpex.mmio32.base = PCIE_MMIO_BASE;
 238         mms->gpex.mmio32.size = PCIE_MMIO_SIZE;
 239         mms->gpex.ecam.base   = PCIE_ECAM_BASE;
 240         mms->gpex.ecam.size   = PCIE_ECAM_SIZE;
 241         mms->gpex.irq         = mms->pcie_irq_base;
 242         create_gpex(mms);
 243         x86ms->pci_irq_mask = ((1 << (mms->pcie_irq_base + 0)) |
 244                                (1 << (mms->pcie_irq_base + 1)) |
 245                                (1 << (mms->pcie_irq_base + 2)) |
 246                                (1 << (mms->pcie_irq_base + 3)));
 247     } else {
 248         x86ms->pci_irq_mask = 0;
 249     }
 250
 251     if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
 252         qemu_irq *i8259;
 253
 254         i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq());
 255         for (i = 0; i < ISA_NUM_IRQS; i++) {
 256             gsi_state->i8259_irq[i] = i8259[i];
 257         }
 258         g_free(i8259);
 259     }
 260
 261     if (x86ms->pit == ON_OFF_AUTO_ON || x86ms->pit == ON_OFF_AUTO_AUTO) {
 262         if (kvm_pit_in_kernel()) {
 263             kvm_pit_init(isa_bus, 0x40);
 264         } else {
 265             i8254_pit_init(isa_bus, 0x40, 0, NULL);
 266         }
 267     }
 268
 269     if (mms->rtc == ON_OFF_AUTO_ON ||
 270         (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) {
 271         microvm_set_rtc(mms, mc146818_rtc_init(isa_bus, 2000, NULL));
 272     }
 273
 274     if (mms->isa_serial) {
 275         serial_hds_isa_init(isa_bus, 0, 1);
 276     }
 277
 278     default_firmware = x86_machine_is_acpi_enabled(x86ms)
 279             ? MICROVM_BIOS_FILENAME
 280             : MICROVM_QBOOT_FILENAME;
 281     x86_bios_rom_init(x86ms, default_firmware, get_system_memory(), true);
 282 }
 283
 284 static void microvm_memory_init(MicrovmMachineState *mms)
 285 {
 286     MachineState *machine = MACHINE(mms);
 287     X86MachineState *x86ms = X86_MACHINE(mms);
 288     MemoryRegion *ram_below_4g, *ram_above_4g;
 289     MemoryRegion *system_memory = get_system_memory();
 290     FWCfgState *fw_cfg;
 291     ram_addr_t lowmem = 0xc0000000; /* 3G */
 292     int i;
 293
 294     if (machine->ram_size > lowmem) {
 295         x86ms->above_4g_mem_size = machine->ram_size - lowmem;
 296         x86ms->below_4g_mem_size = lowmem;
 297     } else {
 298         x86ms->above_4g_mem_size = 0;
 299         x86ms->below_4g_mem_size = machine->ram_size;
 300     }
 301
 302     ram_below_4g = g_malloc(sizeof(*ram_below_4g));
 303     memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram,
 304                              0, x86ms->below_4g_mem_size);
 305     memory_region_add_subregion(system_memory, 0, ram_below_4g);
 306
 307     e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM);
 308
 309     if (x86ms->above_4g_mem_size > 0) {
 310         ram_above_4g = g_malloc(sizeof(*ram_above_4g));
 311         memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g",
 312                                  machine->ram,
 313                                  x86ms->below_4g_mem_size,
 314                                  x86ms->above_4g_mem_size);
 315         memory_region_add_subregion(system_memory, 0x100000000ULL,
 316                                     ram_above_4g);
 317         e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
 318     }
 319
 320     fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
 321                                 &address_space_memory);
 322
 323     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus);
 324     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus);
 325     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
 326     fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1);
 327     fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
 328                     sizeof(struct e820_entry) * e820_get_num_entries());
 329
 330     rom_set_fw(fw_cfg);
 331
 332     if (machine->kernel_filename != NULL) {
 333         x86_load_linux(x86ms, fw_cfg, 0, true);
 334     }
 335
 336     if (mms->option_roms) {
 337         for (i = 0; i < nb_option_roms; i++) {
 338             rom_add_option(option_rom[i].name, option_rom[i].bootindex);
 339         }
 340     }
 341
 342     x86ms->fw_cfg = fw_cfg;
 343     x86ms->ioapic_as = &address_space_memory;
 344 }
 345
 346 static gchar *microvm_get_mmio_cmdline(gchar *name, uint32_t virtio_irq_base)
 347 {
 348     gchar *cmdline;
 349     gchar *separator;
 350     long int index;
 351     int ret;
 352
 353     separator = g_strrstr(name, ".");
 354     if (!separator) {
 355         return NULL;
 356     }
 357
 358     if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) {
 359         return NULL;
 360     }
 361
 362     cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN);
 363     ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN,
 364                      " virtio_mmio.device=512@0x%lx:%ld",
 365                      VIRTIO_MMIO_BASE + index * 512,
 366                      virtio_irq_base + index);
 367     if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) {
 368         g_free(cmdline);
 369         return NULL;
 370     }
 371
 372     return cmdline;
 373 }
 374
 375 static void microvm_fix_kernel_cmdline(MachineState *machine)
 376 {
 377     X86MachineState *x86ms = X86_MACHINE(machine);
 378     MicrovmMachineState *mms = MICROVM_MACHINE(machine);
 379     BusState *bus;
 380     BusChild *kid;
 381     char *cmdline;
 382
 383     /*
 384      * Find MMIO transports with attached devices, and add them to the kernel
 385      * command line.
 386      *
 387      * Yes, this is a hack, but one that heavily improves the UX without
 388      * introducing any significant issues.
 389      */
 390     cmdline = g_strdup(machine->kernel_cmdline);
 391     bus = sysbus_get_default();
 392     QTAILQ_FOREACH(kid, &bus->children, sibling) {
 393         DeviceState *dev = kid->child;
 394
 395         if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MMIO)) {
 396             VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev));
 397             VirtioBusState *mmio_virtio_bus = &mmio->bus;
 398             BusState *mmio_bus = &mmio_virtio_bus->parent_obj;
 399
 400             if (!QTAILQ_EMPTY(&mmio_bus->children)) {
 401                 gchar *mmio_cmdline = microvm_get_mmio_cmdline
 402                     (mmio_bus->name, mms->virtio_irq_base);
 403                 if (mmio_cmdline) {
 404                     char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL);
 405                     g_free(mmio_cmdline);
 406                     g_free(cmdline);
 407                     cmdline = newcmd;
 408                 }
 409             }
 410         }
 411     }
 412
 413     fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1);
 414     fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline);
 415
 416     g_free(cmdline);
 417 }
 418
 419 static void microvm_device_pre_plug_cb(HotplugHandler *hotplug_dev,
 420                                        DeviceState *dev, Error **errp)
 421 {
 422     X86CPU *cpu = X86_CPU(dev);
 423
 424     cpu->host_phys_bits = true; /* need reliable phys-bits */
 425     x86_cpu_pre_plug(hotplug_dev, dev, errp);
 426 }
 427
 428 static void microvm_device_plug_cb(HotplugHandler *hotplug_dev,
 429                                    DeviceState *dev, Error **errp)
 430 {
 431     x86_cpu_plug(hotplug_dev, dev, errp);
 432 }
 433
 434 static void microvm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
 435                                              DeviceState *dev, Error **errp)
 436 {
 437     error_setg(errp, "unplug not supported by microvm");
 438 }
 439
 440 static void microvm_device_unplug_cb(HotplugHandler *hotplug_dev,
 441                                      DeviceState *dev, Error **errp)
 442 {
 443     error_setg(errp, "unplug not supported by microvm");
 444 }
 445
 446 static HotplugHandler *microvm_get_hotplug_handler(MachineState *machine,
 447                                                    DeviceState *dev)
 448 {
 449     if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 450         return HOTPLUG_HANDLER(machine);
 451     }
 452     return NULL;
 453 }
 454
 455 static void microvm_machine_state_init(MachineState *machine)
 456 {
 457     MicrovmMachineState *mms = MICROVM_MACHINE(machine);
 458     X86MachineState *x86ms = X86_MACHINE(machine);
 459
 460     microvm_memory_init(mms);
 461
 462     x86_cpus_init(x86ms, CPU_VERSION_LATEST);
 463
 464     microvm_devices_init(mms);
 465 }
 466
 467 static void microvm_machine_reset(MachineState *machine, ShutdownCause reason)
 468 {
 469     MicrovmMachineState *mms = MICROVM_MACHINE(machine);
 470     CPUState *cs;
 471     X86CPU *cpu;
 472
 473     if (!x86_machine_is_acpi_enabled(X86_MACHINE(machine)) &&
 474         machine->kernel_filename != NULL &&
 475         mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) {
 476         microvm_fix_kernel_cmdline(machine);
 477         mms->kernel_cmdline_fixed = true;
 478     }
 479
 480     qemu_devices_reset(reason);
 481
 482     CPU_FOREACH(cs) {
 483         cpu = X86_CPU(cs);
 484
 485         x86_cpu_after_reset(cpu);
 486     }
 487 }
 488
 489 static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name,
 490                                     void *opaque, Error **errp)
 491 {
 492     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 493     OnOffAuto rtc = mms->rtc;
 494
 495     visit_type_OnOffAuto(v, name, &rtc, errp);
 496 }
 497
 498 static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name,
 499                                     void *opaque, Error **errp)
 500 {
 501     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 502
 503     visit_type_OnOffAuto(v, name, &mms->rtc, errp);
 504 }
 505
 506 static void microvm_machine_get_pcie(Object *obj, Visitor *v, const char *name,
 507                                      void *opaque, Error **errp)
 508 {
 509     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 510     OnOffAuto pcie = mms->pcie;
 511
 512     visit_type_OnOffAuto(v, name, &pcie, errp);
 513 }
 514
 515 static void microvm_machine_set_pcie(Object *obj, Visitor *v, const char *name,
 516                                      void *opaque, Error **errp)
 517 {
 518     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 519
 520     visit_type_OnOffAuto(v, name, &mms->pcie, errp);
 521 }
 522
 523 static void microvm_machine_get_ioapic2(Object *obj, Visitor *v, const char *name,
 524                                         void *opaque, Error **errp)
 525 {
 526     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 527     OnOffAuto ioapic2 = mms->ioapic2;
 528
 529     visit_type_OnOffAuto(v, name, &ioapic2, errp);
 530 }
 531
 532 static void microvm_machine_set_ioapic2(Object *obj, Visitor *v, const char *name,
 533                                         void *opaque, Error **errp)
 534 {
 535     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 536
 537     visit_type_OnOffAuto(v, name, &mms->ioapic2, errp);
 538 }
 539
 540 static bool microvm_machine_get_isa_serial(Object *obj, Error **errp)
 541 {
 542     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 543
 544     return mms->isa_serial;
 545 }
 546
 547 static void microvm_machine_set_isa_serial(Object *obj, bool value,
 548                                            Error **errp)
 549 {
 550     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 551
 552     mms->isa_serial = value;
 553 }
 554
 555 static bool microvm_machine_get_option_roms(Object *obj, Error **errp)
 556 {
 557     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 558
 559     return mms->option_roms;
 560 }
 561
 562 static void microvm_machine_set_option_roms(Object *obj, bool value,
 563                                             Error **errp)
 564 {
 565     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 566
 567     mms->option_roms = value;
 568 }
 569
 570 static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp)
 571 {
 572     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 573
 574     return mms->auto_kernel_cmdline;
 575 }
 576
 577 static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value,
 578                                                     Error **errp)
 579 {
 580     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 581
 582     mms->auto_kernel_cmdline = value;
 583 }
 584
 585 static void microvm_machine_done(Notifier *notifier, void *data)
 586 {
 587     MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState,
 588                                             machine_done);
 589
 590     acpi_setup_microvm(mms);
 591     dt_setup_microvm(mms);
 592 }
 593
 594 static void microvm_powerdown_req(Notifier *notifier, void *data)
 595 {
 596     MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState,
 597                                             powerdown_req);
 598     X86MachineState *x86ms = X86_MACHINE(mms);
 599
 600     if (x86ms->acpi_dev) {
 601         Object *obj = OBJECT(x86ms->acpi_dev);
 602         AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
 603         adevc->send_event(ACPI_DEVICE_IF(x86ms->acpi_dev),
 604                           ACPI_POWER_DOWN_STATUS);
 605     }
 606 }
 607
 608 static void microvm_machine_initfn(Object *obj)
 609 {
 610     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
 611
 612     /* Configuration */
 613     mms->rtc = ON_OFF_AUTO_AUTO;
 614     mms->pcie = ON_OFF_AUTO_AUTO;
 615     mms->ioapic2 = ON_OFF_AUTO_AUTO;
 616     mms->isa_serial = true;
 617     mms->option_roms = true;
 618     mms->auto_kernel_cmdline = true;
 619
 620     /* State */
 621     mms->kernel_cmdline_fixed = false;
 622
 623     mms->machine_done.notify = microvm_machine_done;
 624     qemu_add_machine_init_done_notifier(&mms->machine_done);
 625     mms->powerdown_req.notify = microvm_powerdown_req;
 626     qemu_register_powerdown_notifier(&mms->powerdown_req);
 627 }
 628
 629 GlobalProperty microvm_properties[] = {
 630     /*
 631      * pcie host bridge (gpex) on microvm has no io address window,
 632      * so reserving io space is not going to work.  Turn it off.
 633      */
 634     { "pcie-root-port", "io-reserve", "0" },
 635 };
 636
 637 static void microvm_class_init(ObjectClass *oc, void *data)
 638 {
 639     X86MachineClass *x86mc = X86_MACHINE_CLASS(oc);
 640     MachineClass *mc = MACHINE_CLASS(oc);
 641     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
 642
 643     mc->init = microvm_machine_state_init;
 644
 645     mc->family = "microvm_i386";
 646     mc->desc = "microvm (i386)";
 647     mc->units_per_default_bus = 1;
 648     mc->no_floppy = 1;
 649     mc->max_cpus = 288;
 650     mc->has_hotpluggable_cpus = false;
 651     mc->auto_enable_numa_with_memhp = false;
 652     mc->auto_enable_numa_with_memdev = false;
 653     mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
 654     mc->nvdimm_supported = false;
 655     mc->default_ram_id = "microvm.ram";
 656
 657     /* Avoid relying too much on kernel components */
 658     mc->default_kernel_irqchip_split = true;
 659
 660     /* Machine class handlers */
 661     mc->reset = microvm_machine_reset;
 662
 663     /* hotplug (for cpu coldplug) */
 664     mc->get_hotplug_handler = microvm_get_hotplug_handler;
 665     hc->pre_plug = microvm_device_pre_plug_cb;
 666     hc->plug = microvm_device_plug_cb;
 667     hc->unplug_request = microvm_device_unplug_request_cb;
 668     hc->unplug = microvm_device_unplug_cb;
 669
 670     x86mc->fwcfg_dma_enabled = true;
 671
 672     object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto",
 673                               microvm_machine_get_rtc,
 674                               microvm_machine_set_rtc,
 675                               NULL, NULL);
 676     object_class_property_set_description(oc, MICROVM_MACHINE_RTC,
 677         "Enable MC146818 RTC");
 678
 679     object_class_property_add(oc, MICROVM_MACHINE_PCIE, "OnOffAuto",
 680                               microvm_machine_get_pcie,
 681                               microvm_machine_set_pcie,
 682                               NULL, NULL);
 683     object_class_property_set_description(oc, MICROVM_MACHINE_PCIE,
 684         "Enable PCIe");
 685
 686     object_class_property_add(oc, MICROVM_MACHINE_IOAPIC2, "OnOffAuto",
 687                               microvm_machine_get_ioapic2,
 688                               microvm_machine_set_ioapic2,
 689                               NULL, NULL);
 690     object_class_property_set_description(oc, MICROVM_MACHINE_IOAPIC2,
 691         "Enable second IO-APIC");
 692
 693     object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL,
 694                                    microvm_machine_get_isa_serial,
 695                                    microvm_machine_set_isa_serial);
 696     object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL,
 697         "Set off to disable the instantiation an ISA serial port");
 698
 699     object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS,
 700                                    microvm_machine_get_option_roms,
 701                                    microvm_machine_set_option_roms);
 702     object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS,
 703         "Set off to disable loading option ROMs");
 704
 705     object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
 706                                    microvm_machine_get_auto_kernel_cmdline,
 707                                    microvm_machine_set_auto_kernel_cmdline);
 708     object_class_property_set_description(oc,
 709         MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
 710         "Set off to disable adding virtio-mmio devices to the kernel cmdline");
 711
 712     machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
 713
 714     compat_props_add(mc->compat_props, microvm_properties,
 715                      G_N_ELEMENTS(microvm_properties));
 716 }
 717
 718 static const TypeInfo microvm_machine_info = {
 719     .name          = TYPE_MICROVM_MACHINE,
 720     .parent        = TYPE_X86_MACHINE,
 721     .instance_size = sizeof(MicrovmMachineState),
 722     .instance_init = microvm_machine_initfn,
 723     .class_size    = sizeof(MicrovmMachineClass),
 724     .class_init    = microvm_class_init,
 725     .interfaces = (InterfaceInfo[]) {
 726          { TYPE_HOTPLUG_HANDLER },
 727          { }
 728     },
 729 };
 730
 731 static void microvm_machine_init(void)
 732 {
 733     type_register_static(&microvm_machine_info);
 734 }
 735 type_init(microvm_machine_init);