2 * PowerPC emulation helpers for qemu.
4 * Copyright (c) 2003-2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include "op_helper.h"
24 #define MEMSUFFIX _raw
25 #include "op_helper.h"
26 #include "op_helper_mem.h"
27 #if !defined(CONFIG_USER_ONLY)
28 #define MEMSUFFIX _user
29 #include "op_helper.h"
30 #include "op_helper_mem.h"
31 #define MEMSUFFIX _kernel
32 #include "op_helper.h"
33 #include "op_helper_mem.h"
37 //#define DEBUG_EXCEPTIONS
38 //#define DEBUG_SOFTWARE_TLB
39 //#define FLUSH_ALL_TLBS
41 /*****************************************************************************/
42 /* Exceptions processing helpers */
44 void do_raise_exception_err (uint32_t exception
, int error_code
)
47 printf("Raise exception %3x code : %d\n", exception
, error_code
);
51 if (error_code
== EXCP_FP
&& msr_fe0
== 0 && msr_fe1
== 0)
57 env
->exception_index
= exception
;
58 env
->error_code
= error_code
;
62 void do_raise_exception (uint32_t exception
)
64 do_raise_exception_err(exception
, 0);
67 void cpu_dump_EA (target_ulong EA
);
68 void do_print_mem_EA (target_ulong EA
)
73 /*****************************************************************************/
74 /* Registers load and stores */
75 void do_load_cr (void)
77 T0
= (env
->crf
[0] << 28) |
87 void do_store_cr (uint32_t mask
)
91 for (i
= 0, sh
= 7; i
< 8; i
++, sh
--) {
93 env
->crf
[i
] = (T0
>> (sh
* 4)) & 0xFUL
;
97 void do_load_xer (void)
99 T0
= (xer_so
<< XER_SO
) |
103 (xer_cmp
<< XER_CMP
);
106 void do_store_xer (void)
108 xer_so
= (T0
>> XER_SO
) & 0x01;
109 xer_ov
= (T0
>> XER_OV
) & 0x01;
110 xer_ca
= (T0
>> XER_CA
) & 0x01;
111 xer_cmp
= (T0
>> XER_CMP
) & 0xFF;
112 xer_bc
= (T0
>> XER_BC
) & 0x7F;
115 void do_load_fpscr (void)
117 /* The 32 MSB of the target fpr are undefined.
128 #if defined(WORDS_BIGENDIAN)
137 for (i
= 0; i
< 8; i
++)
138 u
.s
.u
[WORD1
] |= env
->fpscr
[i
] << (4 * i
);
142 void do_store_fpscr (uint32_t mask
)
145 * We use only the 32 LSB of the incoming fpr
157 env
->fpscr
[0] = (env
->fpscr
[0] & 0x9) | ((u
.s
.u
[WORD1
] >> 28) & ~0x9);
158 for (i
= 1; i
< 7; i
++) {
159 if (mask
& (1 << (7 - i
)))
160 env
->fpscr
[i
] = (u
.s
.u
[WORD1
] >> (4 * (7 - i
))) & 0xF;
162 /* TODO: update FEX & VX */
163 /* Set rounding mode */
164 switch (env
->fpscr
[0] & 0x3) {
166 /* Best approximation (round to nearest) */
167 rnd_type
= float_round_nearest_even
;
170 /* Smaller magnitude (round toward zero) */
171 rnd_type
= float_round_to_zero
;
174 /* Round toward +infinite */
175 rnd_type
= float_round_up
;
179 /* Round toward -infinite */
180 rnd_type
= float_round_down
;
183 set_float_rounding_mode(rnd_type
, &env
->fp_status
);
186 target_ulong
ppc_load_dump_spr (int sprn
)
189 fprintf(logfile
, "Read SPR %d %03x => " ADDRX
"\n",
190 sprn
, sprn
, env
->spr
[sprn
]);
193 return env
->spr
[sprn
];
196 void ppc_store_dump_spr (int sprn
, target_ulong val
)
199 fprintf(logfile
, "Write SPR %d %03x => " ADDRX
" <= " ADDRX
"\n",
200 sprn
, sprn
, env
->spr
[sprn
], val
);
202 env
->spr
[sprn
] = val
;
205 /*****************************************************************************/
206 /* Fixed point operations helpers */
207 #if defined(TARGET_PPC64)
208 static void add128 (uint64_t *plow
, uint64_t *phigh
, uint64_t a
, uint64_t b
)
217 static void neg128 (uint64_t *plow
, uint64_t *phigh
)
221 add128(plow
, phigh
, 1, 0);
224 static void mul64 (uint64_t *plow
, uint64_t *phigh
, uint64_t a
, uint64_t b
)
226 uint32_t a0
, a1
, b0
, b1
;
235 v
= (uint64_t)a0
* (uint64_t)b0
;
239 v
= (uint64_t)a0
* (uint64_t)b1
;
240 add128(plow
, phigh
, v
<< 32, v
>> 32);
242 v
= (uint64_t)a1
* (uint64_t)b0
;
243 add128(plow
, phigh
, v
<< 32, v
>> 32);
245 v
= (uint64_t)a1
* (uint64_t)b1
;
247 #if defined(DEBUG_MULDIV)
248 printf("mul: 0x%016llx * 0x%016llx = 0x%016llx%016llx\n",
249 a
, b
, *phigh
, *plow
);
253 void do_mul64 (uint64_t *plow
, uint64_t *phigh
)
255 mul64(plow
, phigh
, T0
, T1
);
258 static void imul64 (uint64_t *plow
, uint64_t *phigh
, int64_t a
, int64_t b
)
267 mul64(plow
, phigh
, a
, b
);
273 void do_imul64 (uint64_t *plow
, uint64_t *phigh
)
275 imul64(plow
, phigh
, T0
, T1
);
283 if (likely(!((uint32_t)T0
< (uint32_t)T2
||
284 (xer_ca
== 1 && (uint32_t)T0
== (uint32_t)T2
)))) {
291 #if defined(TARGET_PPC64)
292 void do_adde_64 (void)
296 if (likely(!((uint64_t)T0
< (uint64_t)T2
||
297 (xer_ca
== 1 && (uint64_t)T0
== (uint64_t)T2
)))) {
305 void do_addmeo (void)
309 if (likely(!((uint32_t)T1
&
310 ((uint32_t)T1
^ (uint32_t)T0
) & (1UL << 31)))) {
320 #if defined(TARGET_PPC64)
321 void do_addmeo_64 (void)
325 if (likely(!((uint64_t)T1
&
326 ((uint64_t)T1
^ (uint64_t)T0
) & (1ULL << 63)))) {
339 if (likely(!(((int32_t)T0
== INT32_MIN
&& (int32_t)T1
== -1) ||
340 (int32_t)T1
== 0))) {
342 T0
= (int32_t)T0
/ (int32_t)T1
;
346 T0
= (-1) * ((uint32_t)T0
>> 31);
350 #if defined(TARGET_PPC64)
353 if (likely(!(((int64_t)T0
== INT64_MIN
&& (int64_t)T1
== -1ULL) ||
354 (int64_t)T1
== 0))) {
356 T0
= (int64_t)T0
/ (int64_t)T1
;
360 T0
= (-1ULL) * ((uint64_t)T0
>> 63);
365 void do_divwuo (void)
367 if (likely((uint32_t)T1
!= 0)) {
369 T0
= (uint32_t)T0
/ (uint32_t)T1
;
377 #if defined(TARGET_PPC64)
378 void do_divduo (void)
380 if (likely((uint64_t)T1
!= 0)) {
382 T0
= (uint64_t)T0
/ (uint64_t)T1
;
391 void do_mullwo (void)
393 int64_t res
= (int64_t)T0
* (int64_t)T1
;
395 if (likely((int32_t)res
== res
)) {
404 #if defined(TARGET_PPC64)
405 void do_mulldo (void)
411 if (likely(th
== 0)) {
423 if (likely((int32_t)T0
!= INT32_MIN
)) {
432 #if defined(TARGET_PPC64)
433 void do_nego_64 (void)
435 if (likely((int64_t)T0
!= INT64_MIN
)) {
447 T0
= T1
+ ~T0
+ xer_ca
;
448 if (likely((uint32_t)T0
>= (uint32_t)T1
&&
449 (xer_ca
== 0 || (uint32_t)T0
!= (uint32_t)T1
))) {
456 #if defined(TARGET_PPC64)
457 void do_subfe_64 (void)
459 T0
= T1
+ ~T0
+ xer_ca
;
460 if (likely((uint64_t)T0
>= (uint64_t)T1
&&
461 (xer_ca
== 0 || (uint64_t)T0
!= (uint64_t)T1
))) {
469 void do_subfmeo (void)
472 T0
= ~T0
+ xer_ca
- 1;
473 if (likely(!((uint32_t)~T1
& ((uint32_t)~T1
^ (uint32_t)T0
) &
480 if (likely((uint32_t)T1
!= UINT32_MAX
))
484 #if defined(TARGET_PPC64)
485 void do_subfmeo_64 (void)
488 T0
= ~T0
+ xer_ca
- 1;
489 if (likely(!((uint64_t)~T1
& ((uint64_t)~T1
^ (uint64_t)T0
) &
496 if (likely((uint64_t)T1
!= UINT64_MAX
))
501 void do_subfzeo (void)
505 if (likely(!(((uint32_t)~T1
^ UINT32_MAX
) &
506 ((uint32_t)(~T1
) ^ (uint32_t)T0
) & (1UL << 31)))) {
512 if (likely((uint32_t)T0
>= (uint32_t)~T1
)) {
519 #if defined(TARGET_PPC64)
520 void do_subfzeo_64 (void)
524 if (likely(!(((uint64_t)~T1
^ UINT64_MAX
) &
525 ((uint64_t)(~T1
) ^ (uint64_t)T0
) & (1ULL << 63)))) {
531 if (likely((uint64_t)T0
>= (uint64_t)~T1
)) {
539 /* shift right arithmetic helper */
544 if (likely(!(T1
& 0x20UL
))) {
545 if (likely((uint32_t)T1
!= 0)) {
546 ret
= (int32_t)T0
>> (T1
& 0x1fUL
);
547 if (likely(ret
>= 0 || ((int32_t)T0
& ((1 << T1
) - 1)) == 0)) {
557 ret
= (-1) * ((uint32_t)T0
>> 31);
558 if (likely(ret
>= 0 || ((uint32_t)T0
& ~0x80000000UL
) == 0)) {
567 #if defined(TARGET_PPC64)
572 if (likely(!(T1
& 0x40UL
))) {
573 if (likely((uint64_t)T1
!= 0)) {
574 ret
= (int64_t)T0
>> (T1
& 0x3FUL
);
575 if (likely(ret
>= 0 || ((int64_t)T0
& ((1 << T1
) - 1)) == 0)) {
585 ret
= (-1) * ((uint64_t)T0
>> 63);
586 if (likely(ret
>= 0 || ((uint64_t)T0
& ~0x8000000000000000ULL
) == 0)) {
596 static inline int popcnt (uint32_t val
)
600 for (i
= 0; val
!= 0;)
601 val
= val
^ (val
- 1);
606 void do_popcntb (void)
612 for (i
= 0; i
< 32; i
+= 8)
613 ret
|= popcnt((T0
>> i
) & 0xFF) << i
;
617 #if defined(TARGET_PPC64)
618 void do_popcntb_64 (void)
624 for (i
= 0; i
< 64; i
+= 8)
625 ret
|= popcnt((T0
>> i
) & 0xFF) << i
;
630 /*****************************************************************************/
631 /* Floating point operations helpers */
639 p
.i
= float64_to_int32(FT0
, &env
->fp_status
);
640 #if USE_PRECISE_EMULATION
641 /* XXX: higher bits are not supposed to be significant.
642 * to make tests easier, return the same as a real PowerPC 750 (aka G3)
644 p
.i
|= 0xFFF80000ULL
<< 32;
649 void do_fctiwz (void)
656 p
.i
= float64_to_int32_round_to_zero(FT0
, &env
->fp_status
);
657 #if USE_PRECISE_EMULATION
658 /* XXX: higher bits are not supposed to be significant.
659 * to make tests easier, return the same as a real PowerPC 750 (aka G3)
661 p
.i
|= 0xFFF80000ULL
<< 32;
666 #if defined(TARGET_PPC64)
675 FT0
= int64_to_float64(p
.i
, &env
->fp_status
);
685 p
.i
= float64_to_int64(FT0
, &env
->fp_status
);
689 void do_fctidz (void)
696 p
.i
= float64_to_int64_round_to_zero(FT0
, &env
->fp_status
);
702 #if USE_PRECISE_EMULATION
706 float128 ft0_128
, ft1_128
;
708 ft0_128
= float64_to_float128(FT0
, &env
->fp_status
);
709 ft1_128
= float64_to_float128(FT1
, &env
->fp_status
);
710 ft0_128
= float128_mul(ft0_128
, ft1_128
, &env
->fp_status
);
711 ft1_128
= float64_to_float128(FT2
, &env
->fp_status
);
712 ft0_128
= float128_add(ft0_128
, ft1_128
, &env
->fp_status
);
713 FT0
= float128_to_float64(ft0_128
, &env
->fp_status
);
715 /* This is OK on x86 hosts */
716 FT0
= (FT0
* FT1
) + FT2
;
723 float128 ft0_128
, ft1_128
;
725 ft0_128
= float64_to_float128(FT0
, &env
->fp_status
);
726 ft1_128
= float64_to_float128(FT1
, &env
->fp_status
);
727 ft0_128
= float128_mul(ft0_128
, ft1_128
, &env
->fp_status
);
728 ft1_128
= float64_to_float128(FT2
, &env
->fp_status
);
729 ft0_128
= float128_sub(ft0_128
, ft1_128
, &env
->fp_status
);
730 FT0
= float128_to_float64(ft0_128
, &env
->fp_status
);
732 /* This is OK on x86 hosts */
733 FT0
= (FT0
* FT1
) - FT2
;
736 #endif /* USE_PRECISE_EMULATION */
738 void do_fnmadd (void)
740 #if USE_PRECISE_EMULATION
742 float128 ft0_128
, ft1_128
;
744 ft0_128
= float64_to_float128(FT0
, &env
->fp_status
);
745 ft1_128
= float64_to_float128(FT1
, &env
->fp_status
);
746 ft0_128
= float128_mul(ft0_128
, ft1_128
, &env
->fp_status
);
747 ft1_128
= float64_to_float128(FT2
, &env
->fp_status
);
748 ft0_128
= float128_add(ft0_128
, ft1_128
, &env
->fp_status
);
749 FT0
= float128_to_float64(ft0_128
, &env
->fp_status
);
751 /* This is OK on x86 hosts */
752 FT0
= (FT0
* FT1
) + FT2
;
755 FT0
= float64_mul(FT0
, FT1
, &env
->fp_status
);
756 FT0
= float64_add(FT0
, FT2
, &env
->fp_status
);
758 if (likely(!isnan(FT0
)))
759 FT0
= float64_chs(FT0
);
762 void do_fnmsub (void)
764 #if USE_PRECISE_EMULATION
766 float128 ft0_128
, ft1_128
;
768 ft0_128
= float64_to_float128(FT0
, &env
->fp_status
);
769 ft1_128
= float64_to_float128(FT1
, &env
->fp_status
);
770 ft0_128
= float128_mul(ft0_128
, ft1_128
, &env
->fp_status
);
771 ft1_128
= float64_to_float128(FT2
, &env
->fp_status
);
772 ft0_128
= float128_sub(ft0_128
, ft1_128
, &env
->fp_status
);
773 FT0
= float128_to_float64(ft0_128
, &env
->fp_status
);
775 /* This is OK on x86 hosts */
776 FT0
= (FT0
* FT1
) - FT2
;
779 FT0
= float64_mul(FT0
, FT1
, &env
->fp_status
);
780 FT0
= float64_sub(FT0
, FT2
, &env
->fp_status
);
782 if (likely(!isnan(FT0
)))
783 FT0
= float64_chs(FT0
);
788 FT0
= float64_sqrt(FT0
, &env
->fp_status
);
798 if (likely(isnormal(FT0
))) {
799 #if USE_PRECISE_EMULATION
800 FT0
= float64_div(1.0, FT0
, &env
->fp_status
);
801 FT0
= float64_to_float32(FT0
, &env
->fp_status
);
803 FT0
= float32_div(1.0, FT0
, &env
->fp_status
);
807 if (p
.i
== 0x8000000000000000ULL
) {
808 p
.i
= 0xFFF0000000000000ULL
;
809 } else if (p
.i
== 0x0000000000000000ULL
) {
810 p
.i
= 0x7FF0000000000000ULL
;
811 } else if (isnan(FT0
)) {
812 p
.i
= 0x7FF8000000000000ULL
;
813 } else if (FT0
< 0.0) {
814 p
.i
= 0x8000000000000000ULL
;
816 p
.i
= 0x0000000000000000ULL
;
822 void do_frsqrte (void)
829 if (likely(isnormal(FT0
) && FT0
> 0.0)) {
830 FT0
= float64_sqrt(FT0
, &env
->fp_status
);
831 FT0
= float32_div(1.0, FT0
, &env
->fp_status
);
834 if (p
.i
== 0x8000000000000000ULL
) {
835 p
.i
= 0xFFF0000000000000ULL
;
836 } else if (p
.i
== 0x0000000000000000ULL
) {
837 p
.i
= 0x7FF0000000000000ULL
;
838 } else if (isnan(FT0
)) {
839 if (!(p
.i
& 0x0008000000000000ULL
))
840 p
.i
|= 0x000FFFFFFFFFFFFFULL
;
841 } else if (FT0
< 0) {
842 p
.i
= 0x7FF8000000000000ULL
;
844 p
.i
= 0x0000000000000000ULL
;
860 if (likely(!isnan(FT0
) && !isnan(FT1
))) {
861 if (float64_lt(FT0
, FT1
, &env
->fp_status
)) {
863 } else if (!float64_le(FT0
, FT1
, &env
->fp_status
)) {
870 env
->fpscr
[4] |= 0x1;
871 env
->fpscr
[6] |= 0x1;
878 env
->fpscr
[4] &= ~0x1;
879 if (likely(!isnan(FT0
) && !isnan(FT1
))) {
880 if (float64_lt(FT0
, FT1
, &env
->fp_status
)) {
882 } else if (!float64_le(FT0
, FT1
, &env
->fp_status
)) {
889 env
->fpscr
[4] |= 0x1;
890 if (!float64_is_signaling_nan(FT0
) || !float64_is_signaling_nan(FT1
)) {
892 env
->fpscr
[6] |= 0x1;
893 if (!(env
->fpscr
[1] & 0x8))
894 env
->fpscr
[4] |= 0x8;
896 env
->fpscr
[4] |= 0x8;
902 #if !defined (CONFIG_USER_ONLY)
903 void cpu_dump_rfi (target_ulong RA
, target_ulong msr
);
906 #if defined(TARGET_PPC64)
907 if (env
->spr
[SPR_SRR1
] & (1ULL << MSR_SF
)) {
908 env
->nip
= (uint64_t)(env
->spr
[SPR_SRR0
] & ~0x00000003);
909 do_store_msr(env
, (uint64_t)(env
->spr
[SPR_SRR1
] & ~0xFFFF0000UL
));
911 env
->nip
= (uint32_t)(env
->spr
[SPR_SRR0
] & ~0x00000003);
912 ppc_store_msr_32(env
, (uint32_t)(env
->spr
[SPR_SRR1
] & ~0xFFFF0000UL
));
915 env
->nip
= (uint32_t)(env
->spr
[SPR_SRR0
] & ~0x00000003);
916 do_store_msr(env
, (uint32_t)(env
->spr
[SPR_SRR1
] & ~0xFFFF0000UL
));
918 #if defined (DEBUG_OP)
919 cpu_dump_rfi(env
->nip
, do_load_msr(env
));
921 env
->interrupt_request
|= CPU_INTERRUPT_EXITTB
;
924 #if defined(TARGET_PPC64)
927 if (env
->spr
[SPR_SRR1
] & (1ULL << MSR_SF
)) {
928 env
->nip
= (uint64_t)(env
->spr
[SPR_SRR0
] & ~0x00000003);
929 do_store_msr(env
, (uint64_t)(env
->spr
[SPR_SRR1
] & ~0xFFFF0000UL
));
931 env
->nip
= (uint32_t)(env
->spr
[SPR_SRR0
] & ~0x00000003);
932 do_store_msr(env
, (uint32_t)(env
->spr
[SPR_SRR1
] & ~0xFFFF0000UL
));
934 #if defined (DEBUG_OP)
935 cpu_dump_rfi(env
->nip
, do_load_msr(env
));
937 env
->interrupt_request
|= CPU_INTERRUPT_EXITTB
;
942 void do_tw (int flags
)
944 if (!likely(!(((int32_t)T0
< (int32_t)T1
&& (flags
& 0x10)) ||
945 ((int32_t)T0
> (int32_t)T1
&& (flags
& 0x08)) ||
946 ((int32_t)T0
== (int32_t)T1
&& (flags
& 0x04)) ||
947 ((uint32_t)T0
< (uint32_t)T1
&& (flags
& 0x02)) ||
948 ((uint32_t)T0
> (uint32_t)T1
&& (flags
& 0x01))))) {
949 do_raise_exception_err(EXCP_PROGRAM
, EXCP_TRAP
);
953 #if defined(TARGET_PPC64)
954 void do_td (int flags
)
956 if (!likely(!(((int64_t)T0
< (int64_t)T1
&& (flags
& 0x10)) ||
957 ((int64_t)T0
> (int64_t)T1
&& (flags
& 0x08)) ||
958 ((int64_t)T0
== (int64_t)T1
&& (flags
& 0x04)) ||
959 ((uint64_t)T0
< (uint64_t)T1
&& (flags
& 0x02)) ||
960 ((uint64_t)T0
> (uint64_t)T1
&& (flags
& 0x01)))))
961 do_raise_exception_err(EXCP_PROGRAM
, EXCP_TRAP
);
965 /*****************************************************************************/
966 /* PowerPC 601 specific instructions (POWER bridge) */
967 void do_POWER_abso (void)
969 if ((uint32_t)T0
== INT32_MIN
) {
979 void do_POWER_clcs (void)
983 /* Instruction cache line size */
984 T0
= ICACHE_LINE_SIZE
;
987 /* Data cache line size */
988 T0
= DCACHE_LINE_SIZE
;
991 /* Minimum cache line size */
992 T0
= ICACHE_LINE_SIZE
< DCACHE_LINE_SIZE
?
993 ICACHE_LINE_SIZE
: DCACHE_LINE_SIZE
;
996 /* Maximum cache line size */
997 T0
= ICACHE_LINE_SIZE
> DCACHE_LINE_SIZE
?
998 ICACHE_LINE_SIZE
: DCACHE_LINE_SIZE
;
1006 void do_POWER_div (void)
1010 if (((int32_t)T0
== INT32_MIN
&& (int32_t)T1
== -1) || (int32_t)T1
== 0) {
1011 T0
= (long)((-1) * (T0
>> 31));
1012 env
->spr
[SPR_MQ
] = 0;
1014 tmp
= ((uint64_t)T0
<< 32) | env
->spr
[SPR_MQ
];
1015 env
->spr
[SPR_MQ
] = tmp
% T1
;
1016 T0
= tmp
/ (int32_t)T1
;
1020 void do_POWER_divo (void)
1024 if (((int32_t)T0
== INT32_MIN
&& (int32_t)T1
== -1) || (int32_t)T1
== 0) {
1025 T0
= (long)((-1) * (T0
>> 31));
1026 env
->spr
[SPR_MQ
] = 0;
1030 tmp
= ((uint64_t)T0
<< 32) | env
->spr
[SPR_MQ
];
1031 env
->spr
[SPR_MQ
] = tmp
% T1
;
1033 if (tmp
> (int64_t)INT32_MAX
|| tmp
< (int64_t)INT32_MIN
) {
1043 void do_POWER_divs (void)
1045 if (((int32_t)T0
== INT32_MIN
&& (int32_t)T1
== -1) || (int32_t)T1
== 0) {
1046 T0
= (long)((-1) * (T0
>> 31));
1047 env
->spr
[SPR_MQ
] = 0;
1049 env
->spr
[SPR_MQ
] = T0
% T1
;
1050 T0
= (int32_t)T0
/ (int32_t)T1
;
1054 void do_POWER_divso (void)
1056 if (((int32_t)T0
== INT32_MIN
&& (int32_t)T1
== -1) || (int32_t)T1
== 0) {
1057 T0
= (long)((-1) * (T0
>> 31));
1058 env
->spr
[SPR_MQ
] = 0;
1062 T0
= (int32_t)T0
/ (int32_t)T1
;
1063 env
->spr
[SPR_MQ
] = (int32_t)T0
% (int32_t)T1
;
1068 void do_POWER_dozo (void)
1070 if ((int32_t)T1
> (int32_t)T0
) {
1073 if (((uint32_t)(~T2
) ^ (uint32_t)T1
^ UINT32_MAX
) &
1074 ((uint32_t)(~T2
) ^ (uint32_t)T0
) & (1UL << 31)) {
1086 void do_POWER_maskg (void)
1090 if ((uint32_t)T0
== (uint32_t)(T1
+ 1)) {
1093 ret
= (((uint32_t)(-1)) >> ((uint32_t)T0
)) ^
1094 (((uint32_t)(-1) >> ((uint32_t)T1
)) >> 1);
1095 if ((uint32_t)T0
> (uint32_t)T1
)
1101 void do_POWER_mulo (void)
1105 tmp
= (uint64_t)T0
* (uint64_t)T1
;
1106 env
->spr
[SPR_MQ
] = tmp
>> 32;
1108 if (tmp
>> 32 != ((uint64_t)T0
>> 16) * ((uint64_t)T1
>> 16)) {
1116 #if !defined (CONFIG_USER_ONLY)
1117 void do_POWER_rac (void)
1122 /* We don't have to generate many instances of this instruction,
1123 * as rac is supervisor only.
1125 if (get_physical_address(env
, &ctx
, T0
, 0, ACCESS_INT
, 1) == 0)
1130 void do_POWER_rfsvc (void)
1132 env
->nip
= env
->lr
& ~0x00000003UL
;
1133 T0
= env
->ctr
& 0x0000FFFFUL
;
1134 do_store_msr(env
, T0
);
1135 #if defined (DEBUG_OP)
1136 cpu_dump_rfi(env
->nip
, do_load_msr(env
));
1138 env
->interrupt_request
|= CPU_INTERRUPT_EXITTB
;
1141 /* PowerPC 601 BAT management helper */
1142 void do_store_601_batu (int nr
)
1144 do_store_ibatu(env
, nr
, (uint32_t)T0
);
1145 env
->DBAT
[0][nr
] = env
->IBAT
[0][nr
];
1146 env
->DBAT
[1][nr
] = env
->IBAT
[1][nr
];
1150 /*****************************************************************************/
1151 /* 602 specific instructions */
1152 /* mfrom is the most crazy instruction ever seen, imho ! */
1153 /* Real implementation uses a ROM table. Do the same */
1154 #define USE_MFROM_ROM_TABLE
1155 void do_op_602_mfrom (void)
1157 if (likely(T0
< 602)) {
1158 #if defined(USE_MFROM_ROM_TABLE)
1159 #include "mfrom_table.c"
1160 T0
= mfrom_ROM_table
[T0
];
1163 /* Extremly decomposed:
1165 * T0 = 256 * log10(10 + 1.0) + 0.5
1168 d
= float64_div(d
, 256, &env
->fp_status
);
1170 d
= exp10(d
); // XXX: use float emulation function
1171 d
= float64_add(d
, 1.0, &env
->fp_status
);
1172 d
= log10(d
); // XXX: use float emulation function
1173 d
= float64_mul(d
, 256, &env
->fp_status
);
1174 d
= float64_add(d
, 0.5, &env
->fp_status
);
1175 T0
= float64_round_to_int(d
, &env
->fp_status
);
1182 /*****************************************************************************/
1183 /* Embedded PowerPC specific helpers */
1184 void do_405_check_ov (void)
1186 if (likely((((uint32_t)T1
^ (uint32_t)T2
) >> 31) ||
1187 !(((uint32_t)T0
^ (uint32_t)T2
) >> 31))) {
1195 void do_405_check_sat (void)
1197 if (!likely((((uint32_t)T1
^ (uint32_t)T2
) >> 31) ||
1198 !(((uint32_t)T0
^ (uint32_t)T2
) >> 31))) {
1199 /* Saturate result */
1208 #if !defined(CONFIG_USER_ONLY)
1209 void do_40x_rfci (void)
1211 env
->nip
= env
->spr
[SPR_40x_SRR2
];
1212 do_store_msr(env
, env
->spr
[SPR_40x_SRR3
] & ~0xFFFF0000);
1213 #if defined (DEBUG_OP)
1214 cpu_dump_rfi(env
->nip
, do_load_msr(env
));
1216 env
->interrupt_request
= CPU_INTERRUPT_EXITTB
;
1221 #if defined(TARGET_PPC64)
1222 if (env
->spr
[SPR_BOOKE_CSRR1
] & (1 << MSR_CM
)) {
1223 env
->nip
= (uint64_t)env
->spr
[SPR_BOOKE_CSRR0
];
1227 env
->nip
= (uint32_t)env
->spr
[SPR_BOOKE_CSRR0
];
1229 do_store_msr(env
, (uint32_t)env
->spr
[SPR_BOOKE_CSRR1
] & ~0x3FFF0000);
1230 #if defined (DEBUG_OP)
1231 cpu_dump_rfi(env
->nip
, do_load_msr(env
));
1233 env
->interrupt_request
= CPU_INTERRUPT_EXITTB
;
1238 #if defined(TARGET_PPC64)
1239 if (env
->spr
[SPR_BOOKE_DSRR1
] & (1 << MSR_CM
)) {
1240 env
->nip
= (uint64_t)env
->spr
[SPR_BOOKE_DSRR0
];
1244 env
->nip
= (uint32_t)env
->spr
[SPR_BOOKE_DSRR0
];
1246 do_store_msr(env
, (uint32_t)env
->spr
[SPR_BOOKE_DSRR1
] & ~0x3FFF0000);
1247 #if defined (DEBUG_OP)
1248 cpu_dump_rfi(env
->nip
, do_load_msr(env
));
1250 env
->interrupt_request
= CPU_INTERRUPT_EXITTB
;
1253 void do_rfmci (void)
1255 #if defined(TARGET_PPC64)
1256 if (env
->spr
[SPR_BOOKE_MCSRR1
] & (1 << MSR_CM
)) {
1257 env
->nip
= (uint64_t)env
->spr
[SPR_BOOKE_MCSRR0
];
1261 env
->nip
= (uint32_t)env
->spr
[SPR_BOOKE_MCSRR0
];
1263 do_store_msr(env
, (uint32_t)env
->spr
[SPR_BOOKE_MCSRR1
] & ~0x3FFF0000);
1264 #if defined (DEBUG_OP)
1265 cpu_dump_rfi(env
->nip
, do_load_msr(env
));
1267 env
->interrupt_request
= CPU_INTERRUPT_EXITTB
;
1270 void do_load_dcr (void)
1274 if (unlikely(env
->dcr_env
== NULL
)) {
1275 if (loglevel
!= 0) {
1276 fprintf(logfile
, "No DCR environment\n");
1278 do_raise_exception_err(EXCP_PROGRAM
, EXCP_INVAL
| EXCP_INVAL_INVAL
);
1279 } else if (unlikely(ppc_dcr_read(env
->dcr_env
, T0
, &val
) != 0)) {
1280 if (loglevel
!= 0) {
1281 fprintf(logfile
, "DCR read error %d %03x\n", (int)T0
, (int)T0
);
1283 do_raise_exception_err(EXCP_PROGRAM
, EXCP_INVAL
| EXCP_PRIV_REG
);
1289 void do_store_dcr (void)
1291 if (unlikely(env
->dcr_env
== NULL
)) {
1292 if (loglevel
!= 0) {
1293 fprintf(logfile
, "No DCR environment\n");
1295 do_raise_exception_err(EXCP_PROGRAM
, EXCP_INVAL
| EXCP_INVAL_INVAL
);
1296 } else if (unlikely(ppc_dcr_write(env
->dcr_env
, T0
, T1
) != 0)) {
1297 if (loglevel
!= 0) {
1298 fprintf(logfile
, "DCR write error %d %03x\n", (int)T0
, (int)T0
);
1300 do_raise_exception_err(EXCP_PROGRAM
, EXCP_INVAL
| EXCP_PRIV_REG
);
1304 void do_load_403_pb (int num
)
1309 void do_store_403_pb (int num
)
1311 if (likely(env
->pb
[num
] != T0
)) {
1313 /* Should be optimized */
1320 void do_440_dlmzb (void)
1326 for (mask
= 0xFF000000; mask
!= 0; mask
= mask
>> 8) {
1327 if ((T0
& mask
) == 0)
1331 for (mask
= 0xFF000000; mask
!= 0; mask
= mask
>> 8) {
1332 if ((T1
& mask
) == 0)
1340 #if defined(TARGET_PPCEMB)
1341 /* SPE extension helpers */
1342 /* Use a table to make this quicker */
1343 static uint8_t hbrev
[16] = {
1344 0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE,
1345 0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF,
1348 static inline uint8_t byte_reverse (uint8_t val
)
1350 return hbrev
[val
>> 4] | (hbrev
[val
& 0xF] << 4);
1353 static inline uint32_t word_reverse (uint32_t val
)
1355 return byte_reverse(val
>> 24) | (byte_reverse(val
>> 16) << 8) |
1356 (byte_reverse(val
>> 8) << 16) | (byte_reverse(val
) << 24);
1359 #define MASKBITS 16 // Random value - to be fixed
1360 void do_brinc (void)
1362 uint32_t a
, b
, d
, mask
;
1364 mask
= (uint32_t)(-1UL) >> MASKBITS
;
1367 d
= word_reverse(1 + word_reverse(a
| ~mask
));
1368 T0_64
= (T0_64
& ~mask
) | (d
& mask
);
1371 #define DO_SPE_OP2(name) \
1372 void do_ev##name (void) \
1374 T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32, T1_64 >> 32) << 32) | \
1375 (uint64_t)_do_e##name(T0_64, T1_64); \
1378 #define DO_SPE_OP1(name) \
1379 void do_ev##name (void) \
1381 T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32) << 32) | \
1382 (uint64_t)_do_e##name(T0_64); \
1385 /* Fixed-point vector arithmetic */
1386 static inline uint32_t _do_eabs (uint32_t val
)
1388 if (val
!= 0x80000000)
1394 static inline uint32_t _do_eaddw (uint32_t op1
, uint32_t op2
)
1399 static inline int _do_ecntlsw (uint32_t val
)
1401 if (val
& 0x80000000)
1402 return _do_cntlzw(~val
);
1404 return _do_cntlzw(val
);
1407 static inline int _do_ecntlzw (uint32_t val
)
1409 return _do_cntlzw(val
);
1412 static inline uint32_t _do_eneg (uint32_t val
)
1414 if (val
!= 0x80000000)
1420 static inline uint32_t _do_erlw (uint32_t op1
, uint32_t op2
)
1422 return rotl32(op1
, op2
);
1425 static inline uint32_t _do_erndw (uint32_t val
)
1427 return (val
+ 0x000080000000) & 0xFFFF0000;
1430 static inline uint32_t _do_eslw (uint32_t op1
, uint32_t op2
)
1432 /* No error here: 6 bits are used */
1433 return op1
<< (op2
& 0x3F);
1436 static inline int32_t _do_esrws (int32_t op1
, uint32_t op2
)
1438 /* No error here: 6 bits are used */
1439 return op1
>> (op2
& 0x3F);
1442 static inline uint32_t _do_esrwu (uint32_t op1
, uint32_t op2
)
1444 /* No error here: 6 bits are used */
1445 return op1
>> (op2
& 0x3F);
1448 static inline uint32_t _do_esubfw (uint32_t op1
, uint32_t op2
)
1476 /* evsel is a little bit more complicated... */
1477 static inline uint32_t _do_esel (uint32_t op1
, uint32_t op2
, int n
)
1485 void do_evsel (void)
1487 T0_64
= ((uint64_t)_do_esel(T0_64
>> 32, T1_64
>> 32, T0
>> 3) << 32) |
1488 (uint64_t)_do_esel(T0_64
, T1_64
, (T0
>> 2) & 1);
1491 /* Fixed-point vector comparisons */
1492 #define DO_SPE_CMP(name) \
1493 void do_ev##name (void) \
1495 T0 = _do_evcmp_merge((uint64_t)_do_e##name(T0_64 >> 32, \
1496 T1_64 >> 32) << 32, \
1497 _do_e##name(T0_64, T1_64)); \
1500 static inline uint32_t _do_evcmp_merge (int t0
, int t1
)
1502 return (t0
<< 3) | (t1
<< 2) | ((t0
| t1
) << 1) | (t0
& t1
);
1504 static inline int _do_ecmpeq (uint32_t op1
, uint32_t op2
)
1506 return op1
== op2
? 1 : 0;
1509 static inline int _do_ecmpgts (int32_t op1
, int32_t op2
)
1511 return op1
> op2
? 1 : 0;
1514 static inline int _do_ecmpgtu (uint32_t op1
, uint32_t op2
)
1516 return op1
> op2
? 1 : 0;
1519 static inline int _do_ecmplts (int32_t op1
, int32_t op2
)
1521 return op1
< op2
? 1 : 0;
1524 static inline int _do_ecmpltu (uint32_t op1
, uint32_t op2
)
1526 return op1
< op2
? 1 : 0;
1540 /* Single precision floating-point conversions from/to integer */
1541 static inline uint32_t _do_efscfsi (int32_t val
)
1548 u
.f
= int32_to_float32(val
, &env
->spe_status
);
1553 static inline uint32_t _do_efscfui (uint32_t val
)
1560 u
.f
= uint32_to_float32(val
, &env
->spe_status
);
1565 static inline int32_t _do_efsctsi (uint32_t val
)
1573 /* NaN are not treated the same way IEEE 754 does */
1574 if (unlikely(isnan(u
.f
)))
1577 return float32_to_int32(u
.f
, &env
->spe_status
);
1580 static inline uint32_t _do_efsctui (uint32_t val
)
1588 /* NaN are not treated the same way IEEE 754 does */
1589 if (unlikely(isnan(u
.f
)))
1592 return float32_to_uint32(u
.f
, &env
->spe_status
);
1595 static inline int32_t _do_efsctsiz (uint32_t val
)
1603 /* NaN are not treated the same way IEEE 754 does */
1604 if (unlikely(isnan(u
.f
)))
1607 return float32_to_int32_round_to_zero(u
.f
, &env
->spe_status
);
1610 static inline uint32_t _do_efsctuiz (uint32_t val
)
1618 /* NaN are not treated the same way IEEE 754 does */
1619 if (unlikely(isnan(u
.f
)))
1622 return float32_to_uint32_round_to_zero(u
.f
, &env
->spe_status
);
1625 void do_efscfsi (void)
1627 T0_64
= _do_efscfsi(T0_64
);
1630 void do_efscfui (void)
1632 T0_64
= _do_efscfui(T0_64
);
1635 void do_efsctsi (void)
1637 T0_64
= _do_efsctsi(T0_64
);
1640 void do_efsctui (void)
1642 T0_64
= _do_efsctui(T0_64
);
1645 void do_efsctsiz (void)
1647 T0_64
= _do_efsctsiz(T0_64
);
1650 void do_efsctuiz (void)
1652 T0_64
= _do_efsctuiz(T0_64
);
1655 /* Single precision floating-point conversion to/from fractional */
1656 static inline uint32_t _do_efscfsf (uint32_t val
)
1664 u
.f
= int32_to_float32(val
, &env
->spe_status
);
1665 tmp
= int64_to_float32(1ULL << 32, &env
->spe_status
);
1666 u
.f
= float32_div(u
.f
, tmp
, &env
->spe_status
);
1671 static inline uint32_t _do_efscfuf (uint32_t val
)
1679 u
.f
= uint32_to_float32(val
, &env
->spe_status
);
1680 tmp
= uint64_to_float32(1ULL << 32, &env
->spe_status
);
1681 u
.f
= float32_div(u
.f
, tmp
, &env
->spe_status
);
1686 static inline int32_t _do_efsctsf (uint32_t val
)
1695 /* NaN are not treated the same way IEEE 754 does */
1696 if (unlikely(isnan(u
.f
)))
1698 tmp
= uint64_to_float32(1ULL << 32, &env
->spe_status
);
1699 u
.f
= float32_mul(u
.f
, tmp
, &env
->spe_status
);
1701 return float32_to_int32(u
.f
, &env
->spe_status
);
1704 static inline uint32_t _do_efsctuf (uint32_t val
)
1713 /* NaN are not treated the same way IEEE 754 does */
1714 if (unlikely(isnan(u
.f
)))
1716 tmp
= uint64_to_float32(1ULL << 32, &env
->spe_status
);
1717 u
.f
= float32_mul(u
.f
, tmp
, &env
->spe_status
);
1719 return float32_to_uint32(u
.f
, &env
->spe_status
);
1722 static inline int32_t _do_efsctsfz (uint32_t val
)
1731 /* NaN are not treated the same way IEEE 754 does */
1732 if (unlikely(isnan(u
.f
)))
1734 tmp
= uint64_to_float32(1ULL << 32, &env
->spe_status
);
1735 u
.f
= float32_mul(u
.f
, tmp
, &env
->spe_status
);
1737 return float32_to_int32_round_to_zero(u
.f
, &env
->spe_status
);
1740 static inline uint32_t _do_efsctufz (uint32_t val
)
1749 /* NaN are not treated the same way IEEE 754 does */
1750 if (unlikely(isnan(u
.f
)))
1752 tmp
= uint64_to_float32(1ULL << 32, &env
->spe_status
);
1753 u
.f
= float32_mul(u
.f
, tmp
, &env
->spe_status
);
1755 return float32_to_uint32_round_to_zero(u
.f
, &env
->spe_status
);
1758 void do_efscfsf (void)
1760 T0_64
= _do_efscfsf(T0_64
);
1763 void do_efscfuf (void)
1765 T0_64
= _do_efscfuf(T0_64
);
1768 void do_efsctsf (void)
1770 T0_64
= _do_efsctsf(T0_64
);
1773 void do_efsctuf (void)
1775 T0_64
= _do_efsctuf(T0_64
);
1778 void do_efsctsfz (void)
1780 T0_64
= _do_efsctsfz(T0_64
);
1783 void do_efsctufz (void)
1785 T0_64
= _do_efsctufz(T0_64
);
1788 /* Double precision floating point helpers */
1789 static inline int _do_efdcmplt (uint64_t op1
, uint64_t op2
)
1791 /* XXX: TODO: test special values (NaN, infinites, ...) */
1792 return _do_efdtstlt(op1
, op2
);
1795 static inline int _do_efdcmpgt (uint64_t op1
, uint64_t op2
)
1797 /* XXX: TODO: test special values (NaN, infinites, ...) */
1798 return _do_efdtstgt(op1
, op2
);
1801 static inline int _do_efdcmpeq (uint64_t op1
, uint64_t op2
)
1803 /* XXX: TODO: test special values (NaN, infinites, ...) */
1804 return _do_efdtsteq(op1
, op2
);
1807 void do_efdcmplt (void)
1809 T0
= _do_efdcmplt(T0_64
, T1_64
);
1812 void do_efdcmpgt (void)
1814 T0
= _do_efdcmpgt(T0_64
, T1_64
);
1817 void do_efdcmpeq (void)
1819 T0
= _do_efdcmpeq(T0_64
, T1_64
);
1822 /* Double precision floating-point conversion to/from integer */
1823 static inline uint64_t _do_efdcfsi (int64_t val
)
1830 u
.f
= int64_to_float64(val
, &env
->spe_status
);
1835 static inline uint64_t _do_efdcfui (uint64_t val
)
1842 u
.f
= uint64_to_float64(val
, &env
->spe_status
);
1847 static inline int64_t _do_efdctsi (uint64_t val
)
1855 /* NaN are not treated the same way IEEE 754 does */
1856 if (unlikely(isnan(u
.f
)))
1859 return float64_to_int64(u
.f
, &env
->spe_status
);
1862 static inline uint64_t _do_efdctui (uint64_t val
)
1870 /* NaN are not treated the same way IEEE 754 does */
1871 if (unlikely(isnan(u
.f
)))
1874 return float64_to_uint64(u
.f
, &env
->spe_status
);
1877 static inline int64_t _do_efdctsiz (uint64_t val
)
1885 /* NaN are not treated the same way IEEE 754 does */
1886 if (unlikely(isnan(u
.f
)))
1889 return float64_to_int64_round_to_zero(u
.f
, &env
->spe_status
);
1892 static inline uint64_t _do_efdctuiz (uint64_t val
)
1900 /* NaN are not treated the same way IEEE 754 does */
1901 if (unlikely(isnan(u
.f
)))
1904 return float64_to_uint64_round_to_zero(u
.f
, &env
->spe_status
);
1907 void do_efdcfsi (void)
1909 T0_64
= _do_efdcfsi(T0_64
);
1912 void do_efdcfui (void)
1914 T0_64
= _do_efdcfui(T0_64
);
1917 void do_efdctsi (void)
1919 T0_64
= _do_efdctsi(T0_64
);
1922 void do_efdctui (void)
1924 T0_64
= _do_efdctui(T0_64
);
1927 void do_efdctsiz (void)
1929 T0_64
= _do_efdctsiz(T0_64
);
1932 void do_efdctuiz (void)
1934 T0_64
= _do_efdctuiz(T0_64
);
1937 /* Double precision floating-point conversion to/from fractional */
1938 static inline uint64_t _do_efdcfsf (int64_t val
)
1946 u
.f
= int32_to_float64(val
, &env
->spe_status
);
1947 tmp
= int64_to_float64(1ULL << 32, &env
->spe_status
);
1948 u
.f
= float64_div(u
.f
, tmp
, &env
->spe_status
);
1953 static inline uint64_t _do_efdcfuf (uint64_t val
)
1961 u
.f
= uint32_to_float64(val
, &env
->spe_status
);
1962 tmp
= int64_to_float64(1ULL << 32, &env
->spe_status
);
1963 u
.f
= float64_div(u
.f
, tmp
, &env
->spe_status
);
1968 static inline int64_t _do_efdctsf (uint64_t val
)
1977 /* NaN are not treated the same way IEEE 754 does */
1978 if (unlikely(isnan(u
.f
)))
1980 tmp
= uint64_to_float64(1ULL << 32, &env
->spe_status
);
1981 u
.f
= float64_mul(u
.f
, tmp
, &env
->spe_status
);
1983 return float64_to_int32(u
.f
, &env
->spe_status
);
1986 static inline uint64_t _do_efdctuf (uint64_t val
)
1995 /* NaN are not treated the same way IEEE 754 does */
1996 if (unlikely(isnan(u
.f
)))
1998 tmp
= uint64_to_float64(1ULL << 32, &env
->spe_status
);
1999 u
.f
= float64_mul(u
.f
, tmp
, &env
->spe_status
);
2001 return float64_to_uint32(u
.f
, &env
->spe_status
);
2004 static inline int64_t _do_efdctsfz (uint64_t val
)
2013 /* NaN are not treated the same way IEEE 754 does */
2014 if (unlikely(isnan(u
.f
)))
2016 tmp
= uint64_to_float64(1ULL << 32, &env
->spe_status
);
2017 u
.f
= float64_mul(u
.f
, tmp
, &env
->spe_status
);
2019 return float64_to_int32_round_to_zero(u
.f
, &env
->spe_status
);
2022 static inline uint64_t _do_efdctufz (uint64_t val
)
2031 /* NaN are not treated the same way IEEE 754 does */
2032 if (unlikely(isnan(u
.f
)))
2034 tmp
= uint64_to_float64(1ULL << 32, &env
->spe_status
);
2035 u
.f
= float64_mul(u
.f
, tmp
, &env
->spe_status
);
2037 return float64_to_uint32_round_to_zero(u
.f
, &env
->spe_status
);
2040 void do_efdcfsf (void)
2042 T0_64
= _do_efdcfsf(T0_64
);
2045 void do_efdcfuf (void)
2047 T0_64
= _do_efdcfuf(T0_64
);
2050 void do_efdctsf (void)
2052 T0_64
= _do_efdctsf(T0_64
);
2055 void do_efdctuf (void)
2057 T0_64
= _do_efdctuf(T0_64
);
2060 void do_efdctsfz (void)
2062 T0_64
= _do_efdctsfz(T0_64
);
2065 void do_efdctufz (void)
2067 T0_64
= _do_efdctufz(T0_64
);
2070 /* Floating point conversion between single and double precision */
2071 static inline uint32_t _do_efscfd (uint64_t val
)
2083 u2
.f
= float64_to_float32(u1
.f
, &env
->spe_status
);
2088 static inline uint64_t _do_efdcfs (uint32_t val
)
2100 u2
.f
= float32_to_float64(u1
.f
, &env
->spe_status
);
2105 void do_efscfd (void)
2107 T0_64
= _do_efscfd(T0_64
);
2110 void do_efdcfs (void)
2112 T0_64
= _do_efdcfs(T0_64
);
2115 /* Single precision fixed-point vector arithmetic */
2131 /* Single-precision floating-point comparisons */
2132 static inline int _do_efscmplt (uint32_t op1
, uint32_t op2
)
2134 /* XXX: TODO: test special values (NaN, infinites, ...) */
2135 return _do_efststlt(op1
, op2
);
2138 static inline int _do_efscmpgt (uint32_t op1
, uint32_t op2
)
2140 /* XXX: TODO: test special values (NaN, infinites, ...) */
2141 return _do_efststgt(op1
, op2
);
2144 static inline int _do_efscmpeq (uint32_t op1
, uint32_t op2
)
2146 /* XXX: TODO: test special values (NaN, infinites, ...) */
2147 return _do_efststeq(op1
, op2
);
2150 void do_efscmplt (void)
2152 T0
= _do_efscmplt(T0_64
, T1_64
);
2155 void do_efscmpgt (void)
2157 T0
= _do_efscmpgt(T0_64
, T1_64
);
2160 void do_efscmpeq (void)
2162 T0
= _do_efscmpeq(T0_64
, T1_64
);
2165 /* Single-precision floating-point vector comparisons */
2167 DO_SPE_CMP(fscmplt
);
2169 DO_SPE_CMP(fscmpgt
);
2171 DO_SPE_CMP(fscmpeq
);
2173 DO_SPE_CMP(fststlt
);
2175 DO_SPE_CMP(fststgt
);
2177 DO_SPE_CMP(fststeq
);
2179 /* Single-precision floating-point vector conversions */
2193 DO_SPE_OP1(fsctsiz
);
2195 DO_SPE_OP1(fsctuiz
);
2200 #endif /* defined(TARGET_PPCEMB) */
2202 /*****************************************************************************/
2203 /* Softmmu support */
2204 #if !defined (CONFIG_USER_ONLY)
2206 #define MMUSUFFIX _mmu
2207 #define GETPC() (__builtin_return_address(0))
2210 #include "softmmu_template.h"
2213 #include "softmmu_template.h"
2216 #include "softmmu_template.h"
2219 #include "softmmu_template.h"
2221 /* try to fill the TLB and return an exception if error. If retaddr is
2222 NULL, it means that the function was called in C code (i.e. not
2223 from generated code or from helper.c) */
2224 /* XXX: fix it to restore all registers */
2225 void tlb_fill (target_ulong addr
, int is_write
, int is_user
, void *retaddr
)
2227 TranslationBlock
*tb
;
2228 CPUState
*saved_env
;
2229 target_phys_addr_t pc
;
2232 /* XXX: hack to restore env in all cases, even if not called from
2235 env
= cpu_single_env
;
2236 ret
= cpu_ppc_handle_mmu_fault(env
, addr
, is_write
, is_user
, 1);
2237 if (unlikely(ret
!= 0)) {
2238 if (likely(retaddr
)) {
2239 /* now we have a real cpu fault */
2240 pc
= (target_phys_addr_t
)retaddr
;
2241 tb
= tb_find_pc(pc
);
2243 /* the PC is inside the translated code. It means that we have
2244 a virtual CPU fault */
2245 cpu_restore_state(tb
, env
, pc
, NULL
);
2248 do_raise_exception_err(env
->exception_index
, env
->error_code
);
2253 /* TLB invalidation helpers */
2254 void do_tlbia (void)
2256 ppc_tlb_invalidate_all(env
);
2259 void do_tlbie (void)
2262 #if !defined(FLUSH_ALL_TLBS)
2263 if (unlikely(PPC_MMU(env
) == PPC_FLAGS_MMU_SOFT_6xx
)) {
2264 ppc6xx_tlb_invalidate_virt(env
, T0
& TARGET_PAGE_MASK
, 0);
2265 if (env
->id_tlbs
== 1)
2266 ppc6xx_tlb_invalidate_virt(env
, T0
& TARGET_PAGE_MASK
, 1);
2267 } else if (unlikely(PPC_MMU(env
) == PPC_FLAGS_MMU_SOFT_4xx
)) {
2270 ppcbooke_tlb_invalidate_virt(env
, T0
& TARGET_PAGE_MASK
,
2271 env
->spr
[SPR_BOOKE_PID
]);
2274 /* tlbie invalidate TLBs for all segments */
2275 T0
&= TARGET_PAGE_MASK
;
2276 T0
&= ~((target_ulong
)-1 << 28);
2277 /* XXX: this case should be optimized,
2278 * giving a mask to tlb_flush_page
2280 tlb_flush_page(env
, T0
| (0x0 << 28));
2281 tlb_flush_page(env
, T0
| (0x1 << 28));
2282 tlb_flush_page(env
, T0
| (0x2 << 28));
2283 tlb_flush_page(env
, T0
| (0x3 << 28));
2284 tlb_flush_page(env
, T0
| (0x4 << 28));
2285 tlb_flush_page(env
, T0
| (0x5 << 28));
2286 tlb_flush_page(env
, T0
| (0x6 << 28));
2287 tlb_flush_page(env
, T0
| (0x7 << 28));
2288 tlb_flush_page(env
, T0
| (0x8 << 28));
2289 tlb_flush_page(env
, T0
| (0x9 << 28));
2290 tlb_flush_page(env
, T0
| (0xA << 28));
2291 tlb_flush_page(env
, T0
| (0xB << 28));
2292 tlb_flush_page(env
, T0
| (0xC << 28));
2293 tlb_flush_page(env
, T0
| (0xD << 28));
2294 tlb_flush_page(env
, T0
| (0xE << 28));
2295 tlb_flush_page(env
, T0
| (0xF << 28));
2302 #if defined(TARGET_PPC64)
2303 void do_tlbie_64 (void)
2306 #if !defined(FLUSH_ALL_TLBS)
2307 if (unlikely(PPC_MMU(env
) == PPC_FLAGS_MMU_SOFT_6xx
)) {
2308 ppc6xx_tlb_invalidate_virt(env
, T0
& TARGET_PAGE_MASK
, 0);
2309 if (env
->id_tlbs
== 1)
2310 ppc6xx_tlb_invalidate_virt(env
, T0
& TARGET_PAGE_MASK
, 1);
2311 } else if (unlikely(PPC_MMU(env
) == PPC_FLAGS_MMU_SOFT_4xx
)) {
2314 ppcbooke_tlb_invalidate_virt(env
, T0
& TARGET_PAGE_MASK
,
2315 env
->spr
[SPR_BOOKE_PID
]);
2318 /* tlbie invalidate TLBs for all segments
2319 * As we have 2^36 segments, invalidate all qemu TLBs
2322 T0
&= TARGET_PAGE_MASK
;
2323 T0
&= ~((target_ulong
)-1 << 28);
2324 /* XXX: this case should be optimized,
2325 * giving a mask to tlb_flush_page
2327 tlb_flush_page(env
, T0
| (0x0 << 28));
2328 tlb_flush_page(env
, T0
| (0x1 << 28));
2329 tlb_flush_page(env
, T0
| (0x2 << 28));
2330 tlb_flush_page(env
, T0
| (0x3 << 28));
2331 tlb_flush_page(env
, T0
| (0x4 << 28));
2332 tlb_flush_page(env
, T0
| (0x5 << 28));
2333 tlb_flush_page(env
, T0
| (0x6 << 28));
2334 tlb_flush_page(env
, T0
| (0x7 << 28));
2335 tlb_flush_page(env
, T0
| (0x8 << 28));
2336 tlb_flush_page(env
, T0
| (0x9 << 28));
2337 tlb_flush_page(env
, T0
| (0xA << 28));
2338 tlb_flush_page(env
, T0
| (0xB << 28));
2339 tlb_flush_page(env
, T0
| (0xC << 28));
2340 tlb_flush_page(env
, T0
| (0xD << 28));
2341 tlb_flush_page(env
, T0
| (0xE << 28));
2342 tlb_flush_page(env
, T0
| (0xF << 28));
2353 #if defined(TARGET_PPC64)
2354 void do_slbia (void)
2360 void do_slbie (void)
2367 /* Software driven TLBs management */
2368 /* PowerPC 602/603 software TLB load instructions helpers */
2369 void do_load_6xx_tlb (int is_code
)
2371 target_ulong RPN
, CMP
, EPN
;
2374 RPN
= env
->spr
[SPR_RPA
];
2376 CMP
= env
->spr
[SPR_ICMP
];
2377 EPN
= env
->spr
[SPR_IMISS
];
2379 CMP
= env
->spr
[SPR_DCMP
];
2380 EPN
= env
->spr
[SPR_DMISS
];
2382 way
= (env
->spr
[SPR_SRR1
] >> 17) & 1;
2383 #if defined (DEBUG_SOFTWARE_TLB)
2384 if (loglevel
!= 0) {
2385 fprintf(logfile
, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
2386 __func__
, (unsigned long)T0
, (unsigned long)EPN
,
2387 (unsigned long)CMP
, (unsigned long)RPN
, way
);
2390 /* Store this TLB */
2391 ppc6xx_tlb_store(env
, (uint32_t)(T0
& TARGET_PAGE_MASK
),
2392 way
, is_code
, CMP
, RPN
);
2395 static target_ulong
booke_tlb_to_page_size (int size
)
2397 return 1024 << (2 * size
);
2400 static int booke_page_size_to_tlb (target_ulong page_size
)
2404 switch (page_size
) {
2438 #if defined (TARGET_PPC64)
2439 case 0x000100000000ULL
:
2442 case 0x000400000000ULL
:
2445 case 0x001000000000ULL
:
2448 case 0x004000000000ULL
:
2451 case 0x010000000000ULL
:
2463 /* Helpers for 4xx TLB management */
2464 void do_4xx_tlbre_lo (void)
2470 tlb
= &env
->tlb
[T0
].tlbe
;
2472 if (tlb
->prot
& PAGE_VALID
)
2474 size
= booke_page_size_to_tlb(tlb
->size
);
2475 if (size
< 0 || size
> 0x7)
2478 env
->spr
[SPR_40x_PID
] = tlb
->PID
;
2481 void do_4xx_tlbre_hi (void)
2486 tlb
= &env
->tlb
[T0
].tlbe
;
2488 if (tlb
->prot
& PAGE_EXEC
)
2490 if (tlb
->prot
& PAGE_WRITE
)
2494 void do_4xx_tlbsx (void)
2496 T0
= ppcemb_tlb_search(env
, T0
);
2499 void do_4xx_tlbsx_ (void)
2503 T0
= ppcemb_tlb_search(env
, T0
);
2509 void do_4xx_tlbwe_hi (void)
2512 target_ulong page
, end
;
2514 #if defined (DEBUG_SOFTWARE_TLB)
2515 if (loglevel
!= 0) {
2516 fprintf(logfile
, "%s T0 " REGX
" T1 " REGX
"\n", __func__
, T0
, T1
);
2520 tlb
= &env
->tlb
[T0
].tlbe
;
2521 /* Invalidate previous TLB (if it's valid) */
2522 if (tlb
->prot
& PAGE_VALID
) {
2523 end
= tlb
->EPN
+ tlb
->size
;
2524 #if defined (DEBUG_SOFTWARE_TLB)
2525 if (loglevel
!= 0) {
2526 fprintf(logfile
, "%s: invalidate old TLB %d start " ADDRX
2527 " end " ADDRX
"\n", __func__
, (int)T0
, tlb
->EPN
, end
);
2530 for (page
= tlb
->EPN
; page
< end
; page
+= TARGET_PAGE_SIZE
)
2531 tlb_flush_page(env
, page
);
2533 tlb
->size
= booke_tlb_to_page_size((T1
>> 7) & 0x7);
2534 /* We cannot handle TLB size < TARGET_PAGE_SIZE.
2535 * If this ever occurs, one should use the ppcemb target instead
2536 * of the ppc or ppc64 one
2538 if ((T1
& 0x40) && tlb
->size
< TARGET_PAGE_SIZE
) {
2539 cpu_abort(env
, "TLB size %u < %u are not supported (%d)\n",
2540 tlb
->size
, TARGET_PAGE_SIZE
, (int)((T1
>> 7) & 0x7));
2542 tlb
->EPN
= (T1
& 0xFFFFFC00) & ~(tlb
->size
- 1);
2544 tlb
->prot
|= PAGE_VALID
;
2546 tlb
->prot
&= ~PAGE_VALID
;
2548 /* XXX: TO BE FIXED */
2549 cpu_abort(env
, "Little-endian TLB entries are not supported by now\n");
2551 tlb
->PID
= env
->spr
[SPR_40x_PID
]; /* PID */
2552 tlb
->attr
= T1
& 0xFF;
2553 #if defined (DEBUG_SOFTWARE_TLB)
2554 if (loglevel
!= 0) {
2555 fprintf(logfile
, "%s: set up TLB %d RPN " PADDRX
" EPN " ADDRX
2556 " size " ADDRX
" prot %c%c%c%c PID %d\n", __func__
,
2557 (int)T0
, tlb
->RPN
, tlb
->EPN
, tlb
->size
,
2558 tlb
->prot
& PAGE_READ
? 'r' : '-',
2559 tlb
->prot
& PAGE_WRITE
? 'w' : '-',
2560 tlb
->prot
& PAGE_EXEC
? 'x' : '-',
2561 tlb
->prot
& PAGE_VALID
? 'v' : '-', (int)tlb
->PID
);
2564 /* Invalidate new TLB (if valid) */
2565 if (tlb
->prot
& PAGE_VALID
) {
2566 end
= tlb
->EPN
+ tlb
->size
;
2567 #if defined (DEBUG_SOFTWARE_TLB)
2568 if (loglevel
!= 0) {
2569 fprintf(logfile
, "%s: invalidate TLB %d start " ADDRX
2570 " end " ADDRX
"\n", __func__
, (int)T0
, tlb
->EPN
, end
);
2573 for (page
= tlb
->EPN
; page
< end
; page
+= TARGET_PAGE_SIZE
)
2574 tlb_flush_page(env
, page
);
2578 void do_4xx_tlbwe_lo (void)
2582 #if defined (DEBUG_SOFTWARE_TLB)
2583 if (loglevel
!= 0) {
2584 fprintf(logfile
, "%s T0 " REGX
" T1 " REGX
"\n", __func__
, T0
, T1
);
2588 tlb
= &env
->tlb
[T0
].tlbe
;
2589 tlb
->RPN
= T1
& 0xFFFFFC00;
2590 tlb
->prot
= PAGE_READ
;
2592 tlb
->prot
|= PAGE_EXEC
;
2594 tlb
->prot
|= PAGE_WRITE
;
2595 #if defined (DEBUG_SOFTWARE_TLB)
2596 if (loglevel
!= 0) {
2597 fprintf(logfile
, "%s: set up TLB %d RPN " PADDRX
" EPN " ADDRX
2598 " size " ADDRX
" prot %c%c%c%c PID %d\n", __func__
,
2599 (int)T0
, tlb
->RPN
, tlb
->EPN
, tlb
->size
,
2600 tlb
->prot
& PAGE_READ
? 'r' : '-',
2601 tlb
->prot
& PAGE_WRITE
? 'w' : '-',
2602 tlb
->prot
& PAGE_EXEC
? 'x' : '-',
2603 tlb
->prot
& PAGE_VALID
? 'v' : '-', (int)tlb
->PID
);
2607 #endif /* !CONFIG_USER_ONLY */