target-ppc/exec.h

   1 /*
   2  *  PowerPC emulation definitions for qemu.
   3  *
   4  *  Copyright (c) 2003-2007 Jocelyn Mayer
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #if !defined (__PPC_H__)
  21 #define __PPC_H__
  22
  23 #include "config.h"
  24
  25 #include "dyngen-exec.h"
  26
  27 #include "cpu.h"
  28 #include "exec-all.h"
  29
  30 /* For normal operations, precise emulation should not be needed */
  31 //#define USE_PRECISE_EMULATION 1
  32 #define USE_PRECISE_EMULATION 0
  33
  34 register struct CPUPPCState *env asm(AREG0);
  35 #if TARGET_LONG_BITS > HOST_LONG_BITS
  36 /* no registers can be used */
  37 #define T0 (env->t0)
  38 #define T1 (env->t1)
  39 #define T2 (env->t2)
  40 #else
  41 register unsigned long T0 asm(AREG1);
  42 register unsigned long T1 asm(AREG2);
  43 register unsigned long T2 asm(AREG3);
  44 #endif
  45 /* We may, sometime, need 64 bits registers on 32 bits target */
  46 #if TARGET_GPR_BITS > HOST_LONG_BITS
  47 /* no registers can be used */
  48 #define T0_64 (env->t0)
  49 #define T1_64 (env->t1)
  50 #define T2_64 (env->t2)
  51 #else
  52 #define T0_64 T0
  53 #define T1_64 T1
  54 #define T2_64 T2
  55 #endif
  56 /* Provision for Altivec */
  57 #define T0_avr (env->t0_avr)
  58 #define T1_avr (env->t1_avr)
  59 #define T2_avr (env->t2_avr)
  60
  61 /* XXX: to clean: remove this mess */
  62 #define PARAM(n) ((uint32_t)PARAM##n)
  63 #define SPARAM(n) ((int32_t)PARAM##n)
  64
  65 #define FT0 (env->ft0)
  66 #define FT1 (env->ft1)
  67 #define FT2 (env->ft2)
  68
  69 #if defined (DEBUG_OP)
  70 # define RETURN() __asm__ __volatile__("nop" : : : "memory");
  71 #else
  72 # define RETURN() __asm__ __volatile__("" : : : "memory");
  73 #endif
  74
  75 static inline target_ulong rotl8 (target_ulong i, int n)
  76 {
  77     return (((uint8_t)i << n) | ((uint8_t)i >> (8 - n)));
  78 }
  79
  80 static inline target_ulong rotl16 (target_ulong i, int n)
  81 {
  82     return (((uint16_t)i << n) | ((uint16_t)i >> (16 - n)));
  83 }
  84
  85 static inline target_ulong rotl32 (target_ulong i, int n)
  86 {
  87     return (((uint32_t)i << n) | ((uint32_t)i >> (32 - n)));
  88 }
  89
  90 #if defined(TARGET_PPC64)
  91 static inline target_ulong rotl64 (target_ulong i, int n)
  92 {
  93     return (((uint64_t)i << n) | ((uint64_t)i >> (64 - n)));
  94 }
  95 #endif
  96
  97 #if !defined(CONFIG_USER_ONLY)
  98 #include "softmmu_exec.h"
  99 #endif /* !defined(CONFIG_USER_ONLY) */
 100
 101 void do_raise_exception_err (uint32_t exception, int error_code);
 102 void do_raise_exception (uint32_t exception);
 103
 104 int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong vaddr,
 105                           int rw, int access_type, int check_BATs);
 106
 107 void ppc6xx_tlb_invalidate_all (CPUState *env);
 108 void ppc6xx_tlb_invalidate_virt (CPUState *env, target_ulong eaddr,
 109                                  int is_code);
 110 void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
 111                        target_ulong pte0, target_ulong pte1);
 112 void ppc4xx_tlb_invalidate_all (CPUState *env);
 113
 114 static inline void env_to_regs(void)
 115 {
 116 }
 117
 118 static inline void regs_to_env(void)
 119 {
 120 }
 121
 122 int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
 123                               int is_user, int is_softmmu);
 124
 125 static inline int cpu_halted(CPUState *env) {
 126     if (!env->halted)
 127         return 0;
 128     if (env->msr[MSR_EE] && (env->interrupt_request & CPU_INTERRUPT_HARD)) {
 129         env->halted = 0;
 130         return 0;
 131     }
 132     return EXCP_HALTED;
 133 }
 134
 135 #endif /* !defined (__PPC_H__) */