target-mips/exec.h

   1 #if !defined(__QEMU_MIPS_EXEC_H__)
   2 #define __QEMU_MIPS_EXEC_H__
   3
   4 //#define DEBUG_OP
   5
   6 #include "config.h"
   7 #include "mips-defs.h"
   8 #include "dyngen-exec.h"
   9 #include "cpu-defs.h"
  10
  11 register struct CPUMIPSState *env asm(AREG0);
  12
  13 #if TARGET_LONG_BITS > HOST_LONG_BITS
  14 #define T0 (env->t0)
  15 #define T1 (env->t1)
  16 #define T2 (env->t2)
  17 #else
  18 register target_ulong T0 asm(AREG1);
  19 register target_ulong T1 asm(AREG2);
  20 register target_ulong T2 asm(AREG3);
  21 #endif
  22
  23 #if defined (USE_HOST_FLOAT_REGS)
  24 #error "implement me."
  25 #else
  26 #define FDT0 (env->ft0.fd)
  27 #define FDT1 (env->ft1.fd)
  28 #define FDT2 (env->ft2.fd)
  29 #define FST0 (env->ft0.fs[FP_ENDIAN_IDX])
  30 #define FST1 (env->ft1.fs[FP_ENDIAN_IDX])
  31 #define FST2 (env->ft2.fs[FP_ENDIAN_IDX])
  32 #define FSTH0 (env->ft0.fs[!FP_ENDIAN_IDX])
  33 #define FSTH1 (env->ft1.fs[!FP_ENDIAN_IDX])
  34 #define FSTH2 (env->ft2.fs[!FP_ENDIAN_IDX])
  35 #define DT0 (env->ft0.d)
  36 #define DT1 (env->ft1.d)
  37 #define DT2 (env->ft2.d)
  38 #define WT0 (env->ft0.w[FP_ENDIAN_IDX])
  39 #define WT1 (env->ft1.w[FP_ENDIAN_IDX])
  40 #define WT2 (env->ft2.w[FP_ENDIAN_IDX])
  41 #define WTH0 (env->ft0.w[!FP_ENDIAN_IDX])
  42 #define WTH1 (env->ft1.w[!FP_ENDIAN_IDX])
  43 #define WTH2 (env->ft2.w[!FP_ENDIAN_IDX])
  44 #endif
  45
  46 #if defined (DEBUG_OP)
  47 # define RETURN() __asm__ __volatile__("nop" : : : "memory");
  48 #else
  49 # define RETURN() __asm__ __volatile__("" : : : "memory");
  50 #endif
  51
  52 #include "cpu.h"
  53 #include "exec-all.h"
  54
  55 #if !defined(CONFIG_USER_ONLY)
  56 #include "softmmu_exec.h"
  57 #endif /* !defined(CONFIG_USER_ONLY) */
  58
  59 #ifdef TARGET_MIPS64
  60 #if TARGET_LONG_BITS > HOST_LONG_BITS
  61 void do_dsll (void);
  62 void do_dsll32 (void);
  63 void do_dsra (void);
  64 void do_dsra32 (void);
  65 void do_dsrl (void);
  66 void do_dsrl32 (void);
  67 void do_drotr (void);
  68 void do_drotr32 (void);
  69 void do_dsllv (void);
  70 void do_dsrav (void);
  71 void do_dsrlv (void);
  72 void do_drotrv (void);
  73 #endif
  74 #endif
  75
  76 #if HOST_LONG_BITS < 64
  77 void do_div (void);
  78 #endif
  79 #if TARGET_LONG_BITS > HOST_LONG_BITS
  80 void do_mult (void);
  81 void do_multu (void);
  82 void do_madd (void);
  83 void do_maddu (void);
  84 void do_msub (void);
  85 void do_msubu (void);
  86 #endif
  87 #ifdef TARGET_MIPS64
  88 void do_ddiv (void);
  89 #if TARGET_LONG_BITS > HOST_LONG_BITS
  90 void do_ddivu (void);
  91 #endif
  92 #endif
  93 void do_mfc0_random(void);
  94 void do_mfc0_count(void);
  95 void do_mtc0_entryhi(uint32_t in);
  96 void do_mtc0_status_debug(uint32_t old, uint32_t val);
  97 void do_mtc0_status_irqraise_debug(void);
  98 void dump_fpu(CPUState *env);
  99 void fpu_dump_state(CPUState *env, FILE *f,
 100                     int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
 101                     int flags);
 102 void dump_sc (void);
 103 void do_lwl_raw (uint32_t);
 104 void do_lwr_raw (uint32_t);
 105 uint32_t do_swl_raw (uint32_t);
 106 uint32_t do_swr_raw (uint32_t);
 107 #ifdef TARGET_MIPS64
 108 void do_ldl_raw (uint64_t);
 109 void do_ldr_raw (uint64_t);
 110 uint64_t do_sdl_raw (uint64_t);
 111 uint64_t do_sdr_raw (uint64_t);
 112 #endif
 113 #if !defined(CONFIG_USER_ONLY)
 114 void do_lwl_user (uint32_t);
 115 void do_lwl_kernel (uint32_t);
 116 void do_lwr_user (uint32_t);
 117 void do_lwr_kernel (uint32_t);
 118 uint32_t do_swl_user (uint32_t);
 119 uint32_t do_swl_kernel (uint32_t);
 120 uint32_t do_swr_user (uint32_t);
 121 uint32_t do_swr_kernel (uint32_t);
 122 #ifdef TARGET_MIPS64
 123 void do_ldl_user (uint64_t);
 124 void do_ldl_kernel (uint64_t);
 125 void do_ldr_user (uint64_t);
 126 void do_ldr_kernel (uint64_t);
 127 uint64_t do_sdl_user (uint64_t);
 128 uint64_t do_sdl_kernel (uint64_t);
 129 uint64_t do_sdr_user (uint64_t);
 130 uint64_t do_sdr_kernel (uint64_t);
 131 #endif
 132 #endif
 133 void do_pmon (int function);
 134
 135 void dump_sc (void);
 136
 137 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
 138                                int is_user, int is_softmmu);
 139 void do_interrupt (CPUState *env);
 140 void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra);
 141
 142 void cpu_loop_exit(void);
 143 void do_raise_exception_err (uint32_t exception, int error_code);
 144 void do_raise_exception (uint32_t exception);
 145 void do_raise_exception_direct_err (uint32_t exception, int error_code);
 146 void do_raise_exception_direct (uint32_t exception);
 147
 148 void cpu_dump_state(CPUState *env, FILE *f,
 149                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
 150                     int flags);
 151 void cpu_mips_irqctrl_init (void);
 152 uint32_t cpu_mips_get_random (CPUState *env);
 153 uint32_t cpu_mips_get_count (CPUState *env);
 154 void cpu_mips_store_count (CPUState *env, uint32_t value);
 155 void cpu_mips_store_compare (CPUState *env, uint32_t value);
 156 void cpu_mips_update_irq (CPUState *env);
 157 void cpu_mips_clock_init (CPUState *env);
 158 void cpu_mips_tlb_flush (CPUState *env, int flush_global);
 159
 160 void do_ctc1 (void);
 161
 162 #define FOP_PROTO(op)              \
 163 void do_float_ ## op ## _s(void);  \
 164 void do_float_ ## op ## _d(void);
 165 FOP_PROTO(roundl)
 166 FOP_PROTO(roundw)
 167 FOP_PROTO(truncl)
 168 FOP_PROTO(truncw)
 169 FOP_PROTO(ceill)
 170 FOP_PROTO(ceilw)
 171 FOP_PROTO(floorl)
 172 FOP_PROTO(floorw)
 173 FOP_PROTO(rsqrt)
 174 FOP_PROTO(recip)
 175 #undef FOP_PROTO
 176
 177 #define FOP_PROTO(op)              \
 178 void do_float_ ## op ## _s(void);  \
 179 void do_float_ ## op ## _d(void);  \
 180 void do_float_ ## op ## _ps(void);
 181 FOP_PROTO(add)
 182 FOP_PROTO(sub)
 183 FOP_PROTO(mul)
 184 FOP_PROTO(div)
 185 FOP_PROTO(recip1)
 186 FOP_PROTO(recip2)
 187 FOP_PROTO(rsqrt1)
 188 FOP_PROTO(rsqrt2)
 189 #undef FOP_PROTO
 190
 191 void do_float_cvtd_s(void);
 192 void do_float_cvtd_w(void);
 193 void do_float_cvtd_l(void);
 194 void do_float_cvtl_d(void);
 195 void do_float_cvtl_s(void);
 196 void do_float_cvtps_pw(void);
 197 void do_float_cvtpw_ps(void);
 198 void do_float_cvts_d(void);
 199 void do_float_cvts_w(void);
 200 void do_float_cvts_l(void);
 201 void do_float_cvts_pl(void);
 202 void do_float_cvts_pu(void);
 203 void do_float_cvtw_s(void);
 204 void do_float_cvtw_d(void);
 205
 206 void do_float_addr_ps(void);
 207 void do_float_mulr_ps(void);
 208
 209 #define FOP_PROTO(op)                      \
 210 void do_cmp_d_ ## op(long cc);             \
 211 void do_cmpabs_d_ ## op(long cc);          \
 212 void do_cmp_s_ ## op(long cc);             \
 213 void do_cmpabs_s_ ## op(long cc);          \
 214 void do_cmp_ps_ ## op(long cc);            \
 215 void do_cmpabs_ps_ ## op(long cc);
 216
 217 FOP_PROTO(f)
 218 FOP_PROTO(un)
 219 FOP_PROTO(eq)
 220 FOP_PROTO(ueq)
 221 FOP_PROTO(olt)
 222 FOP_PROTO(ult)
 223 FOP_PROTO(ole)
 224 FOP_PROTO(ule)
 225 FOP_PROTO(sf)
 226 FOP_PROTO(ngle)
 227 FOP_PROTO(seq)
 228 FOP_PROTO(ngl)
 229 FOP_PROTO(lt)
 230 FOP_PROTO(nge)
 231 FOP_PROTO(le)
 232 FOP_PROTO(ngt)
 233 #undef FOP_PROTO
 234
 235 static inline void env_to_regs(void)
 236 {
 237 }
 238
 239 static inline void regs_to_env(void)
 240 {
 241 }
 242
 243 static inline int cpu_halted(CPUState *env) {
 244     if (!env->halted)
 245         return 0;
 246     if (env->interrupt_request &
 247         (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)) {
 248         env->halted = 0;
 249         return 0;
 250     }
 251     return EXCP_HALTED;
 252 }
 253
 254 #endif /* !defined(__QEMU_MIPS_EXEC_H__) */