Fix typo in comment, by Andreas Faerber.
[qemu/dscho.git] / target-arm / op_template.h
blobfb2add15d567058671cff9103cb0b942414ac665
1 /*
2 * ARM micro operations (templates for various register related
3 * operations)
4 *
5 * Copyright (c) 2003 Fabrice Bellard
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #ifndef SET_REG
23 #define SET_REG(x) REG = x
24 #endif
26 void OPPROTO glue(op_movl_T0_, REGNAME)(void)
28 T0 = REG;
31 void OPPROTO glue(op_movl_T1_, REGNAME)(void)
33 T1 = REG;
36 void OPPROTO glue(op_movl_T2_, REGNAME)(void)
38 T2 = REG;
41 void OPPROTO glue(glue(op_movl_, REGNAME), _T0)(void)
43 SET_REG (T0);
46 void OPPROTO glue(glue(op_movl_, REGNAME), _T1)(void)
48 SET_REG (T1);
51 #undef REG
52 #undef REGNAME
53 #undef SET_REG