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Fix typo in comment, by Andreas Faerber.
[qemu/dscho.git] / linux-user / main.c
blob32fa43d47634dd8c43c3fe542a6c9eee96b7e830
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28
29 #define DEBUG_LOGFILE "/tmp/qemu.log"
30
31 #ifdef __APPLE__
32 #include <crt_externs.h>
33 # define environ (*_NSGetEnviron())
34 #endif
35
36 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
37 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
38
39 #if defined(__i386__) && !defined(CONFIG_STATIC)
40 /* Force usage of an ELF interpreter even if it is an ELF shared
41 object ! */
42 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
43 #endif
44
45 /* for recent libc, we add these dummy symbols which are not declared
46 when generating a linked object (bug in ld ?) */
47 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
48 long __preinit_array_start[0];
49 long __preinit_array_end[0];
50 long __init_array_start[0];
51 long __init_array_end[0];
52 long __fini_array_start[0];
53 long __fini_array_end[0];
54 #endif
55
56 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
57 we allocate a bigger stack. Need a better solution, for example
58 by remapping the process stack directly at the right place */
59 unsigned long x86_stack_size = 512 * 1024;
60
61 void gemu_log(const char *fmt, ...)
62 {
63 va_list ap;
64
65 va_start(ap, fmt);
66 vfprintf(stderr, fmt, ap);
67 va_end(ap);
68 }
69
70 void cpu_outb(CPUState *env, int addr, int val)
71 {
72 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
73 }
74
75 void cpu_outw(CPUState *env, int addr, int val)
76 {
77 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
78 }
79
80 void cpu_outl(CPUState *env, int addr, int val)
81 {
82 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
83 }
84
85 int cpu_inb(CPUState *env, int addr)
86 {
87 fprintf(stderr, "inb: port=0x%04x\n", addr);
88 return 0;
89 }
90
91 int cpu_inw(CPUState *env, int addr)
92 {
93 fprintf(stderr, "inw: port=0x%04x\n", addr);
94 return 0;
95 }
96
97 int cpu_inl(CPUState *env, int addr)
98 {
99 fprintf(stderr, "inl: port=0x%04x\n", addr);
100 return 0;
101 }
102
103 int cpu_get_pic_interrupt(CPUState *env)
104 {
105 return -1;
106 }
107
108 /* timers for rdtsc */
109
110 #if 0
111
112 static uint64_t emu_time;
113
114 int64_t cpu_get_real_ticks(void)
115 {
116 return emu_time++;
117 }
118
119 #endif
120
121 #ifdef TARGET_I386
122 /***********************************************************/
123 /* CPUX86 core interface */
124
125 void cpu_smm_update(CPUState *env)
126 {
127 }
128
129 uint64_t cpu_get_tsc(CPUX86State *env)
130 {
131 return cpu_get_real_ticks();
132 }
133
134 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
135 int flags)
136 {
137 unsigned int e1, e2;
138 uint32_t *p;
139 e1 = (addr << 16) | (limit & 0xffff);
140 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
141 e2 |= flags;
142 p = ptr;
143 p[0] = tswapl(e1);
144 p[1] = tswapl(e2);
145 }
146
147 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
148 unsigned long addr, unsigned int sel)
149 {
150 unsigned int e1, e2;
151 uint32_t *p;
152 e1 = (addr & 0xffff) | (sel << 16);
153 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
154 p = ptr;
155 p[0] = tswapl(e1);
156 p[1] = tswapl(e2);
157 }
158
159 uint64_t gdt_table[6];
160 uint64_t idt_table[256];
161
162 /* only dpl matters as we do only user space emulation */
163 static void set_idt(int n, unsigned int dpl)
164 {
165 set_gate(idt_table + n, 0, dpl, 0, 0);
166 }
167
168 void cpu_loop(CPUX86State *env)
169 {
170 int trapnr;
171 target_ulong pc;
172 target_siginfo_t info;
173
174 for(;;) {
175 trapnr = cpu_x86_exec(env);
176 switch(trapnr) {
177 case 0x80:
178 /* linux syscall */
179 env->regs[R_EAX] = do_syscall(env,
180 env->regs[R_EAX],
181 env->regs[R_EBX],
182 env->regs[R_ECX],
183 env->regs[R_EDX],
184 env->regs[R_ESI],
185 env->regs[R_EDI],
186 env->regs[R_EBP]);
187 break;
188 case EXCP0B_NOSEG:
189 case EXCP0C_STACK:
190 info.si_signo = SIGBUS;
191 info.si_errno = 0;
192 info.si_code = TARGET_SI_KERNEL;
193 info._sifields._sigfault._addr = 0;
194 queue_signal(info.si_signo, &info);
195 break;
196 case EXCP0D_GPF:
197 #ifndef TARGET_X86_64
198 if (env->eflags & VM_MASK) {
199 handle_vm86_fault(env);
200 } else
201 #endif
202 {
203 info.si_signo = SIGSEGV;
204 info.si_errno = 0;
205 info.si_code = TARGET_SI_KERNEL;
206 info._sifields._sigfault._addr = 0;
207 queue_signal(info.si_signo, &info);
208 }
209 break;
210 case EXCP0E_PAGE:
211 info.si_signo = SIGSEGV;
212 info.si_errno = 0;
213 if (!(env->error_code & 1))
214 info.si_code = TARGET_SEGV_MAPERR;
215 else
216 info.si_code = TARGET_SEGV_ACCERR;
217 info._sifields._sigfault._addr = env->cr[2];
218 queue_signal(info.si_signo, &info);
219 break;
220 case EXCP00_DIVZ:
221 #ifndef TARGET_X86_64
222 if (env->eflags & VM_MASK) {
223 handle_vm86_trap(env, trapnr);
224 } else
225 #endif
226 {
227 /* division by zero */
228 info.si_signo = SIGFPE;
229 info.si_errno = 0;
230 info.si_code = TARGET_FPE_INTDIV;
231 info._sifields._sigfault._addr = env->eip;
232 queue_signal(info.si_signo, &info);
233 }
234 break;
235 case EXCP01_SSTP:
236 case EXCP03_INT3:
237 #ifndef TARGET_X86_64
238 if (env->eflags & VM_MASK) {
239 handle_vm86_trap(env, trapnr);
240 } else
241 #endif
242 {
243 info.si_signo = SIGTRAP;
244 info.si_errno = 0;
245 if (trapnr == EXCP01_SSTP) {
246 info.si_code = TARGET_TRAP_BRKPT;
247 info._sifields._sigfault._addr = env->eip;
248 } else {
249 info.si_code = TARGET_SI_KERNEL;
250 info._sifields._sigfault._addr = 0;
251 }
252 queue_signal(info.si_signo, &info);
253 }
254 break;
255 case EXCP04_INTO:
256 case EXCP05_BOUND:
257 #ifndef TARGET_X86_64
258 if (env->eflags & VM_MASK) {
259 handle_vm86_trap(env, trapnr);
260 } else
261 #endif
262 {
263 info.si_signo = SIGSEGV;
264 info.si_errno = 0;
265 info.si_code = TARGET_SI_KERNEL;
266 info._sifields._sigfault._addr = 0;
267 queue_signal(info.si_signo, &info);
268 }
269 break;
270 case EXCP06_ILLOP:
271 info.si_signo = SIGILL;
272 info.si_errno = 0;
273 info.si_code = TARGET_ILL_ILLOPN;
274 info._sifields._sigfault._addr = env->eip;
275 queue_signal(info.si_signo, &info);
276 break;
277 case EXCP_INTERRUPT:
278 /* just indicate that signals should be handled asap */
279 break;
280 case EXCP_DEBUG:
281 {
282 int sig;
283
284 sig = gdb_handlesig (env, TARGET_SIGTRAP);
285 if (sig)
286 {
287 info.si_signo = sig;
288 info.si_errno = 0;
289 info.si_code = TARGET_TRAP_BRKPT;
290 queue_signal(info.si_signo, &info);
291 }
292 }
293 break;
294 default:
295 pc = env->segs[R_CS].base + env->eip;
296 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
297 (long)pc, trapnr);
298 abort();
299 }
300 process_pending_signals(env);
301 }
302 }
303 #endif
304
305 #ifdef TARGET_ARM
306
307 /* XXX: find a better solution */
308 extern void tb_invalidate_page_range(target_ulong start, target_ulong end);
309
310 static void arm_cache_flush(target_ulong start, target_ulong last)
311 {
312 target_ulong addr, last1;
313
314 if (last < start)
315 return;
316 addr = start;
317 for(;;) {
318 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
319 if (last1 > last)
320 last1 = last;
321 tb_invalidate_page_range(addr, last1 + 1);
322 if (last1 == last)
323 break;
324 addr = last1 + 1;
325 }
326 }
327
328 void cpu_loop(CPUARMState *env)
329 {
330 int trapnr;
331 unsigned int n, insn;
332 target_siginfo_t info;
333 uint32_t addr;
334
335 for(;;) {
336 trapnr = cpu_arm_exec(env);
337 switch(trapnr) {
338 case EXCP_UDEF:
339 {
340 TaskState *ts = env->opaque;
341 uint32_t opcode;
342
343 /* we handle the FPU emulation here, as Linux */
344 /* we get the opcode */
345 opcode = tget32(env->regs[15]);
346
347 if (EmulateAll(opcode, &ts->fpa, env) == 0) {
348 info.si_signo = SIGILL;
349 info.si_errno = 0;
350 info.si_code = TARGET_ILL_ILLOPN;
351 info._sifields._sigfault._addr = env->regs[15];
352 queue_signal(info.si_signo, &info);
353 } else {
354 /* increment PC */
355 env->regs[15] += 4;
356 }
357 }
358 break;
359 case EXCP_SWI:
360 case EXCP_BKPT:
361 {
362 env->eabi = 1;
363 /* system call */
364 if (trapnr == EXCP_BKPT) {
365 if (env->thumb) {
366 insn = tget16(env->regs[15]);
367 n = insn & 0xff;
368 env->regs[15] += 2;
369 } else {
370 insn = tget32(env->regs[15]);
371 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
372 env->regs[15] += 4;
373 }
374 } else {
375 if (env->thumb) {
376 insn = tget16(env->regs[15] - 2);
377 n = insn & 0xff;
378 } else {
379 insn = tget32(env->regs[15] - 4);
380 n = insn & 0xffffff;
381 }
382 }
383
384 if (n == ARM_NR_cacheflush) {
385 arm_cache_flush(env->regs[0], env->regs[1]);
386 } else if (n == ARM_NR_semihosting
387 || n == ARM_NR_thumb_semihosting) {
388 env->regs[0] = do_arm_semihosting (env);
389 } else if (n == 0 || n >= ARM_SYSCALL_BASE
390 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
391 /* linux syscall */
392 if (env->thumb || n == 0) {
393 n = env->regs[7];
394 } else {
395 n -= ARM_SYSCALL_BASE;
396 env->eabi = 0;
397 }
398 env->regs[0] = do_syscall(env,
399 n,
400 env->regs[0],
401 env->regs[1],
402 env->regs[2],
403 env->regs[3],
404 env->regs[4],
405 env->regs[5]);
406 } else {
407 goto error;
408 }
409 }
410 break;
411 case EXCP_INTERRUPT:
412 /* just indicate that signals should be handled asap */
413 break;
414 case EXCP_PREFETCH_ABORT:
415 addr = env->cp15.c6_data;
416 goto do_segv;
417 case EXCP_DATA_ABORT:
418 addr = env->cp15.c6_insn;
419 goto do_segv;
420 do_segv:
421 {
422 info.si_signo = SIGSEGV;
423 info.si_errno = 0;
424 /* XXX: check env->error_code */
425 info.si_code = TARGET_SEGV_MAPERR;
426 info._sifields._sigfault._addr = addr;
427 queue_signal(info.si_signo, &info);
428 }
429 break;
430 case EXCP_DEBUG:
431 {
432 int sig;
433
434 sig = gdb_handlesig (env, TARGET_SIGTRAP);
435 if (sig)
436 {
437 info.si_signo = sig;
438 info.si_errno = 0;
439 info.si_code = TARGET_TRAP_BRKPT;
440 queue_signal(info.si_signo, &info);
441 }
442 }
443 break;
444 default:
445 error:
446 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
447 trapnr);
448 cpu_dump_state(env, stderr, fprintf, 0);
449 abort();
450 }
451 process_pending_signals(env);
452 }
453 }
454
455 #endif
456
457 #ifdef TARGET_SPARC
458
459 //#define DEBUG_WIN
460
461 /* WARNING: dealing with register windows _is_ complicated. More info
462 can be found at http://www.sics.se/~psm/sparcstack.html */
463 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
464 {
465 index = (index + cwp * 16) & (16 * NWINDOWS - 1);
466 /* wrap handling : if cwp is on the last window, then we use the
467 registers 'after' the end */
468 if (index < 8 && env->cwp == (NWINDOWS - 1))
469 index += (16 * NWINDOWS);
470 return index;
471 }
472
473 /* save the register window 'cwp1' */
474 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
475 {
476 unsigned int i;
477 target_ulong sp_ptr;
478
479 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
480 #if defined(DEBUG_WIN)
481 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
482 (int)sp_ptr, cwp1);
483 #endif
484 for(i = 0; i < 16; i++) {
485 tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
486 sp_ptr += sizeof(target_ulong);
487 }
488 }
489
490 static void save_window(CPUSPARCState *env)
491 {
492 #ifndef TARGET_SPARC64
493 unsigned int new_wim;
494 new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
495 ((1LL << NWINDOWS) - 1);
496 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
497 env->wim = new_wim;
498 #else
499 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
500 env->cansave++;
501 env->canrestore--;
502 #endif
503 }
504
505 static void restore_window(CPUSPARCState *env)
506 {
507 unsigned int new_wim, i, cwp1;
508 target_ulong sp_ptr;
509
510 new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
511 ((1LL << NWINDOWS) - 1);
512
513 /* restore the invalid window */
514 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
515 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
516 #if defined(DEBUG_WIN)
517 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
518 (int)sp_ptr, cwp1);
519 #endif
520 for(i = 0; i < 16; i++) {
521 env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);
522 sp_ptr += sizeof(target_ulong);
523 }
524 env->wim = new_wim;
525 #ifdef TARGET_SPARC64
526 env->canrestore++;
527 if (env->cleanwin < NWINDOWS - 1)
528 env->cleanwin++;
529 env->cansave--;
530 #endif
531 }
532
533 static void flush_windows(CPUSPARCState *env)
534 {
535 int offset, cwp1;
536
537 offset = 1;
538 for(;;) {
539 /* if restore would invoke restore_window(), then we can stop */
540 cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
541 if (env->wim & (1 << cwp1))
542 break;
543 save_window_offset(env, cwp1);
544 offset++;
545 }
546 /* set wim so that restore will reload the registers */
547 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
548 env->wim = 1 << cwp1;
549 #if defined(DEBUG_WIN)
550 printf("flush_windows: nb=%d\n", offset - 1);
551 #endif
552 }
553
554 void cpu_loop (CPUSPARCState *env)
555 {
556 int trapnr, ret;
557 target_siginfo_t info;
558
559 while (1) {
560 trapnr = cpu_sparc_exec (env);
561
562 switch (trapnr) {
563 #ifndef TARGET_SPARC64
564 case 0x88:
565 case 0x90:
566 #else
567 case 0x16d:
568 #endif
569 ret = do_syscall (env, env->gregs[1],
570 env->regwptr[0], env->regwptr[1],
571 env->regwptr[2], env->regwptr[3],
572 env->regwptr[4], env->regwptr[5]);
573 if ((unsigned int)ret >= (unsigned int)(-515)) {
574 #ifdef TARGET_SPARC64
575 env->xcc |= PSR_CARRY;
576 #else
577 env->psr |= PSR_CARRY;
578 #endif
579 ret = -ret;
580 } else {
581 #ifdef TARGET_SPARC64
582 env->xcc &= ~PSR_CARRY;
583 #else
584 env->psr &= ~PSR_CARRY;
585 #endif
586 }
587 env->regwptr[0] = ret;
588 /* next instruction */
589 env->pc = env->npc;
590 env->npc = env->npc + 4;
591 break;
592 case 0x83: /* flush windows */
593 flush_windows(env);
594 /* next instruction */
595 env->pc = env->npc;
596 env->npc = env->npc + 4;
597 break;
598 #ifndef TARGET_SPARC64
599 case TT_WIN_OVF: /* window overflow */
600 save_window(env);
601 break;
602 case TT_WIN_UNF: /* window underflow */
603 restore_window(env);
604 break;
605 case TT_TFAULT:
606 case TT_DFAULT:
607 {
608 info.si_signo = SIGSEGV;
609 info.si_errno = 0;
610 /* XXX: check env->error_code */
611 info.si_code = TARGET_SEGV_MAPERR;
612 info._sifields._sigfault._addr = env->mmuregs[4];
613 queue_signal(info.si_signo, &info);
614 }
615 break;
616 #else
617 case TT_SPILL: /* window overflow */
618 save_window(env);
619 break;
620 case TT_FILL: /* window underflow */
621 restore_window(env);
622 break;
623 case TT_TFAULT:
624 case TT_DFAULT:
625 {
626 info.si_signo = SIGSEGV;
627 info.si_errno = 0;
628 /* XXX: check env->error_code */
629 info.si_code = TARGET_SEGV_MAPERR;
630 if (trapnr == TT_DFAULT)
631 info._sifields._sigfault._addr = env->dmmuregs[4];
632 else
633 info._sifields._sigfault._addr = env->tpc[env->tl];
634 queue_signal(info.si_signo, &info);
635 }
636 break;
637 #endif
638 case EXCP_INTERRUPT:
639 /* just indicate that signals should be handled asap */
640 break;
641 case EXCP_DEBUG:
642 {
643 int sig;
644
645 sig = gdb_handlesig (env, TARGET_SIGTRAP);
646 if (sig)
647 {
648 info.si_signo = sig;
649 info.si_errno = 0;
650 info.si_code = TARGET_TRAP_BRKPT;
651 queue_signal(info.si_signo, &info);
652 }
653 }
654 break;
655 default:
656 printf ("Unhandled trap: 0x%x\n", trapnr);
657 cpu_dump_state(env, stderr, fprintf, 0);
658 exit (1);
659 }
660 process_pending_signals (env);
661 }
662 }
663
664 #endif
665
666 #ifdef TARGET_PPC
667
668 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
669 {
670 /* TO FIX */
671 return 0;
672 }
673
674 uint32_t cpu_ppc_load_tbl (CPUState *env)
675 {
676 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
677 }
678
679 uint32_t cpu_ppc_load_tbu (CPUState *env)
680 {
681 return cpu_ppc_get_tb(env) >> 32;
682 }
683
684 static void cpu_ppc_store_tb (CPUState *env, uint64_t value)
685 {
686 /* TO FIX */
687 }
688
689 void cpu_ppc_store_tbu (CPUState *env, uint32_t value)
690 {
691 cpu_ppc_store_tb(env, ((uint64_t)value << 32) | cpu_ppc_load_tbl(env));
692 }
693
694 void cpu_ppc_store_tbl (CPUState *env, uint32_t value)
695 {
696 cpu_ppc_store_tb(env, ((uint64_t)cpu_ppc_load_tbl(env) << 32) | value);
697 }
698
699 void cpu_ppc601_store_rtcu (CPUState *env, uint32_t value)
700 __attribute__ (( alias ("cpu_ppc_store_tbu") ));
701
702 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
703 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
704
705 void cpu_ppc601_store_rtcl (CPUState *env, uint32_t value)
706 {
707 cpu_ppc_store_tbl(env, value & 0x3FFFFF80);
708 }
709
710 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
711 {
712 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
713 }
714
715 void cpu_loop(CPUPPCState *env)
716 {
717 target_siginfo_t info;
718 int trapnr;
719 uint32_t ret;
720
721 for(;;) {
722 trapnr = cpu_ppc_exec(env);
723 if (trapnr != EXCP_SYSCALL_USER && trapnr != EXCP_BRANCH &&
724 trapnr != EXCP_TRACE) {
725 if (loglevel > 0) {
726 cpu_dump_state(env, logfile, fprintf, 0);
727 }
728 }
729 switch(trapnr) {
730 case EXCP_NONE:
731 break;
732 case EXCP_SYSCALL_USER:
733 /* system call */
734 /* WARNING:
735 * PPC ABI uses overflow flag in cr0 to signal an error
736 * in syscalls.
737 */
738 #if 0
739 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
740 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
741 #endif
742 env->crf[0] &= ~0x1;
743 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
744 env->gpr[5], env->gpr[6], env->gpr[7],
745 env->gpr[8]);
746 if (ret > (uint32_t)(-515)) {
747 env->crf[0] |= 0x1;
748 ret = -ret;
749 }
750 env->gpr[3] = ret;
751 #if 0
752 printf("syscall returned 0x%08x (%d)\n", ret, ret);
753 #endif
754 break;
755 case EXCP_RESET:
756 /* Should not happen ! */
757 fprintf(stderr, "RESET asked... Stop emulation\n");
758 if (loglevel)
759 fprintf(logfile, "RESET asked... Stop emulation\n");
760 abort();
761 case EXCP_MACHINE_CHECK:
762 fprintf(stderr, "Machine check exeption... Stop emulation\n");
763 if (loglevel)
764 fprintf(logfile, "RESET asked... Stop emulation\n");
765 info.si_signo = TARGET_SIGBUS;
766 info.si_errno = 0;
767 info.si_code = TARGET_BUS_OBJERR;
768 info._sifields._sigfault._addr = env->nip - 4;
769 queue_signal(info.si_signo, &info);
770 case EXCP_DSI:
771 fprintf(stderr, "Invalid data memory access: 0x" ADDRX "\n",
772 env->spr[SPR_DAR]);
773 if (loglevel) {
774 fprintf(logfile, "Invalid data memory access: 0x" ADDRX "\n",
775 env->spr[SPR_DAR]);
776 }
777 switch (env->error_code & 0xFF000000) {
778 case 0x40000000:
779 info.si_signo = TARGET_SIGSEGV;
780 info.si_errno = 0;
781 info.si_code = TARGET_SEGV_MAPERR;
782 break;
783 case 0x04000000:
784 info.si_signo = TARGET_SIGILL;
785 info.si_errno = 0;
786 info.si_code = TARGET_ILL_ILLADR;
787 break;
788 case 0x08000000:
789 info.si_signo = TARGET_SIGSEGV;
790 info.si_errno = 0;
791 info.si_code = TARGET_SEGV_ACCERR;
792 break;
793 default:
794 /* Let's send a regular segfault... */
795 fprintf(stderr, "Invalid segfault errno (%02x)\n",
796 env->error_code);
797 if (loglevel) {
798 fprintf(logfile, "Invalid segfault errno (%02x)\n",
799 env->error_code);
800 }
801 info.si_signo = TARGET_SIGSEGV;
802 info.si_errno = 0;
803 info.si_code = TARGET_SEGV_MAPERR;
804 break;
805 }
806 info._sifields._sigfault._addr = env->nip;
807 queue_signal(info.si_signo, &info);
808 break;
809 case EXCP_ISI:
810 fprintf(stderr, "Invalid instruction fetch\n");
811 if (loglevel)
812 fprintf(logfile, "Invalid instruction fetch\n");
813 switch (env->error_code & 0xFF000000) {
814 case 0x40000000:
815 info.si_signo = TARGET_SIGSEGV;
816 info.si_errno = 0;
817 info.si_code = TARGET_SEGV_MAPERR;
818 break;
819 case 0x10000000:
820 case 0x08000000:
821 info.si_signo = TARGET_SIGSEGV;
822 info.si_errno = 0;
823 info.si_code = TARGET_SEGV_ACCERR;
824 break;
825 default:
826 /* Let's send a regular segfault... */
827 fprintf(stderr, "Invalid segfault errno (%02x)\n",
828 env->error_code);
829 if (loglevel) {
830 fprintf(logfile, "Invalid segfault errno (%02x)\n",
831 env->error_code);
832 }
833 info.si_signo = TARGET_SIGSEGV;
834 info.si_errno = 0;
835 info.si_code = TARGET_SEGV_MAPERR;
836 break;
837 }
838 info._sifields._sigfault._addr = env->nip - 4;
839 queue_signal(info.si_signo, &info);
840 break;
841 case EXCP_EXTERNAL:
842 /* Should not happen ! */
843 fprintf(stderr, "External interruption... Stop emulation\n");
844 if (loglevel)
845 fprintf(logfile, "External interruption... Stop emulation\n");
846 abort();
847 case EXCP_ALIGN:
848 fprintf(stderr, "Invalid unaligned memory access\n");
849 if (loglevel)
850 fprintf(logfile, "Invalid unaligned memory access\n");
851 info.si_signo = TARGET_SIGBUS;
852 info.si_errno = 0;
853 info.si_code = TARGET_BUS_ADRALN;
854 info._sifields._sigfault._addr = env->nip - 4;
855 queue_signal(info.si_signo, &info);
856 break;
857 case EXCP_PROGRAM:
858 switch (env->error_code & ~0xF) {
859 case EXCP_FP:
860 fprintf(stderr, "Program exception\n");
861 if (loglevel)
862 fprintf(logfile, "Program exception\n");
863 /* Set FX */
864 env->fpscr[7] |= 0x8;
865 /* Finally, update FEX */
866 if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) &
867 ((env->fpscr[1] << 1) | (env->fpscr[0] >> 3)))
868 env->fpscr[7] |= 0x4;
869 info.si_signo = TARGET_SIGFPE;
870 info.si_errno = 0;
871 switch (env->error_code & 0xF) {
872 case EXCP_FP_OX:
873 info.si_code = TARGET_FPE_FLTOVF;
874 break;
875 case EXCP_FP_UX:
876 info.si_code = TARGET_FPE_FLTUND;
877 break;
878 case EXCP_FP_ZX:
879 case EXCP_FP_VXZDZ:
880 info.si_code = TARGET_FPE_FLTDIV;
881 break;
882 case EXCP_FP_XX:
883 info.si_code = TARGET_FPE_FLTRES;
884 break;
885 case EXCP_FP_VXSOFT:
886 info.si_code = TARGET_FPE_FLTINV;
887 break;
888 case EXCP_FP_VXNAN:
889 case EXCP_FP_VXISI:
890 case EXCP_FP_VXIDI:
891 case EXCP_FP_VXIMZ:
892 case EXCP_FP_VXVC:
893 case EXCP_FP_VXSQRT:
894 case EXCP_FP_VXCVI:
895 info.si_code = TARGET_FPE_FLTSUB;
896 break;
897 default:
898 fprintf(stderr, "Unknown floating point exception "
899 "(%02x)\n", env->error_code);
900 if (loglevel) {
901 fprintf(logfile, "Unknown floating point exception "
902 "(%02x)\n", env->error_code & 0xF);
903 }
904 }
905 break;
906 case EXCP_INVAL:
907 fprintf(stderr, "Invalid instruction\n");
908 if (loglevel)
909 fprintf(logfile, "Invalid instruction\n");
910 info.si_signo = TARGET_SIGILL;
911 info.si_errno = 0;
912 switch (env->error_code & 0xF) {
913 case EXCP_INVAL_INVAL:
914 info.si_code = TARGET_ILL_ILLOPC;
915 break;
916 case EXCP_INVAL_LSWX:
917 info.si_code = TARGET_ILL_ILLOPN;
918 break;
919 case EXCP_INVAL_SPR:
920 info.si_code = TARGET_ILL_PRVREG;
921 break;
922 case EXCP_INVAL_FP:
923 info.si_code = TARGET_ILL_COPROC;
924 break;
925 default:
926 fprintf(stderr, "Unknown invalid operation (%02x)\n",
927 env->error_code & 0xF);
928 if (loglevel) {
929 fprintf(logfile, "Unknown invalid operation (%02x)\n",
930 env->error_code & 0xF);
931 }
932 info.si_code = TARGET_ILL_ILLADR;
933 break;
934 }
935 break;
936 case EXCP_PRIV:
937 fprintf(stderr, "Privilege violation\n");
938 if (loglevel)
939 fprintf(logfile, "Privilege violation\n");
940 info.si_signo = TARGET_SIGILL;
941 info.si_errno = 0;
942 switch (env->error_code & 0xF) {
943 case EXCP_PRIV_OPC:
944 info.si_code = TARGET_ILL_PRVOPC;
945 break;
946 case EXCP_PRIV_REG:
947 info.si_code = TARGET_ILL_PRVREG;
948 break;
949 default:
950 fprintf(stderr, "Unknown privilege violation (%02x)\n",
951 env->error_code & 0xF);
952 info.si_code = TARGET_ILL_PRVOPC;
953 break;
954 }
955 break;
956 case EXCP_TRAP:
957 fprintf(stderr, "Tried to call a TRAP\n");
958 if (loglevel)
959 fprintf(logfile, "Tried to call a TRAP\n");
960 abort();
961 default:
962 /* Should not happen ! */
963 fprintf(stderr, "Unknown program exception (%02x)\n",
964 env->error_code);
965 if (loglevel) {
966 fprintf(logfile, "Unknwon program exception (%02x)\n",
967 env->error_code);
968 }
969 abort();
970 }
971 info._sifields._sigfault._addr = env->nip - 4;
972 queue_signal(info.si_signo, &info);
973 break;
974 case EXCP_NO_FP:
975 fprintf(stderr, "No floating point allowed\n");
976 if (loglevel)
977 fprintf(logfile, "No floating point allowed\n");
978 info.si_signo = TARGET_SIGILL;
979 info.si_errno = 0;
980 info.si_code = TARGET_ILL_COPROC;
981 info._sifields._sigfault._addr = env->nip - 4;
982 queue_signal(info.si_signo, &info);
983 break;
984 case EXCP_DECR:
985 /* Should not happen ! */
986 fprintf(stderr, "Decrementer exception\n");
987 if (loglevel)
988 fprintf(logfile, "Decrementer exception\n");
989 abort();
990 case EXCP_TRACE:
991 /* Do nothing: we use this to trace execution */
992 break;
993 case EXCP_FP_ASSIST:
994 /* Should not happen ! */
995 fprintf(stderr, "Floating point assist exception\n");
996 if (loglevel)
997 fprintf(logfile, "Floating point assist exception\n");
998 abort();
999 case EXCP_MTMSR:
1000 /* We reloaded the msr, just go on */
1001 if (msr_pr == 0) {
1002 fprintf(stderr, "Tried to go into supervisor mode !\n");
1003 if (loglevel)
1004 fprintf(logfile, "Tried to go into supervisor mode !\n");
1005 abort();
1006 }
1007 break;
1008 case EXCP_BRANCH:
1009 /* We stopped because of a jump... */
1010 break;
1011 case EXCP_INTERRUPT:
1012 /* Don't know why this should ever happen... */
1013 break;
1014 case EXCP_DEBUG:
1015 {
1016 int sig;
1017
1018 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1019 if (sig)
1020 {
1021 info.si_signo = sig;
1022 info.si_errno = 0;
1023 info.si_code = TARGET_TRAP_BRKPT;
1024 queue_signal(info.si_signo, &info);
1025 }
1026 }
1027 break;
1028 default:
1029 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1030 trapnr);
1031 if (loglevel) {
1032 fprintf(logfile, "qemu: unhandled CPU exception 0x%02x - "
1033 "0x%02x - aborting\n", trapnr, env->error_code);
1034 }
1035 abort();
1036 }
1037 process_pending_signals(env);
1038 }
1039 }
1040 #endif
1041
1042 #ifdef TARGET_MIPS
1043
1044 #define MIPS_SYS(name, args) args,
1045
1046 static const uint8_t mips_syscall_args[] = {
1047 MIPS_SYS(sys_syscall , 0) /* 4000 */
1048 MIPS_SYS(sys_exit , 1)
1049 MIPS_SYS(sys_fork , 0)
1050 MIPS_SYS(sys_read , 3)
1051 MIPS_SYS(sys_write , 3)
1052 MIPS_SYS(sys_open , 3) /* 4005 */
1053 MIPS_SYS(sys_close , 1)
1054 MIPS_SYS(sys_waitpid , 3)
1055 MIPS_SYS(sys_creat , 2)
1056 MIPS_SYS(sys_link , 2)
1057 MIPS_SYS(sys_unlink , 1) /* 4010 */
1058 MIPS_SYS(sys_execve , 0)
1059 MIPS_SYS(sys_chdir , 1)
1060 MIPS_SYS(sys_time , 1)
1061 MIPS_SYS(sys_mknod , 3)
1062 MIPS_SYS(sys_chmod , 2) /* 4015 */
1063 MIPS_SYS(sys_lchown , 3)
1064 MIPS_SYS(sys_ni_syscall , 0)
1065 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1066 MIPS_SYS(sys_lseek , 3)
1067 MIPS_SYS(sys_getpid , 0) /* 4020 */
1068 MIPS_SYS(sys_mount , 5)
1069 MIPS_SYS(sys_oldumount , 1)
1070 MIPS_SYS(sys_setuid , 1)
1071 MIPS_SYS(sys_getuid , 0)
1072 MIPS_SYS(sys_stime , 1) /* 4025 */
1073 MIPS_SYS(sys_ptrace , 4)
1074 MIPS_SYS(sys_alarm , 1)
1075 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1076 MIPS_SYS(sys_pause , 0)
1077 MIPS_SYS(sys_utime , 2) /* 4030 */
1078 MIPS_SYS(sys_ni_syscall , 0)
1079 MIPS_SYS(sys_ni_syscall , 0)
1080 MIPS_SYS(sys_access , 2)
1081 MIPS_SYS(sys_nice , 1)
1082 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1083 MIPS_SYS(sys_sync , 0)
1084 MIPS_SYS(sys_kill , 2)
1085 MIPS_SYS(sys_rename , 2)
1086 MIPS_SYS(sys_mkdir , 2)
1087 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1088 MIPS_SYS(sys_dup , 1)
1089 MIPS_SYS(sys_pipe , 0)
1090 MIPS_SYS(sys_times , 1)
1091 MIPS_SYS(sys_ni_syscall , 0)
1092 MIPS_SYS(sys_brk , 1) /* 4045 */
1093 MIPS_SYS(sys_setgid , 1)
1094 MIPS_SYS(sys_getgid , 0)
1095 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1096 MIPS_SYS(sys_geteuid , 0)
1097 MIPS_SYS(sys_getegid , 0) /* 4050 */
1098 MIPS_SYS(sys_acct , 0)
1099 MIPS_SYS(sys_umount , 2)
1100 MIPS_SYS(sys_ni_syscall , 0)
1101 MIPS_SYS(sys_ioctl , 3)
1102 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1103 MIPS_SYS(sys_ni_syscall , 2)
1104 MIPS_SYS(sys_setpgid , 2)
1105 MIPS_SYS(sys_ni_syscall , 0)
1106 MIPS_SYS(sys_olduname , 1)
1107 MIPS_SYS(sys_umask , 1) /* 4060 */
1108 MIPS_SYS(sys_chroot , 1)
1109 MIPS_SYS(sys_ustat , 2)
1110 MIPS_SYS(sys_dup2 , 2)
1111 MIPS_SYS(sys_getppid , 0)
1112 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1113 MIPS_SYS(sys_setsid , 0)
1114 MIPS_SYS(sys_sigaction , 3)
1115 MIPS_SYS(sys_sgetmask , 0)
1116 MIPS_SYS(sys_ssetmask , 1)
1117 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1118 MIPS_SYS(sys_setregid , 2)
1119 MIPS_SYS(sys_sigsuspend , 0)
1120 MIPS_SYS(sys_sigpending , 1)
1121 MIPS_SYS(sys_sethostname , 2)
1122 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1123 MIPS_SYS(sys_getrlimit , 2)
1124 MIPS_SYS(sys_getrusage , 2)
1125 MIPS_SYS(sys_gettimeofday, 2)
1126 MIPS_SYS(sys_settimeofday, 2)
1127 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1128 MIPS_SYS(sys_setgroups , 2)
1129 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1130 MIPS_SYS(sys_symlink , 2)
1131 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1132 MIPS_SYS(sys_readlink , 3) /* 4085 */
1133 MIPS_SYS(sys_uselib , 1)
1134 MIPS_SYS(sys_swapon , 2)
1135 MIPS_SYS(sys_reboot , 3)
1136 MIPS_SYS(old_readdir , 3)
1137 MIPS_SYS(old_mmap , 6) /* 4090 */
1138 MIPS_SYS(sys_munmap , 2)
1139 MIPS_SYS(sys_truncate , 2)
1140 MIPS_SYS(sys_ftruncate , 2)
1141 MIPS_SYS(sys_fchmod , 2)
1142 MIPS_SYS(sys_fchown , 3) /* 4095 */
1143 MIPS_SYS(sys_getpriority , 2)
1144 MIPS_SYS(sys_setpriority , 3)
1145 MIPS_SYS(sys_ni_syscall , 0)
1146 MIPS_SYS(sys_statfs , 2)
1147 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1148 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1149 MIPS_SYS(sys_socketcall , 2)
1150 MIPS_SYS(sys_syslog , 3)
1151 MIPS_SYS(sys_setitimer , 3)
1152 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1153 MIPS_SYS(sys_newstat , 2)
1154 MIPS_SYS(sys_newlstat , 2)
1155 MIPS_SYS(sys_newfstat , 2)
1156 MIPS_SYS(sys_uname , 1)
1157 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1158 MIPS_SYS(sys_vhangup , 0)
1159 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1160 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1161 MIPS_SYS(sys_wait4 , 4)
1162 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1163 MIPS_SYS(sys_sysinfo , 1)
1164 MIPS_SYS(sys_ipc , 6)
1165 MIPS_SYS(sys_fsync , 1)
1166 MIPS_SYS(sys_sigreturn , 0)
1167 MIPS_SYS(sys_clone , 0) /* 4120 */
1168 MIPS_SYS(sys_setdomainname, 2)
1169 MIPS_SYS(sys_newuname , 1)
1170 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1171 MIPS_SYS(sys_adjtimex , 1)
1172 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1173 MIPS_SYS(sys_sigprocmask , 3)
1174 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1175 MIPS_SYS(sys_init_module , 5)
1176 MIPS_SYS(sys_delete_module, 1)
1177 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1178 MIPS_SYS(sys_quotactl , 0)
1179 MIPS_SYS(sys_getpgid , 1)
1180 MIPS_SYS(sys_fchdir , 1)
1181 MIPS_SYS(sys_bdflush , 2)
1182 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1183 MIPS_SYS(sys_personality , 1)
1184 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1185 MIPS_SYS(sys_setfsuid , 1)
1186 MIPS_SYS(sys_setfsgid , 1)
1187 MIPS_SYS(sys_llseek , 5) /* 4140 */
1188 MIPS_SYS(sys_getdents , 3)
1189 MIPS_SYS(sys_select , 5)
1190 MIPS_SYS(sys_flock , 2)
1191 MIPS_SYS(sys_msync , 3)
1192 MIPS_SYS(sys_readv , 3) /* 4145 */
1193 MIPS_SYS(sys_writev , 3)
1194 MIPS_SYS(sys_cacheflush , 3)
1195 MIPS_SYS(sys_cachectl , 3)
1196 MIPS_SYS(sys_sysmips , 4)
1197 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1198 MIPS_SYS(sys_getsid , 1)
1199 MIPS_SYS(sys_fdatasync , 0)
1200 MIPS_SYS(sys_sysctl , 1)
1201 MIPS_SYS(sys_mlock , 2)
1202 MIPS_SYS(sys_munlock , 2) /* 4155 */
1203 MIPS_SYS(sys_mlockall , 1)
1204 MIPS_SYS(sys_munlockall , 0)
1205 MIPS_SYS(sys_sched_setparam, 2)
1206 MIPS_SYS(sys_sched_getparam, 2)
1207 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1208 MIPS_SYS(sys_sched_getscheduler, 1)
1209 MIPS_SYS(sys_sched_yield , 0)
1210 MIPS_SYS(sys_sched_get_priority_max, 1)
1211 MIPS_SYS(sys_sched_get_priority_min, 1)
1212 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1213 MIPS_SYS(sys_nanosleep, 2)
1214 MIPS_SYS(sys_mremap , 4)
1215 MIPS_SYS(sys_accept , 3)
1216 MIPS_SYS(sys_bind , 3)
1217 MIPS_SYS(sys_connect , 3) /* 4170 */
1218 MIPS_SYS(sys_getpeername , 3)
1219 MIPS_SYS(sys_getsockname , 3)
1220 MIPS_SYS(sys_getsockopt , 5)
1221 MIPS_SYS(sys_listen , 2)
1222 MIPS_SYS(sys_recv , 4) /* 4175 */
1223 MIPS_SYS(sys_recvfrom , 6)
1224 MIPS_SYS(sys_recvmsg , 3)
1225 MIPS_SYS(sys_send , 4)
1226 MIPS_SYS(sys_sendmsg , 3)
1227 MIPS_SYS(sys_sendto , 6) /* 4180 */
1228 MIPS_SYS(sys_setsockopt , 5)
1229 MIPS_SYS(sys_shutdown , 2)
1230 MIPS_SYS(sys_socket , 3)
1231 MIPS_SYS(sys_socketpair , 4)
1232 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1233 MIPS_SYS(sys_getresuid , 3)
1234 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1235 MIPS_SYS(sys_poll , 3)
1236 MIPS_SYS(sys_nfsservctl , 3)
1237 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1238 MIPS_SYS(sys_getresgid , 3)
1239 MIPS_SYS(sys_prctl , 5)
1240 MIPS_SYS(sys_rt_sigreturn, 0)
1241 MIPS_SYS(sys_rt_sigaction, 4)
1242 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1243 MIPS_SYS(sys_rt_sigpending, 2)
1244 MIPS_SYS(sys_rt_sigtimedwait, 4)
1245 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1246 MIPS_SYS(sys_rt_sigsuspend, 0)
1247 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1248 MIPS_SYS(sys_pwrite64 , 6)
1249 MIPS_SYS(sys_chown , 3)
1250 MIPS_SYS(sys_getcwd , 2)
1251 MIPS_SYS(sys_capget , 2)
1252 MIPS_SYS(sys_capset , 2) /* 4205 */
1253 MIPS_SYS(sys_sigaltstack , 0)
1254 MIPS_SYS(sys_sendfile , 4)
1255 MIPS_SYS(sys_ni_syscall , 0)
1256 MIPS_SYS(sys_ni_syscall , 0)
1257 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1258 MIPS_SYS(sys_truncate64 , 4)
1259 MIPS_SYS(sys_ftruncate64 , 4)
1260 MIPS_SYS(sys_stat64 , 2)
1261 MIPS_SYS(sys_lstat64 , 2)
1262 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1263 MIPS_SYS(sys_pivot_root , 2)
1264 MIPS_SYS(sys_mincore , 3)
1265 MIPS_SYS(sys_madvise , 3)
1266 MIPS_SYS(sys_getdents64 , 3)
1267 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1268 MIPS_SYS(sys_ni_syscall , 0)
1269 MIPS_SYS(sys_gettid , 0)
1270 MIPS_SYS(sys_readahead , 5)
1271 MIPS_SYS(sys_setxattr , 5)
1272 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1273 MIPS_SYS(sys_fsetxattr , 5)
1274 MIPS_SYS(sys_getxattr , 4)
1275 MIPS_SYS(sys_lgetxattr , 4)
1276 MIPS_SYS(sys_fgetxattr , 4)
1277 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1278 MIPS_SYS(sys_llistxattr , 3)
1279 MIPS_SYS(sys_flistxattr , 3)
1280 MIPS_SYS(sys_removexattr , 2)
1281 MIPS_SYS(sys_lremovexattr, 2)
1282 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1283 MIPS_SYS(sys_tkill , 2)
1284 MIPS_SYS(sys_sendfile64 , 5)
1285 MIPS_SYS(sys_futex , 2)
1286 MIPS_SYS(sys_sched_setaffinity, 3)
1287 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1288 MIPS_SYS(sys_io_setup , 2)
1289 MIPS_SYS(sys_io_destroy , 1)
1290 MIPS_SYS(sys_io_getevents, 5)
1291 MIPS_SYS(sys_io_submit , 3)
1292 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1293 MIPS_SYS(sys_exit_group , 1)
1294 MIPS_SYS(sys_lookup_dcookie, 3)
1295 MIPS_SYS(sys_epoll_create, 1)
1296 MIPS_SYS(sys_epoll_ctl , 4)
1297 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1298 MIPS_SYS(sys_remap_file_pages, 5)
1299 MIPS_SYS(sys_set_tid_address, 1)
1300 MIPS_SYS(sys_restart_syscall, 0)
1301 MIPS_SYS(sys_fadvise64_64, 7)
1302 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1303 MIPS_SYS(sys_fstatfs64 , 2)
1304 MIPS_SYS(sys_timer_create, 3)
1305 MIPS_SYS(sys_timer_settime, 4)
1306 MIPS_SYS(sys_timer_gettime, 2)
1307 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1308 MIPS_SYS(sys_timer_delete, 1)
1309 MIPS_SYS(sys_clock_settime, 2)
1310 MIPS_SYS(sys_clock_gettime, 2)
1311 MIPS_SYS(sys_clock_getres, 2)
1312 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1313 MIPS_SYS(sys_tgkill , 3)
1314 MIPS_SYS(sys_utimes , 2)
1315 MIPS_SYS(sys_mbind , 4)
1316 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1317 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1318 MIPS_SYS(sys_mq_open , 4)
1319 MIPS_SYS(sys_mq_unlink , 1)
1320 MIPS_SYS(sys_mq_timedsend, 5)
1321 MIPS_SYS(sys_mq_timedreceive, 5)
1322 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1323 MIPS_SYS(sys_mq_getsetattr, 3)
1324 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1325 MIPS_SYS(sys_waitid , 4)
1326 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1327 MIPS_SYS(sys_add_key , 5)
1328 MIPS_SYS(sys_request_key, 4)
1329 MIPS_SYS(sys_keyctl , 5)
1330 MIPS_SYS(sys_set_thread_area, 1)
1331 MIPS_SYS(sys_inotify_init, 0)
1332 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1333 MIPS_SYS(sys_inotify_rm_watch, 2)
1334 MIPS_SYS(sys_migrate_pages, 4)
1335 MIPS_SYS(sys_openat, 4)
1336 MIPS_SYS(sys_mkdirat, 3)
1337 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1338 MIPS_SYS(sys_fchownat, 5)
1339 MIPS_SYS(sys_futimesat, 3)
1340 MIPS_SYS(sys_fstatat64, 4)
1341 MIPS_SYS(sys_unlinkat, 3)
1342 MIPS_SYS(sys_renameat, 4) /* 4295 */
1343 MIPS_SYS(sys_linkat, 5)
1344 MIPS_SYS(sys_symlinkat, 3)
1345 MIPS_SYS(sys_readlinkat, 4)
1346 MIPS_SYS(sys_fchmodat, 3)
1347 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1348 MIPS_SYS(sys_pselect6, 6)
1349 MIPS_SYS(sys_ppoll, 5)
1350 MIPS_SYS(sys_unshare, 1)
1351 MIPS_SYS(sys_splice, 4)
1352 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1353 MIPS_SYS(sys_tee, 4)
1354 MIPS_SYS(sys_vmsplice, 4)
1355 MIPS_SYS(sys_move_pages, 6)
1356 MIPS_SYS(sys_set_robust_list, 2)
1357 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1358 MIPS_SYS(sys_kexec_load, 4)
1359 MIPS_SYS(sys_getcpu, 3)
1360 MIPS_SYS(sys_epoll_pwait, 6)
1361 MIPS_SYS(sys_ioprio_set, 3)
1362 MIPS_SYS(sys_ioprio_get, 2)
1363 };
1364
1365 #undef MIPS_SYS
1366
1367 void cpu_loop(CPUMIPSState *env)
1368 {
1369 target_siginfo_t info;
1370 int trapnr, ret;
1371 unsigned int syscall_num;
1372
1373 for(;;) {
1374 trapnr = cpu_mips_exec(env);
1375 switch(trapnr) {
1376 case EXCP_SYSCALL:
1377 syscall_num = env->gpr[2] - 4000;
1378 env->PC += 4;
1379 if (syscall_num >= sizeof(mips_syscall_args)) {
1380 ret = -ENOSYS;
1381 } else {
1382 int nb_args;
1383 target_ulong sp_reg;
1384 target_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1385
1386 nb_args = mips_syscall_args[syscall_num];
1387 sp_reg = env->gpr[29];
1388 switch (nb_args) {
1389 /* these arguments are taken from the stack */
1390 case 8: arg8 = tgetl(sp_reg + 28);
1391 case 7: arg7 = tgetl(sp_reg + 24);
1392 case 6: arg6 = tgetl(sp_reg + 20);
1393 case 5: arg5 = tgetl(sp_reg + 16);
1394 default:
1395 break;
1396 }
1397 ret = do_syscall(env, env->gpr[2],
1398 env->gpr[4], env->gpr[5],
1399 env->gpr[6], env->gpr[7],
1400 arg5, arg6/*, arg7, arg8*/);
1401 }
1402 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1403 env->gpr[7] = 1; /* error flag */
1404 ret = -ret;
1405 } else {
1406 env->gpr[7] = 0; /* error flag */
1407 }
1408 env->gpr[2] = ret;
1409 break;
1410 case EXCP_TLBL:
1411 case EXCP_TLBS:
1412 case EXCP_CpU:
1413 case EXCP_RI:
1414 info.si_signo = TARGET_SIGILL;
1415 info.si_errno = 0;
1416 info.si_code = 0;
1417 queue_signal(info.si_signo, &info);
1418 break;
1419 case EXCP_INTERRUPT:
1420 /* just indicate that signals should be handled asap */
1421 break;
1422 case EXCP_DEBUG:
1423 {
1424 int sig;
1425
1426 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1427 if (sig)
1428 {
1429 info.si_signo = sig;
1430 info.si_errno = 0;
1431 info.si_code = TARGET_TRAP_BRKPT;
1432 queue_signal(info.si_signo, &info);
1433 }
1434 }
1435 break;
1436 default:
1437 // error:
1438 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1439 trapnr);
1440 cpu_dump_state(env, stderr, fprintf, 0);
1441 abort();
1442 }
1443 process_pending_signals(env);
1444 }
1445 }
1446 #endif
1447
1448 #ifdef TARGET_SH4
1449 void cpu_loop (CPUState *env)
1450 {
1451 int trapnr, ret;
1452 target_siginfo_t info;
1453
1454 while (1) {
1455 trapnr = cpu_sh4_exec (env);
1456
1457 switch (trapnr) {
1458 case 0x160:
1459 ret = do_syscall(env,
1460 env->gregs[3],
1461 env->gregs[4],
1462 env->gregs[5],
1463 env->gregs[6],
1464 env->gregs[7],
1465 env->gregs[0],
1466 0);
1467 env->gregs[0] = ret;
1468 env->pc += 2;
1469 break;
1470 case EXCP_DEBUG:
1471 {
1472 int sig;
1473
1474 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1475 if (sig)
1476 {
1477 info.si_signo = sig;
1478 info.si_errno = 0;
1479 info.si_code = TARGET_TRAP_BRKPT;
1480 queue_signal(info.si_signo, &info);
1481 }
1482 }
1483 break;
1484 default:
1485 printf ("Unhandled trap: 0x%x\n", trapnr);
1486 cpu_dump_state(env, stderr, fprintf, 0);
1487 exit (1);
1488 }
1489 process_pending_signals (env);
1490 }
1491 }
1492 #endif
1493
1494 #ifdef TARGET_M68K
1495
1496 void cpu_loop(CPUM68KState *env)
1497 {
1498 int trapnr;
1499 unsigned int n;
1500 target_siginfo_t info;
1501 TaskState *ts = env->opaque;
1502
1503 for(;;) {
1504 trapnr = cpu_m68k_exec(env);
1505 switch(trapnr) {
1506 case EXCP_ILLEGAL:
1507 {
1508 if (ts->sim_syscalls) {
1509 uint16_t nr;
1510 nr = lduw(env->pc + 2);
1511 env->pc += 4;
1512 do_m68k_simcall(env, nr);
1513 } else {
1514 goto do_sigill;
1515 }
1516 }
1517 break;
1518 case EXCP_HALT_INSN:
1519 /* Semihosing syscall. */
1520 env->pc += 4;
1521 do_m68k_semihosting(env, env->dregs[0]);
1522 break;
1523 case EXCP_LINEA:
1524 case EXCP_LINEF:
1525 case EXCP_UNSUPPORTED:
1526 do_sigill:
1527 info.si_signo = SIGILL;
1528 info.si_errno = 0;
1529 info.si_code = TARGET_ILL_ILLOPN;
1530 info._sifields._sigfault._addr = env->pc;
1531 queue_signal(info.si_signo, &info);
1532 break;
1533 case EXCP_TRAP0:
1534 {
1535 ts->sim_syscalls = 0;
1536 n = env->dregs[0];
1537 env->pc += 2;
1538 env->dregs[0] = do_syscall(env,
1539 n,
1540 env->dregs[1],
1541 env->dregs[2],
1542 env->dregs[3],
1543 env->dregs[4],
1544 env->dregs[5],
1545 env->dregs[6]);
1546 }
1547 break;
1548 case EXCP_INTERRUPT:
1549 /* just indicate that signals should be handled asap */
1550 break;
1551 case EXCP_ACCESS:
1552 {
1553 info.si_signo = SIGSEGV;
1554 info.si_errno = 0;
1555 /* XXX: check env->error_code */
1556 info.si_code = TARGET_SEGV_MAPERR;
1557 info._sifields._sigfault._addr = env->mmu.ar;
1558 queue_signal(info.si_signo, &info);
1559 }
1560 break;
1561 case EXCP_DEBUG:
1562 {
1563 int sig;
1564
1565 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1566 if (sig)
1567 {
1568 info.si_signo = sig;
1569 info.si_errno = 0;
1570 info.si_code = TARGET_TRAP_BRKPT;
1571 queue_signal(info.si_signo, &info);
1572 }
1573 }
1574 break;
1575 default:
1576 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1577 trapnr);
1578 cpu_dump_state(env, stderr, fprintf, 0);
1579 abort();
1580 }
1581 process_pending_signals(env);
1582 }
1583 }
1584 #endif /* TARGET_M68K */
1585
1586 #ifdef TARGET_ALPHA
1587 void cpu_loop (CPUState *env)
1588 {
1589 int trapnr;
1590 target_siginfo_t info;
1591
1592 while (1) {
1593 trapnr = cpu_alpha_exec (env);
1594
1595 switch (trapnr) {
1596 case EXCP_RESET:
1597 fprintf(stderr, "Reset requested. Exit\n");
1598 exit(1);
1599 break;
1600 case EXCP_MCHK:
1601 fprintf(stderr, "Machine check exception. Exit\n");
1602 exit(1);
1603 break;
1604 case EXCP_ARITH:
1605 fprintf(stderr, "Arithmetic trap.\n");
1606 exit(1);
1607 break;
1608 case EXCP_HW_INTERRUPT:
1609 fprintf(stderr, "External interrupt. Exit\n");
1610 exit(1);
1611 break;
1612 case EXCP_DFAULT:
1613 fprintf(stderr, "MMU data fault\n");
1614 exit(1);
1615 break;
1616 case EXCP_DTB_MISS_PAL:
1617 fprintf(stderr, "MMU data TLB miss in PALcode\n");
1618 exit(1);
1619 break;
1620 case EXCP_ITB_MISS:
1621 fprintf(stderr, "MMU instruction TLB miss\n");
1622 exit(1);
1623 break;
1624 case EXCP_ITB_ACV:
1625 fprintf(stderr, "MMU instruction access violation\n");
1626 exit(1);
1627 break;
1628 case EXCP_DTB_MISS_NATIVE:
1629 fprintf(stderr, "MMU data TLB miss\n");
1630 exit(1);
1631 break;
1632 case EXCP_UNALIGN:
1633 fprintf(stderr, "Unaligned access\n");
1634 exit(1);
1635 break;
1636 case EXCP_OPCDEC:
1637 fprintf(stderr, "Invalid instruction\n");
1638 exit(1);
1639 break;
1640 case EXCP_FEN:
1641 fprintf(stderr, "Floating-point not allowed\n");
1642 exit(1);
1643 break;
1644 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
1645 fprintf(stderr, "Call to PALcode\n");
1646 call_pal(env, (trapnr >> 6) | 0x80);
1647 break;
1648 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
1649 fprintf(stderr, "Privileged call to PALcode\n");
1650 exit(1);
1651 break;
1652 case EXCP_DEBUG:
1653 {
1654 int sig;
1655
1656 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1657 if (sig)
1658 {
1659 info.si_signo = sig;
1660 info.si_errno = 0;
1661 info.si_code = TARGET_TRAP_BRKPT;
1662 queue_signal(info.si_signo, &info);
1663 }
1664 }
1665 break;
1666 default:
1667 printf ("Unhandled trap: 0x%x\n", trapnr);
1668 cpu_dump_state(env, stderr, fprintf, 0);
1669 exit (1);
1670 }
1671 process_pending_signals (env);
1672 }
1673 }
1674 #endif /* TARGET_ALPHA */
1675
1676 void usage(void)
1677 {
1678 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n"
1679 "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n"
1680 "Linux CPU emulator (compiled for %s emulation)\n"
1681 "\n"
1682 "-h print this help\n"
1683 "-g port wait gdb connection to port\n"
1684 "-L path set the elf interpreter prefix (default=%s)\n"
1685 "-s size set the stack size in bytes (default=%ld)\n"
1686 "-cpu model select CPU (-cpu ? for list)\n"
1687 "-drop-ld-preload drop LD_PRELOAD for target process\n"
1688 "\n"
1689 "debug options:\n"
1690 #ifdef USE_CODE_COPY
1691 "-no-code-copy disable code copy acceleration\n"
1692 #endif
1693 "-d options activate log (logfile=%s)\n"
1694 "-p pagesize set the host page size to 'pagesize'\n",
1695 TARGET_ARCH,
1696 interp_prefix,
1697 x86_stack_size,
1698 DEBUG_LOGFILE);
1699 _exit(1);
1700 }
1701
1702 /* XXX: currently only used for async signals (see signal.c) */
1703 CPUState *global_env;
1704
1705 /* used to free thread contexts */
1706 TaskState *first_task_state;
1707
1708 int main(int argc, char **argv)
1709 {
1710 const char *filename;
1711 const char *cpu_model;
1712 struct target_pt_regs regs1, *regs = &regs1;
1713 struct image_info info1, *info = &info1;
1714 TaskState ts1, *ts = &ts1;
1715 CPUState *env;
1716 int optind;
1717 const char *r;
1718 int gdbstub_port = 0;
1719 int drop_ld_preload = 0, environ_count = 0;
1720 char **target_environ, **wrk, **dst;
1721
1722 if (argc <= 1)
1723 usage();
1724
1725 /* init debug */
1726 cpu_set_log_filename(DEBUG_LOGFILE);
1727
1728 cpu_model = NULL;
1729 optind = 1;
1730 for(;;) {
1731 if (optind >= argc)
1732 break;
1733 r = argv[optind];
1734 if (r[0] != '-')
1735 break;
1736 optind++;
1737 r++;
1738 if (!strcmp(r, "-")) {
1739 break;
1740 } else if (!strcmp(r, "d")) {
1741 int mask;
1742 CPULogItem *item;
1743
1744 if (optind >= argc)
1745 break;
1746
1747 r = argv[optind++];
1748 mask = cpu_str_to_log_mask(r);
1749 if (!mask) {
1750 printf("Log items (comma separated):\n");
1751 for(item = cpu_log_items; item->mask != 0; item++) {
1752 printf("%-10s %s\n", item->name, item->help);
1753 }
1754 exit(1);
1755 }
1756 cpu_set_log(mask);
1757 } else if (!strcmp(r, "s")) {
1758 r = argv[optind++];
1759 x86_stack_size = strtol(r, (char **)&r, 0);
1760 if (x86_stack_size <= 0)
1761 usage();
1762 if (*r == 'M')
1763 x86_stack_size *= 1024 * 1024;
1764 else if (*r == 'k' || *r == 'K')
1765 x86_stack_size *= 1024;
1766 } else if (!strcmp(r, "L")) {
1767 interp_prefix = argv[optind++];
1768 } else if (!strcmp(r, "p")) {
1769 qemu_host_page_size = atoi(argv[optind++]);
1770 if (qemu_host_page_size == 0 ||
1771 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
1772 fprintf(stderr, "page size must be a power of two\n");
1773 exit(1);
1774 }
1775 } else if (!strcmp(r, "g")) {
1776 gdbstub_port = atoi(argv[optind++]);
1777 } else if (!strcmp(r, "r")) {
1778 qemu_uname_release = argv[optind++];
1779 } else if (!strcmp(r, "cpu")) {
1780 cpu_model = argv[optind++];
1781 if (strcmp(cpu_model, "?") == 0) {
1782 #if defined(TARGET_PPC)
1783 ppc_cpu_list(stdout, &fprintf);
1784 #elif defined(TARGET_ARM)
1785 arm_cpu_list();
1786 #elif defined(TARGET_MIPS)
1787 mips_cpu_list(stdout, &fprintf);
1788 #elif defined(TARGET_SPARC)
1789 sparc_cpu_list(stdout, &fprintf);
1790 #endif
1791 _exit(1);
1792 }
1793 } else if (!strcmp(r, "drop-ld-preload")) {
1794 drop_ld_preload = 1;
1795 } else
1796 #ifdef USE_CODE_COPY
1797 if (!strcmp(r, "no-code-copy")) {
1798 code_copy_enabled = 0;
1799 } else
1800 #endif
1801 {
1802 usage();
1803 }
1804 }
1805 if (optind >= argc)
1806 usage();
1807 filename = argv[optind];
1808
1809 /* Zero out regs */
1810 memset(regs, 0, sizeof(struct target_pt_regs));
1811
1812 /* Zero out image_info */
1813 memset(info, 0, sizeof(struct image_info));
1814
1815 /* Scan interp_prefix dir for replacement files. */
1816 init_paths(interp_prefix);
1817
1818 /* NOTE: we need to init the CPU at this stage to get
1819 qemu_host_page_size */
1820 env = cpu_init();
1821 global_env = env;
1822
1823 wrk = environ;
1824 while (*(wrk++))
1825 environ_count++;
1826
1827 target_environ = malloc((environ_count + 1) * sizeof(char *));
1828 if (!target_environ)
1829 abort();
1830 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
1831 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
1832 continue;
1833 *(dst++) = strdup(*wrk);
1834 }
1835 *dst = NULL; /* NULL terminate target_environ */
1836
1837 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
1838 printf("Error loading %s\n", filename);
1839 _exit(1);
1840 }
1841
1842 for (wrk = target_environ; *wrk; wrk++) {
1843 free(*wrk);
1844 }
1845
1846 free(target_environ);
1847
1848 if (loglevel) {
1849 page_dump(logfile);
1850
1851 fprintf(logfile, "start_brk 0x%08lx\n" , info->start_brk);
1852 fprintf(logfile, "end_code 0x%08lx\n" , info->end_code);
1853 fprintf(logfile, "start_code 0x%08lx\n" , info->start_code);
1854 fprintf(logfile, "start_data 0x%08lx\n" , info->start_data);
1855 fprintf(logfile, "end_data 0x%08lx\n" , info->end_data);
1856 fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
1857 fprintf(logfile, "brk 0x%08lx\n" , info->brk);
1858 fprintf(logfile, "entry 0x%08lx\n" , info->entry);
1859 }
1860
1861 target_set_brk(info->brk);
1862 syscall_init();
1863 signal_init();
1864
1865 /* build Task State */
1866 memset(ts, 0, sizeof(TaskState));
1867 env->opaque = ts;
1868 ts->used = 1;
1869 ts->info = info;
1870 env->user_mode_only = 1;
1871
1872 #if defined(TARGET_I386)
1873 cpu_x86_set_cpl(env, 3);
1874
1875 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1876 env->hflags |= HF_PE_MASK;
1877 if (env->cpuid_features & CPUID_SSE) {
1878 env->cr[4] |= CR4_OSFXSR_MASK;
1879 env->hflags |= HF_OSFXSR_MASK;
1880 }
1881
1882 /* flags setup : we activate the IRQs by default as in user mode */
1883 env->eflags |= IF_MASK;
1884
1885 /* linux register setup */
1886 #if defined(TARGET_X86_64)
1887 env->regs[R_EAX] = regs->rax;
1888 env->regs[R_EBX] = regs->rbx;
1889 env->regs[R_ECX] = regs->rcx;
1890 env->regs[R_EDX] = regs->rdx;
1891 env->regs[R_ESI] = regs->rsi;
1892 env->regs[R_EDI] = regs->rdi;
1893 env->regs[R_EBP] = regs->rbp;
1894 env->regs[R_ESP] = regs->rsp;
1895 env->eip = regs->rip;
1896 #else
1897 env->regs[R_EAX] = regs->eax;
1898 env->regs[R_EBX] = regs->ebx;
1899 env->regs[R_ECX] = regs->ecx;
1900 env->regs[R_EDX] = regs->edx;
1901 env->regs[R_ESI] = regs->esi;
1902 env->regs[R_EDI] = regs->edi;
1903 env->regs[R_EBP] = regs->ebp;
1904 env->regs[R_ESP] = regs->esp;
1905 env->eip = regs->eip;
1906 #endif
1907
1908 /* linux interrupt setup */
1909 env->idt.base = h2g(idt_table);
1910 env->idt.limit = sizeof(idt_table) - 1;
1911 set_idt(0, 0);
1912 set_idt(1, 0);
1913 set_idt(2, 0);
1914 set_idt(3, 3);
1915 set_idt(4, 3);
1916 set_idt(5, 3);
1917 set_idt(6, 0);
1918 set_idt(7, 0);
1919 set_idt(8, 0);
1920 set_idt(9, 0);
1921 set_idt(10, 0);
1922 set_idt(11, 0);
1923 set_idt(12, 0);
1924 set_idt(13, 0);
1925 set_idt(14, 0);
1926 set_idt(15, 0);
1927 set_idt(16, 0);
1928 set_idt(17, 0);
1929 set_idt(18, 0);
1930 set_idt(19, 0);
1931 set_idt(0x80, 3);
1932
1933 /* linux segment setup */
1934 env->gdt.base = h2g(gdt_table);
1935 env->gdt.limit = sizeof(gdt_table) - 1;
1936 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
1937 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
1938 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
1939 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
1940 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
1941 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
1942 cpu_x86_load_seg(env, R_CS, __USER_CS);
1943 cpu_x86_load_seg(env, R_DS, __USER_DS);
1944 cpu_x86_load_seg(env, R_ES, __USER_DS);
1945 cpu_x86_load_seg(env, R_SS, __USER_DS);
1946 cpu_x86_load_seg(env, R_FS, __USER_DS);
1947 cpu_x86_load_seg(env, R_GS, __USER_DS);
1948
1949 /* This hack makes Wine work... */
1950 env->segs[R_FS].selector = 0;
1951 #elif defined(TARGET_ARM)
1952 {
1953 int i;
1954 if (cpu_model == NULL)
1955 cpu_model = "arm926";
1956 cpu_arm_set_model(env, cpu_model);
1957 cpsr_write(env, regs->uregs[16], 0xffffffff);
1958 for(i = 0; i < 16; i++) {
1959 env->regs[i] = regs->uregs[i];
1960 }
1961 }
1962 #elif defined(TARGET_SPARC)
1963 {
1964 int i;
1965 const sparc_def_t *def;
1966 #ifdef TARGET_SPARC64
1967 if (cpu_model == NULL)
1968 cpu_model = "TI UltraSparc II";
1969 #else
1970 if (cpu_model == NULL)
1971 cpu_model = "Fujitsu MB86904";
1972 #endif
1973 sparc_find_by_name(cpu_model, &def);
1974 if (def == NULL) {
1975 fprintf(stderr, "Unable to find Sparc CPU definition\n");
1976 exit(1);
1977 }
1978 cpu_sparc_register(env, def);
1979 env->pc = regs->pc;
1980 env->npc = regs->npc;
1981 env->y = regs->y;
1982 for(i = 0; i < 8; i++)
1983 env->gregs[i] = regs->u_regs[i];
1984 for(i = 0; i < 8; i++)
1985 env->regwptr[i] = regs->u_regs[i + 8];
1986 }
1987 #elif defined(TARGET_PPC)
1988 {
1989 ppc_def_t *def;
1990 int i;
1991
1992 /* Choose and initialise CPU */
1993 if (cpu_model == NULL)
1994 cpu_model = "750";
1995 ppc_find_by_name(cpu_model, &def);
1996 if (def == NULL) {
1997 cpu_abort(env,
1998 "Unable to find PowerPC CPU definition\n");
1999 }
2000 cpu_ppc_register(env, def);
2001
2002 for (i = 0; i < 32; i++) {
2003 if (i != 12 && i != 6 && i != 13)
2004 env->msr[i] = (regs->msr >> i) & 1;
2005 }
2006 #if defined(TARGET_PPC64)
2007 msr_sf = 1;
2008 #endif
2009 env->nip = regs->nip;
2010 for(i = 0; i < 32; i++) {
2011 env->gpr[i] = regs->gpr[i];
2012 }
2013 }
2014 #elif defined(TARGET_M68K)
2015 {
2016 if (cpu_model == NULL)
2017 cpu_model = "any";
2018 if (cpu_m68k_set_model(env, cpu_model)) {
2019 cpu_abort(cpu_single_env,
2020 "Unable to find m68k CPU definition\n");
2021 }
2022 env->pc = regs->pc;
2023 env->dregs[0] = regs->d0;
2024 env->dregs[1] = regs->d1;
2025 env->dregs[2] = regs->d2;
2026 env->dregs[3] = regs->d3;
2027 env->dregs[4] = regs->d4;
2028 env->dregs[5] = regs->d5;
2029 env->dregs[6] = regs->d6;
2030 env->dregs[7] = regs->d7;
2031 env->aregs[0] = regs->a0;
2032 env->aregs[1] = regs->a1;
2033 env->aregs[2] = regs->a2;
2034 env->aregs[3] = regs->a3;
2035 env->aregs[4] = regs->a4;
2036 env->aregs[5] = regs->a5;
2037 env->aregs[6] = regs->a6;
2038 env->aregs[7] = regs->usp;
2039 env->sr = regs->sr;
2040 ts->sim_syscalls = 1;
2041 }
2042 #elif defined(TARGET_MIPS)
2043 {
2044 mips_def_t *def;
2045 int i;
2046
2047 /* Choose and initialise CPU */
2048 if (cpu_model == NULL)
2049 cpu_model = "24Kf";
2050 mips_find_by_name(cpu_model, &def);
2051 if (def == NULL)
2052 cpu_abort(env, "Unable to find MIPS CPU definition\n");
2053 cpu_mips_register(env, def);
2054
2055 for(i = 0; i < 32; i++) {
2056 env->gpr[i] = regs->regs[i];
2057 }
2058 env->PC = regs->cp0_epc;
2059 }
2060 #elif defined(TARGET_SH4)
2061 {
2062 int i;
2063
2064 for(i = 0; i < 16; i++) {
2065 env->gregs[i] = regs->regs[i];
2066 }
2067 env->pc = regs->pc;
2068 }
2069 #elif defined(TARGET_ALPHA)
2070 {
2071 int i;
2072
2073 for(i = 0; i < 28; i++) {
2074 env->ir[i] = ((target_ulong *)regs)[i];
2075 }
2076 env->ipr[IPR_USP] = regs->usp;
2077 env->ir[30] = regs->usp;
2078 env->pc = regs->pc;
2079 env->unique = regs->unique;
2080 }
2081 #else
2082 #error unsupported target CPU
2083 #endif
2084
2085 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2086 ts->stack_base = info->start_stack;
2087 ts->heap_base = info->brk;
2088 /* This will be filled in on the first SYS_HEAPINFO call. */
2089 ts->heap_limit = 0;
2090 #endif
2091
2092 if (gdbstub_port) {
2093 gdbserver_start (gdbstub_port);
2094 gdb_handlesig(env, 0);
2095 }
2096 cpu_loop(env);
2097 /* never exits */
2098 return 0;
2099 }
Random branches for QEmu