2 * User emulator execution
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
21 #include "disas/disas.h"
22 #include "exec/exec-all.h"
24 #include "qemu/bitops.h"
25 #include "exec/cpu_ldst.h"
26 #include "translate-all.h"
38 #include <sys/ucontext.h>
41 //#define DEBUG_SIGNAL
43 /* exit the current TB from a signal handler. The host registers are
44 restored in a state compatible with the CPU emulator
46 static void cpu_exit_tb_from_sighandler(CPUState
*cpu
, sigset_t
*old_set
)
48 /* XXX: use siglongjmp ? */
49 sigprocmask(SIG_SETMASK
, old_set
, NULL
);
50 cpu_loop_exit_noexc(cpu
);
53 /* 'pc' is the host PC at which the exception was raised. 'address' is
54 the effective address of the memory exception. 'is_write' is 1 if a
55 write caused the exception and otherwise 0'. 'old_set' is the
56 signal set which should be restored */
57 static inline int handle_cpu_signal(uintptr_t pc
, void *ptr
,
58 int is_write
, sigset_t
*old_set
)
60 uintptr_t address
= (uintptr_t)ptr
;
65 #if defined(DEBUG_SIGNAL)
66 printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
67 pc
, address
, is_write
, *(unsigned long *)old_set
);
69 /* XXX: locking issue */
70 if (is_write
&& h2g_valid(address
)) {
71 switch (page_unprotect(h2g(address
), pc
)) {
73 /* Fault not caused by a page marked unwritable to protect
74 * cached translations, must be the guest binary's problem
78 /* Fault caused by protection of cached translation; TBs
79 * invalidated, so resume execution
83 /* Fault caused by protection of cached translation, and the
84 * currently executing TB was modified and must be exited
87 cpu_exit_tb_from_sighandler(current_cpu
, old_set
);
88 g_assert_not_reached();
90 g_assert_not_reached();
94 /* Convert forcefully to guest address space, invalid addresses
95 are still valid segv ones */
96 address
= h2g_nocheck(address
);
99 cc
= CPU_GET_CLASS(cpu
);
100 /* see if it is an MMU fault */
101 g_assert(cc
->handle_mmu_fault
);
102 ret
= cc
->handle_mmu_fault(cpu
, address
, is_write
, MMU_USER_IDX
);
104 return 0; /* not an MMU fault */
107 return 1; /* the MMU fault was handled without causing real CPU fault */
109 /* now we have a real cpu fault */
110 cpu_restore_state(cpu
, pc
);
112 sigprocmask(SIG_SETMASK
, old_set
, NULL
);
115 /* never comes here */
119 #if defined(__i386__)
121 #if defined(__NetBSD__)
122 #include <ucontext.h>
124 #define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP])
125 #define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
126 #define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
127 #define MASK_sig(context) ((context)->uc_sigmask)
128 #elif defined(__FreeBSD__) || defined(__DragonFly__)
129 #include <ucontext.h>
131 #define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_eip))
132 #define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
133 #define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
134 #define MASK_sig(context) ((context)->uc_sigmask)
135 #elif defined(__OpenBSD__)
136 #define EIP_sig(context) ((context)->sc_eip)
137 #define TRAP_sig(context) ((context)->sc_trapno)
138 #define ERROR_sig(context) ((context)->sc_err)
139 #define MASK_sig(context) ((context)->sc_mask)
141 #define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP])
142 #define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
143 #define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
144 #define MASK_sig(context) ((context)->uc_sigmask)
147 int cpu_signal_handler(int host_signum
, void *pinfo
,
150 siginfo_t
*info
= pinfo
;
151 #if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
152 ucontext_t
*uc
= puc
;
153 #elif defined(__OpenBSD__)
154 struct sigcontext
*uc
= puc
;
156 struct ucontext
*uc
= puc
;
165 #define REG_TRAPNO TRAPNO
168 trapno
= TRAP_sig(uc
);
169 return handle_cpu_signal(pc
, info
->si_addr
,
171 (ERROR_sig(uc
) >> 1) & 1 : 0,
175 #elif defined(__x86_64__)
178 #define PC_sig(context) _UC_MACHINE_PC(context)
179 #define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
180 #define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
181 #define MASK_sig(context) ((context)->uc_sigmask)
182 #elif defined(__OpenBSD__)
183 #define PC_sig(context) ((context)->sc_rip)
184 #define TRAP_sig(context) ((context)->sc_trapno)
185 #define ERROR_sig(context) ((context)->sc_err)
186 #define MASK_sig(context) ((context)->sc_mask)
187 #elif defined(__FreeBSD__) || defined(__DragonFly__)
188 #include <ucontext.h>
190 #define PC_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_rip))
191 #define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
192 #define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
193 #define MASK_sig(context) ((context)->uc_sigmask)
195 #define PC_sig(context) ((context)->uc_mcontext.gregs[REG_RIP])
196 #define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
197 #define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
198 #define MASK_sig(context) ((context)->uc_sigmask)
201 int cpu_signal_handler(int host_signum
, void *pinfo
,
204 siginfo_t
*info
= pinfo
;
206 #if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
207 ucontext_t
*uc
= puc
;
208 #elif defined(__OpenBSD__)
209 struct sigcontext
*uc
= puc
;
211 struct ucontext
*uc
= puc
;
215 return handle_cpu_signal(pc
, info
->si_addr
,
216 TRAP_sig(uc
) == 0xe ?
217 (ERROR_sig(uc
) >> 1) & 1 : 0,
221 #elif defined(_ARCH_PPC)
223 /***********************************************************************
224 * signal context platform-specific definitions
228 /* All Registers access - only for local access */
229 #define REG_sig(reg_name, context) \
230 ((context)->uc_mcontext.regs->reg_name)
231 /* Gpr Registers access */
232 #define GPR_sig(reg_num, context) REG_sig(gpr[reg_num], context)
233 /* Program counter */
234 #define IAR_sig(context) REG_sig(nip, context)
235 /* Machine State Register (Supervisor) */
236 #define MSR_sig(context) REG_sig(msr, context)
238 #define CTR_sig(context) REG_sig(ctr, context)
239 /* User's integer exception register */
240 #define XER_sig(context) REG_sig(xer, context)
242 #define LR_sig(context) REG_sig(link, context)
243 /* Condition register */
244 #define CR_sig(context) REG_sig(ccr, context)
246 /* Float Registers access */
247 #define FLOAT_sig(reg_num, context) \
248 (((double *)((char *)((context)->uc_mcontext.regs + 48 * 4)))[reg_num])
249 #define FPSCR_sig(context) \
250 (*(int *)((char *)((context)->uc_mcontext.regs + (48 + 32 * 2) * 4)))
251 /* Exception Registers access */
252 #define DAR_sig(context) REG_sig(dar, context)
253 #define DSISR_sig(context) REG_sig(dsisr, context)
254 #define TRAP_sig(context) REG_sig(trap, context)
257 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
258 #include <ucontext.h>
259 #define IAR_sig(context) ((context)->uc_mcontext.mc_srr0)
260 #define MSR_sig(context) ((context)->uc_mcontext.mc_srr1)
261 #define CTR_sig(context) ((context)->uc_mcontext.mc_ctr)
262 #define XER_sig(context) ((context)->uc_mcontext.mc_xer)
263 #define LR_sig(context) ((context)->uc_mcontext.mc_lr)
264 #define CR_sig(context) ((context)->uc_mcontext.mc_cr)
265 /* Exception Registers access */
266 #define DAR_sig(context) ((context)->uc_mcontext.mc_dar)
267 #define DSISR_sig(context) ((context)->uc_mcontext.mc_dsisr)
268 #define TRAP_sig(context) ((context)->uc_mcontext.mc_exc)
269 #endif /* __FreeBSD__|| __FreeBSD_kernel__ */
271 int cpu_signal_handler(int host_signum
, void *pinfo
,
274 siginfo_t
*info
= pinfo
;
275 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
276 ucontext_t
*uc
= puc
;
278 struct ucontext
*uc
= puc
;
287 if (DSISR_sig(uc
) & 0x00800000) {
291 if (TRAP_sig(uc
) != 0x400 && (DSISR_sig(uc
) & 0x02000000)) {
295 return handle_cpu_signal(pc
, info
->si_addr
, is_write
, &uc
->uc_sigmask
);
298 #elif defined(__alpha__)
300 int cpu_signal_handler(int host_signum
, void *pinfo
,
303 siginfo_t
*info
= pinfo
;
304 struct ucontext
*uc
= puc
;
305 uint32_t *pc
= uc
->uc_mcontext
.sc_pc
;
309 /* XXX: need kernel patch to get write flag faster */
310 switch (insn
>> 26) {
313 case 0x0f: /* stq_u */
320 case 0x2e: /* stl_c */
321 case 0x2f: /* stq_c */
325 return handle_cpu_signal(pc
, info
->si_addr
, is_write
, &uc
->uc_sigmask
);
327 #elif defined(__sparc__)
329 int cpu_signal_handler(int host_signum
, void *pinfo
,
332 siginfo_t
*info
= pinfo
;
335 #if !defined(__arch64__) || defined(CONFIG_SOLARIS)
336 uint32_t *regs
= (uint32_t *)(info
+ 1);
337 void *sigmask
= (regs
+ 20);
338 /* XXX: is there a standard glibc define ? */
339 uintptr_t pc
= regs
[1];
342 struct sigcontext
*sc
= puc
;
343 uintptr_t pc
= sc
->sigc_regs
.tpc
;
344 void *sigmask
= (void *)sc
->sigc_mask
;
345 #elif defined(__OpenBSD__)
346 struct sigcontext
*uc
= puc
;
347 uintptr_t pc
= uc
->sc_pc
;
348 void *sigmask
= (void *)(long)uc
->sc_mask
;
349 #elif defined(__NetBSD__)
350 ucontext_t
*uc
= puc
;
351 unsigned long pc
= _UC_MACHINE_PC(uc
);
352 void *sigmask
= (void *)&uc
->uc_sigmask
;
356 /* XXX: need kernel patch to get write flag faster */
358 insn
= *(uint32_t *)pc
;
359 if ((insn
>> 30) == 3) {
360 switch ((insn
>> 19) & 0x3f) {
362 case 0x15: /* stba */
364 case 0x16: /* stha */
368 case 0x17: /* stda */
370 case 0x1e: /* stxa */
372 case 0x34: /* stfa */
373 case 0x27: /* stdf */
374 case 0x37: /* stdfa */
375 case 0x26: /* stqf */
376 case 0x36: /* stqfa */
377 case 0x25: /* stfsr */
378 case 0x3c: /* casa */
379 case 0x3e: /* casxa */
384 return handle_cpu_signal(pc
, info
->si_addr
, is_write
, sigmask
);
387 #elif defined(__arm__)
389 #if defined(__NetBSD__)
390 #include <ucontext.h>
393 int cpu_signal_handler(int host_signum
, void *pinfo
,
396 siginfo_t
*info
= pinfo
;
397 #if defined(__NetBSD__)
398 ucontext_t
*uc
= puc
;
400 struct ucontext
*uc
= puc
;
405 #if defined(__NetBSD__)
406 pc
= uc
->uc_mcontext
.__gregs
[_REG_R15
];
407 #elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
408 pc
= uc
->uc_mcontext
.gregs
[R15
];
410 pc
= uc
->uc_mcontext
.arm_pc
;
413 /* error_code is the FSR value, in which bit 11 is WnR (assuming a v6 or
414 * later processor; on v5 we will always report this as a read).
416 is_write
= extract32(uc
->uc_mcontext
.error_code
, 11, 1);
417 return handle_cpu_signal(pc
, info
->si_addr
, is_write
, &uc
->uc_sigmask
);
420 #elif defined(__aarch64__)
422 int cpu_signal_handler(int host_signum
, void *pinfo
, void *puc
)
424 siginfo_t
*info
= pinfo
;
425 struct ucontext
*uc
= puc
;
426 uintptr_t pc
= uc
->uc_mcontext
.pc
;
427 uint32_t insn
= *(uint32_t *)pc
;
430 /* XXX: need kernel patch to get write flag faster. */
431 is_write
= ( (insn
& 0xbfff0000) == 0x0c000000 /* C3.3.1 */
432 || (insn
& 0xbfe00000) == 0x0c800000 /* C3.3.2 */
433 || (insn
& 0xbfdf0000) == 0x0d000000 /* C3.3.3 */
434 || (insn
& 0xbfc00000) == 0x0d800000 /* C3.3.4 */
435 || (insn
& 0x3f400000) == 0x08000000 /* C3.3.6 */
436 || (insn
& 0x3bc00000) == 0x39000000 /* C3.3.13 */
437 || (insn
& 0x3fc00000) == 0x3d800000 /* ... 128bit */
438 /* Ingore bits 10, 11 & 21, controlling indexing. */
439 || (insn
& 0x3bc00000) == 0x38000000 /* C3.3.8-12 */
440 || (insn
& 0x3fe00000) == 0x3c800000 /* ... 128bit */
441 /* Ignore bits 23 & 24, controlling indexing. */
442 || (insn
& 0x3a400000) == 0x28000000); /* C3.3.7,14-16 */
444 return handle_cpu_signal(pc
, (uintptr_t)info
->si_addr
,
445 is_write
, &uc
->uc_sigmask
);
448 #elif defined(__mc68000)
450 int cpu_signal_handler(int host_signum
, void *pinfo
,
453 siginfo_t
*info
= pinfo
;
454 struct ucontext
*uc
= puc
;
458 pc
= uc
->uc_mcontext
.gregs
[16];
459 /* XXX: compute is_write */
461 return handle_cpu_signal(pc
, info
->si_addr
, is_write
, &uc
->uc_sigmask
);
464 #elif defined(__ia64)
467 /* This ought to be in <bits/siginfo.h>... */
468 # define __ISR_VALID 1
471 int cpu_signal_handler(int host_signum
, void *pinfo
, void *puc
)
473 siginfo_t
*info
= pinfo
;
474 struct ucontext
*uc
= puc
;
478 ip
= uc
->uc_mcontext
.sc_ip
;
479 switch (host_signum
) {
485 if (info
->si_code
&& (info
->si_segvflags
& __ISR_VALID
)) {
486 /* ISR.W (write-access) is bit 33: */
487 is_write
= (info
->si_isr
>> 33) & 1;
494 return handle_cpu_signal(ip
, info
->si_addr
, is_write
,
495 (sigset_t
*)&uc
->uc_sigmask
);
498 #elif defined(__s390__)
500 int cpu_signal_handler(int host_signum
, void *pinfo
,
503 siginfo_t
*info
= pinfo
;
504 struct ucontext
*uc
= puc
;
509 pc
= uc
->uc_mcontext
.psw
.addr
;
511 /* ??? On linux, the non-rt signal handler has 4 (!) arguments instead
512 of the normal 2 arguments. The 3rd argument contains the "int_code"
513 from the hardware which does in fact contain the is_write value.
514 The rt signal handler, as far as I can tell, does not give this value
515 at all. Not that we could get to it from here even if it were. */
516 /* ??? This is not even close to complete, since it ignores all
517 of the read-modify-write instructions. */
518 pinsn
= (uint16_t *)pc
;
519 switch (pinsn
[0] >> 8) {
525 case 0xc4: /* RIL format insns */
526 switch (pinsn
[0] & 0xf) {
528 case 0xb: /* STGRL */
529 case 0x7: /* STHRL */
533 case 0xe3: /* RXY format insns */
534 switch (pinsn
[2] & 0xff) {
537 case 0x72: /* STCY */
538 case 0x70: /* STHY */
539 case 0x8e: /* STPQ */
540 case 0x3f: /* STRVH */
541 case 0x3e: /* STRV */
542 case 0x2f: /* STRVG */
547 return handle_cpu_signal(pc
, info
->si_addr
, is_write
, &uc
->uc_sigmask
);
550 #elif defined(__mips__)
552 int cpu_signal_handler(int host_signum
, void *pinfo
,
555 siginfo_t
*info
= pinfo
;
556 struct ucontext
*uc
= puc
;
557 greg_t pc
= uc
->uc_mcontext
.pc
;
560 /* XXX: compute is_write */
562 return handle_cpu_signal(pc
, info
->si_addr
, is_write
, &uc
->uc_sigmask
);
565 #elif defined(__hppa__)
567 int cpu_signal_handler(int host_signum
, void *pinfo
,
570 siginfo_t
*info
= pinfo
;
571 struct ucontext
*uc
= puc
;
572 uintptr_t pc
= uc
->uc_mcontext
.sc_iaoq
[0];
573 uint32_t insn
= *(uint32_t *)pc
;
576 /* XXX: need kernel patch to get write flag faster. */
577 switch (insn
>> 26) {
581 case 0x1b: /* STWM */
585 case 0x09: /* CSTWX, FSTWX, FSTWS */
586 case 0x0b: /* CSTDX, FSTDX, FSTDS */
587 /* Distinguish from coprocessor load ... */
588 is_write
= (insn
>> 9) & 1;
592 switch ((insn
>> 6) & 15) {
596 case 0xe: /* STWAS */
597 case 0xc: /* STBYS */
603 return handle_cpu_signal(pc
, info
->si_addr
, is_write
, &uc
->uc_sigmask
);
608 #error host CPU specific signal handler needed