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Merge remote-tracking branch 'qemu/master'
[qemu/ar7.git] / memory.c
blob9491bc62eff6e8d726158fd1dc30d982cb302428
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
21 #include "exec/memory.h"
22 #include "exec/address-spaces.h"
23 #include "exec/ioport.h"
24 #include "qapi/visitor.h"
25 #include "qemu/bitops.h"
26 #include "qemu/error-report.h"
27 #include "qom/object.h"
28 #include "trace-root.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/sysemu.h"
34 #include "hw/misc/mmio_interface.h"
35 #include "hw/qdev-properties.h"
36 #include "migration/vmstate.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 static bool global_dirty_log = false;
44
45 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 struct memory_listeners_as *list = &(_as)->listeners; \
135 \
136 switch (_direction) { \
137 case Forward: \
138 QTAILQ_FOREACH(_listener, list, link_as) { \
139 if (_listener->_callback) { \
140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
146 link_as) { \
147 if (_listener->_callback) { \
148 _listener->_callback(_listener, _section, ##_args); \
149 } \
150 } \
151 break; \
152 default: \
153 abort(); \
154 } \
155 } while (0)
156
157 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
158 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
159 do { \
160 MemoryRegionSection mrs = section_from_flat_range(fr, \
161 address_space_to_flatview(as)); \
162 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
163 } while(0)
164
165 struct CoalescedMemoryRange {
166 AddrRange addr;
167 QTAILQ_ENTRY(CoalescedMemoryRange) link;
168 };
169
170 struct MemoryRegionIoeventfd {
171 AddrRange addr;
172 bool match_data;
173 uint64_t data;
174 EventNotifier *e;
175 };
176
177 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
178 MemoryRegionIoeventfd b)
179 {
180 if (int128_lt(a.addr.start, b.addr.start)) {
181 return true;
182 } else if (int128_gt(a.addr.start, b.addr.start)) {
183 return false;
184 } else if (int128_lt(a.addr.size, b.addr.size)) {
185 return true;
186 } else if (int128_gt(a.addr.size, b.addr.size)) {
187 return false;
188 } else if (a.match_data < b.match_data) {
189 return true;
190 } else if (a.match_data > b.match_data) {
191 return false;
192 } else if (a.match_data) {
193 if (a.data < b.data) {
194 return true;
195 } else if (a.data > b.data) {
196 return false;
197 }
198 }
199 if (a.e < b.e) {
200 return true;
201 } else if (a.e > b.e) {
202 return false;
203 }
204 return false;
205 }
206
207 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
208 MemoryRegionIoeventfd b)
209 {
210 return !memory_region_ioeventfd_before(a, b)
211 && !memory_region_ioeventfd_before(b, a);
212 }
213
214 typedef struct FlatRange FlatRange;
215
216 /* Range of memory in the global map. Addresses are absolute. */
217 struct FlatRange {
218 MemoryRegion *mr;
219 hwaddr offset_in_region;
220 AddrRange addr;
221 uint8_t dirty_log_mask;
222 bool romd_mode;
223 bool readonly;
224 };
225
226 /* Flattened global view of current active memory hierarchy. Kept in sorted
227 * order.
228 */
229 struct FlatView {
230 struct rcu_head rcu;
231 unsigned ref;
232 FlatRange *ranges;
233 unsigned nr;
234 unsigned nr_allocated;
235 struct AddressSpaceDispatch *dispatch;
236 MemoryRegion *root;
237 };
238
239 typedef struct AddressSpaceOps AddressSpaceOps;
240
241 #define FOR_EACH_FLAT_RANGE(var, view) \
242 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
243
244 static inline MemoryRegionSection
245 section_from_flat_range(FlatRange *fr, FlatView *fv)
246 {
247 return (MemoryRegionSection) {
248 .mr = fr->mr,
249 .fv = fv,
250 .offset_within_region = fr->offset_in_region,
251 .size = fr->addr.size,
252 .offset_within_address_space = int128_get64(fr->addr.start),
253 .readonly = fr->readonly,
254 };
255 }
256
257 static bool flatrange_equal(FlatRange *a, FlatRange *b)
258 {
259 return a->mr == b->mr
260 && addrrange_equal(a->addr, b->addr)
261 && a->offset_in_region == b->offset_in_region
262 && a->romd_mode == b->romd_mode
263 && a->readonly == b->readonly;
264 }
265
266 static FlatView *flatview_new(MemoryRegion *mr_root)
267 {
268 FlatView *view;
269
270 view = g_new0(FlatView, 1);
271 view->ref = 1;
272 view->root = mr_root;
273 memory_region_ref(mr_root);
274 trace_flatview_new(view, mr_root);
275
276 return view;
277 }
278
279 /* Insert a range into a given position. Caller is responsible for maintaining
280 * sorting order.
281 */
282 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
283 {
284 if (view->nr == view->nr_allocated) {
285 view->nr_allocated = MAX(2 * view->nr, 10);
286 view->ranges = g_realloc(view->ranges,
287 view->nr_allocated * sizeof(*view->ranges));
288 }
289 memmove(view->ranges + pos + 1, view->ranges + pos,
290 (view->nr - pos) * sizeof(FlatRange));
291 view->ranges[pos] = *range;
292 memory_region_ref(range->mr);
293 ++view->nr;
294 }
295
296 static void flatview_destroy(FlatView *view)
297 {
298 int i;
299
300 trace_flatview_destroy(view, view->root);
301 if (view->dispatch) {
302 address_space_dispatch_free(view->dispatch);
303 }
304 for (i = 0; i < view->nr; i++) {
305 memory_region_unref(view->ranges[i].mr);
306 }
307 g_free(view->ranges);
308 memory_region_unref(view->root);
309 g_free(view);
310 }
311
312 static bool flatview_ref(FlatView *view)
313 {
314 return atomic_fetch_inc_nonzero(&view->ref) > 0;
315 }
316
317 static void flatview_unref(FlatView *view)
318 {
319 if (atomic_fetch_dec(&view->ref) == 1) {
320 trace_flatview_destroy_rcu(view, view->root);
321 assert(view->root);
322 call_rcu(view, flatview_destroy, rcu);
323 }
324 }
325
326 FlatView *address_space_to_flatview(AddressSpace *as)
327 {
328 return atomic_rcu_read(&as->current_map);
329 }
330
331 AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv)
332 {
333 return fv->dispatch;
334 }
335
336 AddressSpaceDispatch *address_space_to_dispatch(AddressSpace *as)
337 {
338 return flatview_to_dispatch(address_space_to_flatview(as));
339 }
340
341 static bool can_merge(FlatRange *r1, FlatRange *r2)
342 {
343 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
344 && r1->mr == r2->mr
345 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
346 r1->addr.size),
347 int128_make64(r2->offset_in_region))
348 && r1->dirty_log_mask == r2->dirty_log_mask
349 && r1->romd_mode == r2->romd_mode
350 && r1->readonly == r2->readonly;
351 }
352
353 /* Attempt to simplify a view by merging adjacent ranges */
354 static void flatview_simplify(FlatView *view)
355 {
356 unsigned i, j;
357
358 i = 0;
359 while (i < view->nr) {
360 j = i + 1;
361 while (j < view->nr
362 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
363 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
364 ++j;
365 }
366 ++i;
367 memmove(&view->ranges[i], &view->ranges[j],
368 (view->nr - j) * sizeof(view->ranges[j]));
369 view->nr -= j - i;
370 }
371 }
372
373 static bool memory_region_big_endian(MemoryRegion *mr)
374 {
375 #ifdef TARGET_WORDS_BIGENDIAN
376 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
377 #else
378 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
379 #endif
380 }
381
382 static bool memory_region_wrong_endianness(MemoryRegion *mr)
383 {
384 #ifdef TARGET_WORDS_BIGENDIAN
385 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
386 #else
387 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
388 #endif
389 }
390
391 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
392 {
393 if (memory_region_wrong_endianness(mr)) {
394 switch (size) {
395 case 1:
396 break;
397 case 2:
398 *data = bswap16(*data);
399 break;
400 case 4:
401 *data = bswap32(*data);
402 break;
403 case 8:
404 *data = bswap64(*data);
405 break;
406 default:
407 abort();
408 }
409 }
410 }
411
412 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
413 {
414 MemoryRegion *root;
415 hwaddr abs_addr = offset;
416
417 abs_addr += mr->addr;
418 for (root = mr; root->container; ) {
419 root = root->container;
420 abs_addr += root->addr;
421 }
422
423 return abs_addr;
424 }
425
426 static int get_cpu_index(void)
427 {
428 if (current_cpu) {
429 return current_cpu->cpu_index;
430 }
431 return -1;
432 }
433
434 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
435 hwaddr addr,
436 uint64_t *value,
437 unsigned size,
438 unsigned shift,
439 uint64_t mask,
440 MemTxAttrs attrs)
441 {
442 uint64_t tmp;
443
444 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
445 if (mr->subpage) {
446 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
447 } else if (mr == &io_mem_notdirty) {
448 /* Accesses to code which has previously been translated into a TB show
449 * up in the MMIO path, as accesses to the io_mem_notdirty
450 * MemoryRegion. */
451 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
452 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
453 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
454 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
455 }
456 *value |= (tmp & mask) << shift;
457 return MEMTX_OK;
458 }
459
460 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
461 hwaddr addr,
462 uint64_t *value,
463 unsigned size,
464 unsigned shift,
465 uint64_t mask,
466 MemTxAttrs attrs)
467 {
468 uint64_t tmp;
469
470 tmp = mr->ops->read(mr->opaque, addr, size);
471 if (mr->subpage) {
472 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
473 } else if (mr == &io_mem_notdirty) {
474 /* Accesses to code which has previously been translated into a TB show
475 * up in the MMIO path, as accesses to the io_mem_notdirty
476 * MemoryRegion. */
477 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
478 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
479 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
480 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
481 }
482 *value |= (tmp & mask) << shift;
483 return MEMTX_OK;
484 }
485
486 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
487 hwaddr addr,
488 uint64_t *value,
489 unsigned size,
490 unsigned shift,
491 uint64_t mask,
492 MemTxAttrs attrs)
493 {
494 uint64_t tmp = 0;
495 MemTxResult r;
496
497 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
498 if (mr->subpage) {
499 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
500 } else if (mr == &io_mem_notdirty) {
501 /* Accesses to code which has previously been translated into a TB show
502 * up in the MMIO path, as accesses to the io_mem_notdirty
503 * MemoryRegion. */
504 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
505 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
506 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
507 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
508 }
509 *value |= (tmp & mask) << shift;
510 return r;
511 }
512
513 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
514 hwaddr addr,
515 uint64_t *value,
516 unsigned size,
517 unsigned shift,
518 uint64_t mask,
519 MemTxAttrs attrs)
520 {
521 uint64_t tmp;
522
523 tmp = (*value >> shift) & mask;
524 if (mr->subpage) {
525 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
526 } else if (mr == &io_mem_notdirty) {
527 /* Accesses to code which has previously been translated into a TB show
528 * up in the MMIO path, as accesses to the io_mem_notdirty
529 * MemoryRegion. */
530 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
531 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
532 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
533 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
534 }
535 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
536 return MEMTX_OK;
537 }
538
539 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
540 hwaddr addr,
541 uint64_t *value,
542 unsigned size,
543 unsigned shift,
544 uint64_t mask,
545 MemTxAttrs attrs)
546 {
547 uint64_t tmp;
548
549 tmp = (*value >> shift) & mask;
550 if (mr->subpage) {
551 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
552 } else if (mr == &io_mem_notdirty) {
553 /* Accesses to code which has previously been translated into a TB show
554 * up in the MMIO path, as accesses to the io_mem_notdirty
555 * MemoryRegion. */
556 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
557 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
558 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
559 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
560 }
561 mr->ops->write(mr->opaque, addr, tmp, size);
562 return MEMTX_OK;
563 }
564
565 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
566 hwaddr addr,
567 uint64_t *value,
568 unsigned size,
569 unsigned shift,
570 uint64_t mask,
571 MemTxAttrs attrs)
572 {
573 uint64_t tmp;
574
575 tmp = (*value >> shift) & mask;
576 if (mr->subpage) {
577 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
578 } else if (mr == &io_mem_notdirty) {
579 /* Accesses to code which has previously been translated into a TB show
580 * up in the MMIO path, as accesses to the io_mem_notdirty
581 * MemoryRegion. */
582 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
583 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
584 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
585 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
586 }
587 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
588 }
589
590 static MemTxResult access_with_adjusted_size(hwaddr addr,
591 uint64_t *value,
592 unsigned size,
593 unsigned access_size_min,
594 unsigned access_size_max,
595 MemTxResult (*access_fn)
596 (MemoryRegion *mr,
597 hwaddr addr,
598 uint64_t *value,
599 unsigned size,
600 unsigned shift,
601 uint64_t mask,
602 MemTxAttrs attrs),
603 MemoryRegion *mr,
604 MemTxAttrs attrs)
605 {
606 uint64_t access_mask;
607 unsigned access_size;
608 unsigned i;
609 MemTxResult r = MEMTX_OK;
610
611 if (!access_size_min) {
612 access_size_min = 1;
613 }
614 if (!access_size_max) {
615 access_size_max = 4;
616 }
617
618 /* FIXME: support unaligned access? */
619 access_size = MAX(MIN(size, access_size_max), access_size_min);
620 access_mask = -1ULL >> (64 - access_size * 8);
621 if (memory_region_big_endian(mr)) {
622 for (i = 0; i < size; i += access_size) {
623 r |= access_fn(mr, addr + i, value, access_size,
624 (size - access_size - i) * 8, access_mask, attrs);
625 }
626 } else {
627 for (i = 0; i < size; i += access_size) {
628 r |= access_fn(mr, addr + i, value, access_size, i * 8,
629 access_mask, attrs);
630 }
631 }
632 return r;
633 }
634
635 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
636 {
637 AddressSpace *as;
638
639 while (mr->container) {
640 mr = mr->container;
641 }
642 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
643 if (mr == as->root) {
644 return as;
645 }
646 }
647 return NULL;
648 }
649
650 /* Render a memory region into the global view. Ranges in @view obscure
651 * ranges in @mr.
652 */
653 static void render_memory_region(FlatView *view,
654 MemoryRegion *mr,
655 Int128 base,
656 AddrRange clip,
657 bool readonly)
658 {
659 MemoryRegion *subregion;
660 unsigned i;
661 hwaddr offset_in_region;
662 Int128 remain;
663 Int128 now;
664 FlatRange fr;
665 AddrRange tmp;
666
667 if (!mr->enabled) {
668 return;
669 }
670
671 int128_addto(&base, int128_make64(mr->addr));
672 readonly |= mr->readonly;
673
674 tmp = addrrange_make(base, mr->size);
675
676 if (!addrrange_intersects(tmp, clip)) {
677 return;
678 }
679
680 clip = addrrange_intersection(tmp, clip);
681
682 if (mr->alias) {
683 int128_subfrom(&base, int128_make64(mr->alias->addr));
684 int128_subfrom(&base, int128_make64(mr->alias_offset));
685 render_memory_region(view, mr->alias, base, clip, readonly);
686 return;
687 }
688
689 /* Render subregions in priority order. */
690 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
691 render_memory_region(view, subregion, base, clip, readonly);
692 }
693
694 if (!mr->terminates) {
695 return;
696 }
697
698 offset_in_region = int128_get64(int128_sub(clip.start, base));
699 base = clip.start;
700 remain = clip.size;
701
702 fr.mr = mr;
703 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
704 fr.romd_mode = mr->romd_mode;
705 fr.readonly = readonly;
706
707 /* Render the region itself into any gaps left by the current view. */
708 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
709 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
710 continue;
711 }
712 if (int128_lt(base, view->ranges[i].addr.start)) {
713 now = int128_min(remain,
714 int128_sub(view->ranges[i].addr.start, base));
715 fr.offset_in_region = offset_in_region;
716 fr.addr = addrrange_make(base, now);
717 flatview_insert(view, i, &fr);
718 ++i;
719 int128_addto(&base, now);
720 offset_in_region += int128_get64(now);
721 int128_subfrom(&remain, now);
722 }
723 now = int128_sub(int128_min(int128_add(base, remain),
724 addrrange_end(view->ranges[i].addr)),
725 base);
726 int128_addto(&base, now);
727 offset_in_region += int128_get64(now);
728 int128_subfrom(&remain, now);
729 }
730 if (int128_nz(remain)) {
731 fr.offset_in_region = offset_in_region;
732 fr.addr = addrrange_make(base, remain);
733 flatview_insert(view, i, &fr);
734 }
735 }
736
737 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
738 {
739 while (mr->enabled) {
740 if (mr->alias) {
741 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
742 /* The alias is included in its entirety. Use it as
743 * the "real" root, so that we can share more FlatViews.
744 */
745 mr = mr->alias;
746 continue;
747 }
748 } else if (!mr->terminates) {
749 unsigned int found = 0;
750 MemoryRegion *child, *next = NULL;
751 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
752 if (child->enabled) {
753 if (++found > 1) {
754 next = NULL;
755 break;
756 }
757 if (!child->addr && int128_ge(mr->size, child->size)) {
758 /* A child is included in its entirety. If it's the only
759 * enabled one, use it in the hope of finding an alias down the
760 * way. This will also let us share FlatViews.
761 */
762 next = child;
763 }
764 }
765 }
766 if (found == 0) {
767 return NULL;
768 }
769 if (next) {
770 mr = next;
771 continue;
772 }
773 }
774
775 return mr;
776 }
777
778 return NULL;
779 }
780
781 /* Render a memory topology into a list of disjoint absolute ranges. */
782 static FlatView *generate_memory_topology(MemoryRegion *mr)
783 {
784 int i;
785 FlatView *view;
786
787 view = flatview_new(mr);
788
789 if (mr) {
790 render_memory_region(view, mr, int128_zero(),
791 addrrange_make(int128_zero(), int128_2_64()), false);
792 }
793 flatview_simplify(view);
794
795 view->dispatch = address_space_dispatch_new(view);
796 for (i = 0; i < view->nr; i++) {
797 MemoryRegionSection mrs =
798 section_from_flat_range(&view->ranges[i], view);
799 flatview_add_to_dispatch(view, &mrs);
800 }
801 address_space_dispatch_compact(view->dispatch);
802 g_hash_table_replace(flat_views, mr, view);
803
804 return view;
805 }
806
807 static void address_space_add_del_ioeventfds(AddressSpace *as,
808 MemoryRegionIoeventfd *fds_new,
809 unsigned fds_new_nb,
810 MemoryRegionIoeventfd *fds_old,
811 unsigned fds_old_nb)
812 {
813 unsigned iold, inew;
814 MemoryRegionIoeventfd *fd;
815 MemoryRegionSection section;
816
817 /* Generate a symmetric difference of the old and new fd sets, adding
818 * and deleting as necessary.
819 */
820
821 iold = inew = 0;
822 while (iold < fds_old_nb || inew < fds_new_nb) {
823 if (iold < fds_old_nb
824 && (inew == fds_new_nb
825 || memory_region_ioeventfd_before(fds_old[iold],
826 fds_new[inew]))) {
827 fd = &fds_old[iold];
828 section = (MemoryRegionSection) {
829 .fv = address_space_to_flatview(as),
830 .offset_within_address_space = int128_get64(fd->addr.start),
831 .size = fd->addr.size,
832 };
833 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
834 fd->match_data, fd->data, fd->e);
835 ++iold;
836 } else if (inew < fds_new_nb
837 && (iold == fds_old_nb
838 || memory_region_ioeventfd_before(fds_new[inew],
839 fds_old[iold]))) {
840 fd = &fds_new[inew];
841 section = (MemoryRegionSection) {
842 .fv = address_space_to_flatview(as),
843 .offset_within_address_space = int128_get64(fd->addr.start),
844 .size = fd->addr.size,
845 };
846 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
847 fd->match_data, fd->data, fd->e);
848 ++inew;
849 } else {
850 ++iold;
851 ++inew;
852 }
853 }
854 }
855
856 static FlatView *address_space_get_flatview(AddressSpace *as)
857 {
858 FlatView *view;
859
860 rcu_read_lock();
861 do {
862 view = address_space_to_flatview(as);
863 /* If somebody has replaced as->current_map concurrently,
864 * flatview_ref returns false.
865 */
866 } while (!flatview_ref(view));
867 rcu_read_unlock();
868 return view;
869 }
870
871 static void address_space_update_ioeventfds(AddressSpace *as)
872 {
873 FlatView *view;
874 FlatRange *fr;
875 unsigned ioeventfd_nb = 0;
876 MemoryRegionIoeventfd *ioeventfds = NULL;
877 AddrRange tmp;
878 unsigned i;
879
880 view = address_space_get_flatview(as);
881 FOR_EACH_FLAT_RANGE(fr, view) {
882 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
883 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
884 int128_sub(fr->addr.start,
885 int128_make64(fr->offset_in_region)));
886 if (addrrange_intersects(fr->addr, tmp)) {
887 ++ioeventfd_nb;
888 ioeventfds = g_realloc(ioeventfds,
889 ioeventfd_nb * sizeof(*ioeventfds));
890 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
891 ioeventfds[ioeventfd_nb-1].addr = tmp;
892 }
893 }
894 }
895
896 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
897 as->ioeventfds, as->ioeventfd_nb);
898
899 g_free(as->ioeventfds);
900 as->ioeventfds = ioeventfds;
901 as->ioeventfd_nb = ioeventfd_nb;
902 flatview_unref(view);
903 }
904
905 static void address_space_update_topology_pass(AddressSpace *as,
906 const FlatView *old_view,
907 const FlatView *new_view,
908 bool adding)
909 {
910 unsigned iold, inew;
911 FlatRange *frold, *frnew;
912
913 /* Generate a symmetric difference of the old and new memory maps.
914 * Kill ranges in the old map, and instantiate ranges in the new map.
915 */
916 iold = inew = 0;
917 while (iold < old_view->nr || inew < new_view->nr) {
918 if (iold < old_view->nr) {
919 frold = &old_view->ranges[iold];
920 } else {
921 frold = NULL;
922 }
923 if (inew < new_view->nr) {
924 frnew = &new_view->ranges[inew];
925 } else {
926 frnew = NULL;
927 }
928
929 if (frold
930 && (!frnew
931 || int128_lt(frold->addr.start, frnew->addr.start)
932 || (int128_eq(frold->addr.start, frnew->addr.start)
933 && !flatrange_equal(frold, frnew)))) {
934 /* In old but not in new, or in both but attributes changed. */
935
936 if (!adding) {
937 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
938 }
939
940 ++iold;
941 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
942 /* In both and unchanged (except logging may have changed) */
943
944 if (adding) {
945 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
946 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
947 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
948 frold->dirty_log_mask,
949 frnew->dirty_log_mask);
950 }
951 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
952 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
953 frold->dirty_log_mask,
954 frnew->dirty_log_mask);
955 }
956 }
957
958 ++iold;
959 ++inew;
960 } else {
961 /* In new */
962
963 if (adding) {
964 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
965 }
966
967 ++inew;
968 }
969 }
970 }
971
972 static void flatviews_init(void)
973 {
974 static FlatView *empty_view;
975
976 if (flat_views) {
977 return;
978 }
979
980 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
981 (GDestroyNotify) flatview_unref);
982 if (!empty_view) {
983 empty_view = generate_memory_topology(NULL);
984 /* We keep it alive forever in the global variable. */
985 flatview_ref(empty_view);
986 } else {
987 g_hash_table_replace(flat_views, NULL, empty_view);
988 flatview_ref(empty_view);
989 }
990 }
991
992 static void flatviews_reset(void)
993 {
994 AddressSpace *as;
995
996 if (flat_views) {
997 g_hash_table_unref(flat_views);
998 flat_views = NULL;
999 }
1000 flatviews_init();
1001
1002 /* Render unique FVs */
1003 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1004 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1005
1006 if (g_hash_table_lookup(flat_views, physmr)) {
1007 continue;
1008 }
1009
1010 generate_memory_topology(physmr);
1011 }
1012 }
1013
1014 static void address_space_set_flatview(AddressSpace *as)
1015 {
1016 FlatView *old_view = address_space_to_flatview(as);
1017 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1018 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1019
1020 assert(new_view);
1021
1022 if (old_view == new_view) {
1023 return;
1024 }
1025
1026 if (old_view) {
1027 flatview_ref(old_view);
1028 }
1029
1030 flatview_ref(new_view);
1031
1032 if (!QTAILQ_EMPTY(&as->listeners)) {
1033 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1034
1035 if (!old_view2) {
1036 old_view2 = &tmpview;
1037 }
1038 address_space_update_topology_pass(as, old_view2, new_view, false);
1039 address_space_update_topology_pass(as, old_view2, new_view, true);
1040 }
1041
1042 /* Writes are protected by the BQL. */
1043 atomic_rcu_set(&as->current_map, new_view);
1044 if (old_view) {
1045 flatview_unref(old_view);
1046 }
1047
1048 /* Note that all the old MemoryRegions are still alive up to this
1049 * point. This relieves most MemoryListeners from the need to
1050 * ref/unref the MemoryRegions they get---unless they use them
1051 * outside the iothread mutex, in which case precise reference
1052 * counting is necessary.
1053 */
1054 if (old_view) {
1055 flatview_unref(old_view);
1056 }
1057 }
1058
1059 static void address_space_update_topology(AddressSpace *as)
1060 {
1061 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1062
1063 flatviews_init();
1064 if (!g_hash_table_lookup(flat_views, physmr)) {
1065 generate_memory_topology(physmr);
1066 }
1067 address_space_set_flatview(as);
1068 }
1069
1070 void memory_region_transaction_begin(void)
1071 {
1072 qemu_flush_coalesced_mmio_buffer();
1073 ++memory_region_transaction_depth;
1074 }
1075
1076 void memory_region_transaction_commit(void)
1077 {
1078 AddressSpace *as;
1079
1080 assert(memory_region_transaction_depth);
1081 assert(qemu_mutex_iothread_locked());
1082
1083 --memory_region_transaction_depth;
1084 if (!memory_region_transaction_depth) {
1085 if (memory_region_update_pending) {
1086 flatviews_reset();
1087
1088 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1089
1090 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1091 address_space_set_flatview(as);
1092 address_space_update_ioeventfds(as);
1093 }
1094 memory_region_update_pending = false;
1095 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1096 } else if (ioeventfd_update_pending) {
1097 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1098 address_space_update_ioeventfds(as);
1099 }
1100 ioeventfd_update_pending = false;
1101 }
1102 }
1103 }
1104
1105 static void memory_region_destructor_none(MemoryRegion *mr)
1106 {
1107 }
1108
1109 static void memory_region_destructor_ram(MemoryRegion *mr)
1110 {
1111 qemu_ram_free(mr->ram_block);
1112 }
1113
1114 static bool memory_region_need_escape(char c)
1115 {
1116 return c == '/' || c == '[' || c == '\\' || c == ']';
1117 }
1118
1119 static char *memory_region_escape_name(const char *name)
1120 {
1121 const char *p;
1122 char *escaped, *q;
1123 uint8_t c;
1124 size_t bytes = 0;
1125
1126 for (p = name; *p; p++) {
1127 bytes += memory_region_need_escape(*p) ? 4 : 1;
1128 }
1129 if (bytes == p - name) {
1130 return g_memdup(name, bytes + 1);
1131 }
1132
1133 escaped = g_malloc(bytes + 1);
1134 for (p = name, q = escaped; *p; p++) {
1135 c = *p;
1136 if (unlikely(memory_region_need_escape(c))) {
1137 *q++ = '\\';
1138 *q++ = 'x';
1139 *q++ = "0123456789abcdef"[c >> 4];
1140 c = "0123456789abcdef"[c & 15];
1141 }
1142 *q++ = c;
1143 }
1144 *q = 0;
1145 return escaped;
1146 }
1147
1148 static void memory_region_do_init(MemoryRegion *mr,
1149 Object *owner,
1150 const char *name,
1151 uint64_t size)
1152 {
1153 mr->size = int128_make64(size);
1154 if (size == UINT64_MAX) {
1155 mr->size = int128_2_64();
1156 }
1157 mr->name = g_strdup(name);
1158 mr->owner = owner;
1159 mr->ram_block = NULL;
1160
1161 if (name) {
1162 char *escaped_name = memory_region_escape_name(name);
1163 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1164
1165 if (!owner) {
1166 owner = container_get(qdev_get_machine(), "/unattached");
1167 }
1168
1169 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1170 object_unref(OBJECT(mr));
1171 g_free(name_array);
1172 g_free(escaped_name);
1173 }
1174 }
1175
1176 void memory_region_init(MemoryRegion *mr,
1177 Object *owner,
1178 const char *name,
1179 uint64_t size)
1180 {
1181 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1182 memory_region_do_init(mr, owner, name, size);
1183 }
1184
1185 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1186 void *opaque, Error **errp)
1187 {
1188 MemoryRegion *mr = MEMORY_REGION(obj);
1189 uint64_t value = mr->addr;
1190
1191 visit_type_uint64(v, name, &value, errp);
1192 }
1193
1194 static void memory_region_get_container(Object *obj, Visitor *v,
1195 const char *name, void *opaque,
1196 Error **errp)
1197 {
1198 MemoryRegion *mr = MEMORY_REGION(obj);
1199 gchar *path = (gchar *)"";
1200
1201 if (mr->container) {
1202 path = object_get_canonical_path(OBJECT(mr->container));
1203 }
1204 visit_type_str(v, name, &path, errp);
1205 if (mr->container) {
1206 g_free(path);
1207 }
1208 }
1209
1210 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1211 const char *part)
1212 {
1213 MemoryRegion *mr = MEMORY_REGION(obj);
1214
1215 return OBJECT(mr->container);
1216 }
1217
1218 static void memory_region_get_priority(Object *obj, Visitor *v,
1219 const char *name, void *opaque,
1220 Error **errp)
1221 {
1222 MemoryRegion *mr = MEMORY_REGION(obj);
1223 int32_t value = mr->priority;
1224
1225 visit_type_int32(v, name, &value, errp);
1226 }
1227
1228 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1229 void *opaque, Error **errp)
1230 {
1231 MemoryRegion *mr = MEMORY_REGION(obj);
1232 uint64_t value = memory_region_size(mr);
1233
1234 visit_type_uint64(v, name, &value, errp);
1235 }
1236
1237 static void memory_region_initfn(Object *obj)
1238 {
1239 MemoryRegion *mr = MEMORY_REGION(obj);
1240 ObjectProperty *op;
1241
1242 mr->ops = &unassigned_mem_ops;
1243 mr->enabled = true;
1244 mr->romd_mode = true;
1245 mr->global_locking = true;
1246 mr->destructor = memory_region_destructor_none;
1247 QTAILQ_INIT(&mr->subregions);
1248 QTAILQ_INIT(&mr->coalesced);
1249
1250 op = object_property_add(OBJECT(mr), "container",
1251 "link<" TYPE_MEMORY_REGION ">",
1252 memory_region_get_container,
1253 NULL, /* memory_region_set_container */
1254 NULL, NULL, &error_abort);
1255 op->resolve = memory_region_resolve_container;
1256
1257 object_property_add(OBJECT(mr), "addr", "uint64",
1258 memory_region_get_addr,
1259 NULL, /* memory_region_set_addr */
1260 NULL, NULL, &error_abort);
1261 object_property_add(OBJECT(mr), "priority", "uint32",
1262 memory_region_get_priority,
1263 NULL, /* memory_region_set_priority */
1264 NULL, NULL, &error_abort);
1265 object_property_add(OBJECT(mr), "size", "uint64",
1266 memory_region_get_size,
1267 NULL, /* memory_region_set_size, */
1268 NULL, NULL, &error_abort);
1269 }
1270
1271 static int qemu_target_backtrace(target_ulong *array, size_t size)
1272 {
1273 int n = 0;
1274 if (size >= 2) {
1275 #if defined(TARGET_ARM)
1276 CPUArchState *env = current_cpu->env_ptr;
1277 array[0] = env->regs[15];
1278 array[1] = env->regs[14];
1279 #elif defined(TARGET_MIPS)
1280 CPUArchState *env = current_cpu->env_ptr;
1281 array[0] = env->active_tc.PC;
1282 array[1] = env->active_tc.gpr[31];
1283 #else
1284 array[0] = 0;
1285 array[1] = 0;
1286 #endif
1287 n = 2;
1288 }
1289 return n;
1290 }
1291
1292 #include "disas/disas.h"
1293 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1294 {
1295 char *p = buffer;
1296 if (current_cpu) {
1297 target_ulong caller[2];
1298 const char *symbol;
1299 qemu_target_backtrace(caller, 2);
1300 symbol = lookup_symbol(caller[0]);
1301 p += sprintf(p, "[%s]", symbol);
1302 symbol = lookup_symbol(caller[1]);
1303 p += sprintf(p, "[%s]", symbol);
1304 } else {
1305 p += sprintf(p, "[cpu not running]");
1306 }
1307 assert((p - buffer) < length);
1308 return buffer;
1309 }
1310
1311 static void iommu_memory_region_initfn(Object *obj)
1312 {
1313 MemoryRegion *mr = MEMORY_REGION(obj);
1314
1315 mr->is_iommu = true;
1316 }
1317
1318 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1319 unsigned size)
1320 {
1321 if (trace_unassigned) {
1322 char buffer[256];
1323 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1324 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1325 }
1326 //~ vm_stop(0);
1327 if (current_cpu != NULL) {
1328 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1329 }
1330 return 0;
1331 }
1332
1333 static void unassigned_mem_write(void *opaque, hwaddr addr,
1334 uint64_t val, unsigned size)
1335 {
1336 if (trace_unassigned) {
1337 char buffer[256];
1338 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1339 " = 0x%" PRIx64 " %s\n",
1340 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1341 }
1342 if (current_cpu != NULL) {
1343 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1344 }
1345 }
1346
1347 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1348 unsigned size, bool is_write)
1349 {
1350 return false;
1351 }
1352
1353 const MemoryRegionOps unassigned_mem_ops = {
1354 .valid.accepts = unassigned_mem_accepts,
1355 .endianness = DEVICE_NATIVE_ENDIAN,
1356 };
1357
1358 static uint64_t memory_region_ram_device_read(void *opaque,
1359 hwaddr addr, unsigned size)
1360 {
1361 MemoryRegion *mr = opaque;
1362 uint64_t data = (uint64_t)~0;
1363
1364 switch (size) {
1365 case 1:
1366 data = *(uint8_t *)(mr->ram_block->host + addr);
1367 break;
1368 case 2:
1369 data = *(uint16_t *)(mr->ram_block->host + addr);
1370 break;
1371 case 4:
1372 data = *(uint32_t *)(mr->ram_block->host + addr);
1373 break;
1374 case 8:
1375 data = *(uint64_t *)(mr->ram_block->host + addr);
1376 break;
1377 }
1378
1379 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1380
1381 return data;
1382 }
1383
1384 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1385 uint64_t data, unsigned size)
1386 {
1387 MemoryRegion *mr = opaque;
1388
1389 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1390
1391 switch (size) {
1392 case 1:
1393 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1394 break;
1395 case 2:
1396 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1397 break;
1398 case 4:
1399 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1400 break;
1401 case 8:
1402 *(uint64_t *)(mr->ram_block->host + addr) = data;
1403 break;
1404 }
1405 }
1406
1407 static const MemoryRegionOps ram_device_mem_ops = {
1408 .read = memory_region_ram_device_read,
1409 .write = memory_region_ram_device_write,
1410 .endianness = DEVICE_HOST_ENDIAN,
1411 .valid = {
1412 .min_access_size = 1,
1413 .max_access_size = 8,
1414 .unaligned = true,
1415 },
1416 .impl = {
1417 .min_access_size = 1,
1418 .max_access_size = 8,
1419 .unaligned = true,
1420 },
1421 };
1422
1423 bool memory_region_access_valid(MemoryRegion *mr,
1424 hwaddr addr,
1425 unsigned size,
1426 bool is_write)
1427 {
1428 int access_size_min, access_size_max;
1429 int access_size, i;
1430
1431 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1432 fprintf(stderr, "Misaligned i/o to address %08" HWADDR_PRIx
1433 " with size %u for memory region %s\n",
1434 addr, size, mr->name);
1435 return false;
1436 }
1437
1438 if (!mr->ops->valid.accepts) {
1439 return true;
1440 }
1441
1442 access_size_min = mr->ops->valid.min_access_size;
1443 if (!mr->ops->valid.min_access_size) {
1444 access_size_min = 1;
1445 }
1446
1447 access_size_max = mr->ops->valid.max_access_size;
1448 if (!mr->ops->valid.max_access_size) {
1449 access_size_max = 4;
1450 }
1451
1452 access_size = MAX(MIN(size, access_size_max), access_size_min);
1453 for (i = 0; i < size; i += access_size) {
1454 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1455 is_write)) {
1456 return false;
1457 }
1458 }
1459
1460 return true;
1461 }
1462
1463 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1464 hwaddr addr,
1465 uint64_t *pval,
1466 unsigned size,
1467 MemTxAttrs attrs)
1468 {
1469 *pval = 0;
1470
1471 if (mr->ops->read) {
1472 return access_with_adjusted_size(addr, pval, size,
1473 mr->ops->impl.min_access_size,
1474 mr->ops->impl.max_access_size,
1475 memory_region_read_accessor,
1476 mr, attrs);
1477 } else if (mr->ops->read_with_attrs) {
1478 return access_with_adjusted_size(addr, pval, size,
1479 mr->ops->impl.min_access_size,
1480 mr->ops->impl.max_access_size,
1481 memory_region_read_with_attrs_accessor,
1482 mr, attrs);
1483 } else {
1484 return access_with_adjusted_size(addr, pval, size, 1, 4,
1485 memory_region_oldmmio_read_accessor,
1486 mr, attrs);
1487 }
1488 }
1489
1490 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1491 hwaddr addr,
1492 uint64_t *pval,
1493 unsigned size,
1494 MemTxAttrs attrs)
1495 {
1496 MemTxResult r;
1497
1498 if (!memory_region_access_valid(mr, addr, size, false)) {
1499 *pval = unassigned_mem_read(mr, addr, size);
1500 return MEMTX_DECODE_ERROR;
1501 }
1502
1503 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1504 adjust_endianness(mr, pval, size);
1505 return r;
1506 }
1507
1508 /* Return true if an eventfd was signalled */
1509 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1510 hwaddr addr,
1511 uint64_t data,
1512 unsigned size,
1513 MemTxAttrs attrs)
1514 {
1515 MemoryRegionIoeventfd ioeventfd = {
1516 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1517 .data = data,
1518 };
1519 unsigned i;
1520
1521 for (i = 0; i < mr->ioeventfd_nb; i++) {
1522 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1523 ioeventfd.e = mr->ioeventfds[i].e;
1524
1525 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1526 event_notifier_set(ioeventfd.e);
1527 return true;
1528 }
1529 }
1530
1531 return false;
1532 }
1533
1534 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1535 hwaddr addr,
1536 uint64_t data,
1537 unsigned size,
1538 MemTxAttrs attrs)
1539 {
1540 if (!memory_region_access_valid(mr, addr, size, true)) {
1541 unassigned_mem_write(mr, addr, data, size);
1542 return MEMTX_DECODE_ERROR;
1543 }
1544
1545 adjust_endianness(mr, &data, size);
1546
1547 if ((!kvm_eventfds_enabled()) &&
1548 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1549 return MEMTX_OK;
1550 }
1551
1552 if (mr->ops->write) {
1553 return access_with_adjusted_size(addr, &data, size,
1554 mr->ops->impl.min_access_size,
1555 mr->ops->impl.max_access_size,
1556 memory_region_write_accessor, mr,
1557 attrs);
1558 } else if (mr->ops->write_with_attrs) {
1559 return
1560 access_with_adjusted_size(addr, &data, size,
1561 mr->ops->impl.min_access_size,
1562 mr->ops->impl.max_access_size,
1563 memory_region_write_with_attrs_accessor,
1564 mr, attrs);
1565 } else {
1566 return access_with_adjusted_size(addr, &data, size, 1, 4,
1567 memory_region_oldmmio_write_accessor,
1568 mr, attrs);
1569 }
1570 }
1571
1572 void memory_region_init_io(MemoryRegion *mr,
1573 Object *owner,
1574 const MemoryRegionOps *ops,
1575 void *opaque,
1576 const char *name,
1577 uint64_t size)
1578 {
1579 memory_region_init(mr, owner, name, size);
1580 mr->ops = ops ? ops : &unassigned_mem_ops;
1581 mr->opaque = opaque;
1582 mr->terminates = true;
1583 }
1584
1585 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1586 Object *owner,
1587 const char *name,
1588 uint64_t size,
1589 Error **errp)
1590 {
1591 memory_region_init(mr, owner, name, size);
1592 mr->ram = true;
1593 mr->terminates = true;
1594 mr->destructor = memory_region_destructor_ram;
1595 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1596 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1597 }
1598
1599 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1600 Object *owner,
1601 const char *name,
1602 uint64_t size,
1603 uint64_t max_size,
1604 void (*resized)(const char*,
1605 uint64_t length,
1606 void *host),
1607 Error **errp)
1608 {
1609 memory_region_init(mr, owner, name, size);
1610 mr->ram = true;
1611 mr->terminates = true;
1612 mr->destructor = memory_region_destructor_ram;
1613 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1614 mr, errp);
1615 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1616 }
1617
1618 #ifdef __linux__
1619 void memory_region_init_ram_from_file(MemoryRegion *mr,
1620 struct Object *owner,
1621 const char *name,
1622 uint64_t size,
1623 bool share,
1624 const char *path,
1625 Error **errp)
1626 {
1627 memory_region_init(mr, owner, name, size);
1628 mr->ram = true;
1629 mr->terminates = true;
1630 mr->destructor = memory_region_destructor_ram;
1631 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1632 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1633 }
1634
1635 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1636 struct Object *owner,
1637 const char *name,
1638 uint64_t size,
1639 bool share,
1640 int fd,
1641 Error **errp)
1642 {
1643 memory_region_init(mr, owner, name, size);
1644 mr->ram = true;
1645 mr->terminates = true;
1646 mr->destructor = memory_region_destructor_ram;
1647 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
1648 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1649 }
1650 #endif
1651
1652 void memory_region_init_ram_ptr(MemoryRegion *mr,
1653 Object *owner,
1654 const char *name,
1655 uint64_t size,
1656 void *ptr)
1657 {
1658 memory_region_init(mr, owner, name, size);
1659 mr->ram = true;
1660 mr->terminates = true;
1661 mr->destructor = memory_region_destructor_ram;
1662 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1663
1664 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1665 assert(ptr != NULL);
1666 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1667 }
1668
1669 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1670 Object *owner,
1671 const char *name,
1672 uint64_t size,
1673 void *ptr)
1674 {
1675 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1676 mr->ram_device = true;
1677 mr->ops = &ram_device_mem_ops;
1678 mr->opaque = mr;
1679 }
1680
1681 void memory_region_init_alias(MemoryRegion *mr,
1682 Object *owner,
1683 const char *name,
1684 MemoryRegion *orig,
1685 hwaddr offset,
1686 uint64_t size)
1687 {
1688 memory_region_init(mr, owner, name, size);
1689 mr->alias = orig;
1690 mr->alias_offset = offset;
1691 }
1692
1693 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1694 struct Object *owner,
1695 const char *name,
1696 uint64_t size,
1697 Error **errp)
1698 {
1699 memory_region_init(mr, owner, name, size);
1700 mr->ram = true;
1701 mr->readonly = true;
1702 mr->terminates = true;
1703 mr->destructor = memory_region_destructor_ram;
1704 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1705 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1706 }
1707
1708 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1709 Object *owner,
1710 const MemoryRegionOps *ops,
1711 void *opaque,
1712 const char *name,
1713 uint64_t size,
1714 Error **errp)
1715 {
1716 assert(ops);
1717 memory_region_init(mr, owner, name, size);
1718 mr->ops = ops;
1719 mr->opaque = opaque;
1720 mr->terminates = true;
1721 mr->rom_device = true;
1722 mr->destructor = memory_region_destructor_ram;
1723 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1724 }
1725
1726 void memory_region_init_iommu(void *_iommu_mr,
1727 size_t instance_size,
1728 const char *mrtypename,
1729 Object *owner,
1730 const char *name,
1731 uint64_t size)
1732 {
1733 struct IOMMUMemoryRegion *iommu_mr;
1734 struct MemoryRegion *mr;
1735
1736 object_initialize(_iommu_mr, instance_size, mrtypename);
1737 mr = MEMORY_REGION(_iommu_mr);
1738 memory_region_do_init(mr, owner, name, size);
1739 iommu_mr = IOMMU_MEMORY_REGION(mr);
1740 mr->terminates = true; /* then re-forwards */
1741 QLIST_INIT(&iommu_mr->iommu_notify);
1742 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1743 }
1744
1745 static void memory_region_finalize(Object *obj)
1746 {
1747 MemoryRegion *mr = MEMORY_REGION(obj);
1748
1749 assert(!mr->container);
1750
1751 /* We know the region is not visible in any address space (it
1752 * does not have a container and cannot be a root either because
1753 * it has no references, so we can blindly clear mr->enabled.
1754 * memory_region_set_enabled instead could trigger a transaction
1755 * and cause an infinite loop.
1756 */
1757 mr->enabled = false;
1758 memory_region_transaction_begin();
1759 while (!QTAILQ_EMPTY(&mr->subregions)) {
1760 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1761 memory_region_del_subregion(mr, subregion);
1762 }
1763 memory_region_transaction_commit();
1764
1765 mr->destructor(mr);
1766 memory_region_clear_coalescing(mr);
1767 g_free((char *)mr->name);
1768 g_free(mr->ioeventfds);
1769 }
1770
1771 Object *memory_region_owner(MemoryRegion *mr)
1772 {
1773 Object *obj = OBJECT(mr);
1774 return obj->parent;
1775 }
1776
1777 void memory_region_ref(MemoryRegion *mr)
1778 {
1779 /* MMIO callbacks most likely will access data that belongs
1780 * to the owner, hence the need to ref/unref the owner whenever
1781 * the memory region is in use.
1782 *
1783 * The memory region is a child of its owner. As long as the
1784 * owner doesn't call unparent itself on the memory region,
1785 * ref-ing the owner will also keep the memory region alive.
1786 * Memory regions without an owner are supposed to never go away;
1787 * we do not ref/unref them because it slows down DMA sensibly.
1788 */
1789 if (mr && mr->owner) {
1790 object_ref(mr->owner);
1791 }
1792 }
1793
1794 void memory_region_unref(MemoryRegion *mr)
1795 {
1796 if (mr && mr->owner) {
1797 object_unref(mr->owner);
1798 }
1799 }
1800
1801 uint64_t memory_region_size(MemoryRegion *mr)
1802 {
1803 if (int128_eq(mr->size, int128_2_64())) {
1804 return UINT64_MAX;
1805 }
1806 return int128_get64(mr->size);
1807 }
1808
1809 const char *memory_region_name(const MemoryRegion *mr)
1810 {
1811 if (!mr->name) {
1812 ((MemoryRegion *)mr)->name =
1813 object_get_canonical_path_component(OBJECT(mr));
1814 }
1815 return mr->name;
1816 }
1817
1818 bool memory_region_is_ram_device(MemoryRegion *mr)
1819 {
1820 return mr->ram_device;
1821 }
1822
1823 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1824 {
1825 uint8_t mask = mr->dirty_log_mask;
1826 if (global_dirty_log && mr->ram_block) {
1827 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1828 }
1829 return mask;
1830 }
1831
1832 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1833 {
1834 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1835 }
1836
1837 static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1838 {
1839 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1840 IOMMUNotifier *iommu_notifier;
1841 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1842
1843 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1844 flags |= iommu_notifier->notifier_flags;
1845 }
1846
1847 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1848 imrc->notify_flag_changed(iommu_mr,
1849 iommu_mr->iommu_notify_flags,
1850 flags);
1851 }
1852
1853 iommu_mr->iommu_notify_flags = flags;
1854 }
1855
1856 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1857 IOMMUNotifier *n)
1858 {
1859 IOMMUMemoryRegion *iommu_mr;
1860
1861 if (mr->alias) {
1862 memory_region_register_iommu_notifier(mr->alias, n);
1863 return;
1864 }
1865
1866 /* We need to register for at least one bitfield */
1867 iommu_mr = IOMMU_MEMORY_REGION(mr);
1868 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1869 assert(n->start <= n->end);
1870 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1871 memory_region_update_iommu_notify_flags(iommu_mr);
1872 }
1873
1874 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1875 {
1876 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1877
1878 if (imrc->get_min_page_size) {
1879 return imrc->get_min_page_size(iommu_mr);
1880 }
1881 return TARGET_PAGE_SIZE;
1882 }
1883
1884 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1885 {
1886 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1887 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1888 hwaddr addr, granularity;
1889 IOMMUTLBEntry iotlb;
1890
1891 /* If the IOMMU has its own replay callback, override */
1892 if (imrc->replay) {
1893 imrc->replay(iommu_mr, n);
1894 return;
1895 }
1896
1897 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1898
1899 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1900 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
1901 if (iotlb.perm != IOMMU_NONE) {
1902 n->notify(n, &iotlb);
1903 }
1904
1905 /* if (2^64 - MR size) < granularity, it's possible to get an
1906 * infinite loop here. This should catch such a wraparound */
1907 if ((addr + granularity) < addr) {
1908 break;
1909 }
1910 }
1911 }
1912
1913 void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1914 {
1915 IOMMUNotifier *notifier;
1916
1917 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1918 memory_region_iommu_replay(iommu_mr, notifier);
1919 }
1920 }
1921
1922 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1923 IOMMUNotifier *n)
1924 {
1925 IOMMUMemoryRegion *iommu_mr;
1926
1927 if (mr->alias) {
1928 memory_region_unregister_iommu_notifier(mr->alias, n);
1929 return;
1930 }
1931 QLIST_REMOVE(n, node);
1932 iommu_mr = IOMMU_MEMORY_REGION(mr);
1933 memory_region_update_iommu_notify_flags(iommu_mr);
1934 }
1935
1936 void memory_region_notify_one(IOMMUNotifier *notifier,
1937 IOMMUTLBEntry *entry)
1938 {
1939 IOMMUNotifierFlag request_flags;
1940
1941 /*
1942 * Skip the notification if the notification does not overlap
1943 * with registered range.
1944 */
1945 if (notifier->start > entry->iova + entry->addr_mask ||
1946 notifier->end < entry->iova) {
1947 return;
1948 }
1949
1950 if (entry->perm & IOMMU_RW) {
1951 request_flags = IOMMU_NOTIFIER_MAP;
1952 } else {
1953 request_flags = IOMMU_NOTIFIER_UNMAP;
1954 }
1955
1956 if (notifier->notifier_flags & request_flags) {
1957 notifier->notify(notifier, entry);
1958 }
1959 }
1960
1961 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1962 IOMMUTLBEntry entry)
1963 {
1964 IOMMUNotifier *iommu_notifier;
1965
1966 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1967
1968 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1969 memory_region_notify_one(iommu_notifier, &entry);
1970 }
1971 }
1972
1973 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1974 {
1975 uint8_t mask = 1 << client;
1976 uint8_t old_logging;
1977
1978 assert(client == DIRTY_MEMORY_VGA);
1979 old_logging = mr->vga_logging_count;
1980 mr->vga_logging_count += log ? 1 : -1;
1981 if (!!old_logging == !!mr->vga_logging_count) {
1982 return;
1983 }
1984
1985 memory_region_transaction_begin();
1986 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1987 memory_region_update_pending |= mr->enabled;
1988 memory_region_transaction_commit();
1989 }
1990
1991 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1992 hwaddr size, unsigned client)
1993 {
1994 assert(mr->ram_block);
1995 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1996 size, client);
1997 }
1998
1999 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2000 hwaddr size)
2001 {
2002 assert(mr->ram_block);
2003 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2004 size,
2005 memory_region_get_dirty_log_mask(mr));
2006 }
2007
2008 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
2009 hwaddr size, unsigned client)
2010 {
2011 assert(mr->ram_block);
2012 return cpu_physical_memory_test_and_clear_dirty(
2013 memory_region_get_ram_addr(mr) + addr, size, client);
2014 }
2015
2016 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2017 hwaddr addr,
2018 hwaddr size,
2019 unsigned client)
2020 {
2021 assert(mr->ram_block);
2022 return cpu_physical_memory_snapshot_and_clear_dirty(
2023 memory_region_get_ram_addr(mr) + addr, size, client);
2024 }
2025
2026 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2027 hwaddr addr, hwaddr size)
2028 {
2029 assert(mr->ram_block);
2030 return cpu_physical_memory_snapshot_get_dirty(snap,
2031 memory_region_get_ram_addr(mr) + addr, size);
2032 }
2033
2034 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2035 {
2036 MemoryListener *listener;
2037 AddressSpace *as;
2038 FlatView *view;
2039 FlatRange *fr;
2040
2041 /* If the same address space has multiple log_sync listeners, we
2042 * visit that address space's FlatView multiple times. But because
2043 * log_sync listeners are rare, it's still cheaper than walking each
2044 * address space once.
2045 */
2046 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2047 if (!listener->log_sync) {
2048 continue;
2049 }
2050 as = listener->address_space;
2051 view = address_space_get_flatview(as);
2052 FOR_EACH_FLAT_RANGE(fr, view) {
2053 if (fr->mr == mr) {
2054 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2055 listener->log_sync(listener, &mrs);
2056 }
2057 }
2058 flatview_unref(view);
2059 }
2060 }
2061
2062 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2063 {
2064 if (mr->readonly != readonly) {
2065 memory_region_transaction_begin();
2066 mr->readonly = readonly;
2067 memory_region_update_pending |= mr->enabled;
2068 memory_region_transaction_commit();
2069 }
2070 }
2071
2072 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2073 {
2074 if (mr->romd_mode != romd_mode) {
2075 memory_region_transaction_begin();
2076 mr->romd_mode = romd_mode;
2077 memory_region_update_pending |= mr->enabled;
2078 memory_region_transaction_commit();
2079 }
2080 }
2081
2082 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2083 hwaddr size, unsigned client)
2084 {
2085 assert(mr->ram_block);
2086 cpu_physical_memory_test_and_clear_dirty(
2087 memory_region_get_ram_addr(mr) + addr, size, client);
2088 }
2089
2090 int memory_region_get_fd(MemoryRegion *mr)
2091 {
2092 int fd;
2093
2094 rcu_read_lock();
2095 while (mr->alias) {
2096 mr = mr->alias;
2097 }
2098 fd = mr->ram_block->fd;
2099 rcu_read_unlock();
2100
2101 return fd;
2102 }
2103
2104 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2105 {
2106 void *ptr;
2107 uint64_t offset = 0;
2108
2109 rcu_read_lock();
2110 while (mr->alias) {
2111 offset += mr->alias_offset;
2112 mr = mr->alias;
2113 }
2114 assert(mr->ram_block);
2115 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2116 rcu_read_unlock();
2117
2118 return ptr;
2119 }
2120
2121 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2122 {
2123 RAMBlock *block;
2124
2125 block = qemu_ram_block_from_host(ptr, false, offset);
2126 if (!block) {
2127 return NULL;
2128 }
2129
2130 return block->mr;
2131 }
2132
2133 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2134 {
2135 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2136 }
2137
2138 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2139 {
2140 assert(mr->ram_block);
2141
2142 qemu_ram_resize(mr->ram_block, newsize, errp);
2143 }
2144
2145 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
2146 {
2147 FlatView *view;
2148 FlatRange *fr;
2149 CoalescedMemoryRange *cmr;
2150 AddrRange tmp;
2151 MemoryRegionSection section;
2152
2153 view = address_space_get_flatview(as);
2154 FOR_EACH_FLAT_RANGE(fr, view) {
2155 if (fr->mr == mr) {
2156 section = (MemoryRegionSection) {
2157 .fv = view,
2158 .offset_within_address_space = int128_get64(fr->addr.start),
2159 .size = fr->addr.size,
2160 };
2161
2162 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
2163 int128_get64(fr->addr.start),
2164 int128_get64(fr->addr.size));
2165 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
2166 tmp = addrrange_shift(cmr->addr,
2167 int128_sub(fr->addr.start,
2168 int128_make64(fr->offset_in_region)));
2169 if (!addrrange_intersects(tmp, fr->addr)) {
2170 continue;
2171 }
2172 tmp = addrrange_intersection(tmp, fr->addr);
2173 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
2174 int128_get64(tmp.start),
2175 int128_get64(tmp.size));
2176 }
2177 }
2178 }
2179 flatview_unref(view);
2180 }
2181
2182 static void memory_region_update_coalesced_range(MemoryRegion *mr)
2183 {
2184 AddressSpace *as;
2185
2186 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2187 memory_region_update_coalesced_range_as(mr, as);
2188 }
2189 }
2190
2191 void memory_region_set_coalescing(MemoryRegion *mr)
2192 {
2193 memory_region_clear_coalescing(mr);
2194 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2195 }
2196
2197 void memory_region_add_coalescing(MemoryRegion *mr,
2198 hwaddr offset,
2199 uint64_t size)
2200 {
2201 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2202
2203 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2204 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2205 memory_region_update_coalesced_range(mr);
2206 memory_region_set_flush_coalesced(mr);
2207 }
2208
2209 void memory_region_clear_coalescing(MemoryRegion *mr)
2210 {
2211 CoalescedMemoryRange *cmr;
2212 bool updated = false;
2213
2214 qemu_flush_coalesced_mmio_buffer();
2215 mr->flush_coalesced_mmio = false;
2216
2217 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2218 cmr = QTAILQ_FIRST(&mr->coalesced);
2219 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2220 g_free(cmr);
2221 updated = true;
2222 }
2223
2224 if (updated) {
2225 memory_region_update_coalesced_range(mr);
2226 }
2227 }
2228
2229 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2230 {
2231 mr->flush_coalesced_mmio = true;
2232 }
2233
2234 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2235 {
2236 qemu_flush_coalesced_mmio_buffer();
2237 if (QTAILQ_EMPTY(&mr->coalesced)) {
2238 mr->flush_coalesced_mmio = false;
2239 }
2240 }
2241
2242 void memory_region_clear_global_locking(MemoryRegion *mr)
2243 {
2244 mr->global_locking = false;
2245 }
2246
2247 static bool userspace_eventfd_warning;
2248
2249 void memory_region_add_eventfd(MemoryRegion *mr,
2250 hwaddr addr,
2251 unsigned size,
2252 bool match_data,
2253 uint64_t data,
2254 EventNotifier *e)
2255 {
2256 MemoryRegionIoeventfd mrfd = {
2257 .addr.start = int128_make64(addr),
2258 .addr.size = int128_make64(size),
2259 .match_data = match_data,
2260 .data = data,
2261 .e = e,
2262 };
2263 unsigned i;
2264
2265 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2266 userspace_eventfd_warning))) {
2267 userspace_eventfd_warning = true;
2268 error_report("Using eventfd without MMIO binding in KVM. "
2269 "Suboptimal performance expected");
2270 }
2271
2272 if (size) {
2273 adjust_endianness(mr, &mrfd.data, size);
2274 }
2275 memory_region_transaction_begin();
2276 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2277 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2278 break;
2279 }
2280 }
2281 ++mr->ioeventfd_nb;
2282 mr->ioeventfds = g_realloc(mr->ioeventfds,
2283 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2284 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2285 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2286 mr->ioeventfds[i] = mrfd;
2287 ioeventfd_update_pending |= mr->enabled;
2288 memory_region_transaction_commit();
2289 }
2290
2291 void memory_region_del_eventfd(MemoryRegion *mr,
2292 hwaddr addr,
2293 unsigned size,
2294 bool match_data,
2295 uint64_t data,
2296 EventNotifier *e)
2297 {
2298 MemoryRegionIoeventfd mrfd = {
2299 .addr.start = int128_make64(addr),
2300 .addr.size = int128_make64(size),
2301 .match_data = match_data,
2302 .data = data,
2303 .e = e,
2304 };
2305 unsigned i;
2306
2307 if (size) {
2308 adjust_endianness(mr, &mrfd.data, size);
2309 }
2310 memory_region_transaction_begin();
2311 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2312 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2313 break;
2314 }
2315 }
2316 assert(i != mr->ioeventfd_nb);
2317 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2318 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2319 --mr->ioeventfd_nb;
2320 mr->ioeventfds = g_realloc(mr->ioeventfds,
2321 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2322 ioeventfd_update_pending |= mr->enabled;
2323 memory_region_transaction_commit();
2324 }
2325
2326 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2327 {
2328 MemoryRegion *mr = subregion->container;
2329 MemoryRegion *other;
2330
2331 memory_region_transaction_begin();
2332
2333 memory_region_ref(subregion);
2334 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2335 if (subregion->priority >= other->priority) {
2336 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2337 goto done;
2338 }
2339 }
2340 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2341 done:
2342 memory_region_update_pending |= mr->enabled && subregion->enabled;
2343 memory_region_transaction_commit();
2344 }
2345
2346 static void memory_region_add_subregion_common(MemoryRegion *mr,
2347 hwaddr offset,
2348 MemoryRegion *subregion)
2349 {
2350 assert(!subregion->container);
2351 subregion->container = mr;
2352 subregion->addr = offset;
2353 memory_region_update_container_subregions(subregion);
2354 }
2355
2356 void memory_region_add_subregion(MemoryRegion *mr,
2357 hwaddr offset,
2358 MemoryRegion *subregion)
2359 {
2360 subregion->priority = 0;
2361 memory_region_add_subregion_common(mr, offset, subregion);
2362 }
2363
2364 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2365 hwaddr offset,
2366 MemoryRegion *subregion,
2367 int priority)
2368 {
2369 subregion->priority = priority;
2370 memory_region_add_subregion_common(mr, offset, subregion);
2371 }
2372
2373 void memory_region_del_subregion(MemoryRegion *mr,
2374 MemoryRegion *subregion)
2375 {
2376 memory_region_transaction_begin();
2377 assert(subregion->container == mr);
2378 subregion->container = NULL;
2379 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2380 memory_region_unref(subregion);
2381 memory_region_update_pending |= mr->enabled && subregion->enabled;
2382 memory_region_transaction_commit();
2383 }
2384
2385 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2386 {
2387 if (enabled == mr->enabled) {
2388 return;
2389 }
2390 memory_region_transaction_begin();
2391 mr->enabled = enabled;
2392 memory_region_update_pending = true;
2393 memory_region_transaction_commit();
2394 }
2395
2396 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2397 {
2398 Int128 s = int128_make64(size);
2399
2400 if (size == UINT64_MAX) {
2401 s = int128_2_64();
2402 }
2403 if (int128_eq(s, mr->size)) {
2404 return;
2405 }
2406 memory_region_transaction_begin();
2407 mr->size = s;
2408 memory_region_update_pending = true;
2409 memory_region_transaction_commit();
2410 }
2411
2412 static void memory_region_readd_subregion(MemoryRegion *mr)
2413 {
2414 MemoryRegion *container = mr->container;
2415
2416 if (container) {
2417 memory_region_transaction_begin();
2418 memory_region_ref(mr);
2419 memory_region_del_subregion(container, mr);
2420 mr->container = container;
2421 memory_region_update_container_subregions(mr);
2422 memory_region_unref(mr);
2423 memory_region_transaction_commit();
2424 }
2425 }
2426
2427 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2428 {
2429 if (addr != mr->addr) {
2430 mr->addr = addr;
2431 memory_region_readd_subregion(mr);
2432 }
2433 }
2434
2435 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2436 {
2437 assert(mr->alias);
2438
2439 if (offset == mr->alias_offset) {
2440 return;
2441 }
2442
2443 memory_region_transaction_begin();
2444 mr->alias_offset = offset;
2445 memory_region_update_pending |= mr->enabled;
2446 memory_region_transaction_commit();
2447 }
2448
2449 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2450 {
2451 return mr->align;
2452 }
2453
2454 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2455 {
2456 const AddrRange *addr = addr_;
2457 const FlatRange *fr = fr_;
2458
2459 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2460 return -1;
2461 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2462 return 1;
2463 }
2464 return 0;
2465 }
2466
2467 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2468 {
2469 return bsearch(&addr, view->ranges, view->nr,
2470 sizeof(FlatRange), cmp_flatrange_addr);
2471 }
2472
2473 bool memory_region_is_mapped(MemoryRegion *mr)
2474 {
2475 return mr->container ? true : false;
2476 }
2477
2478 /* Same as memory_region_find, but it does not add a reference to the
2479 * returned region. It must be called from an RCU critical section.
2480 */
2481 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2482 hwaddr addr, uint64_t size)
2483 {
2484 MemoryRegionSection ret = { .mr = NULL };
2485 MemoryRegion *root;
2486 AddressSpace *as;
2487 AddrRange range;
2488 FlatView *view;
2489 FlatRange *fr;
2490
2491 addr += mr->addr;
2492 for (root = mr; root->container; ) {
2493 root = root->container;
2494 addr += root->addr;
2495 }
2496
2497 as = memory_region_to_address_space(root);
2498 if (!as) {
2499 return ret;
2500 }
2501 range = addrrange_make(int128_make64(addr), int128_make64(size));
2502
2503 view = address_space_to_flatview(as);
2504 fr = flatview_lookup(view, range);
2505 if (!fr) {
2506 return ret;
2507 }
2508
2509 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2510 --fr;
2511 }
2512
2513 ret.mr = fr->mr;
2514 ret.fv = view;
2515 range = addrrange_intersection(range, fr->addr);
2516 ret.offset_within_region = fr->offset_in_region;
2517 ret.offset_within_region += int128_get64(int128_sub(range.start,
2518 fr->addr.start));
2519 ret.size = range.size;
2520 ret.offset_within_address_space = int128_get64(range.start);
2521 ret.readonly = fr->readonly;
2522 return ret;
2523 }
2524
2525 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2526 hwaddr addr, uint64_t size)
2527 {
2528 MemoryRegionSection ret;
2529 rcu_read_lock();
2530 ret = memory_region_find_rcu(mr, addr, size);
2531 if (ret.mr) {
2532 memory_region_ref(ret.mr);
2533 }
2534 rcu_read_unlock();
2535 return ret;
2536 }
2537
2538 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2539 {
2540 MemoryRegion *mr;
2541
2542 rcu_read_lock();
2543 mr = memory_region_find_rcu(container, addr, 1).mr;
2544 rcu_read_unlock();
2545 return mr && mr != container;
2546 }
2547
2548 void memory_global_dirty_log_sync(void)
2549 {
2550 MemoryListener *listener;
2551 AddressSpace *as;
2552 FlatView *view;
2553 FlatRange *fr;
2554
2555 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2556 if (!listener->log_sync) {
2557 continue;
2558 }
2559 as = listener->address_space;
2560 view = address_space_get_flatview(as);
2561 FOR_EACH_FLAT_RANGE(fr, view) {
2562 if (fr->dirty_log_mask) {
2563 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2564
2565 listener->log_sync(listener, &mrs);
2566 }
2567 }
2568 flatview_unref(view);
2569 }
2570 }
2571
2572 static VMChangeStateEntry *vmstate_change;
2573
2574 void memory_global_dirty_log_start(void)
2575 {
2576 if (vmstate_change) {
2577 qemu_del_vm_change_state_handler(vmstate_change);
2578 vmstate_change = NULL;
2579 }
2580
2581 global_dirty_log = true;
2582
2583 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2584
2585 /* Refresh DIRTY_LOG_MIGRATION bit. */
2586 memory_region_transaction_begin();
2587 memory_region_update_pending = true;
2588 memory_region_transaction_commit();
2589 }
2590
2591 static void memory_global_dirty_log_do_stop(void)
2592 {
2593 global_dirty_log = false;
2594
2595 /* Refresh DIRTY_LOG_MIGRATION bit. */
2596 memory_region_transaction_begin();
2597 memory_region_update_pending = true;
2598 memory_region_transaction_commit();
2599
2600 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2601 }
2602
2603 static void memory_vm_change_state_handler(void *opaque, int running,
2604 RunState state)
2605 {
2606 if (running) {
2607 memory_global_dirty_log_do_stop();
2608
2609 if (vmstate_change) {
2610 qemu_del_vm_change_state_handler(vmstate_change);
2611 vmstate_change = NULL;
2612 }
2613 }
2614 }
2615
2616 void memory_global_dirty_log_stop(void)
2617 {
2618 if (!runstate_is_running()) {
2619 if (vmstate_change) {
2620 return;
2621 }
2622 vmstate_change = qemu_add_vm_change_state_handler(
2623 memory_vm_change_state_handler, NULL);
2624 return;
2625 }
2626
2627 memory_global_dirty_log_do_stop();
2628 }
2629
2630 static void listener_add_address_space(MemoryListener *listener,
2631 AddressSpace *as)
2632 {
2633 FlatView *view;
2634 FlatRange *fr;
2635
2636 if (listener->begin) {
2637 listener->begin(listener);
2638 }
2639 if (global_dirty_log) {
2640 if (listener->log_global_start) {
2641 listener->log_global_start(listener);
2642 }
2643 }
2644
2645 view = address_space_get_flatview(as);
2646 FOR_EACH_FLAT_RANGE(fr, view) {
2647 MemoryRegionSection section = section_from_flat_range(fr, view);
2648
2649 if (listener->region_add) {
2650 listener->region_add(listener, &section);
2651 }
2652 if (fr->dirty_log_mask && listener->log_start) {
2653 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2654 }
2655 }
2656 if (listener->commit) {
2657 listener->commit(listener);
2658 }
2659 flatview_unref(view);
2660 }
2661
2662 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2663 {
2664 MemoryListener *other = NULL;
2665
2666 listener->address_space = as;
2667 if (QTAILQ_EMPTY(&memory_listeners)
2668 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2669 memory_listeners)->priority) {
2670 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2671 } else {
2672 QTAILQ_FOREACH(other, &memory_listeners, link) {
2673 if (listener->priority < other->priority) {
2674 break;
2675 }
2676 }
2677 QTAILQ_INSERT_BEFORE(other, listener, link);
2678 }
2679
2680 if (QTAILQ_EMPTY(&as->listeners)
2681 || listener->priority >= QTAILQ_LAST(&as->listeners,
2682 memory_listeners)->priority) {
2683 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2684 } else {
2685 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2686 if (listener->priority < other->priority) {
2687 break;
2688 }
2689 }
2690 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2691 }
2692
2693 listener_add_address_space(listener, as);
2694 }
2695
2696 void memory_listener_unregister(MemoryListener *listener)
2697 {
2698 if (!listener->address_space) {
2699 return;
2700 }
2701
2702 QTAILQ_REMOVE(&memory_listeners, listener, link);
2703 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2704 listener->address_space = NULL;
2705 }
2706
2707 bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
2708 {
2709 void *host;
2710 unsigned size = 0;
2711 unsigned offset = 0;
2712 Object *new_interface;
2713
2714 if (!mr || !mr->ops->request_ptr) {
2715 return false;
2716 }
2717
2718 /*
2719 * Avoid an update if the request_ptr call
2720 * memory_region_invalidate_mmio_ptr which seems to be likely when we use
2721 * a cache.
2722 */
2723 memory_region_transaction_begin();
2724
2725 host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
2726
2727 if (!host || !size) {
2728 memory_region_transaction_commit();
2729 return false;
2730 }
2731
2732 new_interface = object_new("mmio_interface");
2733 qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
2734 qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
2735 qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
2736 qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
2737 qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
2738 object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
2739
2740 memory_region_transaction_commit();
2741 return true;
2742 }
2743
2744 typedef struct MMIOPtrInvalidate {
2745 MemoryRegion *mr;
2746 hwaddr offset;
2747 unsigned size;
2748 int busy;
2749 int allocated;
2750 } MMIOPtrInvalidate;
2751
2752 #define MAX_MMIO_INVALIDATE 10
2753 static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
2754
2755 static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
2756 run_on_cpu_data data)
2757 {
2758 MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
2759 MemoryRegion *mr = invalidate_data->mr;
2760 hwaddr offset = invalidate_data->offset;
2761 unsigned size = invalidate_data->size;
2762 MemoryRegionSection section = memory_region_find(mr, offset, size);
2763
2764 qemu_mutex_lock_iothread();
2765
2766 /* Reset dirty so this doesn't happen later. */
2767 cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
2768
2769 if (section.mr != mr) {
2770 /* memory_region_find add a ref on section.mr */
2771 memory_region_unref(section.mr);
2772 if (MMIO_INTERFACE(section.mr->owner)) {
2773 /* We found the interface just drop it. */
2774 object_property_set_bool(section.mr->owner, false, "realized",
2775 NULL);
2776 object_unref(section.mr->owner);
2777 object_unparent(section.mr->owner);
2778 }
2779 }
2780
2781 qemu_mutex_unlock_iothread();
2782
2783 if (invalidate_data->allocated) {
2784 g_free(invalidate_data);
2785 } else {
2786 invalidate_data->busy = 0;
2787 }
2788 }
2789
2790 void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
2791 unsigned size)
2792 {
2793 size_t i;
2794 MMIOPtrInvalidate *invalidate_data = NULL;
2795
2796 for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
2797 if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
2798 invalidate_data = &mmio_ptr_invalidate_list[i];
2799 break;
2800 }
2801 }
2802
2803 if (!invalidate_data) {
2804 invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
2805 invalidate_data->allocated = 1;
2806 }
2807
2808 invalidate_data->mr = mr;
2809 invalidate_data->offset = offset;
2810 invalidate_data->size = size;
2811
2812 async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
2813 RUN_ON_CPU_HOST_PTR(invalidate_data));
2814 }
2815
2816 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2817 {
2818 memory_region_ref(root);
2819 as->root = root;
2820 as->current_map = NULL;
2821 as->ioeventfd_nb = 0;
2822 as->ioeventfds = NULL;
2823 QTAILQ_INIT(&as->listeners);
2824 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2825 as->name = g_strdup(name ? name : "anonymous");
2826 address_space_update_topology(as);
2827 address_space_update_ioeventfds(as);
2828 }
2829
2830 static void do_address_space_destroy(AddressSpace *as)
2831 {
2832 assert(QTAILQ_EMPTY(&as->listeners));
2833
2834 flatview_unref(as->current_map);
2835 g_free(as->name);
2836 g_free(as->ioeventfds);
2837 memory_region_unref(as->root);
2838 }
2839
2840 void address_space_destroy(AddressSpace *as)
2841 {
2842 MemoryRegion *root = as->root;
2843
2844 /* Flush out anything from MemoryListeners listening in on this */
2845 memory_region_transaction_begin();
2846 as->root = NULL;
2847 memory_region_transaction_commit();
2848 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2849
2850 /* At this point, as->dispatch and as->current_map are dummy
2851 * entries that the guest should never use. Wait for the old
2852 * values to expire before freeing the data.
2853 */
2854 as->root = root;
2855 call_rcu(as, do_address_space_destroy, rcu);
2856 }
2857
2858 static const char *memory_region_type(MemoryRegion *mr)
2859 {
2860 if (memory_region_is_ram_device(mr)) {
2861 return "ramd";
2862 } else if (memory_region_is_romd(mr)) {
2863 return "romd";
2864 } else if (memory_region_is_rom(mr)) {
2865 return "rom";
2866 } else if (memory_region_is_ram(mr)) {
2867 return "ram";
2868 } else {
2869 return "i/o";
2870 }
2871 }
2872
2873 typedef struct MemoryRegionList MemoryRegionList;
2874
2875 struct MemoryRegionList {
2876 const MemoryRegion *mr;
2877 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2878 };
2879
2880 typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
2881
2882 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2883 int128_sub((size), int128_one())) : 0)
2884 #define MTREE_INDENT " "
2885
2886 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2887 const MemoryRegion *mr, unsigned int level,
2888 hwaddr base,
2889 MemoryRegionListHead *alias_print_queue)
2890 {
2891 MemoryRegionList *new_ml, *ml, *next_ml;
2892 MemoryRegionListHead submr_print_queue;
2893 const MemoryRegion *submr;
2894 unsigned int i;
2895 hwaddr cur_start, cur_end;
2896
2897 if (!mr) {
2898 return;
2899 }
2900
2901 for (i = 0; i < level; i++) {
2902 mon_printf(f, MTREE_INDENT);
2903 }
2904
2905 cur_start = base + mr->addr;
2906 cur_end = cur_start + MR_SIZE(mr->size);
2907
2908 /*
2909 * Try to detect overflow of memory region. This should never
2910 * happen normally. When it happens, we dump something to warn the
2911 * user who is observing this.
2912 */
2913 if (cur_start < base || cur_end < cur_start) {
2914 mon_printf(f, "[DETECTED OVERFLOW!] ");
2915 }
2916
2917 if (mr->alias) {
2918 MemoryRegionList *ml;
2919 bool found = false;
2920
2921 /* check if the alias is already in the queue */
2922 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2923 if (ml->mr == mr->alias) {
2924 found = true;
2925 }
2926 }
2927
2928 if (!found) {
2929 ml = g_new(MemoryRegionList, 1);
2930 ml->mr = mr->alias;
2931 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2932 }
2933 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2934 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2935 "-" TARGET_FMT_plx "%s\n",
2936 cur_start, cur_end,
2937 mr->priority,
2938 memory_region_type((MemoryRegion *)mr),
2939 memory_region_name(mr),
2940 memory_region_name(mr->alias),
2941 mr->alias_offset,
2942 mr->alias_offset + MR_SIZE(mr->size),
2943 mr->enabled ? "" : " [disabled]");
2944 } else {
2945 mon_printf(f,
2946 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
2947 cur_start, cur_end,
2948 mr->priority,
2949 memory_region_type((MemoryRegion *)mr),
2950 memory_region_name(mr),
2951 mr->enabled ? "" : " [disabled]");
2952 }
2953
2954 QTAILQ_INIT(&submr_print_queue);
2955
2956 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2957 new_ml = g_new(MemoryRegionList, 1);
2958 new_ml->mr = submr;
2959 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2960 if (new_ml->mr->addr < ml->mr->addr ||
2961 (new_ml->mr->addr == ml->mr->addr &&
2962 new_ml->mr->priority > ml->mr->priority)) {
2963 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2964 new_ml = NULL;
2965 break;
2966 }
2967 }
2968 if (new_ml) {
2969 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2970 }
2971 }
2972
2973 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2974 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2975 alias_print_queue);
2976 }
2977
2978 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2979 g_free(ml);
2980 }
2981 }
2982
2983 struct FlatViewInfo {
2984 fprintf_function mon_printf;
2985 void *f;
2986 int counter;
2987 bool dispatch_tree;
2988 };
2989
2990 static void mtree_print_flatview(gpointer key, gpointer value,
2991 gpointer user_data)
2992 {
2993 FlatView *view = key;
2994 GArray *fv_address_spaces = value;
2995 struct FlatViewInfo *fvi = user_data;
2996 fprintf_function p = fvi->mon_printf;
2997 void *f = fvi->f;
2998 FlatRange *range = &view->ranges[0];
2999 MemoryRegion *mr;
3000 int n = view->nr;
3001 int i;
3002 AddressSpace *as;
3003
3004 p(f, "FlatView #%d\n", fvi->counter);
3005 ++fvi->counter;
3006
3007 for (i = 0; i < fv_address_spaces->len; ++i) {
3008 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3009 p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
3010 if (as->root->alias) {
3011 p(f, ", alias %s", memory_region_name(as->root->alias));
3012 }
3013 p(f, "\n");
3014 }
3015
3016 p(f, " Root memory region: %s\n",
3017 view->root ? memory_region_name(view->root) : "(none)");
3018
3019 if (n <= 0) {
3020 p(f, MTREE_INDENT "No rendered FlatView\n\n");
3021 return;
3022 }
3023
3024 while (n--) {
3025 mr = range->mr;
3026 if (range->offset_in_region) {
3027 p(f, MTREE_INDENT TARGET_FMT_plx "-"
3028 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
3029 int128_get64(range->addr.start),
3030 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
3031 mr->priority,
3032 range->readonly ? "rom" : memory_region_type(mr),
3033 memory_region_name(mr),
3034 range->offset_in_region);
3035 } else {
3036 p(f, MTREE_INDENT TARGET_FMT_plx "-"
3037 TARGET_FMT_plx " (prio %d, %s): %s\n",
3038 int128_get64(range->addr.start),
3039 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
3040 mr->priority,
3041 range->readonly ? "rom" : memory_region_type(mr),
3042 memory_region_name(mr));
3043 }
3044 range++;
3045 }
3046
3047 #if !defined(CONFIG_USER_ONLY)
3048 if (fvi->dispatch_tree && view->root) {
3049 mtree_print_dispatch(p, f, view->dispatch, view->root);
3050 }
3051 #endif
3052
3053 p(f, "\n");
3054 }
3055
3056 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3057 gpointer user_data)
3058 {
3059 FlatView *view = key;
3060 GArray *fv_address_spaces = value;
3061
3062 g_array_unref(fv_address_spaces);
3063 flatview_unref(view);
3064
3065 return true;
3066 }
3067
3068 void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
3069 bool dispatch_tree)
3070 {
3071 MemoryRegionListHead ml_head;
3072 MemoryRegionList *ml, *ml2;
3073 AddressSpace *as;
3074
3075 if (flatview) {
3076 FlatView *view;
3077 struct FlatViewInfo fvi = {
3078 .mon_printf = mon_printf,
3079 .f = f,
3080 .counter = 0,
3081 .dispatch_tree = dispatch_tree
3082 };
3083 GArray *fv_address_spaces;
3084 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3085
3086 /* Gather all FVs in one table */
3087 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3088 view = address_space_get_flatview(as);
3089
3090 fv_address_spaces = g_hash_table_lookup(views, view);
3091 if (!fv_address_spaces) {
3092 fv_address_spaces = g_array_new(false, false, sizeof(as));
3093 g_hash_table_insert(views, view, fv_address_spaces);
3094 }
3095
3096 g_array_append_val(fv_address_spaces, as);
3097 }
3098
3099 /* Print */
3100 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3101
3102 /* Free */
3103 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3104 g_hash_table_unref(views);
3105
3106 return;
3107 }
3108
3109 QTAILQ_INIT(&ml_head);
3110
3111 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3112 mon_printf(f, "address-space: %s\n", as->name);
3113 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
3114 mon_printf(f, "\n");
3115 }
3116
3117 /* print aliased regions */
3118 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3119 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
3120 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
3121 mon_printf(f, "\n");
3122 }
3123
3124 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3125 g_free(ml);
3126 }
3127 }
3128
3129 void memory_region_init_ram(MemoryRegion *mr,
3130 struct Object *owner,
3131 const char *name,
3132 uint64_t size,
3133 Error **errp)
3134 {
3135 DeviceState *owner_dev;
3136 Error *err = NULL;
3137
3138 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3139 if (err) {
3140 error_propagate(errp, err);
3141 return;
3142 }
3143 /* This will assert if owner is neither NULL nor a DeviceState.
3144 * We only want the owner here for the purposes of defining a
3145 * unique name for migration. TODO: Ideally we should implement
3146 * a naming scheme for Objects which are not DeviceStates, in
3147 * which case we can relax this restriction.
3148 */
3149 owner_dev = DEVICE(owner);
3150 vmstate_register_ram(mr, owner_dev);
3151 }
3152
3153 void memory_region_init_rom(MemoryRegion *mr,
3154 struct Object *owner,
3155 const char *name,
3156 uint64_t size,
3157 Error **errp)
3158 {
3159 DeviceState *owner_dev;
3160 Error *err = NULL;
3161
3162 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3163 if (err) {
3164 error_propagate(errp, err);
3165 return;
3166 }
3167 /* This will assert if owner is neither NULL nor a DeviceState.
3168 * We only want the owner here for the purposes of defining a
3169 * unique name for migration. TODO: Ideally we should implement
3170 * a naming scheme for Objects which are not DeviceStates, in
3171 * which case we can relax this restriction.
3172 */
3173 owner_dev = DEVICE(owner);
3174 vmstate_register_ram(mr, owner_dev);
3175 }
3176
3177 void memory_region_init_rom_device(MemoryRegion *mr,
3178 struct Object *owner,
3179 const MemoryRegionOps *ops,
3180 void *opaque,
3181 const char *name,
3182 uint64_t size,
3183 Error **errp)
3184 {
3185 DeviceState *owner_dev;
3186 Error *err = NULL;
3187
3188 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3189 name, size, &err);
3190 if (err) {
3191 error_propagate(errp, err);
3192 return;
3193 }
3194 /* This will assert if owner is neither NULL nor a DeviceState.
3195 * We only want the owner here for the purposes of defining a
3196 * unique name for migration. TODO: Ideally we should implement
3197 * a naming scheme for Objects which are not DeviceStates, in
3198 * which case we can relax this restriction.
3199 */
3200 owner_dev = DEVICE(owner);
3201 vmstate_register_ram(mr, owner_dev);
3202 }
3203
3204 static const TypeInfo memory_region_info = {
3205 .parent = TYPE_OBJECT,
3206 .name = TYPE_MEMORY_REGION,
3207 .instance_size = sizeof(MemoryRegion),
3208 .instance_init = memory_region_initfn,
3209 .instance_finalize = memory_region_finalize,
3210 };
3211
3212 static const TypeInfo iommu_memory_region_info = {
3213 .parent = TYPE_MEMORY_REGION,
3214 .name = TYPE_IOMMU_MEMORY_REGION,
3215 .class_size = sizeof(IOMMUMemoryRegionClass),
3216 .instance_size = sizeof(IOMMUMemoryRegion),
3217 .instance_init = iommu_memory_region_initfn,
3218 .abstract = true,
3219 };
3220
3221 static void memory_register_types(void)
3222 {
3223 type_register_static(&memory_region_info);
3224 type_register_static(&iommu_memory_region_info);
3225 }
3226
3227 type_init(memory_register_types)
AR7 emulation for QEMU