4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
10 #include "qemu/osdep.h"
11 #include "qapi/error.h"
13 #include "hw/arm/arm.h"
14 #include "hw/arm/linux-boot-if.h"
15 #include "sysemu/kvm.h"
16 #include "sysemu/sysemu.h"
17 #include "hw/boards.h"
18 #include "hw/loader.h"
20 #include "sysemu/device_tree.h"
21 #include "qemu/config-file.h"
22 #include "exec/address-spaces.h"
24 /* Kernel boot protocol is specified in the kernel docs
25 * Documentation/arm/Booting and Documentation/arm64/booting.txt
26 * They have different preferred image load offsets from system RAM base.
28 #define KERNEL_ARGS_ADDR 0x100
29 #define KERNEL_LOAD_ADDR 0x00010000
30 #define KERNEL64_LOAD_ADDR 0x00080000
33 FIXUP_NONE
= 0, /* do nothing */
34 FIXUP_TERMINATOR
, /* end of insns */
35 FIXUP_BOARDID
, /* overwrite with board ID number */
36 FIXUP_BOARD_SETUP
, /* overwrite with board specific setup code address */
37 FIXUP_ARGPTR
, /* overwrite with pointer to kernel args */
38 FIXUP_ENTRYPOINT
, /* overwrite with kernel entry point */
39 FIXUP_GIC_CPU_IF
, /* overwrite with GIC CPU interface address */
40 FIXUP_BOOTREG
, /* overwrite with boot register address */
41 FIXUP_DSB
, /* overwrite with correct DSB insn for cpu */
45 typedef struct ARMInsnFixup
{
50 static const ARMInsnFixup bootloader_aarch64
[] = {
51 { 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
52 { 0xaa1f03e1 }, /* mov x1, xzr */
53 { 0xaa1f03e2 }, /* mov x2, xzr */
54 { 0xaa1f03e3 }, /* mov x3, xzr */
55 { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
56 { 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
57 { 0, FIXUP_ARGPTR
}, /* arg: .word @DTB Lower 32-bits */
58 { 0 }, /* .word @DTB Higher 32-bits */
59 { 0, FIXUP_ENTRYPOINT
}, /* entry: .word @Kernel Entry Lower 32-bits */
60 { 0 }, /* .word @Kernel Entry Higher 32-bits */
61 { 0, FIXUP_TERMINATOR
}
64 /* A very small bootloader: call the board-setup code (if needed),
65 * set r0-r2, then jump to the kernel.
66 * If we're not calling boot setup code then we don't copy across
67 * the first BOOTLOADER_NO_BOARD_SETUP_OFFSET insns in this array.
70 static const ARMInsnFixup bootloader
[] = {
71 { 0xe28fe004 }, /* add lr, pc, #4 */
72 { 0xe51ff004 }, /* ldr pc, [pc, #-4] */
73 { 0, FIXUP_BOARD_SETUP
},
74 #define BOOTLOADER_NO_BOARD_SETUP_OFFSET 3
75 { 0xe3a00000 }, /* mov r0, #0 */
76 { 0xe59f1004 }, /* ldr r1, [pc, #4] */
77 { 0xe59f2004 }, /* ldr r2, [pc, #4] */
78 { 0xe59ff004 }, /* ldr pc, [pc, #4] */
81 { 0, FIXUP_ENTRYPOINT
},
82 { 0, FIXUP_TERMINATOR
}
85 /* Handling for secondary CPU boot in a multicore system.
86 * Unlike the uniprocessor/primary CPU boot, this is platform
87 * dependent. The default code here is based on the secondary
88 * CPU boot protocol used on realview/vexpress boards, with
89 * some parameterisation to increase its flexibility.
90 * QEMU platform models for which this code is not appropriate
91 * should override write_secondary_boot and secondary_cpu_reset_hook
94 * This code enables the interrupt controllers for the secondary
95 * CPUs and then puts all the secondary CPUs into a loop waiting
96 * for an interprocessor interrupt and polling a configurable
97 * location for the kernel secondary CPU entry point.
99 #define DSB_INSN 0xf57ff04f
100 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
102 static const ARMInsnFixup smpboot
[] = {
103 { 0xe59f2028 }, /* ldr r2, gic_cpu_if */
104 { 0xe59f0028 }, /* ldr r0, bootreg_addr */
105 { 0xe3a01001 }, /* mov r1, #1 */
106 { 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
107 { 0xe3a010ff }, /* mov r1, #0xff */
108 { 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
109 { 0, FIXUP_DSB
}, /* dsb */
110 { 0xe320f003 }, /* wfi */
111 { 0xe5901000 }, /* ldr r1, [r0] */
112 { 0xe1110001 }, /* tst r1, r1 */
113 { 0x0afffffb }, /* beq <wfi> */
114 { 0xe12fff11 }, /* bx r1 */
115 { 0, FIXUP_GIC_CPU_IF
}, /* gic_cpu_if: .word 0x.... */
116 { 0, FIXUP_BOOTREG
}, /* bootreg_addr: .word 0x.... */
117 { 0, FIXUP_TERMINATOR
}
120 static void write_bootloader(const char *name
, hwaddr addr
,
121 const ARMInsnFixup
*insns
, uint32_t *fixupcontext
)
123 /* Fix up the specified bootloader fragment and write it into
124 * guest memory using rom_add_blob_fixed(). fixupcontext is
125 * an array giving the values to write in for the fixup types
126 * which write a value into the code array.
132 while (insns
[len
].fixup
!= FIXUP_TERMINATOR
) {
136 code
= g_new0(uint32_t, len
);
138 for (i
= 0; i
< len
; i
++) {
139 uint32_t insn
= insns
[i
].insn
;
140 FixupType fixup
= insns
[i
].fixup
;
146 case FIXUP_BOARD_SETUP
:
148 case FIXUP_ENTRYPOINT
:
149 case FIXUP_GIC_CPU_IF
:
152 insn
= fixupcontext
[fixup
];
157 code
[i
] = tswap32(insn
);
160 rom_add_blob_fixed(name
, code
, len
* sizeof(uint32_t), addr
);
165 static void default_write_secondary(ARMCPU
*cpu
,
166 const struct arm_boot_info
*info
)
168 uint32_t fixupcontext
[FIXUP_MAX
];
170 fixupcontext
[FIXUP_GIC_CPU_IF
] = info
->gic_cpu_if_addr
;
171 fixupcontext
[FIXUP_BOOTREG
] = info
->smp_bootreg_addr
;
172 if (arm_feature(&cpu
->env
, ARM_FEATURE_V7
)) {
173 fixupcontext
[FIXUP_DSB
] = DSB_INSN
;
175 fixupcontext
[FIXUP_DSB
] = CP15_DSB_INSN
;
178 write_bootloader("smpboot", info
->smp_loader_start
,
179 smpboot
, fixupcontext
);
182 void arm_write_secure_board_setup_dummy_smc(ARMCPU
*cpu
,
183 const struct arm_boot_info
*info
,
187 uint32_t mvbar_blob
[] = {
188 /* mvbar_addr: secure monitor vectors
189 * Default unimplemented and unused vectors to spin. Makes it
190 * easier to debug (as opposed to the CPU running away).
192 0xeafffffe, /* (spin) */
193 0xeafffffe, /* (spin) */
194 0xe1b0f00e, /* movs pc, lr ;SMC exception return */
195 0xeafffffe, /* (spin) */
196 0xeafffffe, /* (spin) */
197 0xeafffffe, /* (spin) */
198 0xeafffffe, /* (spin) */
199 0xeafffffe, /* (spin) */
201 uint32_t board_setup_blob
[] = {
202 /* board setup addr */
203 0xe3a00e00 + (mvbar_addr
>> 4), /* mov r0, #mvbar_addr */
204 0xee0c0f30, /* mcr p15, 0, r0, c12, c0, 1 ;set MVBAR */
205 0xee110f11, /* mrc p15, 0, r0, c1 , c1, 0 ;read SCR */
206 0xe3800031, /* orr r0, #0x31 ;enable AW, FW, NS */
207 0xee010f11, /* mcr p15, 0, r0, c1, c1, 0 ;write SCR */
208 0xe1a0100e, /* mov r1, lr ;save LR across SMC */
209 0xe1600070, /* smc #0 ;call monitor to flush SCR */
210 0xe1a0f001, /* mov pc, r1 ;return */
213 /* check that mvbar_addr is correctly aligned and relocatable (using MOV) */
214 assert((mvbar_addr
& 0x1f) == 0 && (mvbar_addr
>> 4) < 0x100);
216 /* check that these blobs don't overlap */
217 assert((mvbar_addr
+ sizeof(mvbar_blob
) <= info
->board_setup_addr
)
218 || (info
->board_setup_addr
+ sizeof(board_setup_blob
) <= mvbar_addr
));
220 for (n
= 0; n
< ARRAY_SIZE(mvbar_blob
); n
++) {
221 mvbar_blob
[n
] = tswap32(mvbar_blob
[n
]);
223 rom_add_blob_fixed("board-setup-mvbar", mvbar_blob
, sizeof(mvbar_blob
),
226 for (n
= 0; n
< ARRAY_SIZE(board_setup_blob
); n
++) {
227 board_setup_blob
[n
] = tswap32(board_setup_blob
[n
]);
229 rom_add_blob_fixed("board-setup", board_setup_blob
,
230 sizeof(board_setup_blob
), info
->board_setup_addr
);
233 static void default_reset_secondary(ARMCPU
*cpu
,
234 const struct arm_boot_info
*info
)
236 CPUState
*cs
= CPU(cpu
);
238 address_space_stl_notdirty(&address_space_memory
, info
->smp_bootreg_addr
,
239 0, MEMTXATTRS_UNSPECIFIED
, NULL
);
240 cpu_set_pc(cs
, info
->smp_loader_start
);
243 static inline bool have_dtb(const struct arm_boot_info
*info
)
245 return info
->dtb_filename
|| info
->get_dtb
;
248 #define WRITE_WORD(p, value) do { \
249 address_space_stl_notdirty(&address_space_memory, p, value, \
250 MEMTXATTRS_UNSPECIFIED, NULL); \
254 static void set_kernel_args(const struct arm_boot_info
*info
)
256 int initrd_size
= info
->initrd_size
;
257 hwaddr base
= info
->loader_start
;
260 p
= base
+ KERNEL_ARGS_ADDR
;
263 WRITE_WORD(p
, 0x54410001);
265 WRITE_WORD(p
, 0x1000);
268 /* TODO: handle multiple chips on one ATAG list */
270 WRITE_WORD(p
, 0x54410002);
271 WRITE_WORD(p
, info
->ram_size
);
272 WRITE_WORD(p
, info
->loader_start
);
276 WRITE_WORD(p
, 0x54420005);
277 WRITE_WORD(p
, info
->initrd_start
);
278 WRITE_WORD(p
, initrd_size
);
280 if (info
->atag_revision
) {
283 WRITE_WORD(p
, 0x54410007);
284 WRITE_WORD(p
, info
->atag_revision
);
286 if (info
->kernel_cmdline
&& *info
->kernel_cmdline
) {
290 cmdline_size
= strlen(info
->kernel_cmdline
);
291 cpu_physical_memory_write(p
+ 8, info
->kernel_cmdline
,
293 cmdline_size
= (cmdline_size
>> 2) + 1;
294 WRITE_WORD(p
, cmdline_size
+ 2);
295 WRITE_WORD(p
, 0x54410009);
296 p
+= cmdline_size
* 4;
298 if (info
->atag_board
) {
301 uint8_t atag_board_buf
[0x1000];
303 atag_board_len
= (info
->atag_board(info
, atag_board_buf
) + 3) & ~3;
304 WRITE_WORD(p
, (atag_board_len
+ 8) >> 2);
305 WRITE_WORD(p
, 0x414f4d50);
306 cpu_physical_memory_write(p
, atag_board_buf
, atag_board_len
);
314 static void set_kernel_args_old(const struct arm_boot_info
*info
)
318 int initrd_size
= info
->initrd_size
;
319 hwaddr base
= info
->loader_start
;
321 /* see linux/include/asm-arm/setup.h */
322 p
= base
+ KERNEL_ARGS_ADDR
;
326 WRITE_WORD(p
, info
->ram_size
/ 4096);
329 #define FLAG_READONLY 1
330 #define FLAG_RDLOAD 4
331 #define FLAG_RDPROMPT 8
333 WRITE_WORD(p
, FLAG_READONLY
| FLAG_RDLOAD
| FLAG_RDPROMPT
);
335 WRITE_WORD(p
, (31 << 8) | 0); /* /dev/mtdblock0 */
344 /* memc_control_reg */
346 /* unsigned char sounddefault */
347 /* unsigned char adfsdrives */
348 /* unsigned char bytes_per_char_h */
349 /* unsigned char bytes_per_char_v */
351 /* pages_in_bank[4] */
360 WRITE_WORD(p
, info
->initrd_start
);
365 WRITE_WORD(p
, initrd_size
);
370 /* system_serial_low */
372 /* system_serial_high */
376 /* zero unused fields */
377 while (p
< base
+ KERNEL_ARGS_ADDR
+ 256 + 1024) {
380 s
= info
->kernel_cmdline
;
382 cpu_physical_memory_write(p
, s
, strlen(s
) + 1);
389 * load_dtb() - load a device tree binary image into memory
390 * @addr: the address to load the image at
391 * @binfo: struct describing the boot environment
392 * @addr_limit: upper limit of the available memory area at @addr
394 * Load a device tree supplied by the machine or by the user with the
395 * '-dtb' command line option, and put it at offset @addr in target
398 * If @addr_limit contains a meaningful value (i.e., it is strictly greater
399 * than @addr), the device tree is only loaded if its size does not exceed
402 * Returns: the size of the device tree image on success,
403 * 0 if the image size exceeds the limit,
406 * Note: Must not be called unless have_dtb(binfo) is true.
408 static int load_dtb(hwaddr addr
, const struct arm_boot_info
*binfo
,
413 uint32_t acells
, scells
;
415 if (binfo
->dtb_filename
) {
417 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, binfo
->dtb_filename
);
419 fprintf(stderr
, "Couldn't open dtb file %s\n", binfo
->dtb_filename
);
423 fdt
= load_device_tree(filename
, &size
);
425 fprintf(stderr
, "Couldn't open dtb file %s\n", filename
);
431 fdt
= binfo
->get_dtb(binfo
, &size
);
433 fprintf(stderr
, "Board was unable to create a dtb blob\n");
438 if (addr_limit
> addr
&& size
> (addr_limit
- addr
)) {
439 /* Installing the device tree blob at addr would exceed addr_limit.
440 * Whether this constitutes failure is up to the caller to decide,
441 * so just return 0 as size, i.e., no error.
447 acells
= qemu_fdt_getprop_cell(fdt
, "/", "#address-cells",
449 scells
= qemu_fdt_getprop_cell(fdt
, "/", "#size-cells",
451 if (acells
== 0 || scells
== 0) {
452 fprintf(stderr
, "dtb file invalid (#address-cells or #size-cells 0)\n");
456 if (scells
< 2 && binfo
->ram_size
>= (1ULL << 32)) {
457 /* This is user error so deserves a friendlier error message
458 * than the failure of setprop_sized_cells would provide
460 fprintf(stderr
, "qemu: dtb file not compatible with "
465 rc
= qemu_fdt_setprop_sized_cells(fdt
, "/memory", "reg",
466 acells
, binfo
->loader_start
,
467 scells
, binfo
->ram_size
);
469 fprintf(stderr
, "couldn't set /memory/reg\n");
473 if (binfo
->kernel_cmdline
&& *binfo
->kernel_cmdline
) {
474 rc
= qemu_fdt_setprop_string(fdt
, "/chosen", "bootargs",
475 binfo
->kernel_cmdline
);
477 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
482 if (binfo
->initrd_size
) {
483 rc
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
484 binfo
->initrd_start
);
486 fprintf(stderr
, "couldn't set /chosen/linux,initrd-start\n");
490 rc
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
491 binfo
->initrd_start
+ binfo
->initrd_size
);
493 fprintf(stderr
, "couldn't set /chosen/linux,initrd-end\n");
498 if (binfo
->modify_dtb
) {
499 binfo
->modify_dtb(binfo
, fdt
);
502 qemu_fdt_dumpdtb(fdt
, size
);
504 /* Put the DTB into the memory map as a ROM image: this will ensure
505 * the DTB is copied again upon reset, even if addr points into RAM.
507 rom_add_blob_fixed("dtb", fdt
, size
, addr
);
518 static void do_cpu_reset(void *opaque
)
520 ARMCPU
*cpu
= opaque
;
521 CPUState
*cs
= CPU(cpu
);
522 CPUARMState
*env
= &cpu
->env
;
523 const struct arm_boot_info
*info
= env
->boot_info
;
527 if (!info
->is_linux
) {
529 /* Jump to the entry point. */
530 uint64_t entry
= info
->entry
;
532 switch (info
->endianness
) {
533 case ARM_ENDIANNESS_LE
:
534 env
->cp15
.sctlr_el
[1] &= ~SCTLR_E0E
;
535 for (i
= 1; i
< 4; ++i
) {
536 env
->cp15
.sctlr_el
[i
] &= ~SCTLR_EE
;
538 env
->uncached_cpsr
&= ~CPSR_E
;
540 case ARM_ENDIANNESS_BE8
:
541 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
542 for (i
= 1; i
< 4; ++i
) {
543 env
->cp15
.sctlr_el
[i
] |= SCTLR_EE
;
545 env
->uncached_cpsr
|= CPSR_E
;
547 case ARM_ENDIANNESS_BE32
:
548 env
->cp15
.sctlr_el
[1] |= SCTLR_B
;
550 case ARM_ENDIANNESS_UNKNOWN
:
551 break; /* Board's decision */
553 g_assert_not_reached();
557 env
->thumb
= info
->entry
& 1;
560 cpu_set_pc(cs
, entry
);
562 /* If we are booting Linux then we need to check whether we are
563 * booting into secure or non-secure state and adjust the state
564 * accordingly. Out of reset, ARM is defined to be in secure state
565 * (SCR.NS = 0), we change that here if non-secure boot has been
568 if (arm_feature(env
, ARM_FEATURE_EL3
)) {
569 /* AArch64 is defined to come out of reset into EL3 if enabled.
570 * If we are booting Linux then we need to adjust our EL as
571 * Linux expects us to be in EL2 or EL1. AArch32 resets into
572 * SVC, which Linux expects, so no privilege/exception level to
576 env
->cp15
.scr_el3
|= SCR_RW
;
577 if (arm_feature(env
, ARM_FEATURE_EL2
)) {
578 env
->cp15
.hcr_el2
|= HCR_RW
;
579 env
->pstate
= PSTATE_MODE_EL2h
;
581 env
->pstate
= PSTATE_MODE_EL1h
;
585 /* Set to non-secure if not a secure boot */
586 if (!info
->secure_boot
&&
587 (cs
!= first_cpu
|| !info
->secure_board_setup
)) {
588 /* Linux expects non-secure state */
589 env
->cp15
.scr_el3
|= SCR_NS
;
593 if (cs
== first_cpu
) {
594 cpu_set_pc(cs
, info
->loader_start
);
596 if (!have_dtb(info
)) {
598 set_kernel_args_old(info
);
600 set_kernel_args(info
);
604 info
->secondary_cpu_reset_hook(cpu
, info
);
611 * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified
613 * @fw_cfg: The firmware config instance to store the data in.
614 * @size_key: The firmware config key to store the size of the loaded
615 * data under, with fw_cfg_add_i32().
616 * @data_key: The firmware config key to store the loaded data under,
617 * with fw_cfg_add_bytes().
618 * @image_name: The name of the image file to load. If it is NULL, the
619 * function returns without doing anything.
620 * @try_decompress: Whether the image should be decompressed (gunzipped) before
621 * adding it to fw_cfg. If decompression fails, the image is
624 * In case of failure, the function prints an error message to stderr and the
625 * process exits with status 1.
627 static void load_image_to_fw_cfg(FWCfgState
*fw_cfg
, uint16_t size_key
,
628 uint16_t data_key
, const char *image_name
,
634 if (image_name
== NULL
) {
638 if (try_decompress
) {
639 size
= load_image_gzipped_buffer(image_name
,
640 LOAD_IMAGE_MAX_GUNZIP_BYTES
, &data
);
643 if (size
== (size_t)-1) {
647 if (!g_file_get_contents(image_name
, &contents
, &length
, NULL
)) {
648 fprintf(stderr
, "failed to load \"%s\"\n", image_name
);
652 data
= (uint8_t *)contents
;
655 fw_cfg_add_i32(fw_cfg
, size_key
, size
);
656 fw_cfg_add_bytes(fw_cfg
, data_key
, data
, size
);
659 static int do_arm_linux_init(Object
*obj
, void *opaque
)
661 if (object_dynamic_cast(obj
, TYPE_ARM_LINUX_BOOT_IF
)) {
662 ARMLinuxBootIf
*albif
= ARM_LINUX_BOOT_IF(obj
);
663 ARMLinuxBootIfClass
*albifc
= ARM_LINUX_BOOT_IF_GET_CLASS(obj
);
664 struct arm_boot_info
*info
= opaque
;
666 if (albifc
->arm_linux_init
) {
667 albifc
->arm_linux_init(albif
, info
->secure_boot
);
673 static uint64_t arm_load_elf(struct arm_boot_info
*info
, uint64_t *pentry
,
674 uint64_t *lowaddr
, uint64_t *highaddr
,
688 load_elf_hdr(info
->kernel_filename
, &elf_header
, &elf_is64
, &err
);
694 big_endian
= elf_header
.h64
.e_ident
[EI_DATA
] == ELFDATA2MSB
;
695 info
->endianness
= big_endian
? ARM_ENDIANNESS_BE8
698 big_endian
= elf_header
.h32
.e_ident
[EI_DATA
] == ELFDATA2MSB
;
700 if (bswap32(elf_header
.h32
.e_flags
) & EF_ARM_BE8
) {
701 info
->endianness
= ARM_ENDIANNESS_BE8
;
703 info
->endianness
= ARM_ENDIANNESS_BE32
;
704 /* In BE32, the CPU has a different view of the per-byte
705 * address map than the rest of the system. BE32 ELF files
706 * are organised such that they can be programmed through
707 * the CPU's per-word byte-reversed view of the world. QEMU
708 * however loads ELF files independently of the CPU. So
709 * tell the ELF loader to byte reverse the data for us.
714 info
->endianness
= ARM_ENDIANNESS_LE
;
718 ret
= load_elf(info
->kernel_filename
, NULL
, NULL
,
719 pentry
, lowaddr
, highaddr
, big_endian
, elf_machine
,
722 /* The header loaded but the image didn't */
729 static void arm_load_kernel_notify(Notifier
*notifier
, void *data
)
735 uint64_t elf_entry
, elf_low_addr
, elf_high_addr
;
737 hwaddr entry
, kernel_load_offset
;
738 static const ARMInsnFixup
*primary_loader
;
739 ArmLoadKernelNotifier
*n
= DO_UPCAST(ArmLoadKernelNotifier
,
741 ARMCPU
*cpu
= n
->cpu
;
742 CPUARMState
*env
= &cpu
->env
;
743 struct arm_boot_info
*info
=
744 container_of(n
, struct arm_boot_info
, load_kernel_notifier
);
746 /* The board code is not supposed to set secure_board_setup unless
747 * running its code in secure mode is actually possible, and KVM
748 * doesn't support secure.
750 assert(!(info
->secure_board_setup
&& kvm_enabled()));
752 /* Load the kernel. */
753 if (!info
->kernel_filename
|| info
->firmware_loaded
) {
755 if (have_dtb(info
)) {
756 /* If we have a device tree blob, but no kernel to supply it to (or
757 * the kernel is supposed to be loaded by the bootloader), copy the
758 * DTB to the base of RAM for the bootloader to pick up.
760 if (load_dtb(info
->loader_start
, info
, 0) < 0) {
765 if (info
->kernel_filename
) {
767 bool try_decompressing_kernel
;
769 fw_cfg
= fw_cfg_find();
770 try_decompressing_kernel
= arm_feature(&cpu
->env
,
771 ARM_FEATURE_AARCH64
);
773 /* Expose the kernel, the command line, and the initrd in fw_cfg.
774 * We don't process them here at all, it's all left to the
777 load_image_to_fw_cfg(fw_cfg
,
778 FW_CFG_KERNEL_SIZE
, FW_CFG_KERNEL_DATA
,
779 info
->kernel_filename
,
780 try_decompressing_kernel
);
781 load_image_to_fw_cfg(fw_cfg
,
782 FW_CFG_INITRD_SIZE
, FW_CFG_INITRD_DATA
,
783 info
->initrd_filename
, false);
785 if (info
->kernel_cmdline
) {
786 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
787 strlen(info
->kernel_cmdline
) + 1);
788 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
,
789 info
->kernel_cmdline
);
793 /* We will start from address 0 (typically a boot ROM image) in the
794 * same way as hardware.
799 if (arm_feature(env
, ARM_FEATURE_AARCH64
)) {
800 primary_loader
= bootloader_aarch64
;
801 kernel_load_offset
= KERNEL64_LOAD_ADDR
;
802 elf_machine
= EM_AARCH64
;
804 primary_loader
= bootloader
;
805 if (!info
->write_board_setup
) {
806 primary_loader
+= BOOTLOADER_NO_BOARD_SETUP_OFFSET
;
808 kernel_load_offset
= KERNEL_LOAD_ADDR
;
809 elf_machine
= EM_ARM
;
812 info
->dtb_filename
= qemu_opt_get(qemu_get_machine_opts(), "dtb");
814 if (!info
->secondary_cpu_reset_hook
) {
815 info
->secondary_cpu_reset_hook
= default_reset_secondary
;
817 if (!info
->write_secondary_boot
) {
818 info
->write_secondary_boot
= default_write_secondary
;
821 if (info
->nb_cpus
== 0)
824 /* We want to put the initrd far enough into RAM that when the
825 * kernel is uncompressed it will not clobber the initrd. However
826 * on boards without much RAM we must ensure that we still leave
827 * enough room for a decent sized initrd, and on boards with large
828 * amounts of RAM we must avoid the initrd being so far up in RAM
829 * that it is outside lowmem and inaccessible to the kernel.
830 * So for boards with less than 256MB of RAM we put the initrd
831 * halfway into RAM, and for boards with 256MB of RAM or more we put
832 * the initrd at 128MB.
834 info
->initrd_start
= info
->loader_start
+
835 MIN(info
->ram_size
/ 2, 128 * 1024 * 1024);
839 /* Assume that raw images are linux kernels, and ELF images are not. */
840 /* If the filename contains 'vmlinux', assume ELF images are linux, too. */
841 is_linux
= (strstr(info
->kernel_filename
, "vmlinux") != NULL
);
842 kernel_size
= arm_load_elf(info
, &elf_entry
, &elf_low_addr
,
843 &elf_high_addr
, elf_machine
);
844 if (kernel_size
> 0 && have_dtb(info
)) {
845 /* If there is still some room left at the base of RAM, try and put
846 * the DTB there like we do for images loaded with -bios or -pflash.
848 if (elf_low_addr
> info
->loader_start
849 || elf_high_addr
< info
->loader_start
) {
850 /* Pass elf_low_addr as address limit to load_dtb if it may be
851 * pointing into RAM, otherwise pass '0' (no limit)
853 if (elf_low_addr
< info
->loader_start
) {
856 if (load_dtb(info
->loader_start
, info
, elf_low_addr
) < 0) {
862 if (kernel_size
< 0) {
863 kernel_size
= load_uimage(info
->kernel_filename
, &entry
, NULL
,
864 &is_linux
, NULL
, NULL
);
866 /* On aarch64, it's the bootloader's job to uncompress the kernel. */
867 if (arm_feature(&cpu
->env
, ARM_FEATURE_AARCH64
) && kernel_size
< 0) {
868 entry
= info
->loader_start
+ kernel_load_offset
;
869 kernel_size
= load_image_gzipped(info
->kernel_filename
, entry
,
870 info
->ram_size
- kernel_load_offset
);
873 if (kernel_size
< 0) {
874 entry
= info
->loader_start
+ kernel_load_offset
;
875 kernel_size
= load_image_targphys(info
->kernel_filename
, entry
,
876 info
->ram_size
- kernel_load_offset
);
878 } else if (entry
== info
->loader_start
) {
879 /* Don't map bootloader memory if it conflicts with the kernel image. */
882 if (kernel_size
< 0) {
883 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
884 info
->kernel_filename
);
889 uint32_t fixupcontext
[FIXUP_MAX
];
891 if (info
->initrd_filename
) {
892 initrd_size
= load_ramdisk(info
->initrd_filename
,
896 if (initrd_size
< 0) {
897 initrd_size
= load_image_targphys(info
->initrd_filename
,
902 if (initrd_size
< 0) {
903 fprintf(stderr
, "qemu: could not load initrd '%s'\n",
904 info
->initrd_filename
);
910 info
->initrd_size
= initrd_size
;
912 fixupcontext
[FIXUP_BOARDID
] = info
->board_id
;
913 fixupcontext
[FIXUP_BOARD_SETUP
] = info
->board_setup_addr
;
915 /* for device tree boot, we pass the DTB directly in r2. Otherwise
916 * we point to the kernel args.
918 if (have_dtb(info
)) {
922 if (elf_machine
== EM_AARCH64
) {
924 * Some AArch64 kernels on early bootup map the fdt region as
926 * [ ALIGN_DOWN(fdt, 2MB) ... ALIGN_DOWN(fdt, 2MB) + 2MB ]
928 * Let's play safe and prealign it to 2MB to give us some space.
930 align
= 2 * 1024 * 1024;
933 * Some 32bit kernels will trash anything in the 4K page the
934 * initrd ends in, so make sure the DTB isn't caught up in that.
939 /* Place the DTB after the initrd in memory with alignment. */
940 dtb_start
= QEMU_ALIGN_UP(info
->initrd_start
+ initrd_size
, align
);
941 if (load_dtb(dtb_start
, info
, 0) < 0) {
944 fixupcontext
[FIXUP_ARGPTR
] = dtb_start
;
946 fixupcontext
[FIXUP_ARGPTR
] = info
->loader_start
+ KERNEL_ARGS_ADDR
;
947 if (info
->ram_size
>= (1ULL << 32)) {
948 fprintf(stderr
, "qemu: RAM size must be less than 4GB to boot"
949 " Linux kernel using ATAGS (try passing a device tree"
954 fixupcontext
[FIXUP_ENTRYPOINT
] = entry
;
956 write_bootloader("bootloader", info
->loader_start
,
957 primary_loader
, fixupcontext
);
959 if (info
->nb_cpus
> 1) {
960 info
->write_secondary_boot(cpu
, info
);
962 if (info
->write_board_setup
) {
963 info
->write_board_setup(cpu
, info
);
966 /* Notify devices which need to fake up firmware initialization
967 * that we're doing a direct kernel boot.
969 object_child_foreach_recursive(object_get_root(),
970 do_arm_linux_init
, info
);
972 info
->is_linux
= is_linux
;
974 for (cs
= CPU(cpu
); cs
; cs
= CPU_NEXT(cs
)) {
975 ARM_CPU(cs
)->env
.boot_info
= info
;
979 void arm_load_kernel(ARMCPU
*cpu
, struct arm_boot_info
*info
)
983 info
->load_kernel_notifier
.cpu
= cpu
;
984 info
->load_kernel_notifier
.notifier
.notify
= arm_load_kernel_notify
;
985 qemu_add_machine_init_done_notifier(&info
->load_kernel_notifier
.notifier
);
987 /* CPU objects (unlike devices) are not automatically reset on system
988 * reset, so we must always register a handler to do so. If we're
989 * actually loading a kernel, the handler is also responsible for
990 * arranging that we start it correctly.
992 for (cs
= CPU(cpu
); cs
; cs
= CPU_NEXT(cs
)) {
993 qemu_register_reset(do_cpu_reset
, ARM_CPU(cs
));
997 static const TypeInfo arm_linux_boot_if_info
= {
998 .name
= TYPE_ARM_LINUX_BOOT_IF
,
999 .parent
= TYPE_INTERFACE
,
1000 .class_size
= sizeof(ARMLinuxBootIfClass
),
1003 static void arm_linux_boot_register_types(void)
1005 type_register_static(&arm_linux_boot_if_info
);
1008 type_init(arm_linux_boot_register_types
)