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Merge remote-tracking branch 'qemu/master'
[qemu/ar7.git] / memory.c
blobb331edc1f267004ea8a2356290f1785e2627cc35
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
21 #include "exec/memory.h"
22 #include "exec/address-spaces.h"
23 #include "exec/ioport.h"
24 #include "qapi/visitor.h"
25 #include "qemu/bitops.h"
26 #include "qemu/error-report.h"
27 #include "qom/object.h"
28 #include "trace-root.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/sysemu.h"
34 #include "hw/misc/mmio_interface.h"
35 #include "hw/qdev-properties.h"
36 #include "migration/vmstate.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 static bool global_dirty_log = false;
44
45 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 struct memory_listeners_as *list = &(_as)->listeners; \
135 \
136 switch (_direction) { \
137 case Forward: \
138 QTAILQ_FOREACH(_listener, list, link_as) { \
139 if (_listener->_callback) { \
140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
146 link_as) { \
147 if (_listener->_callback) { \
148 _listener->_callback(_listener, _section, ##_args); \
149 } \
150 } \
151 break; \
152 default: \
153 abort(); \
154 } \
155 } while (0)
156
157 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
158 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
159 do { \
160 MemoryRegionSection mrs = section_from_flat_range(fr, \
161 address_space_to_flatview(as)); \
162 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
163 } while(0)
164
165 struct CoalescedMemoryRange {
166 AddrRange addr;
167 QTAILQ_ENTRY(CoalescedMemoryRange) link;
168 };
169
170 struct MemoryRegionIoeventfd {
171 AddrRange addr;
172 bool match_data;
173 uint64_t data;
174 EventNotifier *e;
175 };
176
177 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
178 MemoryRegionIoeventfd b)
179 {
180 if (int128_lt(a.addr.start, b.addr.start)) {
181 return true;
182 } else if (int128_gt(a.addr.start, b.addr.start)) {
183 return false;
184 } else if (int128_lt(a.addr.size, b.addr.size)) {
185 return true;
186 } else if (int128_gt(a.addr.size, b.addr.size)) {
187 return false;
188 } else if (a.match_data < b.match_data) {
189 return true;
190 } else if (a.match_data > b.match_data) {
191 return false;
192 } else if (a.match_data) {
193 if (a.data < b.data) {
194 return true;
195 } else if (a.data > b.data) {
196 return false;
197 }
198 }
199 if (a.e < b.e) {
200 return true;
201 } else if (a.e > b.e) {
202 return false;
203 }
204 return false;
205 }
206
207 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
208 MemoryRegionIoeventfd b)
209 {
210 return !memory_region_ioeventfd_before(a, b)
211 && !memory_region_ioeventfd_before(b, a);
212 }
213
214 /* Range of memory in the global map. Addresses are absolute. */
215 struct FlatRange {
216 MemoryRegion *mr;
217 hwaddr offset_in_region;
218 AddrRange addr;
219 uint8_t dirty_log_mask;
220 bool romd_mode;
221 bool readonly;
222 };
223
224 typedef struct AddressSpaceOps AddressSpaceOps;
225
226 #define FOR_EACH_FLAT_RANGE(var, view) \
227 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
228
229 static inline MemoryRegionSection
230 section_from_flat_range(FlatRange *fr, FlatView *fv)
231 {
232 return (MemoryRegionSection) {
233 .mr = fr->mr,
234 .fv = fv,
235 .offset_within_region = fr->offset_in_region,
236 .size = fr->addr.size,
237 .offset_within_address_space = int128_get64(fr->addr.start),
238 .readonly = fr->readonly,
239 };
240 }
241
242 static bool flatrange_equal(FlatRange *a, FlatRange *b)
243 {
244 return a->mr == b->mr
245 && addrrange_equal(a->addr, b->addr)
246 && a->offset_in_region == b->offset_in_region
247 && a->romd_mode == b->romd_mode
248 && a->readonly == b->readonly;
249 }
250
251 static FlatView *flatview_new(MemoryRegion *mr_root)
252 {
253 FlatView *view;
254
255 view = g_new0(FlatView, 1);
256 view->ref = 1;
257 view->root = mr_root;
258 memory_region_ref(mr_root);
259 trace_flatview_new(view, mr_root);
260
261 return view;
262 }
263
264 /* Insert a range into a given position. Caller is responsible for maintaining
265 * sorting order.
266 */
267 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
268 {
269 if (view->nr == view->nr_allocated) {
270 view->nr_allocated = MAX(2 * view->nr, 10);
271 view->ranges = g_realloc(view->ranges,
272 view->nr_allocated * sizeof(*view->ranges));
273 }
274 memmove(view->ranges + pos + 1, view->ranges + pos,
275 (view->nr - pos) * sizeof(FlatRange));
276 view->ranges[pos] = *range;
277 memory_region_ref(range->mr);
278 ++view->nr;
279 }
280
281 static void flatview_destroy(FlatView *view)
282 {
283 int i;
284
285 trace_flatview_destroy(view, view->root);
286 if (view->dispatch) {
287 address_space_dispatch_free(view->dispatch);
288 }
289 for (i = 0; i < view->nr; i++) {
290 memory_region_unref(view->ranges[i].mr);
291 }
292 g_free(view->ranges);
293 memory_region_unref(view->root);
294 g_free(view);
295 }
296
297 static bool flatview_ref(FlatView *view)
298 {
299 return atomic_fetch_inc_nonzero(&view->ref) > 0;
300 }
301
302 static void flatview_unref(FlatView *view)
303 {
304 if (atomic_fetch_dec(&view->ref) == 1) {
305 trace_flatview_destroy_rcu(view, view->root);
306 assert(view->root);
307 call_rcu(view, flatview_destroy, rcu);
308 }
309 }
310
311 static bool can_merge(FlatRange *r1, FlatRange *r2)
312 {
313 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
314 && r1->mr == r2->mr
315 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
316 r1->addr.size),
317 int128_make64(r2->offset_in_region))
318 && r1->dirty_log_mask == r2->dirty_log_mask
319 && r1->romd_mode == r2->romd_mode
320 && r1->readonly == r2->readonly;
321 }
322
323 /* Attempt to simplify a view by merging adjacent ranges */
324 static void flatview_simplify(FlatView *view)
325 {
326 unsigned i, j;
327
328 i = 0;
329 while (i < view->nr) {
330 j = i + 1;
331 while (j < view->nr
332 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
333 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
334 ++j;
335 }
336 ++i;
337 memmove(&view->ranges[i], &view->ranges[j],
338 (view->nr - j) * sizeof(view->ranges[j]));
339 view->nr -= j - i;
340 }
341 }
342
343 static bool memory_region_big_endian(MemoryRegion *mr)
344 {
345 #ifdef TARGET_WORDS_BIGENDIAN
346 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
347 #else
348 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
349 #endif
350 }
351
352 static bool memory_region_wrong_endianness(MemoryRegion *mr)
353 {
354 #ifdef TARGET_WORDS_BIGENDIAN
355 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
356 #else
357 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
358 #endif
359 }
360
361 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
362 {
363 if (memory_region_wrong_endianness(mr)) {
364 switch (size) {
365 case 1:
366 break;
367 case 2:
368 *data = bswap16(*data);
369 break;
370 case 4:
371 *data = bswap32(*data);
372 break;
373 case 8:
374 *data = bswap64(*data);
375 break;
376 default:
377 abort();
378 }
379 }
380 }
381
382 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
383 {
384 MemoryRegion *root;
385 hwaddr abs_addr = offset;
386
387 abs_addr += mr->addr;
388 for (root = mr; root->container; ) {
389 root = root->container;
390 abs_addr += root->addr;
391 }
392
393 return abs_addr;
394 }
395
396 static int get_cpu_index(void)
397 {
398 if (current_cpu) {
399 return current_cpu->cpu_index;
400 }
401 return -1;
402 }
403
404 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
405 hwaddr addr,
406 uint64_t *value,
407 unsigned size,
408 unsigned shift,
409 uint64_t mask,
410 MemTxAttrs attrs)
411 {
412 uint64_t tmp;
413
414 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
415 if (mr->subpage) {
416 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
417 } else if (mr == &io_mem_notdirty) {
418 /* Accesses to code which has previously been translated into a TB show
419 * up in the MMIO path, as accesses to the io_mem_notdirty
420 * MemoryRegion. */
421 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
422 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
423 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
424 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
425 }
426 *value |= (tmp & mask) << shift;
427 return MEMTX_OK;
428 }
429
430 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
431 hwaddr addr,
432 uint64_t *value,
433 unsigned size,
434 unsigned shift,
435 uint64_t mask,
436 MemTxAttrs attrs)
437 {
438 uint64_t tmp;
439
440 tmp = mr->ops->read(mr->opaque, addr, size);
441 if (mr->subpage) {
442 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
443 } else if (mr == &io_mem_notdirty) {
444 /* Accesses to code which has previously been translated into a TB show
445 * up in the MMIO path, as accesses to the io_mem_notdirty
446 * MemoryRegion. */
447 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
448 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
449 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
450 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
451 }
452 *value |= (tmp & mask) << shift;
453 return MEMTX_OK;
454 }
455
456 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
457 hwaddr addr,
458 uint64_t *value,
459 unsigned size,
460 unsigned shift,
461 uint64_t mask,
462 MemTxAttrs attrs)
463 {
464 uint64_t tmp = 0;
465 MemTxResult r;
466
467 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
468 if (mr->subpage) {
469 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
470 } else if (mr == &io_mem_notdirty) {
471 /* Accesses to code which has previously been translated into a TB show
472 * up in the MMIO path, as accesses to the io_mem_notdirty
473 * MemoryRegion. */
474 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
475 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
476 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
477 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
478 }
479 *value |= (tmp & mask) << shift;
480 return r;
481 }
482
483 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
484 hwaddr addr,
485 uint64_t *value,
486 unsigned size,
487 unsigned shift,
488 uint64_t mask,
489 MemTxAttrs attrs)
490 {
491 uint64_t tmp;
492
493 tmp = (*value >> shift) & mask;
494 if (mr->subpage) {
495 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
496 } else if (mr == &io_mem_notdirty) {
497 /* Accesses to code which has previously been translated into a TB show
498 * up in the MMIO path, as accesses to the io_mem_notdirty
499 * MemoryRegion. */
500 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
501 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
502 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
503 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
504 }
505 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
506 return MEMTX_OK;
507 }
508
509 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
510 hwaddr addr,
511 uint64_t *value,
512 unsigned size,
513 unsigned shift,
514 uint64_t mask,
515 MemTxAttrs attrs)
516 {
517 uint64_t tmp;
518
519 tmp = (*value >> shift) & mask;
520 if (mr->subpage) {
521 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
522 } else if (mr == &io_mem_notdirty) {
523 /* Accesses to code which has previously been translated into a TB show
524 * up in the MMIO path, as accesses to the io_mem_notdirty
525 * MemoryRegion. */
526 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
527 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
528 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
529 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
530 }
531 mr->ops->write(mr->opaque, addr, tmp, size);
532 return MEMTX_OK;
533 }
534
535 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
536 hwaddr addr,
537 uint64_t *value,
538 unsigned size,
539 unsigned shift,
540 uint64_t mask,
541 MemTxAttrs attrs)
542 {
543 uint64_t tmp;
544
545 tmp = (*value >> shift) & mask;
546 if (mr->subpage) {
547 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
548 } else if (mr == &io_mem_notdirty) {
549 /* Accesses to code which has previously been translated into a TB show
550 * up in the MMIO path, as accesses to the io_mem_notdirty
551 * MemoryRegion. */
552 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
553 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
554 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
555 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
556 }
557 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
558 }
559
560 static MemTxResult access_with_adjusted_size(hwaddr addr,
561 uint64_t *value,
562 unsigned size,
563 unsigned access_size_min,
564 unsigned access_size_max,
565 MemTxResult (*access_fn)
566 (MemoryRegion *mr,
567 hwaddr addr,
568 uint64_t *value,
569 unsigned size,
570 unsigned shift,
571 uint64_t mask,
572 MemTxAttrs attrs),
573 MemoryRegion *mr,
574 MemTxAttrs attrs)
575 {
576 uint64_t access_mask;
577 unsigned access_size;
578 unsigned i;
579 MemTxResult r = MEMTX_OK;
580
581 if (!access_size_min) {
582 access_size_min = 1;
583 }
584 if (!access_size_max) {
585 access_size_max = 4;
586 }
587
588 /* FIXME: support unaligned access? */
589 access_size = MAX(MIN(size, access_size_max), access_size_min);
590 access_mask = -1ULL >> (64 - access_size * 8);
591 if (memory_region_big_endian(mr)) {
592 for (i = 0; i < size; i += access_size) {
593 r |= access_fn(mr, addr + i, value, access_size,
594 (size - access_size - i) * 8, access_mask, attrs);
595 }
596 } else {
597 for (i = 0; i < size; i += access_size) {
598 r |= access_fn(mr, addr + i, value, access_size, i * 8,
599 access_mask, attrs);
600 }
601 }
602 return r;
603 }
604
605 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
606 {
607 AddressSpace *as;
608
609 while (mr->container) {
610 mr = mr->container;
611 }
612 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
613 if (mr == as->root) {
614 return as;
615 }
616 }
617 return NULL;
618 }
619
620 /* Render a memory region into the global view. Ranges in @view obscure
621 * ranges in @mr.
622 */
623 static void render_memory_region(FlatView *view,
624 MemoryRegion *mr,
625 Int128 base,
626 AddrRange clip,
627 bool readonly)
628 {
629 MemoryRegion *subregion;
630 unsigned i;
631 hwaddr offset_in_region;
632 Int128 remain;
633 Int128 now;
634 FlatRange fr;
635 AddrRange tmp;
636
637 if (!mr->enabled) {
638 return;
639 }
640
641 int128_addto(&base, int128_make64(mr->addr));
642 readonly |= mr->readonly;
643
644 tmp = addrrange_make(base, mr->size);
645
646 if (!addrrange_intersects(tmp, clip)) {
647 return;
648 }
649
650 clip = addrrange_intersection(tmp, clip);
651
652 if (mr->alias) {
653 int128_subfrom(&base, int128_make64(mr->alias->addr));
654 int128_subfrom(&base, int128_make64(mr->alias_offset));
655 render_memory_region(view, mr->alias, base, clip, readonly);
656 return;
657 }
658
659 /* Render subregions in priority order. */
660 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
661 render_memory_region(view, subregion, base, clip, readonly);
662 }
663
664 if (!mr->terminates) {
665 return;
666 }
667
668 offset_in_region = int128_get64(int128_sub(clip.start, base));
669 base = clip.start;
670 remain = clip.size;
671
672 fr.mr = mr;
673 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
674 fr.romd_mode = mr->romd_mode;
675 fr.readonly = readonly;
676
677 /* Render the region itself into any gaps left by the current view. */
678 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
679 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
680 continue;
681 }
682 if (int128_lt(base, view->ranges[i].addr.start)) {
683 now = int128_min(remain,
684 int128_sub(view->ranges[i].addr.start, base));
685 fr.offset_in_region = offset_in_region;
686 fr.addr = addrrange_make(base, now);
687 flatview_insert(view, i, &fr);
688 ++i;
689 int128_addto(&base, now);
690 offset_in_region += int128_get64(now);
691 int128_subfrom(&remain, now);
692 }
693 now = int128_sub(int128_min(int128_add(base, remain),
694 addrrange_end(view->ranges[i].addr)),
695 base);
696 int128_addto(&base, now);
697 offset_in_region += int128_get64(now);
698 int128_subfrom(&remain, now);
699 }
700 if (int128_nz(remain)) {
701 fr.offset_in_region = offset_in_region;
702 fr.addr = addrrange_make(base, remain);
703 flatview_insert(view, i, &fr);
704 }
705 }
706
707 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
708 {
709 while (mr->enabled) {
710 if (mr->alias) {
711 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
712 /* The alias is included in its entirety. Use it as
713 * the "real" root, so that we can share more FlatViews.
714 */
715 mr = mr->alias;
716 continue;
717 }
718 } else if (!mr->terminates) {
719 unsigned int found = 0;
720 MemoryRegion *child, *next = NULL;
721 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
722 if (child->enabled) {
723 if (++found > 1) {
724 next = NULL;
725 break;
726 }
727 if (!child->addr && int128_ge(mr->size, child->size)) {
728 /* A child is included in its entirety. If it's the only
729 * enabled one, use it in the hope of finding an alias down the
730 * way. This will also let us share FlatViews.
731 */
732 next = child;
733 }
734 }
735 }
736 if (found == 0) {
737 return NULL;
738 }
739 if (next) {
740 mr = next;
741 continue;
742 }
743 }
744
745 return mr;
746 }
747
748 return NULL;
749 }
750
751 /* Render a memory topology into a list of disjoint absolute ranges. */
752 static FlatView *generate_memory_topology(MemoryRegion *mr)
753 {
754 int i;
755 FlatView *view;
756
757 view = flatview_new(mr);
758
759 if (mr) {
760 render_memory_region(view, mr, int128_zero(),
761 addrrange_make(int128_zero(), int128_2_64()), false);
762 }
763 flatview_simplify(view);
764
765 view->dispatch = address_space_dispatch_new(view);
766 for (i = 0; i < view->nr; i++) {
767 MemoryRegionSection mrs =
768 section_from_flat_range(&view->ranges[i], view);
769 flatview_add_to_dispatch(view, &mrs);
770 }
771 address_space_dispatch_compact(view->dispatch);
772 g_hash_table_replace(flat_views, mr, view);
773
774 return view;
775 }
776
777 static void address_space_add_del_ioeventfds(AddressSpace *as,
778 MemoryRegionIoeventfd *fds_new,
779 unsigned fds_new_nb,
780 MemoryRegionIoeventfd *fds_old,
781 unsigned fds_old_nb)
782 {
783 unsigned iold, inew;
784 MemoryRegionIoeventfd *fd;
785 MemoryRegionSection section;
786
787 /* Generate a symmetric difference of the old and new fd sets, adding
788 * and deleting as necessary.
789 */
790
791 iold = inew = 0;
792 while (iold < fds_old_nb || inew < fds_new_nb) {
793 if (iold < fds_old_nb
794 && (inew == fds_new_nb
795 || memory_region_ioeventfd_before(fds_old[iold],
796 fds_new[inew]))) {
797 fd = &fds_old[iold];
798 section = (MemoryRegionSection) {
799 .fv = address_space_to_flatview(as),
800 .offset_within_address_space = int128_get64(fd->addr.start),
801 .size = fd->addr.size,
802 };
803 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
804 fd->match_data, fd->data, fd->e);
805 ++iold;
806 } else if (inew < fds_new_nb
807 && (iold == fds_old_nb
808 || memory_region_ioeventfd_before(fds_new[inew],
809 fds_old[iold]))) {
810 fd = &fds_new[inew];
811 section = (MemoryRegionSection) {
812 .fv = address_space_to_flatview(as),
813 .offset_within_address_space = int128_get64(fd->addr.start),
814 .size = fd->addr.size,
815 };
816 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
817 fd->match_data, fd->data, fd->e);
818 ++inew;
819 } else {
820 ++iold;
821 ++inew;
822 }
823 }
824 }
825
826 static FlatView *address_space_get_flatview(AddressSpace *as)
827 {
828 FlatView *view;
829
830 rcu_read_lock();
831 do {
832 view = address_space_to_flatview(as);
833 /* If somebody has replaced as->current_map concurrently,
834 * flatview_ref returns false.
835 */
836 } while (!flatview_ref(view));
837 rcu_read_unlock();
838 return view;
839 }
840
841 static void address_space_update_ioeventfds(AddressSpace *as)
842 {
843 FlatView *view;
844 FlatRange *fr;
845 unsigned ioeventfd_nb = 0;
846 MemoryRegionIoeventfd *ioeventfds = NULL;
847 AddrRange tmp;
848 unsigned i;
849
850 view = address_space_get_flatview(as);
851 FOR_EACH_FLAT_RANGE(fr, view) {
852 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
853 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
854 int128_sub(fr->addr.start,
855 int128_make64(fr->offset_in_region)));
856 if (addrrange_intersects(fr->addr, tmp)) {
857 ++ioeventfd_nb;
858 ioeventfds = g_realloc(ioeventfds,
859 ioeventfd_nb * sizeof(*ioeventfds));
860 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
861 ioeventfds[ioeventfd_nb-1].addr = tmp;
862 }
863 }
864 }
865
866 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
867 as->ioeventfds, as->ioeventfd_nb);
868
869 g_free(as->ioeventfds);
870 as->ioeventfds = ioeventfds;
871 as->ioeventfd_nb = ioeventfd_nb;
872 flatview_unref(view);
873 }
874
875 static void address_space_update_topology_pass(AddressSpace *as,
876 const FlatView *old_view,
877 const FlatView *new_view,
878 bool adding)
879 {
880 unsigned iold, inew;
881 FlatRange *frold, *frnew;
882
883 /* Generate a symmetric difference of the old and new memory maps.
884 * Kill ranges in the old map, and instantiate ranges in the new map.
885 */
886 iold = inew = 0;
887 while (iold < old_view->nr || inew < new_view->nr) {
888 if (iold < old_view->nr) {
889 frold = &old_view->ranges[iold];
890 } else {
891 frold = NULL;
892 }
893 if (inew < new_view->nr) {
894 frnew = &new_view->ranges[inew];
895 } else {
896 frnew = NULL;
897 }
898
899 if (frold
900 && (!frnew
901 || int128_lt(frold->addr.start, frnew->addr.start)
902 || (int128_eq(frold->addr.start, frnew->addr.start)
903 && !flatrange_equal(frold, frnew)))) {
904 /* In old but not in new, or in both but attributes changed. */
905
906 if (!adding) {
907 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
908 }
909
910 ++iold;
911 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
912 /* In both and unchanged (except logging may have changed) */
913
914 if (adding) {
915 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
916 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
917 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
918 frold->dirty_log_mask,
919 frnew->dirty_log_mask);
920 }
921 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
922 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
923 frold->dirty_log_mask,
924 frnew->dirty_log_mask);
925 }
926 }
927
928 ++iold;
929 ++inew;
930 } else {
931 /* In new */
932
933 if (adding) {
934 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
935 }
936
937 ++inew;
938 }
939 }
940 }
941
942 static void flatviews_init(void)
943 {
944 static FlatView *empty_view;
945
946 if (flat_views) {
947 return;
948 }
949
950 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
951 (GDestroyNotify) flatview_unref);
952 if (!empty_view) {
953 empty_view = generate_memory_topology(NULL);
954 /* We keep it alive forever in the global variable. */
955 flatview_ref(empty_view);
956 } else {
957 g_hash_table_replace(flat_views, NULL, empty_view);
958 flatview_ref(empty_view);
959 }
960 }
961
962 static void flatviews_reset(void)
963 {
964 AddressSpace *as;
965
966 if (flat_views) {
967 g_hash_table_unref(flat_views);
968 flat_views = NULL;
969 }
970 flatviews_init();
971
972 /* Render unique FVs */
973 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
974 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
975
976 if (g_hash_table_lookup(flat_views, physmr)) {
977 continue;
978 }
979
980 generate_memory_topology(physmr);
981 }
982 }
983
984 static void address_space_set_flatview(AddressSpace *as)
985 {
986 FlatView *old_view = address_space_to_flatview(as);
987 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
988 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
989
990 assert(new_view);
991
992 if (old_view == new_view) {
993 return;
994 }
995
996 if (old_view) {
997 flatview_ref(old_view);
998 }
999
1000 flatview_ref(new_view);
1001
1002 if (!QTAILQ_EMPTY(&as->listeners)) {
1003 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1004
1005 if (!old_view2) {
1006 old_view2 = &tmpview;
1007 }
1008 address_space_update_topology_pass(as, old_view2, new_view, false);
1009 address_space_update_topology_pass(as, old_view2, new_view, true);
1010 }
1011
1012 /* Writes are protected by the BQL. */
1013 atomic_rcu_set(&as->current_map, new_view);
1014 if (old_view) {
1015 flatview_unref(old_view);
1016 }
1017
1018 /* Note that all the old MemoryRegions are still alive up to this
1019 * point. This relieves most MemoryListeners from the need to
1020 * ref/unref the MemoryRegions they get---unless they use them
1021 * outside the iothread mutex, in which case precise reference
1022 * counting is necessary.
1023 */
1024 if (old_view) {
1025 flatview_unref(old_view);
1026 }
1027 }
1028
1029 static void address_space_update_topology(AddressSpace *as)
1030 {
1031 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1032
1033 flatviews_init();
1034 if (!g_hash_table_lookup(flat_views, physmr)) {
1035 generate_memory_topology(physmr);
1036 }
1037 address_space_set_flatview(as);
1038 }
1039
1040 void memory_region_transaction_begin(void)
1041 {
1042 qemu_flush_coalesced_mmio_buffer();
1043 ++memory_region_transaction_depth;
1044 }
1045
1046 void memory_region_transaction_commit(void)
1047 {
1048 AddressSpace *as;
1049
1050 assert(memory_region_transaction_depth);
1051 assert(qemu_mutex_iothread_locked());
1052
1053 --memory_region_transaction_depth;
1054 if (!memory_region_transaction_depth) {
1055 if (memory_region_update_pending) {
1056 flatviews_reset();
1057
1058 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1059
1060 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1061 address_space_set_flatview(as);
1062 address_space_update_ioeventfds(as);
1063 }
1064 memory_region_update_pending = false;
1065 ioeventfd_update_pending = false;
1066 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1067 } else if (ioeventfd_update_pending) {
1068 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1069 address_space_update_ioeventfds(as);
1070 }
1071 ioeventfd_update_pending = false;
1072 }
1073 }
1074 }
1075
1076 static void memory_region_destructor_none(MemoryRegion *mr)
1077 {
1078 }
1079
1080 static void memory_region_destructor_ram(MemoryRegion *mr)
1081 {
1082 qemu_ram_free(mr->ram_block);
1083 }
1084
1085 static bool memory_region_need_escape(char c)
1086 {
1087 return c == '/' || c == '[' || c == '\\' || c == ']';
1088 }
1089
1090 static char *memory_region_escape_name(const char *name)
1091 {
1092 const char *p;
1093 char *escaped, *q;
1094 uint8_t c;
1095 size_t bytes = 0;
1096
1097 for (p = name; *p; p++) {
1098 bytes += memory_region_need_escape(*p) ? 4 : 1;
1099 }
1100 if (bytes == p - name) {
1101 return g_memdup(name, bytes + 1);
1102 }
1103
1104 escaped = g_malloc(bytes + 1);
1105 for (p = name, q = escaped; *p; p++) {
1106 c = *p;
1107 if (unlikely(memory_region_need_escape(c))) {
1108 *q++ = '\\';
1109 *q++ = 'x';
1110 *q++ = "0123456789abcdef"[c >> 4];
1111 c = "0123456789abcdef"[c & 15];
1112 }
1113 *q++ = c;
1114 }
1115 *q = 0;
1116 return escaped;
1117 }
1118
1119 static void memory_region_do_init(MemoryRegion *mr,
1120 Object *owner,
1121 const char *name,
1122 uint64_t size)
1123 {
1124 mr->size = int128_make64(size);
1125 if (size == UINT64_MAX) {
1126 mr->size = int128_2_64();
1127 }
1128 mr->name = g_strdup(name);
1129 mr->owner = owner;
1130 mr->ram_block = NULL;
1131
1132 if (name) {
1133 char *escaped_name = memory_region_escape_name(name);
1134 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1135
1136 if (!owner) {
1137 owner = container_get(qdev_get_machine(), "/unattached");
1138 }
1139
1140 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1141 object_unref(OBJECT(mr));
1142 g_free(name_array);
1143 g_free(escaped_name);
1144 }
1145 }
1146
1147 void memory_region_init(MemoryRegion *mr,
1148 Object *owner,
1149 const char *name,
1150 uint64_t size)
1151 {
1152 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1153 memory_region_do_init(mr, owner, name, size);
1154 }
1155
1156 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1157 void *opaque, Error **errp)
1158 {
1159 MemoryRegion *mr = MEMORY_REGION(obj);
1160 uint64_t value = mr->addr;
1161
1162 visit_type_uint64(v, name, &value, errp);
1163 }
1164
1165 static void memory_region_get_container(Object *obj, Visitor *v,
1166 const char *name, void *opaque,
1167 Error **errp)
1168 {
1169 MemoryRegion *mr = MEMORY_REGION(obj);
1170 gchar *path = (gchar *)"";
1171
1172 if (mr->container) {
1173 path = object_get_canonical_path(OBJECT(mr->container));
1174 }
1175 visit_type_str(v, name, &path, errp);
1176 if (mr->container) {
1177 g_free(path);
1178 }
1179 }
1180
1181 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1182 const char *part)
1183 {
1184 MemoryRegion *mr = MEMORY_REGION(obj);
1185
1186 return OBJECT(mr->container);
1187 }
1188
1189 static void memory_region_get_priority(Object *obj, Visitor *v,
1190 const char *name, void *opaque,
1191 Error **errp)
1192 {
1193 MemoryRegion *mr = MEMORY_REGION(obj);
1194 int32_t value = mr->priority;
1195
1196 visit_type_int32(v, name, &value, errp);
1197 }
1198
1199 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1200 void *opaque, Error **errp)
1201 {
1202 MemoryRegion *mr = MEMORY_REGION(obj);
1203 uint64_t value = memory_region_size(mr);
1204
1205 visit_type_uint64(v, name, &value, errp);
1206 }
1207
1208 static void memory_region_initfn(Object *obj)
1209 {
1210 MemoryRegion *mr = MEMORY_REGION(obj);
1211 ObjectProperty *op;
1212
1213 mr->ops = &unassigned_mem_ops;
1214 mr->enabled = true;
1215 mr->romd_mode = true;
1216 mr->global_locking = true;
1217 mr->destructor = memory_region_destructor_none;
1218 QTAILQ_INIT(&mr->subregions);
1219 QTAILQ_INIT(&mr->coalesced);
1220
1221 op = object_property_add(OBJECT(mr), "container",
1222 "link<" TYPE_MEMORY_REGION ">",
1223 memory_region_get_container,
1224 NULL, /* memory_region_set_container */
1225 NULL, NULL, &error_abort);
1226 op->resolve = memory_region_resolve_container;
1227
1228 object_property_add(OBJECT(mr), "addr", "uint64",
1229 memory_region_get_addr,
1230 NULL, /* memory_region_set_addr */
1231 NULL, NULL, &error_abort);
1232 object_property_add(OBJECT(mr), "priority", "uint32",
1233 memory_region_get_priority,
1234 NULL, /* memory_region_set_priority */
1235 NULL, NULL, &error_abort);
1236 object_property_add(OBJECT(mr), "size", "uint64",
1237 memory_region_get_size,
1238 NULL, /* memory_region_set_size, */
1239 NULL, NULL, &error_abort);
1240 }
1241
1242 static int qemu_target_backtrace(target_ulong *array, size_t size)
1243 {
1244 int n = 0;
1245 if (size >= 2) {
1246 #if defined(TARGET_ARM)
1247 CPUArchState *env = current_cpu->env_ptr;
1248 array[0] = env->regs[15];
1249 array[1] = env->regs[14];
1250 #elif defined(TARGET_MIPS)
1251 CPUArchState *env = current_cpu->env_ptr;
1252 array[0] = env->active_tc.PC;
1253 array[1] = env->active_tc.gpr[31];
1254 #else
1255 array[0] = 0;
1256 array[1] = 0;
1257 #endif
1258 n = 2;
1259 }
1260 return n;
1261 }
1262
1263 #include "disas/disas.h"
1264 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1265 {
1266 char *p = buffer;
1267 if (current_cpu) {
1268 target_ulong caller[2];
1269 const char *symbol;
1270 qemu_target_backtrace(caller, 2);
1271 symbol = lookup_symbol(caller[0]);
1272 p += sprintf(p, "[%s]", symbol);
1273 symbol = lookup_symbol(caller[1]);
1274 p += sprintf(p, "[%s]", symbol);
1275 } else {
1276 p += sprintf(p, "[cpu not running]");
1277 }
1278 assert((p - buffer) < length);
1279 return buffer;
1280 }
1281
1282 static void iommu_memory_region_initfn(Object *obj)
1283 {
1284 MemoryRegion *mr = MEMORY_REGION(obj);
1285
1286 mr->is_iommu = true;
1287 }
1288
1289 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1290 unsigned size)
1291 {
1292 if (trace_unassigned) {
1293 char buffer[256];
1294 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1295 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1296 }
1297 //~ vm_stop(0);
1298 if (current_cpu != NULL) {
1299 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1300 }
1301 return 0;
1302 }
1303
1304 static void unassigned_mem_write(void *opaque, hwaddr addr,
1305 uint64_t val, unsigned size)
1306 {
1307 if (trace_unassigned) {
1308 char buffer[256];
1309 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1310 " = 0x%" PRIx64 " %s\n",
1311 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1312 }
1313 if (current_cpu != NULL) {
1314 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1315 }
1316 }
1317
1318 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1319 unsigned size, bool is_write)
1320 {
1321 return false;
1322 }
1323
1324 const MemoryRegionOps unassigned_mem_ops = {
1325 .valid.accepts = unassigned_mem_accepts,
1326 .endianness = DEVICE_NATIVE_ENDIAN,
1327 };
1328
1329 static uint64_t memory_region_ram_device_read(void *opaque,
1330 hwaddr addr, unsigned size)
1331 {
1332 MemoryRegion *mr = opaque;
1333 uint64_t data = (uint64_t)~0;
1334
1335 switch (size) {
1336 case 1:
1337 data = *(uint8_t *)(mr->ram_block->host + addr);
1338 break;
1339 case 2:
1340 data = *(uint16_t *)(mr->ram_block->host + addr);
1341 break;
1342 case 4:
1343 data = *(uint32_t *)(mr->ram_block->host + addr);
1344 break;
1345 case 8:
1346 data = *(uint64_t *)(mr->ram_block->host + addr);
1347 break;
1348 }
1349
1350 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1351
1352 return data;
1353 }
1354
1355 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1356 uint64_t data, unsigned size)
1357 {
1358 MemoryRegion *mr = opaque;
1359
1360 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1361
1362 switch (size) {
1363 case 1:
1364 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1365 break;
1366 case 2:
1367 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1368 break;
1369 case 4:
1370 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1371 break;
1372 case 8:
1373 *(uint64_t *)(mr->ram_block->host + addr) = data;
1374 break;
1375 }
1376 }
1377
1378 static const MemoryRegionOps ram_device_mem_ops = {
1379 .read = memory_region_ram_device_read,
1380 .write = memory_region_ram_device_write,
1381 .endianness = DEVICE_HOST_ENDIAN,
1382 .valid = {
1383 .min_access_size = 1,
1384 .max_access_size = 8,
1385 .unaligned = true,
1386 },
1387 .impl = {
1388 .min_access_size = 1,
1389 .max_access_size = 8,
1390 .unaligned = true,
1391 },
1392 };
1393
1394 bool memory_region_access_valid(MemoryRegion *mr,
1395 hwaddr addr,
1396 unsigned size,
1397 bool is_write)
1398 {
1399 int access_size_min, access_size_max;
1400 int access_size, i;
1401
1402 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1403 fprintf(stderr, "Misaligned i/o to address %08" HWADDR_PRIx
1404 " with size %u for memory region %s\n",
1405 addr, size, mr->name);
1406 return false;
1407 }
1408
1409 if (!mr->ops->valid.accepts) {
1410 return true;
1411 }
1412
1413 access_size_min = mr->ops->valid.min_access_size;
1414 if (!mr->ops->valid.min_access_size) {
1415 access_size_min = 1;
1416 }
1417
1418 access_size_max = mr->ops->valid.max_access_size;
1419 if (!mr->ops->valid.max_access_size) {
1420 access_size_max = 4;
1421 }
1422
1423 access_size = MAX(MIN(size, access_size_max), access_size_min);
1424 for (i = 0; i < size; i += access_size) {
1425 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1426 is_write)) {
1427 return false;
1428 }
1429 }
1430
1431 return true;
1432 }
1433
1434 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1435 hwaddr addr,
1436 uint64_t *pval,
1437 unsigned size,
1438 MemTxAttrs attrs)
1439 {
1440 *pval = 0;
1441
1442 if (mr->ops->read) {
1443 return access_with_adjusted_size(addr, pval, size,
1444 mr->ops->impl.min_access_size,
1445 mr->ops->impl.max_access_size,
1446 memory_region_read_accessor,
1447 mr, attrs);
1448 } else if (mr->ops->read_with_attrs) {
1449 return access_with_adjusted_size(addr, pval, size,
1450 mr->ops->impl.min_access_size,
1451 mr->ops->impl.max_access_size,
1452 memory_region_read_with_attrs_accessor,
1453 mr, attrs);
1454 } else {
1455 return access_with_adjusted_size(addr, pval, size, 1, 4,
1456 memory_region_oldmmio_read_accessor,
1457 mr, attrs);
1458 }
1459 }
1460
1461 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1462 hwaddr addr,
1463 uint64_t *pval,
1464 unsigned size,
1465 MemTxAttrs attrs)
1466 {
1467 MemTxResult r;
1468
1469 if (!memory_region_access_valid(mr, addr, size, false)) {
1470 *pval = unassigned_mem_read(mr, addr, size);
1471 return MEMTX_DECODE_ERROR;
1472 }
1473
1474 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1475 adjust_endianness(mr, pval, size);
1476 return r;
1477 }
1478
1479 /* Return true if an eventfd was signalled */
1480 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1481 hwaddr addr,
1482 uint64_t data,
1483 unsigned size,
1484 MemTxAttrs attrs)
1485 {
1486 MemoryRegionIoeventfd ioeventfd = {
1487 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1488 .data = data,
1489 };
1490 unsigned i;
1491
1492 for (i = 0; i < mr->ioeventfd_nb; i++) {
1493 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1494 ioeventfd.e = mr->ioeventfds[i].e;
1495
1496 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1497 event_notifier_set(ioeventfd.e);
1498 return true;
1499 }
1500 }
1501
1502 return false;
1503 }
1504
1505 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1506 hwaddr addr,
1507 uint64_t data,
1508 unsigned size,
1509 MemTxAttrs attrs)
1510 {
1511 if (!memory_region_access_valid(mr, addr, size, true)) {
1512 unassigned_mem_write(mr, addr, data, size);
1513 return MEMTX_DECODE_ERROR;
1514 }
1515
1516 adjust_endianness(mr, &data, size);
1517
1518 if ((!kvm_eventfds_enabled()) &&
1519 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1520 return MEMTX_OK;
1521 }
1522
1523 if (mr->ops->write) {
1524 return access_with_adjusted_size(addr, &data, size,
1525 mr->ops->impl.min_access_size,
1526 mr->ops->impl.max_access_size,
1527 memory_region_write_accessor, mr,
1528 attrs);
1529 } else if (mr->ops->write_with_attrs) {
1530 return
1531 access_with_adjusted_size(addr, &data, size,
1532 mr->ops->impl.min_access_size,
1533 mr->ops->impl.max_access_size,
1534 memory_region_write_with_attrs_accessor,
1535 mr, attrs);
1536 } else {
1537 return access_with_adjusted_size(addr, &data, size, 1, 4,
1538 memory_region_oldmmio_write_accessor,
1539 mr, attrs);
1540 }
1541 }
1542
1543 void memory_region_init_io(MemoryRegion *mr,
1544 Object *owner,
1545 const MemoryRegionOps *ops,
1546 void *opaque,
1547 const char *name,
1548 uint64_t size)
1549 {
1550 memory_region_init(mr, owner, name, size);
1551 mr->ops = ops ? ops : &unassigned_mem_ops;
1552 mr->opaque = opaque;
1553 mr->terminates = true;
1554 }
1555
1556 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1557 Object *owner,
1558 const char *name,
1559 uint64_t size,
1560 Error **errp)
1561 {
1562 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1563 }
1564
1565 void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1566 Object *owner,
1567 const char *name,
1568 uint64_t size,
1569 bool share,
1570 Error **errp)
1571 {
1572 memory_region_init(mr, owner, name, size);
1573 mr->ram = true;
1574 mr->terminates = true;
1575 mr->destructor = memory_region_destructor_ram;
1576 mr->ram_block = qemu_ram_alloc(size, share, mr, errp);
1577 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1578 }
1579
1580 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1581 Object *owner,
1582 const char *name,
1583 uint64_t size,
1584 uint64_t max_size,
1585 void (*resized)(const char*,
1586 uint64_t length,
1587 void *host),
1588 Error **errp)
1589 {
1590 memory_region_init(mr, owner, name, size);
1591 mr->ram = true;
1592 mr->terminates = true;
1593 mr->destructor = memory_region_destructor_ram;
1594 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1595 mr, errp);
1596 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1597 }
1598
1599 #ifdef __linux__
1600 void memory_region_init_ram_from_file(MemoryRegion *mr,
1601 struct Object *owner,
1602 const char *name,
1603 uint64_t size,
1604 uint64_t align,
1605 bool share,
1606 const char *path,
1607 Error **errp)
1608 {
1609 memory_region_init(mr, owner, name, size);
1610 mr->ram = true;
1611 mr->terminates = true;
1612 mr->destructor = memory_region_destructor_ram;
1613 mr->align = align;
1614 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1615 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1616 }
1617
1618 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1619 struct Object *owner,
1620 const char *name,
1621 uint64_t size,
1622 bool share,
1623 int fd,
1624 Error **errp)
1625 {
1626 memory_region_init(mr, owner, name, size);
1627 mr->ram = true;
1628 mr->terminates = true;
1629 mr->destructor = memory_region_destructor_ram;
1630 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
1631 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1632 }
1633 #endif
1634
1635 void memory_region_init_ram_ptr(MemoryRegion *mr,
1636 Object *owner,
1637 const char *name,
1638 uint64_t size,
1639 void *ptr)
1640 {
1641 memory_region_init(mr, owner, name, size);
1642 mr->ram = true;
1643 mr->terminates = true;
1644 mr->destructor = memory_region_destructor_ram;
1645 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1646
1647 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1648 assert(ptr != NULL);
1649 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1650 }
1651
1652 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1653 Object *owner,
1654 const char *name,
1655 uint64_t size,
1656 void *ptr)
1657 {
1658 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1659 mr->ram_device = true;
1660 mr->ops = &ram_device_mem_ops;
1661 mr->opaque = mr;
1662 }
1663
1664 void memory_region_init_alias(MemoryRegion *mr,
1665 Object *owner,
1666 const char *name,
1667 MemoryRegion *orig,
1668 hwaddr offset,
1669 uint64_t size)
1670 {
1671 memory_region_init(mr, owner, name, size);
1672 mr->alias = orig;
1673 mr->alias_offset = offset;
1674 }
1675
1676 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1677 struct Object *owner,
1678 const char *name,
1679 uint64_t size,
1680 Error **errp)
1681 {
1682 memory_region_init(mr, owner, name, size);
1683 mr->ram = true;
1684 mr->readonly = true;
1685 mr->terminates = true;
1686 mr->destructor = memory_region_destructor_ram;
1687 mr->ram_block = qemu_ram_alloc(size, false, mr, errp);
1688 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1689 }
1690
1691 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1692 Object *owner,
1693 const MemoryRegionOps *ops,
1694 void *opaque,
1695 const char *name,
1696 uint64_t size,
1697 Error **errp)
1698 {
1699 assert(ops);
1700 memory_region_init(mr, owner, name, size);
1701 mr->ops = ops;
1702 mr->opaque = opaque;
1703 mr->terminates = true;
1704 mr->rom_device = true;
1705 mr->destructor = memory_region_destructor_ram;
1706 mr->ram_block = qemu_ram_alloc(size, false, mr, errp);
1707 }
1708
1709 void memory_region_init_iommu(void *_iommu_mr,
1710 size_t instance_size,
1711 const char *mrtypename,
1712 Object *owner,
1713 const char *name,
1714 uint64_t size)
1715 {
1716 struct IOMMUMemoryRegion *iommu_mr;
1717 struct MemoryRegion *mr;
1718
1719 object_initialize(_iommu_mr, instance_size, mrtypename);
1720 mr = MEMORY_REGION(_iommu_mr);
1721 memory_region_do_init(mr, owner, name, size);
1722 iommu_mr = IOMMU_MEMORY_REGION(mr);
1723 mr->terminates = true; /* then re-forwards */
1724 QLIST_INIT(&iommu_mr->iommu_notify);
1725 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1726 }
1727
1728 static void memory_region_finalize(Object *obj)
1729 {
1730 MemoryRegion *mr = MEMORY_REGION(obj);
1731
1732 assert(!mr->container);
1733
1734 /* We know the region is not visible in any address space (it
1735 * does not have a container and cannot be a root either because
1736 * it has no references, so we can blindly clear mr->enabled.
1737 * memory_region_set_enabled instead could trigger a transaction
1738 * and cause an infinite loop.
1739 */
1740 mr->enabled = false;
1741 memory_region_transaction_begin();
1742 while (!QTAILQ_EMPTY(&mr->subregions)) {
1743 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1744 memory_region_del_subregion(mr, subregion);
1745 }
1746 memory_region_transaction_commit();
1747
1748 mr->destructor(mr);
1749 memory_region_clear_coalescing(mr);
1750 g_free((char *)mr->name);
1751 g_free(mr->ioeventfds);
1752 }
1753
1754 Object *memory_region_owner(MemoryRegion *mr)
1755 {
1756 Object *obj = OBJECT(mr);
1757 return obj->parent;
1758 }
1759
1760 void memory_region_ref(MemoryRegion *mr)
1761 {
1762 /* MMIO callbacks most likely will access data that belongs
1763 * to the owner, hence the need to ref/unref the owner whenever
1764 * the memory region is in use.
1765 *
1766 * The memory region is a child of its owner. As long as the
1767 * owner doesn't call unparent itself on the memory region,
1768 * ref-ing the owner will also keep the memory region alive.
1769 * Memory regions without an owner are supposed to never go away;
1770 * we do not ref/unref them because it slows down DMA sensibly.
1771 */
1772 if (mr && mr->owner) {
1773 object_ref(mr->owner);
1774 }
1775 }
1776
1777 void memory_region_unref(MemoryRegion *mr)
1778 {
1779 if (mr && mr->owner) {
1780 object_unref(mr->owner);
1781 }
1782 }
1783
1784 uint64_t memory_region_size(MemoryRegion *mr)
1785 {
1786 if (int128_eq(mr->size, int128_2_64())) {
1787 return UINT64_MAX;
1788 }
1789 return int128_get64(mr->size);
1790 }
1791
1792 const char *memory_region_name(const MemoryRegion *mr)
1793 {
1794 if (!mr->name) {
1795 ((MemoryRegion *)mr)->name =
1796 object_get_canonical_path_component(OBJECT(mr));
1797 }
1798 return mr->name;
1799 }
1800
1801 bool memory_region_is_ram_device(MemoryRegion *mr)
1802 {
1803 return mr->ram_device;
1804 }
1805
1806 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1807 {
1808 uint8_t mask = mr->dirty_log_mask;
1809 if (global_dirty_log && mr->ram_block) {
1810 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1811 }
1812 return mask;
1813 }
1814
1815 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1816 {
1817 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1818 }
1819
1820 static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1821 {
1822 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1823 IOMMUNotifier *iommu_notifier;
1824 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1825
1826 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1827 flags |= iommu_notifier->notifier_flags;
1828 }
1829
1830 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1831 imrc->notify_flag_changed(iommu_mr,
1832 iommu_mr->iommu_notify_flags,
1833 flags);
1834 }
1835
1836 iommu_mr->iommu_notify_flags = flags;
1837 }
1838
1839 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1840 IOMMUNotifier *n)
1841 {
1842 IOMMUMemoryRegion *iommu_mr;
1843
1844 if (mr->alias) {
1845 memory_region_register_iommu_notifier(mr->alias, n);
1846 return;
1847 }
1848
1849 /* We need to register for at least one bitfield */
1850 iommu_mr = IOMMU_MEMORY_REGION(mr);
1851 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1852 assert(n->start <= n->end);
1853 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1854 memory_region_update_iommu_notify_flags(iommu_mr);
1855 }
1856
1857 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1858 {
1859 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1860
1861 if (imrc->get_min_page_size) {
1862 return imrc->get_min_page_size(iommu_mr);
1863 }
1864 return TARGET_PAGE_SIZE;
1865 }
1866
1867 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1868 {
1869 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1870 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1871 hwaddr addr, granularity;
1872 IOMMUTLBEntry iotlb;
1873
1874 /* If the IOMMU has its own replay callback, override */
1875 if (imrc->replay) {
1876 imrc->replay(iommu_mr, n);
1877 return;
1878 }
1879
1880 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1881
1882 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1883 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
1884 if (iotlb.perm != IOMMU_NONE) {
1885 n->notify(n, &iotlb);
1886 }
1887
1888 /* if (2^64 - MR size) < granularity, it's possible to get an
1889 * infinite loop here. This should catch such a wraparound */
1890 if ((addr + granularity) < addr) {
1891 break;
1892 }
1893 }
1894 }
1895
1896 void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1897 {
1898 IOMMUNotifier *notifier;
1899
1900 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1901 memory_region_iommu_replay(iommu_mr, notifier);
1902 }
1903 }
1904
1905 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1906 IOMMUNotifier *n)
1907 {
1908 IOMMUMemoryRegion *iommu_mr;
1909
1910 if (mr->alias) {
1911 memory_region_unregister_iommu_notifier(mr->alias, n);
1912 return;
1913 }
1914 QLIST_REMOVE(n, node);
1915 iommu_mr = IOMMU_MEMORY_REGION(mr);
1916 memory_region_update_iommu_notify_flags(iommu_mr);
1917 }
1918
1919 void memory_region_notify_one(IOMMUNotifier *notifier,
1920 IOMMUTLBEntry *entry)
1921 {
1922 IOMMUNotifierFlag request_flags;
1923
1924 /*
1925 * Skip the notification if the notification does not overlap
1926 * with registered range.
1927 */
1928 if (notifier->start > entry->iova + entry->addr_mask ||
1929 notifier->end < entry->iova) {
1930 return;
1931 }
1932
1933 if (entry->perm & IOMMU_RW) {
1934 request_flags = IOMMU_NOTIFIER_MAP;
1935 } else {
1936 request_flags = IOMMU_NOTIFIER_UNMAP;
1937 }
1938
1939 if (notifier->notifier_flags & request_flags) {
1940 notifier->notify(notifier, entry);
1941 }
1942 }
1943
1944 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1945 IOMMUTLBEntry entry)
1946 {
1947 IOMMUNotifier *iommu_notifier;
1948
1949 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1950
1951 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1952 memory_region_notify_one(iommu_notifier, &entry);
1953 }
1954 }
1955
1956 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1957 enum IOMMUMemoryRegionAttr attr,
1958 void *data)
1959 {
1960 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1961
1962 if (!imrc->get_attr) {
1963 return -EINVAL;
1964 }
1965
1966 return imrc->get_attr(iommu_mr, attr, data);
1967 }
1968
1969 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1970 {
1971 uint8_t mask = 1 << client;
1972 uint8_t old_logging;
1973
1974 assert(client == DIRTY_MEMORY_VGA);
1975 old_logging = mr->vga_logging_count;
1976 mr->vga_logging_count += log ? 1 : -1;
1977 if (!!old_logging == !!mr->vga_logging_count) {
1978 return;
1979 }
1980
1981 memory_region_transaction_begin();
1982 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1983 memory_region_update_pending |= mr->enabled;
1984 memory_region_transaction_commit();
1985 }
1986
1987 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1988 hwaddr size, unsigned client)
1989 {
1990 assert(mr->ram_block);
1991 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1992 size, client);
1993 }
1994
1995 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1996 hwaddr size)
1997 {
1998 assert(mr->ram_block);
1999 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2000 size,
2001 memory_region_get_dirty_log_mask(mr));
2002 }
2003
2004 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2005 {
2006 MemoryListener *listener;
2007 AddressSpace *as;
2008 FlatView *view;
2009 FlatRange *fr;
2010
2011 /* If the same address space has multiple log_sync listeners, we
2012 * visit that address space's FlatView multiple times. But because
2013 * log_sync listeners are rare, it's still cheaper than walking each
2014 * address space once.
2015 */
2016 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2017 if (!listener->log_sync) {
2018 continue;
2019 }
2020 as = listener->address_space;
2021 view = address_space_get_flatview(as);
2022 FOR_EACH_FLAT_RANGE(fr, view) {
2023 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2024 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2025 listener->log_sync(listener, &mrs);
2026 }
2027 }
2028 flatview_unref(view);
2029 }
2030 }
2031
2032 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2033 hwaddr addr,
2034 hwaddr size,
2035 unsigned client)
2036 {
2037 assert(mr->ram_block);
2038 memory_region_sync_dirty_bitmap(mr);
2039 return cpu_physical_memory_snapshot_and_clear_dirty(
2040 memory_region_get_ram_addr(mr) + addr, size, client);
2041 }
2042
2043 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2044 hwaddr addr, hwaddr size)
2045 {
2046 assert(mr->ram_block);
2047 return cpu_physical_memory_snapshot_get_dirty(snap,
2048 memory_region_get_ram_addr(mr) + addr, size);
2049 }
2050
2051 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2052 {
2053 if (mr->readonly != readonly) {
2054 memory_region_transaction_begin();
2055 mr->readonly = readonly;
2056 memory_region_update_pending |= mr->enabled;
2057 memory_region_transaction_commit();
2058 }
2059 }
2060
2061 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2062 {
2063 if (mr->romd_mode != romd_mode) {
2064 memory_region_transaction_begin();
2065 mr->romd_mode = romd_mode;
2066 memory_region_update_pending |= mr->enabled;
2067 memory_region_transaction_commit();
2068 }
2069 }
2070
2071 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2072 hwaddr size, unsigned client)
2073 {
2074 assert(mr->ram_block);
2075 cpu_physical_memory_test_and_clear_dirty(
2076 memory_region_get_ram_addr(mr) + addr, size, client);
2077 }
2078
2079 int memory_region_get_fd(MemoryRegion *mr)
2080 {
2081 int fd;
2082
2083 rcu_read_lock();
2084 while (mr->alias) {
2085 mr = mr->alias;
2086 }
2087 fd = mr->ram_block->fd;
2088 rcu_read_unlock();
2089
2090 return fd;
2091 }
2092
2093 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2094 {
2095 void *ptr;
2096 uint64_t offset = 0;
2097
2098 rcu_read_lock();
2099 while (mr->alias) {
2100 offset += mr->alias_offset;
2101 mr = mr->alias;
2102 }
2103 assert(mr->ram_block);
2104 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2105 rcu_read_unlock();
2106
2107 return ptr;
2108 }
2109
2110 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2111 {
2112 RAMBlock *block;
2113
2114 block = qemu_ram_block_from_host(ptr, false, offset);
2115 if (!block) {
2116 return NULL;
2117 }
2118
2119 return block->mr;
2120 }
2121
2122 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2123 {
2124 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2125 }
2126
2127 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2128 {
2129 assert(mr->ram_block);
2130
2131 qemu_ram_resize(mr->ram_block, newsize, errp);
2132 }
2133
2134 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
2135 {
2136 FlatView *view;
2137 FlatRange *fr;
2138 CoalescedMemoryRange *cmr;
2139 AddrRange tmp;
2140 MemoryRegionSection section;
2141
2142 view = address_space_get_flatview(as);
2143 FOR_EACH_FLAT_RANGE(fr, view) {
2144 if (fr->mr == mr) {
2145 section = (MemoryRegionSection) {
2146 .fv = view,
2147 .offset_within_address_space = int128_get64(fr->addr.start),
2148 .size = fr->addr.size,
2149 };
2150
2151 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
2152 int128_get64(fr->addr.start),
2153 int128_get64(fr->addr.size));
2154 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
2155 tmp = addrrange_shift(cmr->addr,
2156 int128_sub(fr->addr.start,
2157 int128_make64(fr->offset_in_region)));
2158 if (!addrrange_intersects(tmp, fr->addr)) {
2159 continue;
2160 }
2161 tmp = addrrange_intersection(tmp, fr->addr);
2162 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
2163 int128_get64(tmp.start),
2164 int128_get64(tmp.size));
2165 }
2166 }
2167 }
2168 flatview_unref(view);
2169 }
2170
2171 static void memory_region_update_coalesced_range(MemoryRegion *mr)
2172 {
2173 AddressSpace *as;
2174
2175 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2176 memory_region_update_coalesced_range_as(mr, as);
2177 }
2178 }
2179
2180 void memory_region_set_coalescing(MemoryRegion *mr)
2181 {
2182 memory_region_clear_coalescing(mr);
2183 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2184 }
2185
2186 void memory_region_add_coalescing(MemoryRegion *mr,
2187 hwaddr offset,
2188 uint64_t size)
2189 {
2190 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2191
2192 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2193 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2194 memory_region_update_coalesced_range(mr);
2195 memory_region_set_flush_coalesced(mr);
2196 }
2197
2198 void memory_region_clear_coalescing(MemoryRegion *mr)
2199 {
2200 CoalescedMemoryRange *cmr;
2201 bool updated = false;
2202
2203 qemu_flush_coalesced_mmio_buffer();
2204 mr->flush_coalesced_mmio = false;
2205
2206 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2207 cmr = QTAILQ_FIRST(&mr->coalesced);
2208 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2209 g_free(cmr);
2210 updated = true;
2211 }
2212
2213 if (updated) {
2214 memory_region_update_coalesced_range(mr);
2215 }
2216 }
2217
2218 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2219 {
2220 mr->flush_coalesced_mmio = true;
2221 }
2222
2223 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2224 {
2225 qemu_flush_coalesced_mmio_buffer();
2226 if (QTAILQ_EMPTY(&mr->coalesced)) {
2227 mr->flush_coalesced_mmio = false;
2228 }
2229 }
2230
2231 void memory_region_clear_global_locking(MemoryRegion *mr)
2232 {
2233 mr->global_locking = false;
2234 }
2235
2236 static bool userspace_eventfd_warning;
2237
2238 void memory_region_add_eventfd(MemoryRegion *mr,
2239 hwaddr addr,
2240 unsigned size,
2241 bool match_data,
2242 uint64_t data,
2243 EventNotifier *e)
2244 {
2245 MemoryRegionIoeventfd mrfd = {
2246 .addr.start = int128_make64(addr),
2247 .addr.size = int128_make64(size),
2248 .match_data = match_data,
2249 .data = data,
2250 .e = e,
2251 };
2252 unsigned i;
2253
2254 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2255 userspace_eventfd_warning))) {
2256 userspace_eventfd_warning = true;
2257 error_report("Using eventfd without MMIO binding in KVM. "
2258 "Suboptimal performance expected");
2259 }
2260
2261 if (size) {
2262 adjust_endianness(mr, &mrfd.data, size);
2263 }
2264 memory_region_transaction_begin();
2265 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2266 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2267 break;
2268 }
2269 }
2270 ++mr->ioeventfd_nb;
2271 mr->ioeventfds = g_realloc(mr->ioeventfds,
2272 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2273 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2274 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2275 mr->ioeventfds[i] = mrfd;
2276 ioeventfd_update_pending |= mr->enabled;
2277 memory_region_transaction_commit();
2278 }
2279
2280 void memory_region_del_eventfd(MemoryRegion *mr,
2281 hwaddr addr,
2282 unsigned size,
2283 bool match_data,
2284 uint64_t data,
2285 EventNotifier *e)
2286 {
2287 MemoryRegionIoeventfd mrfd = {
2288 .addr.start = int128_make64(addr),
2289 .addr.size = int128_make64(size),
2290 .match_data = match_data,
2291 .data = data,
2292 .e = e,
2293 };
2294 unsigned i;
2295
2296 if (size) {
2297 adjust_endianness(mr, &mrfd.data, size);
2298 }
2299 memory_region_transaction_begin();
2300 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2301 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2302 break;
2303 }
2304 }
2305 assert(i != mr->ioeventfd_nb);
2306 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2307 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2308 --mr->ioeventfd_nb;
2309 mr->ioeventfds = g_realloc(mr->ioeventfds,
2310 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2311 ioeventfd_update_pending |= mr->enabled;
2312 memory_region_transaction_commit();
2313 }
2314
2315 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2316 {
2317 MemoryRegion *mr = subregion->container;
2318 MemoryRegion *other;
2319
2320 memory_region_transaction_begin();
2321
2322 memory_region_ref(subregion);
2323 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2324 if (subregion->priority >= other->priority) {
2325 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2326 goto done;
2327 }
2328 }
2329 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2330 done:
2331 memory_region_update_pending |= mr->enabled && subregion->enabled;
2332 memory_region_transaction_commit();
2333 }
2334
2335 static void memory_region_add_subregion_common(MemoryRegion *mr,
2336 hwaddr offset,
2337 MemoryRegion *subregion)
2338 {
2339 assert(!subregion->container);
2340 subregion->container = mr;
2341 subregion->addr = offset;
2342 memory_region_update_container_subregions(subregion);
2343 }
2344
2345 void memory_region_add_subregion(MemoryRegion *mr,
2346 hwaddr offset,
2347 MemoryRegion *subregion)
2348 {
2349 subregion->priority = 0;
2350 memory_region_add_subregion_common(mr, offset, subregion);
2351 }
2352
2353 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2354 hwaddr offset,
2355 MemoryRegion *subregion,
2356 int priority)
2357 {
2358 subregion->priority = priority;
2359 memory_region_add_subregion_common(mr, offset, subregion);
2360 }
2361
2362 void memory_region_del_subregion(MemoryRegion *mr,
2363 MemoryRegion *subregion)
2364 {
2365 memory_region_transaction_begin();
2366 assert(subregion->container == mr);
2367 subregion->container = NULL;
2368 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2369 memory_region_unref(subregion);
2370 memory_region_update_pending |= mr->enabled && subregion->enabled;
2371 memory_region_transaction_commit();
2372 }
2373
2374 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2375 {
2376 if (enabled == mr->enabled) {
2377 return;
2378 }
2379 memory_region_transaction_begin();
2380 mr->enabled = enabled;
2381 memory_region_update_pending = true;
2382 memory_region_transaction_commit();
2383 }
2384
2385 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2386 {
2387 Int128 s = int128_make64(size);
2388
2389 if (size == UINT64_MAX) {
2390 s = int128_2_64();
2391 }
2392 if (int128_eq(s, mr->size)) {
2393 return;
2394 }
2395 memory_region_transaction_begin();
2396 mr->size = s;
2397 memory_region_update_pending = true;
2398 memory_region_transaction_commit();
2399 }
2400
2401 static void memory_region_readd_subregion(MemoryRegion *mr)
2402 {
2403 MemoryRegion *container = mr->container;
2404
2405 if (container) {
2406 memory_region_transaction_begin();
2407 memory_region_ref(mr);
2408 memory_region_del_subregion(container, mr);
2409 mr->container = container;
2410 memory_region_update_container_subregions(mr);
2411 memory_region_unref(mr);
2412 memory_region_transaction_commit();
2413 }
2414 }
2415
2416 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2417 {
2418 if (addr != mr->addr) {
2419 mr->addr = addr;
2420 memory_region_readd_subregion(mr);
2421 }
2422 }
2423
2424 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2425 {
2426 assert(mr->alias);
2427
2428 if (offset == mr->alias_offset) {
2429 return;
2430 }
2431
2432 memory_region_transaction_begin();
2433 mr->alias_offset = offset;
2434 memory_region_update_pending |= mr->enabled;
2435 memory_region_transaction_commit();
2436 }
2437
2438 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2439 {
2440 return mr->align;
2441 }
2442
2443 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2444 {
2445 const AddrRange *addr = addr_;
2446 const FlatRange *fr = fr_;
2447
2448 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2449 return -1;
2450 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2451 return 1;
2452 }
2453 return 0;
2454 }
2455
2456 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2457 {
2458 return bsearch(&addr, view->ranges, view->nr,
2459 sizeof(FlatRange), cmp_flatrange_addr);
2460 }
2461
2462 bool memory_region_is_mapped(MemoryRegion *mr)
2463 {
2464 return mr->container ? true : false;
2465 }
2466
2467 /* Same as memory_region_find, but it does not add a reference to the
2468 * returned region. It must be called from an RCU critical section.
2469 */
2470 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2471 hwaddr addr, uint64_t size)
2472 {
2473 MemoryRegionSection ret = { .mr = NULL };
2474 MemoryRegion *root;
2475 AddressSpace *as;
2476 AddrRange range;
2477 FlatView *view;
2478 FlatRange *fr;
2479
2480 addr += mr->addr;
2481 for (root = mr; root->container; ) {
2482 root = root->container;
2483 addr += root->addr;
2484 }
2485
2486 as = memory_region_to_address_space(root);
2487 if (!as) {
2488 return ret;
2489 }
2490 range = addrrange_make(int128_make64(addr), int128_make64(size));
2491
2492 view = address_space_to_flatview(as);
2493 fr = flatview_lookup(view, range);
2494 if (!fr) {
2495 return ret;
2496 }
2497
2498 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2499 --fr;
2500 }
2501
2502 ret.mr = fr->mr;
2503 ret.fv = view;
2504 range = addrrange_intersection(range, fr->addr);
2505 ret.offset_within_region = fr->offset_in_region;
2506 ret.offset_within_region += int128_get64(int128_sub(range.start,
2507 fr->addr.start));
2508 ret.size = range.size;
2509 ret.offset_within_address_space = int128_get64(range.start);
2510 ret.readonly = fr->readonly;
2511 return ret;
2512 }
2513
2514 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2515 hwaddr addr, uint64_t size)
2516 {
2517 MemoryRegionSection ret;
2518 rcu_read_lock();
2519 ret = memory_region_find_rcu(mr, addr, size);
2520 if (ret.mr) {
2521 memory_region_ref(ret.mr);
2522 }
2523 rcu_read_unlock();
2524 return ret;
2525 }
2526
2527 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2528 {
2529 MemoryRegion *mr;
2530
2531 rcu_read_lock();
2532 mr = memory_region_find_rcu(container, addr, 1).mr;
2533 rcu_read_unlock();
2534 return mr && mr != container;
2535 }
2536
2537 void memory_global_dirty_log_sync(void)
2538 {
2539 memory_region_sync_dirty_bitmap(NULL);
2540 }
2541
2542 static VMChangeStateEntry *vmstate_change;
2543
2544 void memory_global_dirty_log_start(void)
2545 {
2546 if (vmstate_change) {
2547 qemu_del_vm_change_state_handler(vmstate_change);
2548 vmstate_change = NULL;
2549 }
2550
2551 global_dirty_log = true;
2552
2553 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2554
2555 /* Refresh DIRTY_LOG_MIGRATION bit. */
2556 memory_region_transaction_begin();
2557 memory_region_update_pending = true;
2558 memory_region_transaction_commit();
2559 }
2560
2561 static void memory_global_dirty_log_do_stop(void)
2562 {
2563 global_dirty_log = false;
2564
2565 /* Refresh DIRTY_LOG_MIGRATION bit. */
2566 memory_region_transaction_begin();
2567 memory_region_update_pending = true;
2568 memory_region_transaction_commit();
2569
2570 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2571 }
2572
2573 static void memory_vm_change_state_handler(void *opaque, int running,
2574 RunState state)
2575 {
2576 if (running) {
2577 memory_global_dirty_log_do_stop();
2578
2579 if (vmstate_change) {
2580 qemu_del_vm_change_state_handler(vmstate_change);
2581 vmstate_change = NULL;
2582 }
2583 }
2584 }
2585
2586 void memory_global_dirty_log_stop(void)
2587 {
2588 if (!runstate_is_running()) {
2589 if (vmstate_change) {
2590 return;
2591 }
2592 vmstate_change = qemu_add_vm_change_state_handler(
2593 memory_vm_change_state_handler, NULL);
2594 return;
2595 }
2596
2597 memory_global_dirty_log_do_stop();
2598 }
2599
2600 static void listener_add_address_space(MemoryListener *listener,
2601 AddressSpace *as)
2602 {
2603 FlatView *view;
2604 FlatRange *fr;
2605
2606 if (listener->begin) {
2607 listener->begin(listener);
2608 }
2609 if (global_dirty_log) {
2610 if (listener->log_global_start) {
2611 listener->log_global_start(listener);
2612 }
2613 }
2614
2615 view = address_space_get_flatview(as);
2616 FOR_EACH_FLAT_RANGE(fr, view) {
2617 MemoryRegionSection section = section_from_flat_range(fr, view);
2618
2619 if (listener->region_add) {
2620 listener->region_add(listener, &section);
2621 }
2622 if (fr->dirty_log_mask && listener->log_start) {
2623 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2624 }
2625 }
2626 if (listener->commit) {
2627 listener->commit(listener);
2628 }
2629 flatview_unref(view);
2630 }
2631
2632 static void listener_del_address_space(MemoryListener *listener,
2633 AddressSpace *as)
2634 {
2635 FlatView *view;
2636 FlatRange *fr;
2637
2638 if (listener->begin) {
2639 listener->begin(listener);
2640 }
2641 view = address_space_get_flatview(as);
2642 FOR_EACH_FLAT_RANGE(fr, view) {
2643 MemoryRegionSection section = section_from_flat_range(fr, view);
2644
2645 if (fr->dirty_log_mask && listener->log_stop) {
2646 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2647 }
2648 if (listener->region_del) {
2649 listener->region_del(listener, &section);
2650 }
2651 }
2652 if (listener->commit) {
2653 listener->commit(listener);
2654 }
2655 flatview_unref(view);
2656 }
2657
2658 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2659 {
2660 MemoryListener *other = NULL;
2661
2662 listener->address_space = as;
2663 if (QTAILQ_EMPTY(&memory_listeners)
2664 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2665 memory_listeners)->priority) {
2666 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2667 } else {
2668 QTAILQ_FOREACH(other, &memory_listeners, link) {
2669 if (listener->priority < other->priority) {
2670 break;
2671 }
2672 }
2673 QTAILQ_INSERT_BEFORE(other, listener, link);
2674 }
2675
2676 if (QTAILQ_EMPTY(&as->listeners)
2677 || listener->priority >= QTAILQ_LAST(&as->listeners,
2678 memory_listeners)->priority) {
2679 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2680 } else {
2681 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2682 if (listener->priority < other->priority) {
2683 break;
2684 }
2685 }
2686 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2687 }
2688
2689 listener_add_address_space(listener, as);
2690 }
2691
2692 void memory_listener_unregister(MemoryListener *listener)
2693 {
2694 if (!listener->address_space) {
2695 return;
2696 }
2697
2698 listener_del_address_space(listener, listener->address_space);
2699 QTAILQ_REMOVE(&memory_listeners, listener, link);
2700 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2701 listener->address_space = NULL;
2702 }
2703
2704 bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
2705 {
2706 void *host;
2707 unsigned size = 0;
2708 unsigned offset = 0;
2709 Object *new_interface;
2710
2711 if (!mr || !mr->ops->request_ptr) {
2712 return false;
2713 }
2714
2715 /*
2716 * Avoid an update if the request_ptr call
2717 * memory_region_invalidate_mmio_ptr which seems to be likely when we use
2718 * a cache.
2719 */
2720 memory_region_transaction_begin();
2721
2722 host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
2723
2724 if (!host || !size) {
2725 memory_region_transaction_commit();
2726 return false;
2727 }
2728
2729 new_interface = object_new("mmio_interface");
2730 qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
2731 qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
2732 qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
2733 qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
2734 qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
2735 object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
2736
2737 memory_region_transaction_commit();
2738 return true;
2739 }
2740
2741 typedef struct MMIOPtrInvalidate {
2742 MemoryRegion *mr;
2743 hwaddr offset;
2744 unsigned size;
2745 int busy;
2746 int allocated;
2747 } MMIOPtrInvalidate;
2748
2749 #define MAX_MMIO_INVALIDATE 10
2750 static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
2751
2752 static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
2753 run_on_cpu_data data)
2754 {
2755 MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
2756 MemoryRegion *mr = invalidate_data->mr;
2757 hwaddr offset = invalidate_data->offset;
2758 unsigned size = invalidate_data->size;
2759 MemoryRegionSection section = memory_region_find(mr, offset, size);
2760
2761 qemu_mutex_lock_iothread();
2762
2763 /* Reset dirty so this doesn't happen later. */
2764 cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
2765
2766 if (section.mr != mr) {
2767 /* memory_region_find add a ref on section.mr */
2768 memory_region_unref(section.mr);
2769 if (MMIO_INTERFACE(section.mr->owner)) {
2770 /* We found the interface just drop it. */
2771 object_property_set_bool(section.mr->owner, false, "realized",
2772 NULL);
2773 object_unref(section.mr->owner);
2774 object_unparent(section.mr->owner);
2775 }
2776 }
2777
2778 qemu_mutex_unlock_iothread();
2779
2780 if (invalidate_data->allocated) {
2781 g_free(invalidate_data);
2782 } else {
2783 invalidate_data->busy = 0;
2784 }
2785 }
2786
2787 void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
2788 unsigned size)
2789 {
2790 size_t i;
2791 MMIOPtrInvalidate *invalidate_data = NULL;
2792
2793 for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
2794 if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
2795 invalidate_data = &mmio_ptr_invalidate_list[i];
2796 break;
2797 }
2798 }
2799
2800 if (!invalidate_data) {
2801 invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
2802 invalidate_data->allocated = 1;
2803 }
2804
2805 invalidate_data->mr = mr;
2806 invalidate_data->offset = offset;
2807 invalidate_data->size = size;
2808
2809 async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
2810 RUN_ON_CPU_HOST_PTR(invalidate_data));
2811 }
2812
2813 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2814 {
2815 memory_region_ref(root);
2816 as->root = root;
2817 as->current_map = NULL;
2818 as->ioeventfd_nb = 0;
2819 as->ioeventfds = NULL;
2820 QTAILQ_INIT(&as->listeners);
2821 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2822 as->name = g_strdup(name ? name : "anonymous");
2823 address_space_update_topology(as);
2824 address_space_update_ioeventfds(as);
2825 }
2826
2827 static void do_address_space_destroy(AddressSpace *as)
2828 {
2829 assert(QTAILQ_EMPTY(&as->listeners));
2830
2831 flatview_unref(as->current_map);
2832 g_free(as->name);
2833 g_free(as->ioeventfds);
2834 memory_region_unref(as->root);
2835 }
2836
2837 void address_space_destroy(AddressSpace *as)
2838 {
2839 MemoryRegion *root = as->root;
2840
2841 /* Flush out anything from MemoryListeners listening in on this */
2842 memory_region_transaction_begin();
2843 as->root = NULL;
2844 memory_region_transaction_commit();
2845 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2846
2847 /* At this point, as->dispatch and as->current_map are dummy
2848 * entries that the guest should never use. Wait for the old
2849 * values to expire before freeing the data.
2850 */
2851 as->root = root;
2852 call_rcu(as, do_address_space_destroy, rcu);
2853 }
2854
2855 static const char *memory_region_type(MemoryRegion *mr)
2856 {
2857 if (memory_region_is_ram_device(mr)) {
2858 return "ramd";
2859 } else if (memory_region_is_romd(mr)) {
2860 return "romd";
2861 } else if (memory_region_is_rom(mr)) {
2862 return "rom";
2863 } else if (memory_region_is_ram(mr)) {
2864 return "ram";
2865 } else {
2866 return "i/o";
2867 }
2868 }
2869
2870 typedef struct MemoryRegionList MemoryRegionList;
2871
2872 struct MemoryRegionList {
2873 const MemoryRegion *mr;
2874 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2875 };
2876
2877 typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
2878
2879 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2880 int128_sub((size), int128_one())) : 0)
2881 #define MTREE_INDENT " "
2882
2883 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2884 const MemoryRegion *mr, unsigned int level,
2885 hwaddr base,
2886 MemoryRegionListHead *alias_print_queue)
2887 {
2888 MemoryRegionList *new_ml, *ml, *next_ml;
2889 MemoryRegionListHead submr_print_queue;
2890 const MemoryRegion *submr;
2891 unsigned int i;
2892 hwaddr cur_start, cur_end;
2893
2894 if (!mr) {
2895 return;
2896 }
2897
2898 for (i = 0; i < level; i++) {
2899 mon_printf(f, MTREE_INDENT);
2900 }
2901
2902 cur_start = base + mr->addr;
2903 cur_end = cur_start + MR_SIZE(mr->size);
2904
2905 /*
2906 * Try to detect overflow of memory region. This should never
2907 * happen normally. When it happens, we dump something to warn the
2908 * user who is observing this.
2909 */
2910 if (cur_start < base || cur_end < cur_start) {
2911 mon_printf(f, "[DETECTED OVERFLOW!] ");
2912 }
2913
2914 if (mr->alias) {
2915 MemoryRegionList *ml;
2916 bool found = false;
2917
2918 /* check if the alias is already in the queue */
2919 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2920 if (ml->mr == mr->alias) {
2921 found = true;
2922 }
2923 }
2924
2925 if (!found) {
2926 ml = g_new(MemoryRegionList, 1);
2927 ml->mr = mr->alias;
2928 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2929 }
2930 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2931 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2932 "-" TARGET_FMT_plx "%s\n",
2933 cur_start, cur_end,
2934 mr->priority,
2935 memory_region_type((MemoryRegion *)mr),
2936 memory_region_name(mr),
2937 memory_region_name(mr->alias),
2938 mr->alias_offset,
2939 mr->alias_offset + MR_SIZE(mr->size),
2940 mr->enabled ? "" : " [disabled]");
2941 } else {
2942 mon_printf(f,
2943 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
2944 cur_start, cur_end,
2945 mr->priority,
2946 memory_region_type((MemoryRegion *)mr),
2947 memory_region_name(mr),
2948 mr->enabled ? "" : " [disabled]");
2949 }
2950
2951 QTAILQ_INIT(&submr_print_queue);
2952
2953 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2954 new_ml = g_new(MemoryRegionList, 1);
2955 new_ml->mr = submr;
2956 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2957 if (new_ml->mr->addr < ml->mr->addr ||
2958 (new_ml->mr->addr == ml->mr->addr &&
2959 new_ml->mr->priority > ml->mr->priority)) {
2960 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2961 new_ml = NULL;
2962 break;
2963 }
2964 }
2965 if (new_ml) {
2966 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2967 }
2968 }
2969
2970 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2971 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2972 alias_print_queue);
2973 }
2974
2975 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2976 g_free(ml);
2977 }
2978 }
2979
2980 struct FlatViewInfo {
2981 fprintf_function mon_printf;
2982 void *f;
2983 int counter;
2984 bool dispatch_tree;
2985 };
2986
2987 static void mtree_print_flatview(gpointer key, gpointer value,
2988 gpointer user_data)
2989 {
2990 FlatView *view = key;
2991 GArray *fv_address_spaces = value;
2992 struct FlatViewInfo *fvi = user_data;
2993 fprintf_function p = fvi->mon_printf;
2994 void *f = fvi->f;
2995 FlatRange *range = &view->ranges[0];
2996 MemoryRegion *mr;
2997 int n = view->nr;
2998 int i;
2999 AddressSpace *as;
3000
3001 p(f, "FlatView #%d\n", fvi->counter);
3002 ++fvi->counter;
3003
3004 for (i = 0; i < fv_address_spaces->len; ++i) {
3005 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3006 p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
3007 if (as->root->alias) {
3008 p(f, ", alias %s", memory_region_name(as->root->alias));
3009 }
3010 p(f, "\n");
3011 }
3012
3013 p(f, " Root memory region: %s\n",
3014 view->root ? memory_region_name(view->root) : "(none)");
3015
3016 if (n <= 0) {
3017 p(f, MTREE_INDENT "No rendered FlatView\n\n");
3018 return;
3019 }
3020
3021 while (n--) {
3022 mr = range->mr;
3023 if (range->offset_in_region) {
3024 p(f, MTREE_INDENT TARGET_FMT_plx "-"
3025 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
3026 int128_get64(range->addr.start),
3027 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
3028 mr->priority,
3029 range->readonly ? "rom" : memory_region_type(mr),
3030 memory_region_name(mr),
3031 range->offset_in_region);
3032 } else {
3033 p(f, MTREE_INDENT TARGET_FMT_plx "-"
3034 TARGET_FMT_plx " (prio %d, %s): %s\n",
3035 int128_get64(range->addr.start),
3036 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
3037 mr->priority,
3038 range->readonly ? "rom" : memory_region_type(mr),
3039 memory_region_name(mr));
3040 }
3041 range++;
3042 }
3043
3044 #if !defined(CONFIG_USER_ONLY)
3045 if (fvi->dispatch_tree && view->root) {
3046 mtree_print_dispatch(p, f, view->dispatch, view->root);
3047 }
3048 #endif
3049
3050 p(f, "\n");
3051 }
3052
3053 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3054 gpointer user_data)
3055 {
3056 FlatView *view = key;
3057 GArray *fv_address_spaces = value;
3058
3059 g_array_unref(fv_address_spaces);
3060 flatview_unref(view);
3061
3062 return true;
3063 }
3064
3065 void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
3066 bool dispatch_tree)
3067 {
3068 MemoryRegionListHead ml_head;
3069 MemoryRegionList *ml, *ml2;
3070 AddressSpace *as;
3071
3072 if (flatview) {
3073 FlatView *view;
3074 struct FlatViewInfo fvi = {
3075 .mon_printf = mon_printf,
3076 .f = f,
3077 .counter = 0,
3078 .dispatch_tree = dispatch_tree
3079 };
3080 GArray *fv_address_spaces;
3081 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3082
3083 /* Gather all FVs in one table */
3084 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3085 view = address_space_get_flatview(as);
3086
3087 fv_address_spaces = g_hash_table_lookup(views, view);
3088 if (!fv_address_spaces) {
3089 fv_address_spaces = g_array_new(false, false, sizeof(as));
3090 g_hash_table_insert(views, view, fv_address_spaces);
3091 }
3092
3093 g_array_append_val(fv_address_spaces, as);
3094 }
3095
3096 /* Print */
3097 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3098
3099 /* Free */
3100 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3101 g_hash_table_unref(views);
3102
3103 return;
3104 }
3105
3106 QTAILQ_INIT(&ml_head);
3107
3108 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3109 mon_printf(f, "address-space: %s\n", as->name);
3110 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
3111 mon_printf(f, "\n");
3112 }
3113
3114 /* print aliased regions */
3115 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3116 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
3117 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
3118 mon_printf(f, "\n");
3119 }
3120
3121 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3122 g_free(ml);
3123 }
3124 }
3125
3126 void memory_region_init_ram(MemoryRegion *mr,
3127 struct Object *owner,
3128 const char *name,
3129 uint64_t size,
3130 Error **errp)
3131 {
3132 DeviceState *owner_dev;
3133 Error *err = NULL;
3134
3135 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3136 if (err) {
3137 error_propagate(errp, err);
3138 return;
3139 }
3140 /* This will assert if owner is neither NULL nor a DeviceState.
3141 * We only want the owner here for the purposes of defining a
3142 * unique name for migration. TODO: Ideally we should implement
3143 * a naming scheme for Objects which are not DeviceStates, in
3144 * which case we can relax this restriction.
3145 */
3146 owner_dev = DEVICE(owner);
3147 vmstate_register_ram(mr, owner_dev);
3148 }
3149
3150 void memory_region_init_rom(MemoryRegion *mr,
3151 struct Object *owner,
3152 const char *name,
3153 uint64_t size,
3154 Error **errp)
3155 {
3156 DeviceState *owner_dev;
3157 Error *err = NULL;
3158
3159 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3160 if (err) {
3161 error_propagate(errp, err);
3162 return;
3163 }
3164 /* This will assert if owner is neither NULL nor a DeviceState.
3165 * We only want the owner here for the purposes of defining a
3166 * unique name for migration. TODO: Ideally we should implement
3167 * a naming scheme for Objects which are not DeviceStates, in
3168 * which case we can relax this restriction.
3169 */
3170 owner_dev = DEVICE(owner);
3171 vmstate_register_ram(mr, owner_dev);
3172 }
3173
3174 void memory_region_init_rom_device(MemoryRegion *mr,
3175 struct Object *owner,
3176 const MemoryRegionOps *ops,
3177 void *opaque,
3178 const char *name,
3179 uint64_t size,
3180 Error **errp)
3181 {
3182 DeviceState *owner_dev;
3183 Error *err = NULL;
3184
3185 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3186 name, size, &err);
3187 if (err) {
3188 error_propagate(errp, err);
3189 return;
3190 }
3191 /* This will assert if owner is neither NULL nor a DeviceState.
3192 * We only want the owner here for the purposes of defining a
3193 * unique name for migration. TODO: Ideally we should implement
3194 * a naming scheme for Objects which are not DeviceStates, in
3195 * which case we can relax this restriction.
3196 */
3197 owner_dev = DEVICE(owner);
3198 vmstate_register_ram(mr, owner_dev);
3199 }
3200
3201 static const TypeInfo memory_region_info = {
3202 .parent = TYPE_OBJECT,
3203 .name = TYPE_MEMORY_REGION,
3204 .instance_size = sizeof(MemoryRegion),
3205 .instance_init = memory_region_initfn,
3206 .instance_finalize = memory_region_finalize,
3207 };
3208
3209 static const TypeInfo iommu_memory_region_info = {
3210 .parent = TYPE_MEMORY_REGION,
3211 .name = TYPE_IOMMU_MEMORY_REGION,
3212 .class_size = sizeof(IOMMUMemoryRegionClass),
3213 .instance_size = sizeof(IOMMUMemoryRegion),
3214 .instance_init = iommu_memory_region_initfn,
3215 .abstract = true,
3216 };
3217
3218 static void memory_register_types(void)
3219 {
3220 type_register_static(&memory_region_info);
3221 type_register_static(&iommu_memory_region_info);
3222 }
3223
3224 type_init(memory_register_types)
AR7 emulation for QEMU