change pvscsi_init_msi() type to void
[qemu/ar7.git] / target-alpha / mem_helper.c
blob7f4d15fef261ad5b7931af521193b7c110bf061a
1 /*
2 * Helpers for loads and stores
4 * Copyright (c) 2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "exec/helper-proto.h"
23 #include "exec/exec-all.h"
24 #include "exec/cpu_ldst.h"
26 /* Softmmu support */
27 #ifndef CONFIG_USER_ONLY
29 uint64_t helper_ldl_phys(CPUAlphaState *env, uint64_t p)
31 CPUState *cs = CPU(alpha_env_get_cpu(env));
32 return (int32_t)ldl_phys(cs->as, p);
35 uint64_t helper_ldq_phys(CPUAlphaState *env, uint64_t p)
37 CPUState *cs = CPU(alpha_env_get_cpu(env));
38 return ldq_phys(cs->as, p);
41 uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
43 CPUState *cs = CPU(alpha_env_get_cpu(env));
44 env->lock_addr = p;
45 return env->lock_value = (int32_t)ldl_phys(cs->as, p);
48 uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
50 CPUState *cs = CPU(alpha_env_get_cpu(env));
51 env->lock_addr = p;
52 return env->lock_value = ldq_phys(cs->as, p);
55 void helper_stl_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
57 CPUState *cs = CPU(alpha_env_get_cpu(env));
58 stl_phys(cs->as, p, v);
61 void helper_stq_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
63 CPUState *cs = CPU(alpha_env_get_cpu(env));
64 stq_phys(cs->as, p, v);
67 uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
69 CPUState *cs = CPU(alpha_env_get_cpu(env));
70 uint64_t ret = 0;
72 if (p == env->lock_addr) {
73 int32_t old = ldl_phys(cs->as, p);
74 if (old == (int32_t)env->lock_value) {
75 stl_phys(cs->as, p, v);
76 ret = 1;
79 env->lock_addr = -1;
81 return ret;
84 uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
86 CPUState *cs = CPU(alpha_env_get_cpu(env));
87 uint64_t ret = 0;
89 if (p == env->lock_addr) {
90 uint64_t old = ldq_phys(cs->as, p);
91 if (old == env->lock_value) {
92 stq_phys(cs->as, p, v);
93 ret = 1;
96 env->lock_addr = -1;
98 return ret;
101 void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
102 int is_write, int is_user, uintptr_t retaddr)
104 AlphaCPU *cpu = ALPHA_CPU(cs);
105 CPUAlphaState *env = &cpu->env;
106 uint64_t pc;
107 uint32_t insn;
109 if (retaddr) {
110 cpu_restore_state(cs, retaddr);
113 pc = env->pc;
114 insn = cpu_ldl_code(env, pc);
116 env->trap_arg0 = addr;
117 env->trap_arg1 = insn >> 26; /* opcode */
118 env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
119 cs->exception_index = EXCP_UNALIGN;
120 env->error_code = 0;
121 cpu_loop_exit(cs);
124 void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
125 bool is_write, bool is_exec, int unused,
126 unsigned size)
128 AlphaCPU *cpu = ALPHA_CPU(cs);
129 CPUAlphaState *env = &cpu->env;
131 env->trap_arg0 = addr;
132 env->trap_arg1 = is_write ? 1 : 0;
133 cs->exception_index = EXCP_MCHK;
134 env->error_code = 0;
136 /* ??? We should cpu_restore_state to the faulting insn, but this hook
137 does not have access to the retaddr value from the original helper.
138 It's all moot until the QEMU PALcode grows an MCHK handler. */
140 cpu_loop_exit(cs);
143 /* try to fill the TLB and return an exception if error. If retaddr is
144 NULL, it means that the function was called in C code (i.e. not
145 from generated code or from helper.c) */
146 /* XXX: fix it to restore all registers */
147 void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
148 int mmu_idx, uintptr_t retaddr)
150 int ret;
152 ret = alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
153 if (unlikely(ret != 0)) {
154 if (retaddr) {
155 cpu_restore_state(cs, retaddr);
157 /* Exception index and error code are already set */
158 cpu_loop_exit(cs);
161 #endif /* CONFIG_USER_ONLY */