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Merge remote-tracking branch 'qemu/master'
[qemu/ar7.git] / memory.c
blob8de991eb69995a1258023a9a5f946475a3557eea
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
21 #include "exec/memory.h"
22 #include "exec/address-spaces.h"
23 #include "exec/ioport.h"
24 #include "qapi/visitor.h"
25 #include "qemu/bitops.h"
26 #include "qemu/error-report.h"
27 #include "qom/object.h"
28 #include "trace.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/sysemu.h"
34
35 //#define DEBUG_UNASSIGNED
36
37 static unsigned memory_region_transaction_depth;
38 static bool memory_region_update_pending;
39 static bool ioeventfd_update_pending;
40 static bool global_dirty_log = false;
41
42 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
43 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
44
45 static QTAILQ_HEAD(, AddressSpace) address_spaces
46 = QTAILQ_HEAD_INITIALIZER(address_spaces);
47
48 typedef struct AddrRange AddrRange;
49
50 /*
51 * Note that signed integers are needed for negative offsetting in aliases
52 * (large MemoryRegion::alias_offset).
53 */
54 struct AddrRange {
55 Int128 start;
56 Int128 size;
57 };
58
59 static AddrRange addrrange_make(Int128 start, Int128 size)
60 {
61 return (AddrRange) { start, size };
62 }
63
64 static bool addrrange_equal(AddrRange r1, AddrRange r2)
65 {
66 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
67 }
68
69 static Int128 addrrange_end(AddrRange r)
70 {
71 return int128_add(r.start, r.size);
72 }
73
74 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
75 {
76 int128_addto(&range.start, delta);
77 return range;
78 }
79
80 static bool addrrange_contains(AddrRange range, Int128 addr)
81 {
82 return int128_ge(addr, range.start)
83 && int128_lt(addr, addrrange_end(range));
84 }
85
86 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
87 {
88 return addrrange_contains(r1, r2.start)
89 || addrrange_contains(r2, r1.start);
90 }
91
92 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
93 {
94 Int128 start = int128_max(r1.start, r2.start);
95 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
96 return addrrange_make(start, int128_sub(end, start));
97 }
98
99 enum ListenerDirection { Forward, Reverse };
100
101 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
102 do { \
103 MemoryListener *_listener; \
104 \
105 switch (_direction) { \
106 case Forward: \
107 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
108 if (_listener->_callback) { \
109 _listener->_callback(_listener, ##_args); \
110 } \
111 } \
112 break; \
113 case Reverse: \
114 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
115 memory_listeners, link) { \
116 if (_listener->_callback) { \
117 _listener->_callback(_listener, ##_args); \
118 } \
119 } \
120 break; \
121 default: \
122 abort(); \
123 } \
124 } while (0)
125
126 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
127 do { \
128 MemoryListener *_listener; \
129 struct memory_listeners_as *list = &(_as)->listeners; \
130 \
131 switch (_direction) { \
132 case Forward: \
133 QTAILQ_FOREACH(_listener, list, link_as) { \
134 if (_listener->_callback) { \
135 _listener->_callback(_listener, _section, ##_args); \
136 } \
137 } \
138 break; \
139 case Reverse: \
140 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
141 link_as) { \
142 if (_listener->_callback) { \
143 _listener->_callback(_listener, _section, ##_args); \
144 } \
145 } \
146 break; \
147 default: \
148 abort(); \
149 } \
150 } while (0)
151
152 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
153 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
154 do { \
155 MemoryRegionSection mrs = section_from_flat_range(fr, as); \
156 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
157 } while(0)
158
159 struct CoalescedMemoryRange {
160 AddrRange addr;
161 QTAILQ_ENTRY(CoalescedMemoryRange) link;
162 };
163
164 struct MemoryRegionIoeventfd {
165 AddrRange addr;
166 bool match_data;
167 uint64_t data;
168 EventNotifier *e;
169 };
170
171 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
172 MemoryRegionIoeventfd b)
173 {
174 if (int128_lt(a.addr.start, b.addr.start)) {
175 return true;
176 } else if (int128_gt(a.addr.start, b.addr.start)) {
177 return false;
178 } else if (int128_lt(a.addr.size, b.addr.size)) {
179 return true;
180 } else if (int128_gt(a.addr.size, b.addr.size)) {
181 return false;
182 } else if (a.match_data < b.match_data) {
183 return true;
184 } else if (a.match_data > b.match_data) {
185 return false;
186 } else if (a.match_data) {
187 if (a.data < b.data) {
188 return true;
189 } else if (a.data > b.data) {
190 return false;
191 }
192 }
193 if (a.e < b.e) {
194 return true;
195 } else if (a.e > b.e) {
196 return false;
197 }
198 return false;
199 }
200
201 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
202 MemoryRegionIoeventfd b)
203 {
204 return !memory_region_ioeventfd_before(a, b)
205 && !memory_region_ioeventfd_before(b, a);
206 }
207
208 typedef struct FlatRange FlatRange;
209 typedef struct FlatView FlatView;
210
211 /* Range of memory in the global map. Addresses are absolute. */
212 struct FlatRange {
213 MemoryRegion *mr;
214 hwaddr offset_in_region;
215 AddrRange addr;
216 uint8_t dirty_log_mask;
217 bool romd_mode;
218 bool readonly;
219 };
220
221 /* Flattened global view of current active memory hierarchy. Kept in sorted
222 * order.
223 */
224 struct FlatView {
225 struct rcu_head rcu;
226 unsigned ref;
227 FlatRange *ranges;
228 unsigned nr;
229 unsigned nr_allocated;
230 };
231
232 typedef struct AddressSpaceOps AddressSpaceOps;
233
234 #define FOR_EACH_FLAT_RANGE(var, view) \
235 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
236
237 static inline MemoryRegionSection
238 section_from_flat_range(FlatRange *fr, AddressSpace *as)
239 {
240 return (MemoryRegionSection) {
241 .mr = fr->mr,
242 .address_space = as,
243 .offset_within_region = fr->offset_in_region,
244 .size = fr->addr.size,
245 .offset_within_address_space = int128_get64(fr->addr.start),
246 .readonly = fr->readonly,
247 };
248 }
249
250 static bool flatrange_equal(FlatRange *a, FlatRange *b)
251 {
252 return a->mr == b->mr
253 && addrrange_equal(a->addr, b->addr)
254 && a->offset_in_region == b->offset_in_region
255 && a->romd_mode == b->romd_mode
256 && a->readonly == b->readonly;
257 }
258
259 static void flatview_init(FlatView *view)
260 {
261 view->ref = 1;
262 view->ranges = NULL;
263 view->nr = 0;
264 view->nr_allocated = 0;
265 }
266
267 /* Insert a range into a given position. Caller is responsible for maintaining
268 * sorting order.
269 */
270 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
271 {
272 if (view->nr == view->nr_allocated) {
273 view->nr_allocated = MAX(2 * view->nr, 10);
274 view->ranges = g_realloc(view->ranges,
275 view->nr_allocated * sizeof(*view->ranges));
276 }
277 memmove(view->ranges + pos + 1, view->ranges + pos,
278 (view->nr - pos) * sizeof(FlatRange));
279 view->ranges[pos] = *range;
280 memory_region_ref(range->mr);
281 ++view->nr;
282 }
283
284 static void flatview_destroy(FlatView *view)
285 {
286 int i;
287
288 for (i = 0; i < view->nr; i++) {
289 memory_region_unref(view->ranges[i].mr);
290 }
291 g_free(view->ranges);
292 g_free(view);
293 }
294
295 static void flatview_ref(FlatView *view)
296 {
297 atomic_inc(&view->ref);
298 }
299
300 static void flatview_unref(FlatView *view)
301 {
302 if (atomic_fetch_dec(&view->ref) == 1) {
303 flatview_destroy(view);
304 }
305 }
306
307 static bool can_merge(FlatRange *r1, FlatRange *r2)
308 {
309 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
310 && r1->mr == r2->mr
311 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
312 r1->addr.size),
313 int128_make64(r2->offset_in_region))
314 && r1->dirty_log_mask == r2->dirty_log_mask
315 && r1->romd_mode == r2->romd_mode
316 && r1->readonly == r2->readonly;
317 }
318
319 /* Attempt to simplify a view by merging adjacent ranges */
320 static void flatview_simplify(FlatView *view)
321 {
322 unsigned i, j;
323
324 i = 0;
325 while (i < view->nr) {
326 j = i + 1;
327 while (j < view->nr
328 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
329 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
330 ++j;
331 }
332 ++i;
333 memmove(&view->ranges[i], &view->ranges[j],
334 (view->nr - j) * sizeof(view->ranges[j]));
335 view->nr -= j - i;
336 }
337 }
338
339 static bool memory_region_big_endian(MemoryRegion *mr)
340 {
341 #ifdef TARGET_WORDS_BIGENDIAN
342 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
343 #else
344 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
345 #endif
346 }
347
348 static bool memory_region_wrong_endianness(MemoryRegion *mr)
349 {
350 #ifdef TARGET_WORDS_BIGENDIAN
351 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
352 #else
353 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
354 #endif
355 }
356
357 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
358 {
359 if (memory_region_wrong_endianness(mr)) {
360 switch (size) {
361 case 1:
362 break;
363 case 2:
364 *data = bswap16(*data);
365 break;
366 case 4:
367 *data = bswap32(*data);
368 break;
369 case 8:
370 *data = bswap64(*data);
371 break;
372 default:
373 abort();
374 }
375 }
376 }
377
378 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
379 {
380 MemoryRegion *root;
381 hwaddr abs_addr = offset;
382
383 abs_addr += mr->addr;
384 for (root = mr; root->container; ) {
385 root = root->container;
386 abs_addr += root->addr;
387 }
388
389 return abs_addr;
390 }
391
392 static int get_cpu_index(void)
393 {
394 if (current_cpu) {
395 return current_cpu->cpu_index;
396 }
397 return -1;
398 }
399
400 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
401 hwaddr addr,
402 uint64_t *value,
403 unsigned size,
404 unsigned shift,
405 uint64_t mask,
406 MemTxAttrs attrs)
407 {
408 uint64_t tmp;
409
410 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
411 if (mr->subpage) {
412 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
413 } else if (mr == &io_mem_notdirty) {
414 /* Accesses to code which has previously been translated into a TB show
415 * up in the MMIO path, as accesses to the io_mem_notdirty
416 * MemoryRegion. */
417 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
418 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
419 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
420 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
421 }
422 *value |= (tmp & mask) << shift;
423 return MEMTX_OK;
424 }
425
426 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
427 hwaddr addr,
428 uint64_t *value,
429 unsigned size,
430 unsigned shift,
431 uint64_t mask,
432 MemTxAttrs attrs)
433 {
434 uint64_t tmp;
435
436 tmp = mr->ops->read(mr->opaque, addr, size);
437 if (mr->subpage) {
438 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
439 } else if (mr == &io_mem_notdirty) {
440 /* Accesses to code which has previously been translated into a TB show
441 * up in the MMIO path, as accesses to the io_mem_notdirty
442 * MemoryRegion. */
443 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
444 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
445 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
446 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
447 }
448 *value |= (tmp & mask) << shift;
449 return MEMTX_OK;
450 }
451
452 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
453 hwaddr addr,
454 uint64_t *value,
455 unsigned size,
456 unsigned shift,
457 uint64_t mask,
458 MemTxAttrs attrs)
459 {
460 uint64_t tmp = 0;
461 MemTxResult r;
462
463 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
464 if (mr->subpage) {
465 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
466 } else if (mr == &io_mem_notdirty) {
467 /* Accesses to code which has previously been translated into a TB show
468 * up in the MMIO path, as accesses to the io_mem_notdirty
469 * MemoryRegion. */
470 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
471 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
474 }
475 *value |= (tmp & mask) << shift;
476 return r;
477 }
478
479 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
480 hwaddr addr,
481 uint64_t *value,
482 unsigned size,
483 unsigned shift,
484 uint64_t mask,
485 MemTxAttrs attrs)
486 {
487 uint64_t tmp;
488
489 tmp = (*value >> shift) & mask;
490 if (mr->subpage) {
491 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
492 } else if (mr == &io_mem_notdirty) {
493 /* Accesses to code which has previously been translated into a TB show
494 * up in the MMIO path, as accesses to the io_mem_notdirty
495 * MemoryRegion. */
496 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
497 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
498 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
499 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
500 }
501 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
502 return MEMTX_OK;
503 }
504
505 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
506 hwaddr addr,
507 uint64_t *value,
508 unsigned size,
509 unsigned shift,
510 uint64_t mask,
511 MemTxAttrs attrs)
512 {
513 uint64_t tmp;
514
515 tmp = (*value >> shift) & mask;
516 if (mr->subpage) {
517 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
518 } else if (mr == &io_mem_notdirty) {
519 /* Accesses to code which has previously been translated into a TB show
520 * up in the MMIO path, as accesses to the io_mem_notdirty
521 * MemoryRegion. */
522 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
523 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
524 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
525 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
526 }
527 mr->ops->write(mr->opaque, addr, tmp, size);
528 return MEMTX_OK;
529 }
530
531 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
532 hwaddr addr,
533 uint64_t *value,
534 unsigned size,
535 unsigned shift,
536 uint64_t mask,
537 MemTxAttrs attrs)
538 {
539 uint64_t tmp;
540
541 tmp = (*value >> shift) & mask;
542 if (mr->subpage) {
543 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
544 } else if (mr == &io_mem_notdirty) {
545 /* Accesses to code which has previously been translated into a TB show
546 * up in the MMIO path, as accesses to the io_mem_notdirty
547 * MemoryRegion. */
548 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
549 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
550 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
551 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
552 }
553 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
554 }
555
556 static MemTxResult access_with_adjusted_size(hwaddr addr,
557 uint64_t *value,
558 unsigned size,
559 unsigned access_size_min,
560 unsigned access_size_max,
561 MemTxResult (*access)(MemoryRegion *mr,
562 hwaddr addr,
563 uint64_t *value,
564 unsigned size,
565 unsigned shift,
566 uint64_t mask,
567 MemTxAttrs attrs),
568 MemoryRegion *mr,
569 MemTxAttrs attrs)
570 {
571 uint64_t access_mask;
572 unsigned access_size;
573 unsigned i;
574 MemTxResult r = MEMTX_OK;
575
576 if (!access_size_min) {
577 access_size_min = 1;
578 }
579 if (!access_size_max) {
580 access_size_max = 4;
581 }
582
583 /* FIXME: support unaligned access? */
584 access_size = MAX(MIN(size, access_size_max), access_size_min);
585 access_mask = -1ULL >> (64 - access_size * 8);
586 if (memory_region_big_endian(mr)) {
587 for (i = 0; i < size; i += access_size) {
588 r |= access(mr, addr + i, value, access_size,
589 (size - access_size - i) * 8, access_mask, attrs);
590 }
591 } else {
592 for (i = 0; i < size; i += access_size) {
593 r |= access(mr, addr + i, value, access_size, i * 8,
594 access_mask, attrs);
595 }
596 }
597 return r;
598 }
599
600 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
601 {
602 AddressSpace *as;
603
604 while (mr->container) {
605 mr = mr->container;
606 }
607 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
608 if (mr == as->root) {
609 return as;
610 }
611 }
612 return NULL;
613 }
614
615 /* Render a memory region into the global view. Ranges in @view obscure
616 * ranges in @mr.
617 */
618 static void render_memory_region(FlatView *view,
619 MemoryRegion *mr,
620 Int128 base,
621 AddrRange clip,
622 bool readonly)
623 {
624 MemoryRegion *subregion;
625 unsigned i;
626 hwaddr offset_in_region;
627 Int128 remain;
628 Int128 now;
629 FlatRange fr;
630 AddrRange tmp;
631
632 if (!mr->enabled) {
633 return;
634 }
635
636 int128_addto(&base, int128_make64(mr->addr));
637 readonly |= mr->readonly;
638
639 tmp = addrrange_make(base, mr->size);
640
641 if (!addrrange_intersects(tmp, clip)) {
642 return;
643 }
644
645 clip = addrrange_intersection(tmp, clip);
646
647 if (mr->alias) {
648 int128_subfrom(&base, int128_make64(mr->alias->addr));
649 int128_subfrom(&base, int128_make64(mr->alias_offset));
650 render_memory_region(view, mr->alias, base, clip, readonly);
651 return;
652 }
653
654 /* Render subregions in priority order. */
655 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
656 render_memory_region(view, subregion, base, clip, readonly);
657 }
658
659 if (!mr->terminates) {
660 return;
661 }
662
663 offset_in_region = int128_get64(int128_sub(clip.start, base));
664 base = clip.start;
665 remain = clip.size;
666
667 fr.mr = mr;
668 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
669 fr.romd_mode = mr->romd_mode;
670 fr.readonly = readonly;
671
672 /* Render the region itself into any gaps left by the current view. */
673 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
674 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
675 continue;
676 }
677 if (int128_lt(base, view->ranges[i].addr.start)) {
678 now = int128_min(remain,
679 int128_sub(view->ranges[i].addr.start, base));
680 fr.offset_in_region = offset_in_region;
681 fr.addr = addrrange_make(base, now);
682 flatview_insert(view, i, &fr);
683 ++i;
684 int128_addto(&base, now);
685 offset_in_region += int128_get64(now);
686 int128_subfrom(&remain, now);
687 }
688 now = int128_sub(int128_min(int128_add(base, remain),
689 addrrange_end(view->ranges[i].addr)),
690 base);
691 int128_addto(&base, now);
692 offset_in_region += int128_get64(now);
693 int128_subfrom(&remain, now);
694 }
695 if (int128_nz(remain)) {
696 fr.offset_in_region = offset_in_region;
697 fr.addr = addrrange_make(base, remain);
698 flatview_insert(view, i, &fr);
699 }
700 }
701
702 /* Render a memory topology into a list of disjoint absolute ranges. */
703 static FlatView *generate_memory_topology(MemoryRegion *mr)
704 {
705 FlatView *view;
706
707 view = g_new(FlatView, 1);
708 flatview_init(view);
709
710 if (mr) {
711 render_memory_region(view, mr, int128_zero(),
712 addrrange_make(int128_zero(), int128_2_64()), false);
713 }
714 flatview_simplify(view);
715
716 return view;
717 }
718
719 static void address_space_add_del_ioeventfds(AddressSpace *as,
720 MemoryRegionIoeventfd *fds_new,
721 unsigned fds_new_nb,
722 MemoryRegionIoeventfd *fds_old,
723 unsigned fds_old_nb)
724 {
725 unsigned iold, inew;
726 MemoryRegionIoeventfd *fd;
727 MemoryRegionSection section;
728
729 /* Generate a symmetric difference of the old and new fd sets, adding
730 * and deleting as necessary.
731 */
732
733 iold = inew = 0;
734 while (iold < fds_old_nb || inew < fds_new_nb) {
735 if (iold < fds_old_nb
736 && (inew == fds_new_nb
737 || memory_region_ioeventfd_before(fds_old[iold],
738 fds_new[inew]))) {
739 fd = &fds_old[iold];
740 section = (MemoryRegionSection) {
741 .address_space = as,
742 .offset_within_address_space = int128_get64(fd->addr.start),
743 .size = fd->addr.size,
744 };
745 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
746 fd->match_data, fd->data, fd->e);
747 ++iold;
748 } else if (inew < fds_new_nb
749 && (iold == fds_old_nb
750 || memory_region_ioeventfd_before(fds_new[inew],
751 fds_old[iold]))) {
752 fd = &fds_new[inew];
753 section = (MemoryRegionSection) {
754 .address_space = as,
755 .offset_within_address_space = int128_get64(fd->addr.start),
756 .size = fd->addr.size,
757 };
758 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
759 fd->match_data, fd->data, fd->e);
760 ++inew;
761 } else {
762 ++iold;
763 ++inew;
764 }
765 }
766 }
767
768 static FlatView *address_space_get_flatview(AddressSpace *as)
769 {
770 FlatView *view;
771
772 rcu_read_lock();
773 view = atomic_rcu_read(&as->current_map);
774 flatview_ref(view);
775 rcu_read_unlock();
776 return view;
777 }
778
779 static void address_space_update_ioeventfds(AddressSpace *as)
780 {
781 FlatView *view;
782 FlatRange *fr;
783 unsigned ioeventfd_nb = 0;
784 MemoryRegionIoeventfd *ioeventfds = NULL;
785 AddrRange tmp;
786 unsigned i;
787
788 view = address_space_get_flatview(as);
789 FOR_EACH_FLAT_RANGE(fr, view) {
790 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
791 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
792 int128_sub(fr->addr.start,
793 int128_make64(fr->offset_in_region)));
794 if (addrrange_intersects(fr->addr, tmp)) {
795 ++ioeventfd_nb;
796 ioeventfds = g_realloc(ioeventfds,
797 ioeventfd_nb * sizeof(*ioeventfds));
798 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
799 ioeventfds[ioeventfd_nb-1].addr = tmp;
800 }
801 }
802 }
803
804 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
805 as->ioeventfds, as->ioeventfd_nb);
806
807 g_free(as->ioeventfds);
808 as->ioeventfds = ioeventfds;
809 as->ioeventfd_nb = ioeventfd_nb;
810 flatview_unref(view);
811 }
812
813 static void address_space_update_topology_pass(AddressSpace *as,
814 const FlatView *old_view,
815 const FlatView *new_view,
816 bool adding)
817 {
818 unsigned iold, inew;
819 FlatRange *frold, *frnew;
820
821 /* Generate a symmetric difference of the old and new memory maps.
822 * Kill ranges in the old map, and instantiate ranges in the new map.
823 */
824 iold = inew = 0;
825 while (iold < old_view->nr || inew < new_view->nr) {
826 if (iold < old_view->nr) {
827 frold = &old_view->ranges[iold];
828 } else {
829 frold = NULL;
830 }
831 if (inew < new_view->nr) {
832 frnew = &new_view->ranges[inew];
833 } else {
834 frnew = NULL;
835 }
836
837 if (frold
838 && (!frnew
839 || int128_lt(frold->addr.start, frnew->addr.start)
840 || (int128_eq(frold->addr.start, frnew->addr.start)
841 && !flatrange_equal(frold, frnew)))) {
842 /* In old but not in new, or in both but attributes changed. */
843
844 if (!adding) {
845 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
846 }
847
848 ++iold;
849 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
850 /* In both and unchanged (except logging may have changed) */
851
852 if (adding) {
853 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
854 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
855 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
856 frold->dirty_log_mask,
857 frnew->dirty_log_mask);
858 }
859 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
860 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
861 frold->dirty_log_mask,
862 frnew->dirty_log_mask);
863 }
864 }
865
866 ++iold;
867 ++inew;
868 } else {
869 /* In new */
870
871 if (adding) {
872 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
873 }
874
875 ++inew;
876 }
877 }
878 }
879
880
881 static void address_space_update_topology(AddressSpace *as)
882 {
883 FlatView *old_view = address_space_get_flatview(as);
884 FlatView *new_view = generate_memory_topology(as->root);
885
886 address_space_update_topology_pass(as, old_view, new_view, false);
887 address_space_update_topology_pass(as, old_view, new_view, true);
888
889 /* Writes are protected by the BQL. */
890 atomic_rcu_set(&as->current_map, new_view);
891 call_rcu(old_view, flatview_unref, rcu);
892
893 /* Note that all the old MemoryRegions are still alive up to this
894 * point. This relieves most MemoryListeners from the need to
895 * ref/unref the MemoryRegions they get---unless they use them
896 * outside the iothread mutex, in which case precise reference
897 * counting is necessary.
898 */
899 flatview_unref(old_view);
900
901 address_space_update_ioeventfds(as);
902 }
903
904 void memory_region_transaction_begin(void)
905 {
906 qemu_flush_coalesced_mmio_buffer();
907 ++memory_region_transaction_depth;
908 }
909
910 static void memory_region_clear_pending(void)
911 {
912 memory_region_update_pending = false;
913 ioeventfd_update_pending = false;
914 }
915
916 void memory_region_transaction_commit(void)
917 {
918 AddressSpace *as;
919
920 assert(memory_region_transaction_depth);
921 --memory_region_transaction_depth;
922 if (!memory_region_transaction_depth) {
923 if (memory_region_update_pending) {
924 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
925
926 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
927 address_space_update_topology(as);
928 }
929
930 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
931 } else if (ioeventfd_update_pending) {
932 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
933 address_space_update_ioeventfds(as);
934 }
935 }
936 memory_region_clear_pending();
937 }
938 }
939
940 static void memory_region_destructor_none(MemoryRegion *mr)
941 {
942 }
943
944 static void memory_region_destructor_ram(MemoryRegion *mr)
945 {
946 qemu_ram_free(mr->ram_block);
947 }
948
949 static bool memory_region_need_escape(char c)
950 {
951 return c == '/' || c == '[' || c == '\\' || c == ']';
952 }
953
954 static char *memory_region_escape_name(const char *name)
955 {
956 const char *p;
957 char *escaped, *q;
958 uint8_t c;
959 size_t bytes = 0;
960
961 for (p = name; *p; p++) {
962 bytes += memory_region_need_escape(*p) ? 4 : 1;
963 }
964 if (bytes == p - name) {
965 return g_memdup(name, bytes + 1);
966 }
967
968 escaped = g_malloc(bytes + 1);
969 for (p = name, q = escaped; *p; p++) {
970 c = *p;
971 if (unlikely(memory_region_need_escape(c))) {
972 *q++ = '\\';
973 *q++ = 'x';
974 *q++ = "0123456789abcdef"[c >> 4];
975 c = "0123456789abcdef"[c & 15];
976 }
977 *q++ = c;
978 }
979 *q = 0;
980 return escaped;
981 }
982
983 void memory_region_init(MemoryRegion *mr,
984 Object *owner,
985 const char *name,
986 uint64_t size)
987 {
988 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
989 mr->size = int128_make64(size);
990 if (size == UINT64_MAX) {
991 mr->size = int128_2_64();
992 }
993 mr->name = g_strdup(name);
994 mr->owner = owner;
995 mr->ram_block = NULL;
996
997 if (name) {
998 char *escaped_name = memory_region_escape_name(name);
999 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1000
1001 if (!owner) {
1002 owner = container_get(qdev_get_machine(), "/unattached");
1003 }
1004
1005 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1006 object_unref(OBJECT(mr));
1007 g_free(name_array);
1008 g_free(escaped_name);
1009 }
1010 }
1011
1012 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1013 void *opaque, Error **errp)
1014 {
1015 MemoryRegion *mr = MEMORY_REGION(obj);
1016 uint64_t value = mr->addr;
1017
1018 visit_type_uint64(v, name, &value, errp);
1019 }
1020
1021 static void memory_region_get_container(Object *obj, Visitor *v,
1022 const char *name, void *opaque,
1023 Error **errp)
1024 {
1025 MemoryRegion *mr = MEMORY_REGION(obj);
1026 gchar *path = (gchar *)"";
1027
1028 if (mr->container) {
1029 path = object_get_canonical_path(OBJECT(mr->container));
1030 }
1031 visit_type_str(v, name, &path, errp);
1032 if (mr->container) {
1033 g_free(path);
1034 }
1035 }
1036
1037 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1038 const char *part)
1039 {
1040 MemoryRegion *mr = MEMORY_REGION(obj);
1041
1042 return OBJECT(mr->container);
1043 }
1044
1045 static void memory_region_get_priority(Object *obj, Visitor *v,
1046 const char *name, void *opaque,
1047 Error **errp)
1048 {
1049 MemoryRegion *mr = MEMORY_REGION(obj);
1050 int32_t value = mr->priority;
1051
1052 visit_type_int32(v, name, &value, errp);
1053 }
1054
1055 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1056 void *opaque, Error **errp)
1057 {
1058 MemoryRegion *mr = MEMORY_REGION(obj);
1059 uint64_t value = memory_region_size(mr);
1060
1061 visit_type_uint64(v, name, &value, errp);
1062 }
1063
1064 static void memory_region_initfn(Object *obj)
1065 {
1066 MemoryRegion *mr = MEMORY_REGION(obj);
1067 ObjectProperty *op;
1068
1069 mr->ops = &unassigned_mem_ops;
1070 mr->enabled = true;
1071 mr->romd_mode = true;
1072 mr->global_locking = true;
1073 mr->destructor = memory_region_destructor_none;
1074 QTAILQ_INIT(&mr->subregions);
1075 QTAILQ_INIT(&mr->coalesced);
1076
1077 op = object_property_add(OBJECT(mr), "container",
1078 "link<" TYPE_MEMORY_REGION ">",
1079 memory_region_get_container,
1080 NULL, /* memory_region_set_container */
1081 NULL, NULL, &error_abort);
1082 op->resolve = memory_region_resolve_container;
1083
1084 object_property_add(OBJECT(mr), "addr", "uint64",
1085 memory_region_get_addr,
1086 NULL, /* memory_region_set_addr */
1087 NULL, NULL, &error_abort);
1088 object_property_add(OBJECT(mr), "priority", "uint32",
1089 memory_region_get_priority,
1090 NULL, /* memory_region_set_priority */
1091 NULL, NULL, &error_abort);
1092 object_property_add(OBJECT(mr), "size", "uint64",
1093 memory_region_get_size,
1094 NULL, /* memory_region_set_size, */
1095 NULL, NULL, &error_abort);
1096 }
1097
1098 static int qemu_target_backtrace(target_ulong *array, size_t size)
1099 {
1100 int n = 0;
1101 if (size >= 2) {
1102 #if defined(TARGET_ARM)
1103 CPUArchState *env = current_cpu->env_ptr;
1104 array[0] = env->regs[15];
1105 array[1] = env->regs[14];
1106 #elif defined(TARGET_MIPS)
1107 CPUArchState *env = current_cpu->env_ptr;
1108 array[0] = env->active_tc.PC;
1109 array[1] = env->active_tc.gpr[31];
1110 #else
1111 array[0] = 0;
1112 array[1] = 0;
1113 #endif
1114 n = 2;
1115 }
1116 return n;
1117 }
1118
1119 #include "disas/disas.h"
1120 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1121 {
1122 char *p = buffer;
1123 if (current_cpu) {
1124 target_ulong caller[2];
1125 const char *symbol;
1126 qemu_target_backtrace(caller, 2);
1127 symbol = lookup_symbol(caller[0]);
1128 p += sprintf(p, "[%s]", symbol);
1129 symbol = lookup_symbol(caller[1]);
1130 p += sprintf(p, "[%s]", symbol);
1131 } else {
1132 p += sprintf(p, "[cpu not running]");
1133 }
1134 assert((p - buffer) < length);
1135 return buffer;
1136 }
1137
1138 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1139 unsigned size)
1140 {
1141 if (trace_unassigned) {
1142 char buffer[256];
1143 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1144 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1145 }
1146 //~ vm_stop(0);
1147 if (current_cpu != NULL) {
1148 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1149 }
1150 return 0;
1151 }
1152
1153 static void unassigned_mem_write(void *opaque, hwaddr addr,
1154 uint64_t val, unsigned size)
1155 {
1156 if (trace_unassigned) {
1157 char buffer[256];
1158 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1159 " = 0x%" PRIx64 " %s\n",
1160 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1161 }
1162 if (current_cpu != NULL) {
1163 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1164 }
1165 }
1166
1167 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1168 unsigned size, bool is_write)
1169 {
1170 return false;
1171 }
1172
1173 const MemoryRegionOps unassigned_mem_ops = {
1174 .valid.accepts = unassigned_mem_accepts,
1175 .endianness = DEVICE_NATIVE_ENDIAN,
1176 };
1177
1178 static uint64_t memory_region_ram_device_read(void *opaque,
1179 hwaddr addr, unsigned size)
1180 {
1181 MemoryRegion *mr = opaque;
1182 uint64_t data = (uint64_t)~0;
1183
1184 switch (size) {
1185 case 1:
1186 data = *(uint8_t *)(mr->ram_block->host + addr);
1187 break;
1188 case 2:
1189 data = *(uint16_t *)(mr->ram_block->host + addr);
1190 break;
1191 case 4:
1192 data = *(uint32_t *)(mr->ram_block->host + addr);
1193 break;
1194 case 8:
1195 data = *(uint64_t *)(mr->ram_block->host + addr);
1196 break;
1197 }
1198
1199 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1200
1201 return data;
1202 }
1203
1204 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1205 uint64_t data, unsigned size)
1206 {
1207 MemoryRegion *mr = opaque;
1208
1209 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1210
1211 switch (size) {
1212 case 1:
1213 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1214 break;
1215 case 2:
1216 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1217 break;
1218 case 4:
1219 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1220 break;
1221 case 8:
1222 *(uint64_t *)(mr->ram_block->host + addr) = data;
1223 break;
1224 }
1225 }
1226
1227 static const MemoryRegionOps ram_device_mem_ops = {
1228 .read = memory_region_ram_device_read,
1229 .write = memory_region_ram_device_write,
1230 .endianness = DEVICE_NATIVE_ENDIAN,
1231 .valid = {
1232 .min_access_size = 1,
1233 .max_access_size = 8,
1234 .unaligned = true,
1235 },
1236 .impl = {
1237 .min_access_size = 1,
1238 .max_access_size = 8,
1239 .unaligned = true,
1240 },
1241 };
1242
1243 bool memory_region_access_valid(MemoryRegion *mr,
1244 hwaddr addr,
1245 unsigned size,
1246 bool is_write)
1247 {
1248 int access_size_min, access_size_max;
1249 int access_size, i;
1250
1251 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1252 fprintf(stderr, "Misaligned i/o to address %08" HWADDR_PRIx
1253 " with size %u for memory region %s\n",
1254 addr, size, mr->name);
1255 return false;
1256 }
1257
1258 if (!mr->ops->valid.accepts) {
1259 return true;
1260 }
1261
1262 access_size_min = mr->ops->valid.min_access_size;
1263 if (!mr->ops->valid.min_access_size) {
1264 access_size_min = 1;
1265 }
1266
1267 access_size_max = mr->ops->valid.max_access_size;
1268 if (!mr->ops->valid.max_access_size) {
1269 access_size_max = 4;
1270 }
1271
1272 access_size = MAX(MIN(size, access_size_max), access_size_min);
1273 for (i = 0; i < size; i += access_size) {
1274 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1275 is_write)) {
1276 return false;
1277 }
1278 }
1279
1280 return true;
1281 }
1282
1283 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1284 hwaddr addr,
1285 uint64_t *pval,
1286 unsigned size,
1287 MemTxAttrs attrs)
1288 {
1289 *pval = 0;
1290
1291 if (mr->ops->read) {
1292 return access_with_adjusted_size(addr, pval, size,
1293 mr->ops->impl.min_access_size,
1294 mr->ops->impl.max_access_size,
1295 memory_region_read_accessor,
1296 mr, attrs);
1297 } else if (mr->ops->read_with_attrs) {
1298 return access_with_adjusted_size(addr, pval, size,
1299 mr->ops->impl.min_access_size,
1300 mr->ops->impl.max_access_size,
1301 memory_region_read_with_attrs_accessor,
1302 mr, attrs);
1303 } else {
1304 return access_with_adjusted_size(addr, pval, size, 1, 4,
1305 memory_region_oldmmio_read_accessor,
1306 mr, attrs);
1307 }
1308 }
1309
1310 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1311 hwaddr addr,
1312 uint64_t *pval,
1313 unsigned size,
1314 MemTxAttrs attrs)
1315 {
1316 MemTxResult r;
1317
1318 if (!memory_region_access_valid(mr, addr, size, false)) {
1319 *pval = unassigned_mem_read(mr, addr, size);
1320 return MEMTX_DECODE_ERROR;
1321 }
1322
1323 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1324 adjust_endianness(mr, pval, size);
1325 return r;
1326 }
1327
1328 /* Return true if an eventfd was signalled */
1329 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1330 hwaddr addr,
1331 uint64_t data,
1332 unsigned size,
1333 MemTxAttrs attrs)
1334 {
1335 MemoryRegionIoeventfd ioeventfd = {
1336 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1337 .data = data,
1338 };
1339 unsigned i;
1340
1341 for (i = 0; i < mr->ioeventfd_nb; i++) {
1342 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1343 ioeventfd.e = mr->ioeventfds[i].e;
1344
1345 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1346 event_notifier_set(ioeventfd.e);
1347 return true;
1348 }
1349 }
1350
1351 return false;
1352 }
1353
1354 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1355 hwaddr addr,
1356 uint64_t data,
1357 unsigned size,
1358 MemTxAttrs attrs)
1359 {
1360 if (!memory_region_access_valid(mr, addr, size, true)) {
1361 unassigned_mem_write(mr, addr, data, size);
1362 return MEMTX_DECODE_ERROR;
1363 }
1364
1365 adjust_endianness(mr, &data, size);
1366
1367 if ((!kvm_eventfds_enabled()) &&
1368 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1369 return MEMTX_OK;
1370 }
1371
1372 if (mr->ops->write) {
1373 return access_with_adjusted_size(addr, &data, size,
1374 mr->ops->impl.min_access_size,
1375 mr->ops->impl.max_access_size,
1376 memory_region_write_accessor, mr,
1377 attrs);
1378 } else if (mr->ops->write_with_attrs) {
1379 return
1380 access_with_adjusted_size(addr, &data, size,
1381 mr->ops->impl.min_access_size,
1382 mr->ops->impl.max_access_size,
1383 memory_region_write_with_attrs_accessor,
1384 mr, attrs);
1385 } else {
1386 return access_with_adjusted_size(addr, &data, size, 1, 4,
1387 memory_region_oldmmio_write_accessor,
1388 mr, attrs);
1389 }
1390 }
1391
1392 void memory_region_init_io(MemoryRegion *mr,
1393 Object *owner,
1394 const MemoryRegionOps *ops,
1395 void *opaque,
1396 const char *name,
1397 uint64_t size)
1398 {
1399 memory_region_init(mr, owner, name, size);
1400 mr->ops = ops ? ops : &unassigned_mem_ops;
1401 mr->opaque = opaque;
1402 mr->terminates = true;
1403 }
1404
1405 void memory_region_init_ram(MemoryRegion *mr,
1406 Object *owner,
1407 const char *name,
1408 uint64_t size,
1409 Error **errp)
1410 {
1411 memory_region_init(mr, owner, name, size);
1412 mr->ram = true;
1413 mr->terminates = true;
1414 mr->destructor = memory_region_destructor_ram;
1415 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1416 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1417 }
1418
1419 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1420 Object *owner,
1421 const char *name,
1422 uint64_t size,
1423 uint64_t max_size,
1424 void (*resized)(const char*,
1425 uint64_t length,
1426 void *host),
1427 Error **errp)
1428 {
1429 memory_region_init(mr, owner, name, size);
1430 mr->ram = true;
1431 mr->terminates = true;
1432 mr->destructor = memory_region_destructor_ram;
1433 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1434 mr, errp);
1435 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1436 }
1437
1438 #ifdef __linux__
1439 void memory_region_init_ram_from_file(MemoryRegion *mr,
1440 struct Object *owner,
1441 const char *name,
1442 uint64_t size,
1443 bool share,
1444 const char *path,
1445 Error **errp)
1446 {
1447 memory_region_init(mr, owner, name, size);
1448 mr->ram = true;
1449 mr->terminates = true;
1450 mr->destructor = memory_region_destructor_ram;
1451 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1452 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1453 }
1454 #endif
1455
1456 void memory_region_init_ram_ptr(MemoryRegion *mr,
1457 Object *owner,
1458 const char *name,
1459 uint64_t size,
1460 void *ptr)
1461 {
1462 memory_region_init(mr, owner, name, size);
1463 mr->ram = true;
1464 mr->terminates = true;
1465 mr->destructor = memory_region_destructor_ram;
1466 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1467
1468 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1469 assert(ptr != NULL);
1470 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1471 }
1472
1473 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1474 Object *owner,
1475 const char *name,
1476 uint64_t size,
1477 void *ptr)
1478 {
1479 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1480 mr->ram_device = true;
1481 mr->ops = &ram_device_mem_ops;
1482 mr->opaque = mr;
1483 }
1484
1485 void memory_region_init_alias(MemoryRegion *mr,
1486 Object *owner,
1487 const char *name,
1488 MemoryRegion *orig,
1489 hwaddr offset,
1490 uint64_t size)
1491 {
1492 memory_region_init(mr, owner, name, size);
1493 mr->alias = orig;
1494 mr->alias_offset = offset;
1495 }
1496
1497 void memory_region_init_rom(MemoryRegion *mr,
1498 struct Object *owner,
1499 const char *name,
1500 uint64_t size,
1501 Error **errp)
1502 {
1503 memory_region_init(mr, owner, name, size);
1504 mr->ram = true;
1505 mr->readonly = true;
1506 mr->terminates = true;
1507 mr->destructor = memory_region_destructor_ram;
1508 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1509 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1510 }
1511
1512 void memory_region_init_rom_device(MemoryRegion *mr,
1513 Object *owner,
1514 const MemoryRegionOps *ops,
1515 void *opaque,
1516 const char *name,
1517 uint64_t size,
1518 Error **errp)
1519 {
1520 assert(ops);
1521 memory_region_init(mr, owner, name, size);
1522 mr->ops = ops;
1523 mr->opaque = opaque;
1524 mr->terminates = true;
1525 mr->rom_device = true;
1526 mr->destructor = memory_region_destructor_ram;
1527 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1528 }
1529
1530 void memory_region_init_iommu(MemoryRegion *mr,
1531 Object *owner,
1532 const MemoryRegionIOMMUOps *ops,
1533 const char *name,
1534 uint64_t size)
1535 {
1536 memory_region_init(mr, owner, name, size);
1537 mr->iommu_ops = ops,
1538 mr->terminates = true; /* then re-forwards */
1539 QLIST_INIT(&mr->iommu_notify);
1540 mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1541 }
1542
1543 static void memory_region_finalize(Object *obj)
1544 {
1545 MemoryRegion *mr = MEMORY_REGION(obj);
1546
1547 assert(!mr->container);
1548
1549 /* We know the region is not visible in any address space (it
1550 * does not have a container and cannot be a root either because
1551 * it has no references, so we can blindly clear mr->enabled.
1552 * memory_region_set_enabled instead could trigger a transaction
1553 * and cause an infinite loop.
1554 */
1555 mr->enabled = false;
1556 memory_region_transaction_begin();
1557 while (!QTAILQ_EMPTY(&mr->subregions)) {
1558 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1559 memory_region_del_subregion(mr, subregion);
1560 }
1561 memory_region_transaction_commit();
1562
1563 mr->destructor(mr);
1564 memory_region_clear_coalescing(mr);
1565 g_free((char *)mr->name);
1566 g_free(mr->ioeventfds);
1567 }
1568
1569 Object *memory_region_owner(MemoryRegion *mr)
1570 {
1571 Object *obj = OBJECT(mr);
1572 return obj->parent;
1573 }
1574
1575 void memory_region_ref(MemoryRegion *mr)
1576 {
1577 /* MMIO callbacks most likely will access data that belongs
1578 * to the owner, hence the need to ref/unref the owner whenever
1579 * the memory region is in use.
1580 *
1581 * The memory region is a child of its owner. As long as the
1582 * owner doesn't call unparent itself on the memory region,
1583 * ref-ing the owner will also keep the memory region alive.
1584 * Memory regions without an owner are supposed to never go away;
1585 * we do not ref/unref them because it slows down DMA sensibly.
1586 */
1587 if (mr && mr->owner) {
1588 object_ref(mr->owner);
1589 }
1590 }
1591
1592 void memory_region_unref(MemoryRegion *mr)
1593 {
1594 if (mr && mr->owner) {
1595 object_unref(mr->owner);
1596 }
1597 }
1598
1599 uint64_t memory_region_size(MemoryRegion *mr)
1600 {
1601 if (int128_eq(mr->size, int128_2_64())) {
1602 return UINT64_MAX;
1603 }
1604 return int128_get64(mr->size);
1605 }
1606
1607 const char *memory_region_name(const MemoryRegion *mr)
1608 {
1609 if (!mr->name) {
1610 ((MemoryRegion *)mr)->name =
1611 object_get_canonical_path_component(OBJECT(mr));
1612 }
1613 return mr->name;
1614 }
1615
1616 bool memory_region_is_ram_device(MemoryRegion *mr)
1617 {
1618 return mr->ram_device;
1619 }
1620
1621 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1622 {
1623 uint8_t mask = mr->dirty_log_mask;
1624 if (global_dirty_log && mr->ram_block) {
1625 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1626 }
1627 return mask;
1628 }
1629
1630 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1631 {
1632 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1633 }
1634
1635 static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1636 {
1637 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1638 IOMMUNotifier *iommu_notifier;
1639
1640 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1641 flags |= iommu_notifier->notifier_flags;
1642 }
1643
1644 if (flags != mr->iommu_notify_flags &&
1645 mr->iommu_ops->notify_flag_changed) {
1646 mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1647 flags);
1648 }
1649
1650 mr->iommu_notify_flags = flags;
1651 }
1652
1653 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1654 IOMMUNotifier *n)
1655 {
1656 /* We need to register for at least one bitfield */
1657 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1658 QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
1659 memory_region_update_iommu_notify_flags(mr);
1660 }
1661
1662 uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1663 {
1664 assert(memory_region_is_iommu(mr));
1665 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1666 return mr->iommu_ops->get_min_page_size(mr);
1667 }
1668 return TARGET_PAGE_SIZE;
1669 }
1670
1671 void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1672 bool is_write)
1673 {
1674 hwaddr addr, granularity;
1675 IOMMUTLBEntry iotlb;
1676
1677 granularity = memory_region_iommu_get_min_page_size(mr);
1678
1679 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1680 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1681 if (iotlb.perm != IOMMU_NONE) {
1682 n->notify(n, &iotlb);
1683 }
1684
1685 /* if (2^64 - MR size) < granularity, it's possible to get an
1686 * infinite loop here. This should catch such a wraparound */
1687 if ((addr + granularity) < addr) {
1688 break;
1689 }
1690 }
1691 }
1692
1693 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1694 IOMMUNotifier *n)
1695 {
1696 QLIST_REMOVE(n, node);
1697 memory_region_update_iommu_notify_flags(mr);
1698 }
1699
1700 void memory_region_notify_iommu(MemoryRegion *mr,
1701 IOMMUTLBEntry entry)
1702 {
1703 IOMMUNotifier *iommu_notifier;
1704 IOMMUNotifierFlag request_flags;
1705
1706 assert(memory_region_is_iommu(mr));
1707
1708 if (entry.perm & IOMMU_RW) {
1709 request_flags = IOMMU_NOTIFIER_MAP;
1710 } else {
1711 request_flags = IOMMU_NOTIFIER_UNMAP;
1712 }
1713
1714 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1715 if (iommu_notifier->notifier_flags & request_flags) {
1716 iommu_notifier->notify(iommu_notifier, &entry);
1717 }
1718 }
1719 }
1720
1721 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1722 {
1723 uint8_t mask = 1 << client;
1724 uint8_t old_logging;
1725
1726 assert(client == DIRTY_MEMORY_VGA);
1727 old_logging = mr->vga_logging_count;
1728 mr->vga_logging_count += log ? 1 : -1;
1729 if (!!old_logging == !!mr->vga_logging_count) {
1730 return;
1731 }
1732
1733 memory_region_transaction_begin();
1734 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1735 memory_region_update_pending |= mr->enabled;
1736 memory_region_transaction_commit();
1737 }
1738
1739 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1740 hwaddr size, unsigned client)
1741 {
1742 assert(mr->ram_block);
1743 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1744 size, client);
1745 }
1746
1747 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1748 hwaddr size)
1749 {
1750 assert(mr->ram_block);
1751 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1752 size,
1753 memory_region_get_dirty_log_mask(mr));
1754 }
1755
1756 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1757 hwaddr size, unsigned client)
1758 {
1759 assert(mr->ram_block);
1760 return cpu_physical_memory_test_and_clear_dirty(
1761 memory_region_get_ram_addr(mr) + addr, size, client);
1762 }
1763
1764
1765 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1766 {
1767 MemoryListener *listener;
1768 AddressSpace *as;
1769 FlatView *view;
1770 FlatRange *fr;
1771
1772 /* If the same address space has multiple log_sync listeners, we
1773 * visit that address space's FlatView multiple times. But because
1774 * log_sync listeners are rare, it's still cheaper than walking each
1775 * address space once.
1776 */
1777 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1778 if (!listener->log_sync) {
1779 continue;
1780 }
1781 as = listener->address_space;
1782 view = address_space_get_flatview(as);
1783 FOR_EACH_FLAT_RANGE(fr, view) {
1784 if (fr->mr == mr) {
1785 MemoryRegionSection mrs = section_from_flat_range(fr, as);
1786 listener->log_sync(listener, &mrs);
1787 }
1788 }
1789 flatview_unref(view);
1790 }
1791 }
1792
1793 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1794 {
1795 if (mr->readonly != readonly) {
1796 memory_region_transaction_begin();
1797 mr->readonly = readonly;
1798 memory_region_update_pending |= mr->enabled;
1799 memory_region_transaction_commit();
1800 }
1801 }
1802
1803 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1804 {
1805 if (mr->romd_mode != romd_mode) {
1806 memory_region_transaction_begin();
1807 mr->romd_mode = romd_mode;
1808 memory_region_update_pending |= mr->enabled;
1809 memory_region_transaction_commit();
1810 }
1811 }
1812
1813 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1814 hwaddr size, unsigned client)
1815 {
1816 assert(mr->ram_block);
1817 cpu_physical_memory_test_and_clear_dirty(
1818 memory_region_get_ram_addr(mr) + addr, size, client);
1819 }
1820
1821 int memory_region_get_fd(MemoryRegion *mr)
1822 {
1823 int fd;
1824
1825 rcu_read_lock();
1826 while (mr->alias) {
1827 mr = mr->alias;
1828 }
1829 fd = mr->ram_block->fd;
1830 rcu_read_unlock();
1831
1832 return fd;
1833 }
1834
1835 void memory_region_set_fd(MemoryRegion *mr, int fd)
1836 {
1837 rcu_read_lock();
1838 while (mr->alias) {
1839 mr = mr->alias;
1840 }
1841 mr->ram_block->fd = fd;
1842 rcu_read_unlock();
1843 }
1844
1845 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1846 {
1847 void *ptr;
1848 uint64_t offset = 0;
1849
1850 rcu_read_lock();
1851 while (mr->alias) {
1852 offset += mr->alias_offset;
1853 mr = mr->alias;
1854 }
1855 assert(mr->ram_block);
1856 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1857 rcu_read_unlock();
1858
1859 return ptr;
1860 }
1861
1862 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1863 {
1864 RAMBlock *block;
1865
1866 block = qemu_ram_block_from_host(ptr, false, offset);
1867 if (!block) {
1868 return NULL;
1869 }
1870
1871 return block->mr;
1872 }
1873
1874 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1875 {
1876 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1877 }
1878
1879 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1880 {
1881 assert(mr->ram_block);
1882
1883 qemu_ram_resize(mr->ram_block, newsize, errp);
1884 }
1885
1886 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1887 {
1888 FlatView *view;
1889 FlatRange *fr;
1890 CoalescedMemoryRange *cmr;
1891 AddrRange tmp;
1892 MemoryRegionSection section;
1893
1894 view = address_space_get_flatview(as);
1895 FOR_EACH_FLAT_RANGE(fr, view) {
1896 if (fr->mr == mr) {
1897 section = (MemoryRegionSection) {
1898 .address_space = as,
1899 .offset_within_address_space = int128_get64(fr->addr.start),
1900 .size = fr->addr.size,
1901 };
1902
1903 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
1904 int128_get64(fr->addr.start),
1905 int128_get64(fr->addr.size));
1906 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1907 tmp = addrrange_shift(cmr->addr,
1908 int128_sub(fr->addr.start,
1909 int128_make64(fr->offset_in_region)));
1910 if (!addrrange_intersects(tmp, fr->addr)) {
1911 continue;
1912 }
1913 tmp = addrrange_intersection(tmp, fr->addr);
1914 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
1915 int128_get64(tmp.start),
1916 int128_get64(tmp.size));
1917 }
1918 }
1919 }
1920 flatview_unref(view);
1921 }
1922
1923 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1924 {
1925 AddressSpace *as;
1926
1927 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1928 memory_region_update_coalesced_range_as(mr, as);
1929 }
1930 }
1931
1932 void memory_region_set_coalescing(MemoryRegion *mr)
1933 {
1934 memory_region_clear_coalescing(mr);
1935 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1936 }
1937
1938 void memory_region_add_coalescing(MemoryRegion *mr,
1939 hwaddr offset,
1940 uint64_t size)
1941 {
1942 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1943
1944 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1945 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1946 memory_region_update_coalesced_range(mr);
1947 memory_region_set_flush_coalesced(mr);
1948 }
1949
1950 void memory_region_clear_coalescing(MemoryRegion *mr)
1951 {
1952 CoalescedMemoryRange *cmr;
1953 bool updated = false;
1954
1955 qemu_flush_coalesced_mmio_buffer();
1956 mr->flush_coalesced_mmio = false;
1957
1958 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1959 cmr = QTAILQ_FIRST(&mr->coalesced);
1960 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1961 g_free(cmr);
1962 updated = true;
1963 }
1964
1965 if (updated) {
1966 memory_region_update_coalesced_range(mr);
1967 }
1968 }
1969
1970 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1971 {
1972 mr->flush_coalesced_mmio = true;
1973 }
1974
1975 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1976 {
1977 qemu_flush_coalesced_mmio_buffer();
1978 if (QTAILQ_EMPTY(&mr->coalesced)) {
1979 mr->flush_coalesced_mmio = false;
1980 }
1981 }
1982
1983 void memory_region_set_global_locking(MemoryRegion *mr)
1984 {
1985 mr->global_locking = true;
1986 }
1987
1988 void memory_region_clear_global_locking(MemoryRegion *mr)
1989 {
1990 mr->global_locking = false;
1991 }
1992
1993 static bool userspace_eventfd_warning;
1994
1995 void memory_region_add_eventfd(MemoryRegion *mr,
1996 hwaddr addr,
1997 unsigned size,
1998 bool match_data,
1999 uint64_t data,
2000 EventNotifier *e)
2001 {
2002 MemoryRegionIoeventfd mrfd = {
2003 .addr.start = int128_make64(addr),
2004 .addr.size = int128_make64(size),
2005 .match_data = match_data,
2006 .data = data,
2007 .e = e,
2008 };
2009 unsigned i;
2010
2011 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2012 userspace_eventfd_warning))) {
2013 userspace_eventfd_warning = true;
2014 error_report("Using eventfd without MMIO binding in KVM. "
2015 "Suboptimal performance expected");
2016 }
2017
2018 if (size) {
2019 adjust_endianness(mr, &mrfd.data, size);
2020 }
2021 memory_region_transaction_begin();
2022 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2023 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2024 break;
2025 }
2026 }
2027 ++mr->ioeventfd_nb;
2028 mr->ioeventfds = g_realloc(mr->ioeventfds,
2029 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2030 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2031 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2032 mr->ioeventfds[i] = mrfd;
2033 ioeventfd_update_pending |= mr->enabled;
2034 memory_region_transaction_commit();
2035 }
2036
2037 void memory_region_del_eventfd(MemoryRegion *mr,
2038 hwaddr addr,
2039 unsigned size,
2040 bool match_data,
2041 uint64_t data,
2042 EventNotifier *e)
2043 {
2044 MemoryRegionIoeventfd mrfd = {
2045 .addr.start = int128_make64(addr),
2046 .addr.size = int128_make64(size),
2047 .match_data = match_data,
2048 .data = data,
2049 .e = e,
2050 };
2051 unsigned i;
2052
2053 if (size) {
2054 adjust_endianness(mr, &mrfd.data, size);
2055 }
2056 memory_region_transaction_begin();
2057 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2058 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2059 break;
2060 }
2061 }
2062 assert(i != mr->ioeventfd_nb);
2063 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2064 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2065 --mr->ioeventfd_nb;
2066 mr->ioeventfds = g_realloc(mr->ioeventfds,
2067 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2068 ioeventfd_update_pending |= mr->enabled;
2069 memory_region_transaction_commit();
2070 }
2071
2072 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2073 {
2074 MemoryRegion *mr = subregion->container;
2075 MemoryRegion *other;
2076
2077 memory_region_transaction_begin();
2078
2079 memory_region_ref(subregion);
2080 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2081 if (subregion->priority >= other->priority) {
2082 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2083 goto done;
2084 }
2085 }
2086 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2087 done:
2088 memory_region_update_pending |= mr->enabled && subregion->enabled;
2089 memory_region_transaction_commit();
2090 }
2091
2092 static void memory_region_add_subregion_common(MemoryRegion *mr,
2093 hwaddr offset,
2094 MemoryRegion *subregion)
2095 {
2096 assert(!subregion->container);
2097 subregion->container = mr;
2098 subregion->addr = offset;
2099 memory_region_update_container_subregions(subregion);
2100 }
2101
2102 void memory_region_add_subregion(MemoryRegion *mr,
2103 hwaddr offset,
2104 MemoryRegion *subregion)
2105 {
2106 subregion->priority = 0;
2107 memory_region_add_subregion_common(mr, offset, subregion);
2108 }
2109
2110 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2111 hwaddr offset,
2112 MemoryRegion *subregion,
2113 int priority)
2114 {
2115 subregion->priority = priority;
2116 memory_region_add_subregion_common(mr, offset, subregion);
2117 }
2118
2119 void memory_region_del_subregion(MemoryRegion *mr,
2120 MemoryRegion *subregion)
2121 {
2122 memory_region_transaction_begin();
2123 assert(subregion->container == mr);
2124 subregion->container = NULL;
2125 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2126 memory_region_unref(subregion);
2127 memory_region_update_pending |= mr->enabled && subregion->enabled;
2128 memory_region_transaction_commit();
2129 }
2130
2131 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2132 {
2133 if (enabled == mr->enabled) {
2134 return;
2135 }
2136 memory_region_transaction_begin();
2137 mr->enabled = enabled;
2138 memory_region_update_pending = true;
2139 memory_region_transaction_commit();
2140 }
2141
2142 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2143 {
2144 Int128 s = int128_make64(size);
2145
2146 if (size == UINT64_MAX) {
2147 s = int128_2_64();
2148 }
2149 if (int128_eq(s, mr->size)) {
2150 return;
2151 }
2152 memory_region_transaction_begin();
2153 mr->size = s;
2154 memory_region_update_pending = true;
2155 memory_region_transaction_commit();
2156 }
2157
2158 static void memory_region_readd_subregion(MemoryRegion *mr)
2159 {
2160 MemoryRegion *container = mr->container;
2161
2162 if (container) {
2163 memory_region_transaction_begin();
2164 memory_region_ref(mr);
2165 memory_region_del_subregion(container, mr);
2166 mr->container = container;
2167 memory_region_update_container_subregions(mr);
2168 memory_region_unref(mr);
2169 memory_region_transaction_commit();
2170 }
2171 }
2172
2173 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2174 {
2175 if (addr != mr->addr) {
2176 mr->addr = addr;
2177 memory_region_readd_subregion(mr);
2178 }
2179 }
2180
2181 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2182 {
2183 assert(mr->alias);
2184
2185 if (offset == mr->alias_offset) {
2186 return;
2187 }
2188
2189 memory_region_transaction_begin();
2190 mr->alias_offset = offset;
2191 memory_region_update_pending |= mr->enabled;
2192 memory_region_transaction_commit();
2193 }
2194
2195 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2196 {
2197 return mr->align;
2198 }
2199
2200 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2201 {
2202 const AddrRange *addr = addr_;
2203 const FlatRange *fr = fr_;
2204
2205 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2206 return -1;
2207 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2208 return 1;
2209 }
2210 return 0;
2211 }
2212
2213 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2214 {
2215 return bsearch(&addr, view->ranges, view->nr,
2216 sizeof(FlatRange), cmp_flatrange_addr);
2217 }
2218
2219 bool memory_region_is_mapped(MemoryRegion *mr)
2220 {
2221 return mr->container ? true : false;
2222 }
2223
2224 /* Same as memory_region_find, but it does not add a reference to the
2225 * returned region. It must be called from an RCU critical section.
2226 */
2227 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2228 hwaddr addr, uint64_t size)
2229 {
2230 MemoryRegionSection ret = { .mr = NULL };
2231 MemoryRegion *root;
2232 AddressSpace *as;
2233 AddrRange range;
2234 FlatView *view;
2235 FlatRange *fr;
2236
2237 addr += mr->addr;
2238 for (root = mr; root->container; ) {
2239 root = root->container;
2240 addr += root->addr;
2241 }
2242
2243 as = memory_region_to_address_space(root);
2244 if (!as) {
2245 return ret;
2246 }
2247 range = addrrange_make(int128_make64(addr), int128_make64(size));
2248
2249 view = atomic_rcu_read(&as->current_map);
2250 fr = flatview_lookup(view, range);
2251 if (!fr) {
2252 return ret;
2253 }
2254
2255 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2256 --fr;
2257 }
2258
2259 ret.mr = fr->mr;
2260 ret.address_space = as;
2261 range = addrrange_intersection(range, fr->addr);
2262 ret.offset_within_region = fr->offset_in_region;
2263 ret.offset_within_region += int128_get64(int128_sub(range.start,
2264 fr->addr.start));
2265 ret.size = range.size;
2266 ret.offset_within_address_space = int128_get64(range.start);
2267 ret.readonly = fr->readonly;
2268 return ret;
2269 }
2270
2271 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2272 hwaddr addr, uint64_t size)
2273 {
2274 MemoryRegionSection ret;
2275 rcu_read_lock();
2276 ret = memory_region_find_rcu(mr, addr, size);
2277 if (ret.mr) {
2278 memory_region_ref(ret.mr);
2279 }
2280 rcu_read_unlock();
2281 return ret;
2282 }
2283
2284 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2285 {
2286 MemoryRegion *mr;
2287
2288 rcu_read_lock();
2289 mr = memory_region_find_rcu(container, addr, 1).mr;
2290 rcu_read_unlock();
2291 return mr && mr != container;
2292 }
2293
2294 void memory_global_dirty_log_sync(void)
2295 {
2296 MemoryListener *listener;
2297 AddressSpace *as;
2298 FlatView *view;
2299 FlatRange *fr;
2300
2301 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2302 if (!listener->log_sync) {
2303 continue;
2304 }
2305 as = listener->address_space;
2306 view = address_space_get_flatview(as);
2307 FOR_EACH_FLAT_RANGE(fr, view) {
2308 if (fr->dirty_log_mask) {
2309 MemoryRegionSection mrs = section_from_flat_range(fr, as);
2310 listener->log_sync(listener, &mrs);
2311 }
2312 }
2313 flatview_unref(view);
2314 }
2315 }
2316
2317 void memory_global_dirty_log_start(void)
2318 {
2319 global_dirty_log = true;
2320
2321 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2322
2323 /* Refresh DIRTY_LOG_MIGRATION bit. */
2324 memory_region_transaction_begin();
2325 memory_region_update_pending = true;
2326 memory_region_transaction_commit();
2327 }
2328
2329 void memory_global_dirty_log_stop(void)
2330 {
2331 global_dirty_log = false;
2332
2333 /* Refresh DIRTY_LOG_MIGRATION bit. */
2334 memory_region_transaction_begin();
2335 memory_region_update_pending = true;
2336 memory_region_transaction_commit();
2337
2338 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2339 }
2340
2341 static void listener_add_address_space(MemoryListener *listener,
2342 AddressSpace *as)
2343 {
2344 FlatView *view;
2345 FlatRange *fr;
2346
2347 if (listener->begin) {
2348 listener->begin(listener);
2349 }
2350 if (global_dirty_log) {
2351 if (listener->log_global_start) {
2352 listener->log_global_start(listener);
2353 }
2354 }
2355
2356 view = address_space_get_flatview(as);
2357 FOR_EACH_FLAT_RANGE(fr, view) {
2358 MemoryRegionSection section = {
2359 .mr = fr->mr,
2360 .address_space = as,
2361 .offset_within_region = fr->offset_in_region,
2362 .size = fr->addr.size,
2363 .offset_within_address_space = int128_get64(fr->addr.start),
2364 .readonly = fr->readonly,
2365 };
2366 if (fr->dirty_log_mask && listener->log_start) {
2367 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2368 }
2369 if (listener->region_add) {
2370 listener->region_add(listener, &section);
2371 }
2372 }
2373 if (listener->commit) {
2374 listener->commit(listener);
2375 }
2376 flatview_unref(view);
2377 }
2378
2379 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2380 {
2381 MemoryListener *other = NULL;
2382
2383 listener->address_space = as;
2384 if (QTAILQ_EMPTY(&memory_listeners)
2385 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2386 memory_listeners)->priority) {
2387 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2388 } else {
2389 QTAILQ_FOREACH(other, &memory_listeners, link) {
2390 if (listener->priority < other->priority) {
2391 break;
2392 }
2393 }
2394 QTAILQ_INSERT_BEFORE(other, listener, link);
2395 }
2396
2397 if (QTAILQ_EMPTY(&as->listeners)
2398 || listener->priority >= QTAILQ_LAST(&as->listeners,
2399 memory_listeners)->priority) {
2400 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2401 } else {
2402 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2403 if (listener->priority < other->priority) {
2404 break;
2405 }
2406 }
2407 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2408 }
2409
2410 listener_add_address_space(listener, as);
2411 }
2412
2413 void memory_listener_unregister(MemoryListener *listener)
2414 {
2415 QTAILQ_REMOVE(&memory_listeners, listener, link);
2416 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2417 }
2418
2419 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2420 {
2421 memory_region_ref(root);
2422 memory_region_transaction_begin();
2423 as->ref_count = 1;
2424 as->root = root;
2425 as->malloced = false;
2426 as->current_map = g_new(FlatView, 1);
2427 flatview_init(as->current_map);
2428 as->ioeventfd_nb = 0;
2429 as->ioeventfds = NULL;
2430 QTAILQ_INIT(&as->listeners);
2431 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2432 as->name = g_strdup(name ? name : "anonymous");
2433 address_space_init_dispatch(as);
2434 memory_region_update_pending |= root->enabled;
2435 memory_region_transaction_commit();
2436 }
2437
2438 static void do_address_space_destroy(AddressSpace *as)
2439 {
2440 bool do_free = as->malloced;
2441
2442 address_space_destroy_dispatch(as);
2443 assert(QTAILQ_EMPTY(&as->listeners));
2444
2445 flatview_unref(as->current_map);
2446 g_free(as->name);
2447 g_free(as->ioeventfds);
2448 memory_region_unref(as->root);
2449 if (do_free) {
2450 g_free(as);
2451 }
2452 }
2453
2454 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2455 {
2456 AddressSpace *as;
2457
2458 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2459 if (root == as->root && as->malloced) {
2460 as->ref_count++;
2461 return as;
2462 }
2463 }
2464
2465 as = g_malloc0(sizeof *as);
2466 address_space_init(as, root, name);
2467 as->malloced = true;
2468 return as;
2469 }
2470
2471 void address_space_destroy(AddressSpace *as)
2472 {
2473 MemoryRegion *root = as->root;
2474
2475 as->ref_count--;
2476 if (as->ref_count) {
2477 return;
2478 }
2479 /* Flush out anything from MemoryListeners listening in on this */
2480 memory_region_transaction_begin();
2481 as->root = NULL;
2482 memory_region_transaction_commit();
2483 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2484 address_space_unregister(as);
2485
2486 /* At this point, as->dispatch and as->current_map are dummy
2487 * entries that the guest should never use. Wait for the old
2488 * values to expire before freeing the data.
2489 */
2490 as->root = root;
2491 call_rcu(as, do_address_space_destroy, rcu);
2492 }
2493
2494 typedef struct MemoryRegionList MemoryRegionList;
2495
2496 struct MemoryRegionList {
2497 const MemoryRegion *mr;
2498 QTAILQ_ENTRY(MemoryRegionList) queue;
2499 };
2500
2501 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2502
2503 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2504 const MemoryRegion *mr, unsigned int level,
2505 hwaddr base,
2506 MemoryRegionListHead *alias_print_queue)
2507 {
2508 MemoryRegionList *new_ml, *ml, *next_ml;
2509 MemoryRegionListHead submr_print_queue;
2510 const MemoryRegion *submr;
2511 unsigned int i;
2512
2513 if (!mr) {
2514 return;
2515 }
2516
2517 for (i = 0; i < level; i++) {
2518 mon_printf(f, " ");
2519 }
2520
2521 if (mr->alias) {
2522 MemoryRegionList *ml;
2523 bool found = false;
2524
2525 /* check if the alias is already in the queue */
2526 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2527 if (ml->mr == mr->alias) {
2528 found = true;
2529 }
2530 }
2531
2532 if (!found) {
2533 ml = g_new(MemoryRegionList, 1);
2534 ml->mr = mr->alias;
2535 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2536 }
2537 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2538 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2539 "-" TARGET_FMT_plx "%s\n",
2540 base + mr->addr,
2541 base + mr->addr
2542 + (int128_nz(mr->size) ?
2543 (hwaddr)int128_get64(int128_sub(mr->size,
2544 int128_one())) : 0),
2545 mr->priority,
2546 mr->romd_mode ? 'R' : '-',
2547 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2548 : '-',
2549 memory_region_name(mr),
2550 memory_region_name(mr->alias),
2551 mr->alias_offset,
2552 mr->alias_offset
2553 + (int128_nz(mr->size) ?
2554 (hwaddr)int128_get64(int128_sub(mr->size,
2555 int128_one())) : 0),
2556 mr->enabled ? "" : " [disabled]");
2557 } else {
2558 mon_printf(f,
2559 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2560 base + mr->addr,
2561 base + mr->addr
2562 + (int128_nz(mr->size) ?
2563 (hwaddr)int128_get64(int128_sub(mr->size,
2564 int128_one())) : 0),
2565 mr->priority,
2566 mr->romd_mode ? 'R' : '-',
2567 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2568 : '-',
2569 memory_region_name(mr),
2570 mr->enabled ? "" : " [disabled]");
2571 }
2572
2573 QTAILQ_INIT(&submr_print_queue);
2574
2575 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2576 new_ml = g_new(MemoryRegionList, 1);
2577 new_ml->mr = submr;
2578 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2579 if (new_ml->mr->addr < ml->mr->addr ||
2580 (new_ml->mr->addr == ml->mr->addr &&
2581 new_ml->mr->priority > ml->mr->priority)) {
2582 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2583 new_ml = NULL;
2584 break;
2585 }
2586 }
2587 if (new_ml) {
2588 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2589 }
2590 }
2591
2592 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2593 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2594 alias_print_queue);
2595 }
2596
2597 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2598 g_free(ml);
2599 }
2600 }
2601
2602 void mtree_info(fprintf_function mon_printf, void *f)
2603 {
2604 MemoryRegionListHead ml_head;
2605 MemoryRegionList *ml, *ml2;
2606 AddressSpace *as;
2607
2608 QTAILQ_INIT(&ml_head);
2609
2610 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2611 mon_printf(f, "address-space: %s\n", as->name);
2612 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2613 mon_printf(f, "\n");
2614 }
2615
2616 /* print aliased regions */
2617 QTAILQ_FOREACH(ml, &ml_head, queue) {
2618 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2619 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2620 mon_printf(f, "\n");
2621 }
2622
2623 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2624 g_free(ml);
2625 }
2626 }
2627
2628 static const TypeInfo memory_region_info = {
2629 .parent = TYPE_OBJECT,
2630 .name = TYPE_MEMORY_REGION,
2631 .instance_size = sizeof(MemoryRegion),
2632 .instance_init = memory_region_initfn,
2633 .instance_finalize = memory_region_finalize,
2634 };
2635
2636 static void memory_register_types(void)
2637 {
2638 type_register_static(&memory_region_info);
2639 }
2640
2641 type_init(memory_register_types)
AR7 emulation for QEMU