hw/arm/virt-acpi-build: Don't incorrectly claim architectural timer to be edge-triggered
[qemu/ar7.git] / include / hw / acpi / acpi-defs.h
blobd43ec005cbb7710a6b07360627f031896c6f5e12
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License along
13 * with this program; if not, see <http://www.gnu.org/licenses/>.
15 #ifndef QEMU_ACPI_DEFS_H
16 #define QEMU_ACPI_DEFS_H
18 enum {
19 ACPI_FADT_F_WBINVD,
20 ACPI_FADT_F_WBINVD_FLUSH,
21 ACPI_FADT_F_PROC_C1,
22 ACPI_FADT_F_P_LVL2_UP,
23 ACPI_FADT_F_PWR_BUTTON,
24 ACPI_FADT_F_SLP_BUTTON,
25 ACPI_FADT_F_FIX_RTC,
26 ACPI_FADT_F_RTC_S4,
27 ACPI_FADT_F_TMR_VAL_EXT,
28 ACPI_FADT_F_DCK_CAP,
29 ACPI_FADT_F_RESET_REG_SUP,
30 ACPI_FADT_F_SEALED_CASE,
31 ACPI_FADT_F_HEADLESS,
32 ACPI_FADT_F_CPU_SW_SLP,
33 ACPI_FADT_F_PCI_EXP_WAK,
34 ACPI_FADT_F_USE_PLATFORM_CLOCK,
35 ACPI_FADT_F_S4_RTC_STS_VALID,
36 ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
37 ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
38 ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
39 ACPI_FADT_F_HW_REDUCED_ACPI,
40 ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
44 * ACPI 2.0 Generic Address Space definition.
46 struct Acpi20GenericAddress {
47 uint8_t address_space_id;
48 uint8_t register_bit_width;
49 uint8_t register_bit_offset;
50 uint8_t reserved;
51 uint64_t address;
52 } QEMU_PACKED;
53 typedef struct Acpi20GenericAddress Acpi20GenericAddress;
55 struct AcpiRsdpDescriptor { /* Root System Descriptor Pointer */
56 uint64_t signature; /* ACPI signature, contains "RSD PTR " */
57 uint8_t checksum; /* To make sum of struct == 0 */
58 uint8_t oem_id [6]; /* OEM identification */
59 uint8_t revision; /* Must be 0 for 1.0, 2 for 2.0 */
60 uint32_t rsdt_physical_address; /* 32-bit physical address of RSDT */
61 uint32_t length; /* XSDT Length in bytes including hdr */
62 uint64_t xsdt_physical_address; /* 64-bit physical address of XSDT */
63 uint8_t extended_checksum; /* Checksum of entire table */
64 uint8_t reserved [3]; /* Reserved field must be 0 */
65 } QEMU_PACKED;
66 typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;
68 /* Table structure from Linux kernel (the ACPI tables are under the
69 BSD license) */
72 #define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
73 uint32_t signature; /* ACPI signature (4 ASCII characters) */ \
74 uint32_t length; /* Length of table, in bytes, including header */ \
75 uint8_t revision; /* ACPI Specification minor version # */ \
76 uint8_t checksum; /* To make sum of entire table == 0 */ \
77 uint8_t oem_id [6]; /* OEM identification */ \
78 uint8_t oem_table_id [8]; /* OEM table identification */ \
79 uint32_t oem_revision; /* OEM revision number */ \
80 uint8_t asl_compiler_id [4]; /* ASL compiler vendor ID */ \
81 uint32_t asl_compiler_revision; /* ASL compiler revision number */
84 struct AcpiTableHeader /* ACPI common table header */
86 ACPI_TABLE_HEADER_DEF
87 } QEMU_PACKED;
88 typedef struct AcpiTableHeader AcpiTableHeader;
91 * ACPI Fixed ACPI Description Table (FADT)
93 #define ACPI_FADT_COMMON_DEF /* FADT common definition */ \
94 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
95 uint32_t firmware_ctrl; /* Physical address of FACS */ \
96 uint32_t dsdt; /* Physical address of DSDT */ \
97 uint8_t model; /* System Interrupt Model */ \
98 uint8_t reserved1; /* Reserved */ \
99 uint16_t sci_int; /* System vector of SCI interrupt */ \
100 uint32_t smi_cmd; /* Port address of SMI command port */ \
101 uint8_t acpi_enable; /* Value to write to smi_cmd to enable ACPI */ \
102 uint8_t acpi_disable; /* Value to write to smi_cmd to disable ACPI */ \
103 /* Value to write to SMI CMD to enter S4BIOS state */ \
104 uint8_t S4bios_req; \
105 uint8_t reserved2; /* Reserved - must be zero */ \
106 /* Port address of Power Mgt 1a acpi_event Reg Blk */ \
107 uint32_t pm1a_evt_blk; \
108 /* Port address of Power Mgt 1b acpi_event Reg Blk */ \
109 uint32_t pm1b_evt_blk; \
110 uint32_t pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ \
111 uint32_t pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ \
112 uint32_t pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ \
113 uint32_t pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ \
114 /* Port addr of General Purpose acpi_event 0 Reg Blk */ \
115 uint32_t gpe0_blk; \
116 /* Port addr of General Purpose acpi_event 1 Reg Blk */ \
117 uint32_t gpe1_blk; \
118 uint8_t pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ \
119 uint8_t pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ \
120 uint8_t pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ \
121 uint8_t pm_tmr_len; /* Byte Length of ports at pm_tm_blk */ \
122 uint8_t gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ \
123 uint8_t gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ \
124 uint8_t gpe1_base; /* Offset in gpe model where gpe1 events start */ \
125 uint8_t reserved3; /* Reserved */ \
126 uint16_t plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ \
127 uint16_t plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ \
128 uint16_t flush_size; /* Size of area read to flush caches */ \
129 uint16_t flush_stride; /* Stride used in flushing caches */ \
130 uint8_t duty_offset; /* Bit location of duty cycle field in p_cnt reg */ \
131 uint8_t duty_width; /* Bit width of duty cycle field in p_cnt reg */ \
132 uint8_t day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ \
133 uint8_t mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ \
134 uint8_t century; /* Index to century in RTC CMOS RAM */
136 struct AcpiFadtDescriptorRev1
138 ACPI_FADT_COMMON_DEF
139 uint8_t reserved4; /* Reserved */
140 uint8_t reserved4a; /* Reserved */
141 uint8_t reserved4b; /* Reserved */
142 uint32_t flags;
143 } QEMU_PACKED;
144 typedef struct AcpiFadtDescriptorRev1 AcpiFadtDescriptorRev1;
146 struct AcpiGenericAddress {
147 uint8_t space_id; /* Address space where struct or register exists */
148 uint8_t bit_width; /* Size in bits of given register */
149 uint8_t bit_offset; /* Bit offset within the register */
150 uint8_t access_width; /* Minimum Access size (ACPI 3.0) */
151 uint64_t address; /* 64-bit address of struct or register */
152 } QEMU_PACKED;
154 struct AcpiFadtDescriptorRev5_1 {
155 ACPI_FADT_COMMON_DEF
156 /* IA-PC Boot Architecture Flags (see below for individual flags) */
157 uint16_t boot_flags;
158 uint8_t reserved; /* Reserved, must be zero */
159 /* Miscellaneous flag bits (see below for individual flags) */
160 uint32_t flags;
161 /* 64-bit address of the Reset register */
162 struct AcpiGenericAddress reset_register;
163 /* Value to write to the reset_register port to reset the system */
164 uint8_t reset_value;
165 /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */
166 uint16_t arm_boot_flags;
167 uint8_t minor_revision; /* FADT Minor Revision (ACPI 5.1) */
168 uint64_t Xfacs; /* 64-bit physical address of FACS */
169 uint64_t Xdsdt; /* 64-bit physical address of DSDT */
170 /* 64-bit Extended Power Mgt 1a Event Reg Blk address */
171 struct AcpiGenericAddress xpm1a_event_block;
172 /* 64-bit Extended Power Mgt 1b Event Reg Blk address */
173 struct AcpiGenericAddress xpm1b_event_block;
174 /* 64-bit Extended Power Mgt 1a Control Reg Blk address */
175 struct AcpiGenericAddress xpm1a_control_block;
176 /* 64-bit Extended Power Mgt 1b Control Reg Blk address */
177 struct AcpiGenericAddress xpm1b_control_block;
178 /* 64-bit Extended Power Mgt 2 Control Reg Blk address */
179 struct AcpiGenericAddress xpm2_control_block;
180 /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
181 struct AcpiGenericAddress xpm_timer_block;
182 /* 64-bit Extended General Purpose Event 0 Reg Blk address */
183 struct AcpiGenericAddress xgpe0_block;
184 /* 64-bit Extended General Purpose Event 1 Reg Blk address */
185 struct AcpiGenericAddress xgpe1_block;
186 /* 64-bit Sleep Control register (ACPI 5.0) */
187 struct AcpiGenericAddress sleep_control;
188 /* 64-bit Sleep Status register (ACPI 5.0) */
189 struct AcpiGenericAddress sleep_status;
190 } QEMU_PACKED;
192 typedef struct AcpiFadtDescriptorRev5_1 AcpiFadtDescriptorRev5_1;
194 #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
195 #define ACPI_FADT_ARM_PSCI_USE_HVC (1 << 1)
198 * Serial Port Console Redirection Table (SPCR), Rev. 1.02
200 * For .interface_type see Debug Port Table 2 (DBG2) serial port
201 * subtypes in Table 3, Rev. May 22, 2012
203 struct AcpiSerialPortConsoleRedirection {
204 ACPI_TABLE_HEADER_DEF
205 uint8_t interface_type;
206 uint8_t reserved1[3];
207 struct AcpiGenericAddress base_address;
208 uint8_t interrupt_types;
209 uint8_t irq;
210 uint32_t gsi;
211 uint8_t baud;
212 uint8_t parity;
213 uint8_t stopbits;
214 uint8_t flowctrl;
215 uint8_t term_type;
216 uint8_t reserved2;
217 uint16_t pci_device_id;
218 uint16_t pci_vendor_id;
219 uint8_t pci_bus;
220 uint8_t pci_slot;
221 uint8_t pci_func;
222 uint32_t pci_flags;
223 uint8_t pci_seg;
224 uint32_t reserved3;
225 } QEMU_PACKED;
226 typedef struct AcpiSerialPortConsoleRedirection
227 AcpiSerialPortConsoleRedirection;
230 * ACPI 1.0 Root System Description Table (RSDT)
232 struct AcpiRsdtDescriptorRev1
234 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
235 uint32_t table_offset_entry[0]; /* Array of pointers to other */
236 /* ACPI tables */
237 } QEMU_PACKED;
238 typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
241 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
243 struct AcpiFacsDescriptorRev1
245 uint32_t signature; /* ACPI Signature */
246 uint32_t length; /* Length of structure, in bytes */
247 uint32_t hardware_signature; /* Hardware configuration signature */
248 uint32_t firmware_waking_vector; /* ACPI OS waking vector */
249 uint32_t global_lock; /* Global Lock */
250 uint32_t flags;
251 uint8_t resverved3 [40]; /* Reserved - must be zero */
252 } QEMU_PACKED;
253 typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
256 * Differentiated System Description Table (DSDT)
260 * MADT values and structures
263 /* Values for MADT PCATCompat */
265 #define ACPI_DUAL_PIC 0
266 #define ACPI_MULTIPLE_APIC 1
268 /* Master MADT */
270 struct AcpiMultipleApicTable
272 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
273 uint32_t local_apic_address; /* Physical address of local APIC */
274 uint32_t flags;
275 } QEMU_PACKED;
276 typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
278 /* Values for Type in APIC sub-headers */
280 #define ACPI_APIC_PROCESSOR 0
281 #define ACPI_APIC_IO 1
282 #define ACPI_APIC_XRUPT_OVERRIDE 2
283 #define ACPI_APIC_NMI 3
284 #define ACPI_APIC_LOCAL_NMI 4
285 #define ACPI_APIC_ADDRESS_OVERRIDE 5
286 #define ACPI_APIC_IO_SAPIC 6
287 #define ACPI_APIC_LOCAL_SAPIC 7
288 #define ACPI_APIC_XRUPT_SOURCE 8
289 #define ACPI_APIC_LOCAL_X2APIC 9
290 #define ACPI_APIC_LOCAL_X2APIC_NMI 10
291 #define ACPI_APIC_GENERIC_CPU_INTERFACE 11
292 #define ACPI_APIC_GENERIC_DISTRIBUTOR 12
293 #define ACPI_APIC_GENERIC_MSI_FRAME 13
294 #define ACPI_APIC_GENERIC_REDISTRIBUTOR 14
295 #define ACPI_APIC_GENERIC_TRANSLATOR 15
296 #define ACPI_APIC_RESERVED 16 /* 16 and greater are reserved */
299 * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
301 #define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\
302 uint8_t type; \
303 uint8_t length;
305 /* Sub-structures for MADT */
307 struct AcpiMadtProcessorApic
309 ACPI_SUB_HEADER_DEF
310 uint8_t processor_id; /* ACPI processor id */
311 uint8_t local_apic_id; /* Processor's local APIC id */
312 uint32_t flags;
313 } QEMU_PACKED;
314 typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
316 struct AcpiMadtIoApic
318 ACPI_SUB_HEADER_DEF
319 uint8_t io_apic_id; /* I/O APIC ID */
320 uint8_t reserved; /* Reserved - must be zero */
321 uint32_t address; /* APIC physical address */
322 uint32_t interrupt; /* Global system interrupt where INTI
323 * lines start */
324 } QEMU_PACKED;
325 typedef struct AcpiMadtIoApic AcpiMadtIoApic;
327 struct AcpiMadtIntsrcovr {
328 ACPI_SUB_HEADER_DEF
329 uint8_t bus;
330 uint8_t source;
331 uint32_t gsi;
332 uint16_t flags;
333 } QEMU_PACKED;
334 typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
336 struct AcpiMadtLocalNmi {
337 ACPI_SUB_HEADER_DEF
338 uint8_t processor_id; /* ACPI processor id */
339 uint16_t flags; /* MPS INTI flags */
340 uint8_t lint; /* Local APIC LINT# */
341 } QEMU_PACKED;
342 typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
344 struct AcpiMadtProcessorX2Apic {
345 ACPI_SUB_HEADER_DEF
346 uint16_t reserved;
347 uint32_t x2apic_id; /* Processor's local x2APIC ID */
348 uint32_t flags;
349 uint32_t uid; /* Processor object _UID */
350 } QEMU_PACKED;
351 typedef struct AcpiMadtProcessorX2Apic AcpiMadtProcessorX2Apic;
353 struct AcpiMadtLocalX2ApicNmi {
354 ACPI_SUB_HEADER_DEF
355 uint16_t flags; /* MPS INTI flags */
356 uint32_t uid; /* Processor object _UID */
357 uint8_t lint; /* Local APIC LINT# */
358 uint8_t reserved[3]; /* Local APIC LINT# */
359 } QEMU_PACKED;
360 typedef struct AcpiMadtLocalX2ApicNmi AcpiMadtLocalX2ApicNmi;
362 struct AcpiMadtGenericCpuInterface {
363 ACPI_SUB_HEADER_DEF
364 uint16_t reserved;
365 uint32_t cpu_interface_number;
366 uint32_t uid;
367 uint32_t flags;
368 uint32_t parking_version;
369 uint32_t performance_interrupt;
370 uint64_t parked_address;
371 uint64_t base_address;
372 uint64_t gicv_base_address;
373 uint64_t gich_base_address;
374 uint32_t vgic_interrupt;
375 uint64_t gicr_base_address;
376 uint64_t arm_mpidr;
377 } QEMU_PACKED;
379 typedef struct AcpiMadtGenericCpuInterface AcpiMadtGenericCpuInterface;
381 /* GICC CPU Interface Flags */
382 #define ACPI_MADT_GICC_ENABLED 1
384 struct AcpiMadtGenericDistributor {
385 ACPI_SUB_HEADER_DEF
386 uint16_t reserved;
387 uint32_t gic_id;
388 uint64_t base_address;
389 uint32_t global_irq_base;
390 /* ACPI 5.1 Errata 1228 Present GIC version in MADT table */
391 uint8_t version;
392 uint8_t reserved2[3];
393 } QEMU_PACKED;
395 typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor;
397 struct AcpiMadtGenericMsiFrame {
398 ACPI_SUB_HEADER_DEF
399 uint16_t reserved;
400 uint32_t gic_msi_frame_id;
401 uint64_t base_address;
402 uint32_t flags;
403 uint16_t spi_count;
404 uint16_t spi_base;
405 } QEMU_PACKED;
407 typedef struct AcpiMadtGenericMsiFrame AcpiMadtGenericMsiFrame;
409 struct AcpiMadtGenericRedistributor {
410 ACPI_SUB_HEADER_DEF
411 uint16_t reserved;
412 uint64_t base_address;
413 uint32_t range_length;
414 } QEMU_PACKED;
416 typedef struct AcpiMadtGenericRedistributor AcpiMadtGenericRedistributor;
418 struct AcpiMadtGenericTranslator {
419 ACPI_SUB_HEADER_DEF
420 uint16_t reserved;
421 uint32_t translation_id;
422 uint64_t base_address;
423 uint32_t reserved2;
424 } QEMU_PACKED;
426 typedef struct AcpiMadtGenericTranslator AcpiMadtGenericTranslator;
429 * Generic Timer Description Table (GTDT)
431 #define ACPI_GTDT_INTERRUPT_MODE_LEVEL (0 << 0)
432 #define ACPI_GTDT_INTERRUPT_MODE_EDGE (1 << 0)
433 #define ACPI_GTDT_CAP_ALWAYS_ON (1 << 2)
435 struct AcpiGenericTimerTable {
436 ACPI_TABLE_HEADER_DEF
437 uint64_t counter_block_addresss;
438 uint32_t reserved;
439 uint32_t secure_el1_interrupt;
440 uint32_t secure_el1_flags;
441 uint32_t non_secure_el1_interrupt;
442 uint32_t non_secure_el1_flags;
443 uint32_t virtual_timer_interrupt;
444 uint32_t virtual_timer_flags;
445 uint32_t non_secure_el2_interrupt;
446 uint32_t non_secure_el2_flags;
447 uint64_t counter_read_block_address;
448 uint32_t platform_timer_count;
449 uint32_t platform_timer_offset;
450 } QEMU_PACKED;
451 typedef struct AcpiGenericTimerTable AcpiGenericTimerTable;
454 * HPET Description Table
456 struct Acpi20Hpet {
457 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
458 uint32_t timer_block_id;
459 Acpi20GenericAddress addr;
460 uint8_t hpet_number;
461 uint16_t min_tick;
462 uint8_t page_protect;
463 } QEMU_PACKED;
464 typedef struct Acpi20Hpet Acpi20Hpet;
467 * SRAT (NUMA topology description) table
470 struct AcpiSystemResourceAffinityTable
472 ACPI_TABLE_HEADER_DEF
473 uint32_t reserved1;
474 uint32_t reserved2[2];
475 } QEMU_PACKED;
476 typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
478 #define ACPI_SRAT_PROCESSOR_APIC 0
479 #define ACPI_SRAT_MEMORY 1
480 #define ACPI_SRAT_PROCESSOR_x2APIC 2
481 #define ACPI_SRAT_PROCESSOR_GICC 3
483 struct AcpiSratProcessorAffinity
485 ACPI_SUB_HEADER_DEF
486 uint8_t proximity_lo;
487 uint8_t local_apic_id;
488 uint32_t flags;
489 uint8_t local_sapic_eid;
490 uint8_t proximity_hi[3];
491 uint32_t reserved;
492 } QEMU_PACKED;
493 typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
495 struct AcpiSratProcessorX2ApicAffinity {
496 ACPI_SUB_HEADER_DEF
497 uint16_t reserved;
498 uint32_t proximity_domain;
499 uint32_t x2apic_id;
500 uint32_t flags;
501 uint32_t clk_domain;
502 uint32_t reserved2;
503 } QEMU_PACKED;
504 typedef struct AcpiSratProcessorX2ApicAffinity AcpiSratProcessorX2ApicAffinity;
506 struct AcpiSratMemoryAffinity
508 ACPI_SUB_HEADER_DEF
509 uint32_t proximity;
510 uint16_t reserved1;
511 uint64_t base_addr;
512 uint64_t range_length;
513 uint32_t reserved2;
514 uint32_t flags;
515 uint32_t reserved3[2];
516 } QEMU_PACKED;
517 typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
519 struct AcpiSratProcessorGiccAffinity
521 ACPI_SUB_HEADER_DEF
522 uint32_t proximity;
523 uint32_t acpi_processor_uid;
524 uint32_t flags;
525 uint32_t clock_domain;
526 } QEMU_PACKED;
528 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
530 /* PCI fw r3.0 MCFG table. */
531 /* Subtable */
532 struct AcpiMcfgAllocation {
533 uint64_t address; /* Base address, processor-relative */
534 uint16_t pci_segment; /* PCI segment group number */
535 uint8_t start_bus_number; /* Starting PCI Bus number */
536 uint8_t end_bus_number; /* Final PCI Bus number */
537 uint32_t reserved;
538 } QEMU_PACKED;
539 typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
541 struct AcpiTableMcfg {
542 ACPI_TABLE_HEADER_DEF;
543 uint8_t reserved[8];
544 AcpiMcfgAllocation allocation[0];
545 } QEMU_PACKED;
546 typedef struct AcpiTableMcfg AcpiTableMcfg;
549 * TCPA Description Table
551 * Following Level 00, Rev 00.37 of specs:
552 * http://www.trustedcomputinggroup.org/resources/tcg_acpi_specification
554 struct Acpi20Tcpa {
555 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
556 uint16_t platform_class;
557 uint32_t log_area_minimum_length;
558 uint64_t log_area_start_address;
559 } QEMU_PACKED;
560 typedef struct Acpi20Tcpa Acpi20Tcpa;
563 * TPM2
565 * Following Level 00, Rev 00.37 of specs:
566 * http://www.trustedcomputinggroup.org/resources/tcg_acpi_specification
568 struct Acpi20TPM2 {
569 ACPI_TABLE_HEADER_DEF
570 uint16_t platform_class;
571 uint16_t reserved;
572 uint64_t control_area_address;
573 uint32_t start_method;
574 } QEMU_PACKED;
575 typedef struct Acpi20TPM2 Acpi20TPM2;
577 /* DMAR - DMA Remapping table r2.2 */
578 struct AcpiTableDmar {
579 ACPI_TABLE_HEADER_DEF
580 uint8_t host_address_width; /* Maximum DMA physical addressability */
581 uint8_t flags;
582 uint8_t reserved[10];
583 } QEMU_PACKED;
584 typedef struct AcpiTableDmar AcpiTableDmar;
586 /* Masks for Flags field above */
587 #define ACPI_DMAR_INTR_REMAP 1
588 #define ACPI_DMAR_X2APIC_OPT_OUT (1 << 1)
590 /* Values for sub-structure type for DMAR */
591 enum {
592 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, /* DRHD */
593 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, /* RMRR */
594 ACPI_DMAR_TYPE_ATSR = 2, /* ATSR */
595 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, /* RHSR */
596 ACPI_DMAR_TYPE_ANDD = 4, /* ANDD */
597 ACPI_DMAR_TYPE_RESERVED = 5 /* Reserved for furture use */
601 * Sub-structures for DMAR
604 /* Device scope structure for DRHD. */
605 struct AcpiDmarDeviceScope {
606 uint8_t entry_type;
607 uint8_t length;
608 uint16_t reserved;
609 uint8_t enumeration_id;
610 uint8_t bus;
611 struct {
612 uint8_t device;
613 uint8_t function;
614 } path[0];
615 } QEMU_PACKED;
616 typedef struct AcpiDmarDeviceScope AcpiDmarDeviceScope;
618 /* Type 0: Hardware Unit Definition */
619 struct AcpiDmarHardwareUnit {
620 uint16_t type;
621 uint16_t length;
622 uint8_t flags;
623 uint8_t reserved;
624 uint16_t pci_segment; /* The PCI Segment associated with this unit */
625 uint64_t address; /* Base address of remapping hardware register-set */
626 AcpiDmarDeviceScope scope[0];
627 } QEMU_PACKED;
628 typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
630 /* Masks for Flags field above */
631 #define ACPI_DMAR_INCLUDE_PCI_ALL 1
634 * Input Output Remapping Table (IORT)
635 * Conforms to "IO Remapping Table System Software on ARM Platforms",
636 * Document number: ARM DEN 0049B, October 2015
639 struct AcpiIortTable {
640 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
641 uint32_t node_count;
642 uint32_t node_offset;
643 uint32_t reserved;
644 } QEMU_PACKED;
645 typedef struct AcpiIortTable AcpiIortTable;
648 * IORT node types
651 #define ACPI_IORT_NODE_HEADER_DEF /* Node format common fields */ \
652 uint8_t type; \
653 uint16_t length; \
654 uint8_t revision; \
655 uint32_t reserved; \
656 uint32_t mapping_count; \
657 uint32_t mapping_offset;
659 /* Values for node Type above */
660 enum {
661 ACPI_IORT_NODE_ITS_GROUP = 0x00,
662 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
663 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
664 ACPI_IORT_NODE_SMMU = 0x03,
665 ACPI_IORT_NODE_SMMU_V3 = 0x04
668 struct AcpiIortIdMapping {
669 uint32_t input_base;
670 uint32_t id_count;
671 uint32_t output_base;
672 uint32_t output_reference;
673 uint32_t flags;
674 } QEMU_PACKED;
675 typedef struct AcpiIortIdMapping AcpiIortIdMapping;
677 struct AcpiIortMemoryAccess {
678 uint32_t cache_coherency;
679 uint8_t hints;
680 uint16_t reserved;
681 uint8_t memory_flags;
682 } QEMU_PACKED;
683 typedef struct AcpiIortMemoryAccess AcpiIortMemoryAccess;
685 struct AcpiIortItsGroup {
686 ACPI_IORT_NODE_HEADER_DEF
687 uint32_t its_count;
688 uint32_t identifiers[0];
689 } QEMU_PACKED;
690 typedef struct AcpiIortItsGroup AcpiIortItsGroup;
692 struct AcpiIortRC {
693 ACPI_IORT_NODE_HEADER_DEF
694 AcpiIortMemoryAccess memory_properties;
695 uint32_t ats_attribute;
696 uint32_t pci_segment_number;
697 AcpiIortIdMapping id_mapping_array[0];
698 } QEMU_PACKED;
699 typedef struct AcpiIortRC AcpiIortRC;
701 #endif