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wxx: Fix compiler warning for host-libusb.c
[qemu/ar7.git] / memory.c
blob66f864ca21df51049894bb8a2d67adfb0af198fe
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
21 #include "exec/memory.h"
22 #include "exec/address-spaces.h"
23 #include "exec/ioport.h"
24 #include "qapi/visitor.h"
25 #include "qemu/bitops.h"
26 #include "qemu/error-report.h"
27 #include "qom/object.h"
28 #include "trace.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/sysemu.h"
34
35 //#define DEBUG_UNASSIGNED
36
37 static unsigned memory_region_transaction_depth;
38 static bool memory_region_update_pending;
39 static bool ioeventfd_update_pending;
40 static bool global_dirty_log = false;
41
42 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
43 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
44
45 static QTAILQ_HEAD(, AddressSpace) address_spaces
46 = QTAILQ_HEAD_INITIALIZER(address_spaces);
47
48 typedef struct AddrRange AddrRange;
49
50 /*
51 * Note that signed integers are needed for negative offsetting in aliases
52 * (large MemoryRegion::alias_offset).
53 */
54 struct AddrRange {
55 Int128 start;
56 Int128 size;
57 };
58
59 static AddrRange addrrange_make(Int128 start, Int128 size)
60 {
61 return (AddrRange) { start, size };
62 }
63
64 static bool addrrange_equal(AddrRange r1, AddrRange r2)
65 {
66 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
67 }
68
69 static Int128 addrrange_end(AddrRange r)
70 {
71 return int128_add(r.start, r.size);
72 }
73
74 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
75 {
76 int128_addto(&range.start, delta);
77 return range;
78 }
79
80 static bool addrrange_contains(AddrRange range, Int128 addr)
81 {
82 return int128_ge(addr, range.start)
83 && int128_lt(addr, addrrange_end(range));
84 }
85
86 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
87 {
88 return addrrange_contains(r1, r2.start)
89 || addrrange_contains(r2, r1.start);
90 }
91
92 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
93 {
94 Int128 start = int128_max(r1.start, r2.start);
95 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
96 return addrrange_make(start, int128_sub(end, start));
97 }
98
99 enum ListenerDirection { Forward, Reverse };
100
101 static bool memory_listener_match(MemoryListener *listener,
102 MemoryRegionSection *section)
103 {
104 return !listener->address_space_filter
105 || listener->address_space_filter == section->address_space;
106 }
107
108 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
109 do { \
110 MemoryListener *_listener; \
111 \
112 switch (_direction) { \
113 case Forward: \
114 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
115 if (_listener->_callback) { \
116 _listener->_callback(_listener, ##_args); \
117 } \
118 } \
119 break; \
120 case Reverse: \
121 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
122 memory_listeners, link) { \
123 if (_listener->_callback) { \
124 _listener->_callback(_listener, ##_args); \
125 } \
126 } \
127 break; \
128 default: \
129 abort(); \
130 } \
131 } while (0)
132
133 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
134 do { \
135 MemoryListener *_listener; \
136 \
137 switch (_direction) { \
138 case Forward: \
139 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
140 if (_listener->_callback \
141 && memory_listener_match(_listener, _section)) { \
142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 case Reverse: \
147 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
148 memory_listeners, link) { \
149 if (_listener->_callback \
150 && memory_listener_match(_listener, _section)) { \
151 _listener->_callback(_listener, _section, ##_args); \
152 } \
153 } \
154 break; \
155 default: \
156 abort(); \
157 } \
158 } while (0)
159
160 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
161 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
162 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
163 .mr = (fr)->mr, \
164 .address_space = (as), \
165 .offset_within_region = (fr)->offset_in_region, \
166 .size = (fr)->addr.size, \
167 .offset_within_address_space = int128_get64((fr)->addr.start), \
168 .readonly = (fr)->readonly, \
169 }), ##_args)
170
171 struct CoalescedMemoryRange {
172 AddrRange addr;
173 QTAILQ_ENTRY(CoalescedMemoryRange) link;
174 };
175
176 struct MemoryRegionIoeventfd {
177 AddrRange addr;
178 bool match_data;
179 uint64_t data;
180 EventNotifier *e;
181 };
182
183 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
184 MemoryRegionIoeventfd b)
185 {
186 if (int128_lt(a.addr.start, b.addr.start)) {
187 return true;
188 } else if (int128_gt(a.addr.start, b.addr.start)) {
189 return false;
190 } else if (int128_lt(a.addr.size, b.addr.size)) {
191 return true;
192 } else if (int128_gt(a.addr.size, b.addr.size)) {
193 return false;
194 } else if (a.match_data < b.match_data) {
195 return true;
196 } else if (a.match_data > b.match_data) {
197 return false;
198 } else if (a.match_data) {
199 if (a.data < b.data) {
200 return true;
201 } else if (a.data > b.data) {
202 return false;
203 }
204 }
205 if (a.e < b.e) {
206 return true;
207 } else if (a.e > b.e) {
208 return false;
209 }
210 return false;
211 }
212
213 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
214 MemoryRegionIoeventfd b)
215 {
216 return !memory_region_ioeventfd_before(a, b)
217 && !memory_region_ioeventfd_before(b, a);
218 }
219
220 typedef struct FlatRange FlatRange;
221 typedef struct FlatView FlatView;
222
223 /* Range of memory in the global map. Addresses are absolute. */
224 struct FlatRange {
225 MemoryRegion *mr;
226 hwaddr offset_in_region;
227 AddrRange addr;
228 uint8_t dirty_log_mask;
229 bool romd_mode;
230 bool readonly;
231 };
232
233 /* Flattened global view of current active memory hierarchy. Kept in sorted
234 * order.
235 */
236 struct FlatView {
237 struct rcu_head rcu;
238 unsigned ref;
239 FlatRange *ranges;
240 unsigned nr;
241 unsigned nr_allocated;
242 };
243
244 typedef struct AddressSpaceOps AddressSpaceOps;
245
246 #define FOR_EACH_FLAT_RANGE(var, view) \
247 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
248
249 static bool flatrange_equal(FlatRange *a, FlatRange *b)
250 {
251 return a->mr == b->mr
252 && addrrange_equal(a->addr, b->addr)
253 && a->offset_in_region == b->offset_in_region
254 && a->romd_mode == b->romd_mode
255 && a->readonly == b->readonly;
256 }
257
258 static void flatview_init(FlatView *view)
259 {
260 view->ref = 1;
261 view->ranges = NULL;
262 view->nr = 0;
263 view->nr_allocated = 0;
264 }
265
266 /* Insert a range into a given position. Caller is responsible for maintaining
267 * sorting order.
268 */
269 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
270 {
271 if (view->nr == view->nr_allocated) {
272 view->nr_allocated = MAX(2 * view->nr, 10);
273 view->ranges = g_realloc(view->ranges,
274 view->nr_allocated * sizeof(*view->ranges));
275 }
276 memmove(view->ranges + pos + 1, view->ranges + pos,
277 (view->nr - pos) * sizeof(FlatRange));
278 view->ranges[pos] = *range;
279 memory_region_ref(range->mr);
280 ++view->nr;
281 }
282
283 static void flatview_destroy(FlatView *view)
284 {
285 int i;
286
287 for (i = 0; i < view->nr; i++) {
288 memory_region_unref(view->ranges[i].mr);
289 }
290 g_free(view->ranges);
291 g_free(view);
292 }
293
294 static void flatview_ref(FlatView *view)
295 {
296 atomic_inc(&view->ref);
297 }
298
299 static void flatview_unref(FlatView *view)
300 {
301 if (atomic_fetch_dec(&view->ref) == 1) {
302 flatview_destroy(view);
303 }
304 }
305
306 static bool can_merge(FlatRange *r1, FlatRange *r2)
307 {
308 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
309 && r1->mr == r2->mr
310 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
311 r1->addr.size),
312 int128_make64(r2->offset_in_region))
313 && r1->dirty_log_mask == r2->dirty_log_mask
314 && r1->romd_mode == r2->romd_mode
315 && r1->readonly == r2->readonly;
316 }
317
318 /* Attempt to simplify a view by merging adjacent ranges */
319 static void flatview_simplify(FlatView *view)
320 {
321 unsigned i, j;
322
323 i = 0;
324 while (i < view->nr) {
325 j = i + 1;
326 while (j < view->nr
327 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
328 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
329 ++j;
330 }
331 ++i;
332 memmove(&view->ranges[i], &view->ranges[j],
333 (view->nr - j) * sizeof(view->ranges[j]));
334 view->nr -= j - i;
335 }
336 }
337
338 static bool memory_region_big_endian(MemoryRegion *mr)
339 {
340 #ifdef TARGET_WORDS_BIGENDIAN
341 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
342 #else
343 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
344 #endif
345 }
346
347 static bool memory_region_wrong_endianness(MemoryRegion *mr)
348 {
349 #ifdef TARGET_WORDS_BIGENDIAN
350 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
351 #else
352 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
353 #endif
354 }
355
356 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
357 {
358 if (memory_region_wrong_endianness(mr)) {
359 switch (size) {
360 case 1:
361 break;
362 case 2:
363 *data = bswap16(*data);
364 break;
365 case 4:
366 *data = bswap32(*data);
367 break;
368 case 8:
369 *data = bswap64(*data);
370 break;
371 default:
372 abort();
373 }
374 }
375 }
376
377 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
378 {
379 MemoryRegion *root;
380 hwaddr abs_addr = offset;
381
382 abs_addr += mr->addr;
383 for (root = mr; root->container; ) {
384 root = root->container;
385 abs_addr += root->addr;
386 }
387
388 return abs_addr;
389 }
390
391 static int get_cpu_index(void)
392 {
393 if (current_cpu) {
394 return current_cpu->cpu_index;
395 }
396 return -1;
397 }
398
399 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
400 hwaddr addr,
401 uint64_t *value,
402 unsigned size,
403 unsigned shift,
404 uint64_t mask,
405 MemTxAttrs attrs)
406 {
407 uint64_t tmp;
408
409 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
410 if (mr->subpage) {
411 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
412 } else if (mr == &io_mem_notdirty) {
413 /* Accesses to code which has previously been translated into a TB show
414 * up in the MMIO path, as accesses to the io_mem_notdirty
415 * MemoryRegion. */
416 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
417 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
418 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
419 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
420 }
421 *value |= (tmp & mask) << shift;
422 return MEMTX_OK;
423 }
424
425 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
426 hwaddr addr,
427 uint64_t *value,
428 unsigned size,
429 unsigned shift,
430 uint64_t mask,
431 MemTxAttrs attrs)
432 {
433 uint64_t tmp;
434
435 tmp = mr->ops->read(mr->opaque, addr, size);
436 if (mr->subpage) {
437 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
438 } else if (mr == &io_mem_notdirty) {
439 /* Accesses to code which has previously been translated into a TB show
440 * up in the MMIO path, as accesses to the io_mem_notdirty
441 * MemoryRegion. */
442 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
443 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
444 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
445 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
446 }
447 *value |= (tmp & mask) << shift;
448 return MEMTX_OK;
449 }
450
451 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
452 hwaddr addr,
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask,
457 MemTxAttrs attrs)
458 {
459 uint64_t tmp = 0;
460 MemTxResult r;
461
462 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
463 if (mr->subpage) {
464 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
465 } else if (mr == &io_mem_notdirty) {
466 /* Accesses to code which has previously been translated into a TB show
467 * up in the MMIO path, as accesses to the io_mem_notdirty
468 * MemoryRegion. */
469 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
470 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
471 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
472 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
473 }
474 *value |= (tmp & mask) << shift;
475 return r;
476 }
477
478 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
479 hwaddr addr,
480 uint64_t *value,
481 unsigned size,
482 unsigned shift,
483 uint64_t mask,
484 MemTxAttrs attrs)
485 {
486 uint64_t tmp;
487
488 tmp = (*value >> shift) & mask;
489 if (mr->subpage) {
490 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
491 } else if (mr == &io_mem_notdirty) {
492 /* Accesses to code which has previously been translated into a TB show
493 * up in the MMIO path, as accesses to the io_mem_notdirty
494 * MemoryRegion. */
495 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
496 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
497 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
498 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
499 }
500 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
501 return MEMTX_OK;
502 }
503
504 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
505 hwaddr addr,
506 uint64_t *value,
507 unsigned size,
508 unsigned shift,
509 uint64_t mask,
510 MemTxAttrs attrs)
511 {
512 uint64_t tmp;
513
514 tmp = (*value >> shift) & mask;
515 if (mr->subpage) {
516 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
517 } else if (mr == &io_mem_notdirty) {
518 /* Accesses to code which has previously been translated into a TB show
519 * up in the MMIO path, as accesses to the io_mem_notdirty
520 * MemoryRegion. */
521 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
522 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
523 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
524 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
525 }
526 mr->ops->write(mr->opaque, addr, tmp, size);
527 return MEMTX_OK;
528 }
529
530 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
531 hwaddr addr,
532 uint64_t *value,
533 unsigned size,
534 unsigned shift,
535 uint64_t mask,
536 MemTxAttrs attrs)
537 {
538 uint64_t tmp;
539
540 tmp = (*value >> shift) & mask;
541 if (mr->subpage) {
542 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
543 } else if (mr == &io_mem_notdirty) {
544 /* Accesses to code which has previously been translated into a TB show
545 * up in the MMIO path, as accesses to the io_mem_notdirty
546 * MemoryRegion. */
547 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
548 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
549 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
550 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
551 }
552 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
553 }
554
555 static MemTxResult access_with_adjusted_size(hwaddr addr,
556 uint64_t *value,
557 unsigned size,
558 unsigned access_size_min,
559 unsigned access_size_max,
560 MemTxResult (*access)(MemoryRegion *mr,
561 hwaddr addr,
562 uint64_t *value,
563 unsigned size,
564 unsigned shift,
565 uint64_t mask,
566 MemTxAttrs attrs),
567 MemoryRegion *mr,
568 MemTxAttrs attrs)
569 {
570 uint64_t access_mask;
571 unsigned access_size;
572 unsigned i;
573 MemTxResult r = MEMTX_OK;
574
575 if (!access_size_min) {
576 access_size_min = 1;
577 }
578 if (!access_size_max) {
579 access_size_max = 4;
580 }
581
582 /* FIXME: support unaligned access? */
583 access_size = MAX(MIN(size, access_size_max), access_size_min);
584 access_mask = -1ULL >> (64 - access_size * 8);
585 if (memory_region_big_endian(mr)) {
586 for (i = 0; i < size; i += access_size) {
587 r |= access(mr, addr + i, value, access_size,
588 (size - access_size - i) * 8, access_mask, attrs);
589 }
590 } else {
591 for (i = 0; i < size; i += access_size) {
592 r |= access(mr, addr + i, value, access_size, i * 8,
593 access_mask, attrs);
594 }
595 }
596 return r;
597 }
598
599 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
600 {
601 AddressSpace *as;
602
603 while (mr->container) {
604 mr = mr->container;
605 }
606 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
607 if (mr == as->root) {
608 return as;
609 }
610 }
611 return NULL;
612 }
613
614 /* Render a memory region into the global view. Ranges in @view obscure
615 * ranges in @mr.
616 */
617 static void render_memory_region(FlatView *view,
618 MemoryRegion *mr,
619 Int128 base,
620 AddrRange clip,
621 bool readonly)
622 {
623 MemoryRegion *subregion;
624 unsigned i;
625 hwaddr offset_in_region;
626 Int128 remain;
627 Int128 now;
628 FlatRange fr;
629 AddrRange tmp;
630
631 if (!mr->enabled) {
632 return;
633 }
634
635 int128_addto(&base, int128_make64(mr->addr));
636 readonly |= mr->readonly;
637
638 tmp = addrrange_make(base, mr->size);
639
640 if (!addrrange_intersects(tmp, clip)) {
641 return;
642 }
643
644 clip = addrrange_intersection(tmp, clip);
645
646 if (mr->alias) {
647 int128_subfrom(&base, int128_make64(mr->alias->addr));
648 int128_subfrom(&base, int128_make64(mr->alias_offset));
649 render_memory_region(view, mr->alias, base, clip, readonly);
650 return;
651 }
652
653 /* Render subregions in priority order. */
654 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
655 render_memory_region(view, subregion, base, clip, readonly);
656 }
657
658 if (!mr->terminates) {
659 return;
660 }
661
662 offset_in_region = int128_get64(int128_sub(clip.start, base));
663 base = clip.start;
664 remain = clip.size;
665
666 fr.mr = mr;
667 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
668 fr.romd_mode = mr->romd_mode;
669 fr.readonly = readonly;
670
671 /* Render the region itself into any gaps left by the current view. */
672 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
673 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
674 continue;
675 }
676 if (int128_lt(base, view->ranges[i].addr.start)) {
677 now = int128_min(remain,
678 int128_sub(view->ranges[i].addr.start, base));
679 fr.offset_in_region = offset_in_region;
680 fr.addr = addrrange_make(base, now);
681 flatview_insert(view, i, &fr);
682 ++i;
683 int128_addto(&base, now);
684 offset_in_region += int128_get64(now);
685 int128_subfrom(&remain, now);
686 }
687 now = int128_sub(int128_min(int128_add(base, remain),
688 addrrange_end(view->ranges[i].addr)),
689 base);
690 int128_addto(&base, now);
691 offset_in_region += int128_get64(now);
692 int128_subfrom(&remain, now);
693 }
694 if (int128_nz(remain)) {
695 fr.offset_in_region = offset_in_region;
696 fr.addr = addrrange_make(base, remain);
697 flatview_insert(view, i, &fr);
698 }
699 }
700
701 /* Render a memory topology into a list of disjoint absolute ranges. */
702 static FlatView *generate_memory_topology(MemoryRegion *mr)
703 {
704 FlatView *view;
705
706 view = g_new(FlatView, 1);
707 flatview_init(view);
708
709 if (mr) {
710 render_memory_region(view, mr, int128_zero(),
711 addrrange_make(int128_zero(), int128_2_64()), false);
712 }
713 flatview_simplify(view);
714
715 return view;
716 }
717
718 static void address_space_add_del_ioeventfds(AddressSpace *as,
719 MemoryRegionIoeventfd *fds_new,
720 unsigned fds_new_nb,
721 MemoryRegionIoeventfd *fds_old,
722 unsigned fds_old_nb)
723 {
724 unsigned iold, inew;
725 MemoryRegionIoeventfd *fd;
726 MemoryRegionSection section;
727
728 /* Generate a symmetric difference of the old and new fd sets, adding
729 * and deleting as necessary.
730 */
731
732 iold = inew = 0;
733 while (iold < fds_old_nb || inew < fds_new_nb) {
734 if (iold < fds_old_nb
735 && (inew == fds_new_nb
736 || memory_region_ioeventfd_before(fds_old[iold],
737 fds_new[inew]))) {
738 fd = &fds_old[iold];
739 section = (MemoryRegionSection) {
740 .address_space = as,
741 .offset_within_address_space = int128_get64(fd->addr.start),
742 .size = fd->addr.size,
743 };
744 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
745 fd->match_data, fd->data, fd->e);
746 ++iold;
747 } else if (inew < fds_new_nb
748 && (iold == fds_old_nb
749 || memory_region_ioeventfd_before(fds_new[inew],
750 fds_old[iold]))) {
751 fd = &fds_new[inew];
752 section = (MemoryRegionSection) {
753 .address_space = as,
754 .offset_within_address_space = int128_get64(fd->addr.start),
755 .size = fd->addr.size,
756 };
757 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
758 fd->match_data, fd->data, fd->e);
759 ++inew;
760 } else {
761 ++iold;
762 ++inew;
763 }
764 }
765 }
766
767 static FlatView *address_space_get_flatview(AddressSpace *as)
768 {
769 FlatView *view;
770
771 rcu_read_lock();
772 view = atomic_rcu_read(&as->current_map);
773 flatview_ref(view);
774 rcu_read_unlock();
775 return view;
776 }
777
778 static void address_space_update_ioeventfds(AddressSpace *as)
779 {
780 FlatView *view;
781 FlatRange *fr;
782 unsigned ioeventfd_nb = 0;
783 MemoryRegionIoeventfd *ioeventfds = NULL;
784 AddrRange tmp;
785 unsigned i;
786
787 view = address_space_get_flatview(as);
788 FOR_EACH_FLAT_RANGE(fr, view) {
789 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
790 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
791 int128_sub(fr->addr.start,
792 int128_make64(fr->offset_in_region)));
793 if (addrrange_intersects(fr->addr, tmp)) {
794 ++ioeventfd_nb;
795 ioeventfds = g_realloc(ioeventfds,
796 ioeventfd_nb * sizeof(*ioeventfds));
797 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
798 ioeventfds[ioeventfd_nb-1].addr = tmp;
799 }
800 }
801 }
802
803 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
804 as->ioeventfds, as->ioeventfd_nb);
805
806 g_free(as->ioeventfds);
807 as->ioeventfds = ioeventfds;
808 as->ioeventfd_nb = ioeventfd_nb;
809 flatview_unref(view);
810 }
811
812 static void address_space_update_topology_pass(AddressSpace *as,
813 const FlatView *old_view,
814 const FlatView *new_view,
815 bool adding)
816 {
817 unsigned iold, inew;
818 FlatRange *frold, *frnew;
819
820 /* Generate a symmetric difference of the old and new memory maps.
821 * Kill ranges in the old map, and instantiate ranges in the new map.
822 */
823 iold = inew = 0;
824 while (iold < old_view->nr || inew < new_view->nr) {
825 if (iold < old_view->nr) {
826 frold = &old_view->ranges[iold];
827 } else {
828 frold = NULL;
829 }
830 if (inew < new_view->nr) {
831 frnew = &new_view->ranges[inew];
832 } else {
833 frnew = NULL;
834 }
835
836 if (frold
837 && (!frnew
838 || int128_lt(frold->addr.start, frnew->addr.start)
839 || (int128_eq(frold->addr.start, frnew->addr.start)
840 && !flatrange_equal(frold, frnew)))) {
841 /* In old but not in new, or in both but attributes changed. */
842
843 if (!adding) {
844 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
845 }
846
847 ++iold;
848 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
849 /* In both and unchanged (except logging may have changed) */
850
851 if (adding) {
852 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
853 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
854 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
855 frold->dirty_log_mask,
856 frnew->dirty_log_mask);
857 }
858 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
859 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
860 frold->dirty_log_mask,
861 frnew->dirty_log_mask);
862 }
863 }
864
865 ++iold;
866 ++inew;
867 } else {
868 /* In new */
869
870 if (adding) {
871 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
872 }
873
874 ++inew;
875 }
876 }
877 }
878
879
880 static void address_space_update_topology(AddressSpace *as)
881 {
882 FlatView *old_view = address_space_get_flatview(as);
883 FlatView *new_view = generate_memory_topology(as->root);
884
885 address_space_update_topology_pass(as, old_view, new_view, false);
886 address_space_update_topology_pass(as, old_view, new_view, true);
887
888 /* Writes are protected by the BQL. */
889 atomic_rcu_set(&as->current_map, new_view);
890 call_rcu(old_view, flatview_unref, rcu);
891
892 /* Note that all the old MemoryRegions are still alive up to this
893 * point. This relieves most MemoryListeners from the need to
894 * ref/unref the MemoryRegions they get---unless they use them
895 * outside the iothread mutex, in which case precise reference
896 * counting is necessary.
897 */
898 flatview_unref(old_view);
899
900 address_space_update_ioeventfds(as);
901 }
902
903 void memory_region_transaction_begin(void)
904 {
905 qemu_flush_coalesced_mmio_buffer();
906 ++memory_region_transaction_depth;
907 }
908
909 static void memory_region_clear_pending(void)
910 {
911 memory_region_update_pending = false;
912 ioeventfd_update_pending = false;
913 }
914
915 void memory_region_transaction_commit(void)
916 {
917 AddressSpace *as;
918
919 assert(memory_region_transaction_depth);
920 --memory_region_transaction_depth;
921 if (!memory_region_transaction_depth) {
922 if (memory_region_update_pending) {
923 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
924
925 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
926 address_space_update_topology(as);
927 }
928
929 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
930 } else if (ioeventfd_update_pending) {
931 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
932 address_space_update_ioeventfds(as);
933 }
934 }
935 memory_region_clear_pending();
936 }
937 }
938
939 static void memory_region_destructor_none(MemoryRegion *mr)
940 {
941 }
942
943 static void memory_region_destructor_ram(MemoryRegion *mr)
944 {
945 qemu_ram_free(mr->ram_block);
946 }
947
948 static void memory_region_destructor_rom_device(MemoryRegion *mr)
949 {
950 qemu_ram_free(mr->ram_block);
951 }
952
953 static bool memory_region_need_escape(char c)
954 {
955 return c == '/' || c == '[' || c == '\\' || c == ']';
956 }
957
958 static char *memory_region_escape_name(const char *name)
959 {
960 const char *p;
961 char *escaped, *q;
962 uint8_t c;
963 size_t bytes = 0;
964
965 for (p = name; *p; p++) {
966 bytes += memory_region_need_escape(*p) ? 4 : 1;
967 }
968 if (bytes == p - name) {
969 return g_memdup(name, bytes + 1);
970 }
971
972 escaped = g_malloc(bytes + 1);
973 for (p = name, q = escaped; *p; p++) {
974 c = *p;
975 if (unlikely(memory_region_need_escape(c))) {
976 *q++ = '\\';
977 *q++ = 'x';
978 *q++ = "0123456789abcdef"[c >> 4];
979 c = "0123456789abcdef"[c & 15];
980 }
981 *q++ = c;
982 }
983 *q = 0;
984 return escaped;
985 }
986
987 void memory_region_init(MemoryRegion *mr,
988 Object *owner,
989 const char *name,
990 uint64_t size)
991 {
992 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
993 mr->size = int128_make64(size);
994 if (size == UINT64_MAX) {
995 mr->size = int128_2_64();
996 }
997 mr->name = g_strdup(name);
998 mr->owner = owner;
999 mr->ram_block = NULL;
1000
1001 if (name) {
1002 char *escaped_name = memory_region_escape_name(name);
1003 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1004
1005 if (!owner) {
1006 owner = container_get(qdev_get_machine(), "/unattached");
1007 }
1008
1009 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1010 object_unref(OBJECT(mr));
1011 g_free(name_array);
1012 g_free(escaped_name);
1013 }
1014 }
1015
1016 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1017 void *opaque, Error **errp)
1018 {
1019 MemoryRegion *mr = MEMORY_REGION(obj);
1020 uint64_t value = mr->addr;
1021
1022 visit_type_uint64(v, name, &value, errp);
1023 }
1024
1025 static void memory_region_get_container(Object *obj, Visitor *v,
1026 const char *name, void *opaque,
1027 Error **errp)
1028 {
1029 MemoryRegion *mr = MEMORY_REGION(obj);
1030 gchar *path = (gchar *)"";
1031
1032 if (mr->container) {
1033 path = object_get_canonical_path(OBJECT(mr->container));
1034 }
1035 visit_type_str(v, name, &path, errp);
1036 if (mr->container) {
1037 g_free(path);
1038 }
1039 }
1040
1041 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1042 const char *part)
1043 {
1044 MemoryRegion *mr = MEMORY_REGION(obj);
1045
1046 return OBJECT(mr->container);
1047 }
1048
1049 static void memory_region_get_priority(Object *obj, Visitor *v,
1050 const char *name, void *opaque,
1051 Error **errp)
1052 {
1053 MemoryRegion *mr = MEMORY_REGION(obj);
1054 int32_t value = mr->priority;
1055
1056 visit_type_int32(v, name, &value, errp);
1057 }
1058
1059 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1060 void *opaque, Error **errp)
1061 {
1062 MemoryRegion *mr = MEMORY_REGION(obj);
1063 uint64_t value = memory_region_size(mr);
1064
1065 visit_type_uint64(v, name, &value, errp);
1066 }
1067
1068 static void memory_region_initfn(Object *obj)
1069 {
1070 MemoryRegion *mr = MEMORY_REGION(obj);
1071 ObjectProperty *op;
1072
1073 mr->ops = &unassigned_mem_ops;
1074 mr->enabled = true;
1075 mr->romd_mode = true;
1076 mr->global_locking = true;
1077 mr->destructor = memory_region_destructor_none;
1078 QTAILQ_INIT(&mr->subregions);
1079 QTAILQ_INIT(&mr->coalesced);
1080
1081 op = object_property_add(OBJECT(mr), "container",
1082 "link<" TYPE_MEMORY_REGION ">",
1083 memory_region_get_container,
1084 NULL, /* memory_region_set_container */
1085 NULL, NULL, &error_abort);
1086 op->resolve = memory_region_resolve_container;
1087
1088 object_property_add(OBJECT(mr), "addr", "uint64",
1089 memory_region_get_addr,
1090 NULL, /* memory_region_set_addr */
1091 NULL, NULL, &error_abort);
1092 object_property_add(OBJECT(mr), "priority", "uint32",
1093 memory_region_get_priority,
1094 NULL, /* memory_region_set_priority */
1095 NULL, NULL, &error_abort);
1096 object_property_add(OBJECT(mr), "size", "uint64",
1097 memory_region_get_size,
1098 NULL, /* memory_region_set_size, */
1099 NULL, NULL, &error_abort);
1100 }
1101
1102 static int qemu_target_backtrace(target_ulong *array, size_t size)
1103 {
1104 int n = 0;
1105 if (size >= 2) {
1106 #if defined(TARGET_ARM)
1107 CPUArchState *env = current_cpu->env_ptr;
1108 array[0] = env->regs[15];
1109 array[1] = env->regs[14];
1110 #elif defined(TARGET_MIPS)
1111 CPUArchState *env = current_cpu->env_ptr;
1112 array[0] = env->active_tc.PC;
1113 array[1] = env->active_tc.gpr[31];
1114 #else
1115 array[0] = 0;
1116 array[1] = 0;
1117 #endif
1118 n = 2;
1119 }
1120 return n;
1121 }
1122
1123 #include "disas/disas.h"
1124 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1125 {
1126 char *p = buffer;
1127 if (current_cpu) {
1128 target_ulong caller[2];
1129 const char *symbol;
1130 qemu_target_backtrace(caller, 2);
1131 symbol = lookup_symbol(caller[0]);
1132 p += sprintf(p, "[%s]", symbol);
1133 symbol = lookup_symbol(caller[1]);
1134 p += sprintf(p, "[%s]", symbol);
1135 } else {
1136 p += sprintf(p, "[cpu not running]");
1137 }
1138 assert((p - buffer) < length);
1139 return buffer;
1140 }
1141
1142 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1143 unsigned size)
1144 {
1145 if (trace_unassigned) {
1146 char buffer[256];
1147 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1148 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1149 }
1150 //~ vm_stop(0);
1151 if (current_cpu != NULL) {
1152 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1153 }
1154 return 0;
1155 }
1156
1157 static void unassigned_mem_write(void *opaque, hwaddr addr,
1158 uint64_t val, unsigned size)
1159 {
1160 if (trace_unassigned) {
1161 char buffer[256];
1162 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1163 " = 0x%" PRIx64 " %s\n",
1164 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1165 }
1166 if (current_cpu != NULL) {
1167 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1168 }
1169 }
1170
1171 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1172 unsigned size, bool is_write)
1173 {
1174 return false;
1175 }
1176
1177 const MemoryRegionOps unassigned_mem_ops = {
1178 .valid.accepts = unassigned_mem_accepts,
1179 .endianness = DEVICE_NATIVE_ENDIAN,
1180 };
1181
1182 bool memory_region_access_valid(MemoryRegion *mr,
1183 hwaddr addr,
1184 unsigned size,
1185 bool is_write)
1186 {
1187 int access_size_min, access_size_max;
1188 int access_size, i;
1189
1190 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1191 fprintf(stderr, "Misaligned i/o to address %08" HWADDR_PRIx
1192 " with size %u for memory region %s\n",
1193 addr, size, mr->name);
1194 return false;
1195 }
1196
1197 if (!mr->ops->valid.accepts) {
1198 return true;
1199 }
1200
1201 access_size_min = mr->ops->valid.min_access_size;
1202 if (!mr->ops->valid.min_access_size) {
1203 access_size_min = 1;
1204 }
1205
1206 access_size_max = mr->ops->valid.max_access_size;
1207 if (!mr->ops->valid.max_access_size) {
1208 access_size_max = 4;
1209 }
1210
1211 access_size = MAX(MIN(size, access_size_max), access_size_min);
1212 for (i = 0; i < size; i += access_size) {
1213 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1214 is_write)) {
1215 return false;
1216 }
1217 }
1218
1219 return true;
1220 }
1221
1222 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1223 hwaddr addr,
1224 uint64_t *pval,
1225 unsigned size,
1226 MemTxAttrs attrs)
1227 {
1228 *pval = 0;
1229
1230 if (mr->ops->read) {
1231 return access_with_adjusted_size(addr, pval, size,
1232 mr->ops->impl.min_access_size,
1233 mr->ops->impl.max_access_size,
1234 memory_region_read_accessor,
1235 mr, attrs);
1236 } else if (mr->ops->read_with_attrs) {
1237 return access_with_adjusted_size(addr, pval, size,
1238 mr->ops->impl.min_access_size,
1239 mr->ops->impl.max_access_size,
1240 memory_region_read_with_attrs_accessor,
1241 mr, attrs);
1242 } else {
1243 return access_with_adjusted_size(addr, pval, size, 1, 4,
1244 memory_region_oldmmio_read_accessor,
1245 mr, attrs);
1246 }
1247 }
1248
1249 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1250 hwaddr addr,
1251 uint64_t *pval,
1252 unsigned size,
1253 MemTxAttrs attrs)
1254 {
1255 MemTxResult r;
1256
1257 if (!memory_region_access_valid(mr, addr, size, false)) {
1258 *pval = unassigned_mem_read(mr, addr, size);
1259 return MEMTX_DECODE_ERROR;
1260 }
1261
1262 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1263 adjust_endianness(mr, pval, size);
1264 return r;
1265 }
1266
1267 /* Return true if an eventfd was signalled */
1268 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1269 hwaddr addr,
1270 uint64_t data,
1271 unsigned size,
1272 MemTxAttrs attrs)
1273 {
1274 MemoryRegionIoeventfd ioeventfd = {
1275 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1276 .data = data,
1277 };
1278 unsigned i;
1279
1280 for (i = 0; i < mr->ioeventfd_nb; i++) {
1281 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1282 ioeventfd.e = mr->ioeventfds[i].e;
1283
1284 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1285 event_notifier_set(ioeventfd.e);
1286 return true;
1287 }
1288 }
1289
1290 return false;
1291 }
1292
1293 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1294 hwaddr addr,
1295 uint64_t data,
1296 unsigned size,
1297 MemTxAttrs attrs)
1298 {
1299 if (!memory_region_access_valid(mr, addr, size, true)) {
1300 unassigned_mem_write(mr, addr, data, size);
1301 return MEMTX_DECODE_ERROR;
1302 }
1303
1304 adjust_endianness(mr, &data, size);
1305
1306 if ((!kvm_eventfds_enabled()) &&
1307 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1308 return MEMTX_OK;
1309 }
1310
1311 if (mr->ops->write) {
1312 return access_with_adjusted_size(addr, &data, size,
1313 mr->ops->impl.min_access_size,
1314 mr->ops->impl.max_access_size,
1315 memory_region_write_accessor, mr,
1316 attrs);
1317 } else if (mr->ops->write_with_attrs) {
1318 return
1319 access_with_adjusted_size(addr, &data, size,
1320 mr->ops->impl.min_access_size,
1321 mr->ops->impl.max_access_size,
1322 memory_region_write_with_attrs_accessor,
1323 mr, attrs);
1324 } else {
1325 return access_with_adjusted_size(addr, &data, size, 1, 4,
1326 memory_region_oldmmio_write_accessor,
1327 mr, attrs);
1328 }
1329 }
1330
1331 void memory_region_init_io(MemoryRegion *mr,
1332 Object *owner,
1333 const MemoryRegionOps *ops,
1334 void *opaque,
1335 const char *name,
1336 uint64_t size)
1337 {
1338 memory_region_init(mr, owner, name, size);
1339 mr->ops = ops ? ops : &unassigned_mem_ops;
1340 mr->opaque = opaque;
1341 mr->terminates = true;
1342 }
1343
1344 void memory_region_init_ram(MemoryRegion *mr,
1345 Object *owner,
1346 const char *name,
1347 uint64_t size,
1348 Error **errp)
1349 {
1350 memory_region_init(mr, owner, name, size);
1351 mr->ram = true;
1352 mr->terminates = true;
1353 mr->destructor = memory_region_destructor_ram;
1354 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1355 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1356 }
1357
1358 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1359 Object *owner,
1360 const char *name,
1361 uint64_t size,
1362 uint64_t max_size,
1363 void (*resized)(const char*,
1364 uint64_t length,
1365 void *host),
1366 Error **errp)
1367 {
1368 memory_region_init(mr, owner, name, size);
1369 mr->ram = true;
1370 mr->terminates = true;
1371 mr->destructor = memory_region_destructor_ram;
1372 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1373 mr, errp);
1374 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1375 }
1376
1377 #ifdef __linux__
1378 void memory_region_init_ram_from_file(MemoryRegion *mr,
1379 struct Object *owner,
1380 const char *name,
1381 uint64_t size,
1382 bool share,
1383 const char *path,
1384 Error **errp)
1385 {
1386 memory_region_init(mr, owner, name, size);
1387 mr->ram = true;
1388 mr->terminates = true;
1389 mr->destructor = memory_region_destructor_ram;
1390 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1391 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1392 }
1393 #endif
1394
1395 void memory_region_init_ram_ptr(MemoryRegion *mr,
1396 Object *owner,
1397 const char *name,
1398 uint64_t size,
1399 void *ptr)
1400 {
1401 memory_region_init(mr, owner, name, size);
1402 mr->ram = true;
1403 mr->terminates = true;
1404 mr->destructor = memory_region_destructor_ram;
1405 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1406
1407 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1408 assert(ptr != NULL);
1409 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1410 }
1411
1412 void memory_region_set_skip_dump(MemoryRegion *mr)
1413 {
1414 mr->skip_dump = true;
1415 }
1416
1417 void memory_region_init_alias(MemoryRegion *mr,
1418 Object *owner,
1419 const char *name,
1420 MemoryRegion *orig,
1421 hwaddr offset,
1422 uint64_t size)
1423 {
1424 memory_region_init(mr, owner, name, size);
1425 mr->alias = orig;
1426 mr->alias_offset = offset;
1427 }
1428
1429 void memory_region_init_rom(MemoryRegion *mr,
1430 struct Object *owner,
1431 const char *name,
1432 uint64_t size,
1433 Error **errp)
1434 {
1435 memory_region_init(mr, owner, name, size);
1436 mr->ram = true;
1437 mr->readonly = true;
1438 mr->terminates = true;
1439 mr->destructor = memory_region_destructor_ram;
1440 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1441 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1442 }
1443
1444 void memory_region_init_rom_device(MemoryRegion *mr,
1445 Object *owner,
1446 const MemoryRegionOps *ops,
1447 void *opaque,
1448 const char *name,
1449 uint64_t size,
1450 Error **errp)
1451 {
1452 assert(ops);
1453 memory_region_init(mr, owner, name, size);
1454 mr->ops = ops;
1455 mr->opaque = opaque;
1456 mr->terminates = true;
1457 mr->rom_device = true;
1458 mr->destructor = memory_region_destructor_rom_device;
1459 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1460 }
1461
1462 void memory_region_init_iommu(MemoryRegion *mr,
1463 Object *owner,
1464 const MemoryRegionIOMMUOps *ops,
1465 const char *name,
1466 uint64_t size)
1467 {
1468 memory_region_init(mr, owner, name, size);
1469 mr->iommu_ops = ops,
1470 mr->terminates = true; /* then re-forwards */
1471 notifier_list_init(&mr->iommu_notify);
1472 }
1473
1474 static void memory_region_finalize(Object *obj)
1475 {
1476 MemoryRegion *mr = MEMORY_REGION(obj);
1477
1478 assert(!mr->container);
1479
1480 /* We know the region is not visible in any address space (it
1481 * does not have a container and cannot be a root either because
1482 * it has no references, so we can blindly clear mr->enabled.
1483 * memory_region_set_enabled instead could trigger a transaction
1484 * and cause an infinite loop.
1485 */
1486 mr->enabled = false;
1487 memory_region_transaction_begin();
1488 while (!QTAILQ_EMPTY(&mr->subregions)) {
1489 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1490 memory_region_del_subregion(mr, subregion);
1491 }
1492 memory_region_transaction_commit();
1493
1494 mr->destructor(mr);
1495 memory_region_clear_coalescing(mr);
1496 g_free((char *)mr->name);
1497 g_free(mr->ioeventfds);
1498 }
1499
1500 Object *memory_region_owner(MemoryRegion *mr)
1501 {
1502 Object *obj = OBJECT(mr);
1503 return obj->parent;
1504 }
1505
1506 void memory_region_ref(MemoryRegion *mr)
1507 {
1508 /* MMIO callbacks most likely will access data that belongs
1509 * to the owner, hence the need to ref/unref the owner whenever
1510 * the memory region is in use.
1511 *
1512 * The memory region is a child of its owner. As long as the
1513 * owner doesn't call unparent itself on the memory region,
1514 * ref-ing the owner will also keep the memory region alive.
1515 * Memory regions without an owner are supposed to never go away;
1516 * we do not ref/unref them because it slows down DMA sensibly.
1517 */
1518 if (mr && mr->owner) {
1519 object_ref(mr->owner);
1520 }
1521 }
1522
1523 void memory_region_unref(MemoryRegion *mr)
1524 {
1525 if (mr && mr->owner) {
1526 object_unref(mr->owner);
1527 }
1528 }
1529
1530 uint64_t memory_region_size(MemoryRegion *mr)
1531 {
1532 if (int128_eq(mr->size, int128_2_64())) {
1533 return UINT64_MAX;
1534 }
1535 return int128_get64(mr->size);
1536 }
1537
1538 const char *memory_region_name(const MemoryRegion *mr)
1539 {
1540 if (!mr->name) {
1541 ((MemoryRegion *)mr)->name =
1542 object_get_canonical_path_component(OBJECT(mr));
1543 }
1544 return mr->name;
1545 }
1546
1547 bool memory_region_is_skip_dump(MemoryRegion *mr)
1548 {
1549 return mr->skip_dump;
1550 }
1551
1552 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1553 {
1554 uint8_t mask = mr->dirty_log_mask;
1555 if (global_dirty_log) {
1556 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1557 }
1558 return mask;
1559 }
1560
1561 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1562 {
1563 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1564 }
1565
1566 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1567 {
1568 if (mr->iommu_ops->notify_started &&
1569 QLIST_EMPTY(&mr->iommu_notify.notifiers)) {
1570 mr->iommu_ops->notify_started(mr);
1571 }
1572 notifier_list_add(&mr->iommu_notify, n);
1573 }
1574
1575 uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1576 {
1577 assert(memory_region_is_iommu(mr));
1578 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1579 return mr->iommu_ops->get_min_page_size(mr);
1580 }
1581 return TARGET_PAGE_SIZE;
1582 }
1583
1584 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n, bool is_write)
1585 {
1586 hwaddr addr, granularity;
1587 IOMMUTLBEntry iotlb;
1588
1589 granularity = memory_region_iommu_get_min_page_size(mr);
1590
1591 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1592 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1593 if (iotlb.perm != IOMMU_NONE) {
1594 n->notify(n, &iotlb);
1595 }
1596
1597 /* if (2^64 - MR size) < granularity, it's possible to get an
1598 * infinite loop here. This should catch such a wraparound */
1599 if ((addr + granularity) < addr) {
1600 break;
1601 }
1602 }
1603 }
1604
1605 void memory_region_unregister_iommu_notifier(MemoryRegion *mr, Notifier *n)
1606 {
1607 notifier_remove(n);
1608 if (mr->iommu_ops->notify_stopped &&
1609 QLIST_EMPTY(&mr->iommu_notify.notifiers)) {
1610 mr->iommu_ops->notify_stopped(mr);
1611 }
1612 }
1613
1614 void memory_region_notify_iommu(MemoryRegion *mr,
1615 IOMMUTLBEntry entry)
1616 {
1617 assert(memory_region_is_iommu(mr));
1618 notifier_list_notify(&mr->iommu_notify, &entry);
1619 }
1620
1621 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1622 {
1623 uint8_t mask = 1 << client;
1624 uint8_t old_logging;
1625
1626 assert(client == DIRTY_MEMORY_VGA);
1627 old_logging = mr->vga_logging_count;
1628 mr->vga_logging_count += log ? 1 : -1;
1629 if (!!old_logging == !!mr->vga_logging_count) {
1630 return;
1631 }
1632
1633 memory_region_transaction_begin();
1634 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1635 memory_region_update_pending |= mr->enabled;
1636 memory_region_transaction_commit();
1637 }
1638
1639 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1640 hwaddr size, unsigned client)
1641 {
1642 assert(mr->ram_block);
1643 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1644 size, client);
1645 }
1646
1647 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1648 hwaddr size)
1649 {
1650 assert(mr->ram_block);
1651 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1652 size,
1653 memory_region_get_dirty_log_mask(mr));
1654 }
1655
1656 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1657 hwaddr size, unsigned client)
1658 {
1659 assert(mr->ram_block);
1660 return cpu_physical_memory_test_and_clear_dirty(
1661 memory_region_get_ram_addr(mr) + addr, size, client);
1662 }
1663
1664
1665 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1666 {
1667 AddressSpace *as;
1668 FlatRange *fr;
1669
1670 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1671 FlatView *view = address_space_get_flatview(as);
1672 FOR_EACH_FLAT_RANGE(fr, view) {
1673 if (fr->mr == mr) {
1674 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1675 }
1676 }
1677 flatview_unref(view);
1678 }
1679 }
1680
1681 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1682 {
1683 if (mr->readonly != readonly) {
1684 memory_region_transaction_begin();
1685 mr->readonly = readonly;
1686 memory_region_update_pending |= mr->enabled;
1687 memory_region_transaction_commit();
1688 }
1689 }
1690
1691 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1692 {
1693 if (mr->romd_mode != romd_mode) {
1694 memory_region_transaction_begin();
1695 mr->romd_mode = romd_mode;
1696 memory_region_update_pending |= mr->enabled;
1697 memory_region_transaction_commit();
1698 }
1699 }
1700
1701 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1702 hwaddr size, unsigned client)
1703 {
1704 assert(mr->ram_block);
1705 cpu_physical_memory_test_and_clear_dirty(
1706 memory_region_get_ram_addr(mr) + addr, size, client);
1707 }
1708
1709 int memory_region_get_fd(MemoryRegion *mr)
1710 {
1711 int fd;
1712
1713 rcu_read_lock();
1714 while (mr->alias) {
1715 mr = mr->alias;
1716 }
1717 fd = mr->ram_block->fd;
1718 rcu_read_unlock();
1719
1720 return fd;
1721 }
1722
1723 void memory_region_set_fd(MemoryRegion *mr, int fd)
1724 {
1725 rcu_read_lock();
1726 while (mr->alias) {
1727 mr = mr->alias;
1728 }
1729 mr->ram_block->fd = fd;
1730 rcu_read_unlock();
1731 }
1732
1733 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1734 {
1735 void *ptr;
1736 uint64_t offset = 0;
1737
1738 rcu_read_lock();
1739 while (mr->alias) {
1740 offset += mr->alias_offset;
1741 mr = mr->alias;
1742 }
1743 assert(mr->ram_block);
1744 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1745 rcu_read_unlock();
1746
1747 return ptr;
1748 }
1749
1750 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1751 {
1752 RAMBlock *block;
1753
1754 block = qemu_ram_block_from_host(ptr, false, offset);
1755 if (!block) {
1756 return NULL;
1757 }
1758
1759 return block->mr;
1760 }
1761
1762 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1763 {
1764 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1765 }
1766
1767 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1768 {
1769 assert(mr->ram_block);
1770
1771 qemu_ram_resize(mr->ram_block, newsize, errp);
1772 }
1773
1774 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1775 {
1776 FlatView *view;
1777 FlatRange *fr;
1778 CoalescedMemoryRange *cmr;
1779 AddrRange tmp;
1780 MemoryRegionSection section;
1781
1782 view = address_space_get_flatview(as);
1783 FOR_EACH_FLAT_RANGE(fr, view) {
1784 if (fr->mr == mr) {
1785 section = (MemoryRegionSection) {
1786 .address_space = as,
1787 .offset_within_address_space = int128_get64(fr->addr.start),
1788 .size = fr->addr.size,
1789 };
1790
1791 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1792 int128_get64(fr->addr.start),
1793 int128_get64(fr->addr.size));
1794 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1795 tmp = addrrange_shift(cmr->addr,
1796 int128_sub(fr->addr.start,
1797 int128_make64(fr->offset_in_region)));
1798 if (!addrrange_intersects(tmp, fr->addr)) {
1799 continue;
1800 }
1801 tmp = addrrange_intersection(tmp, fr->addr);
1802 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1803 int128_get64(tmp.start),
1804 int128_get64(tmp.size));
1805 }
1806 }
1807 }
1808 flatview_unref(view);
1809 }
1810
1811 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1812 {
1813 AddressSpace *as;
1814
1815 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1816 memory_region_update_coalesced_range_as(mr, as);
1817 }
1818 }
1819
1820 void memory_region_set_coalescing(MemoryRegion *mr)
1821 {
1822 memory_region_clear_coalescing(mr);
1823 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1824 }
1825
1826 void memory_region_add_coalescing(MemoryRegion *mr,
1827 hwaddr offset,
1828 uint64_t size)
1829 {
1830 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1831
1832 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1833 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1834 memory_region_update_coalesced_range(mr);
1835 memory_region_set_flush_coalesced(mr);
1836 }
1837
1838 void memory_region_clear_coalescing(MemoryRegion *mr)
1839 {
1840 CoalescedMemoryRange *cmr;
1841 bool updated = false;
1842
1843 qemu_flush_coalesced_mmio_buffer();
1844 mr->flush_coalesced_mmio = false;
1845
1846 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1847 cmr = QTAILQ_FIRST(&mr->coalesced);
1848 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1849 g_free(cmr);
1850 updated = true;
1851 }
1852
1853 if (updated) {
1854 memory_region_update_coalesced_range(mr);
1855 }
1856 }
1857
1858 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1859 {
1860 mr->flush_coalesced_mmio = true;
1861 }
1862
1863 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1864 {
1865 qemu_flush_coalesced_mmio_buffer();
1866 if (QTAILQ_EMPTY(&mr->coalesced)) {
1867 mr->flush_coalesced_mmio = false;
1868 }
1869 }
1870
1871 void memory_region_set_global_locking(MemoryRegion *mr)
1872 {
1873 mr->global_locking = true;
1874 }
1875
1876 void memory_region_clear_global_locking(MemoryRegion *mr)
1877 {
1878 mr->global_locking = false;
1879 }
1880
1881 static bool userspace_eventfd_warning;
1882
1883 void memory_region_add_eventfd(MemoryRegion *mr,
1884 hwaddr addr,
1885 unsigned size,
1886 bool match_data,
1887 uint64_t data,
1888 EventNotifier *e)
1889 {
1890 MemoryRegionIoeventfd mrfd = {
1891 .addr.start = int128_make64(addr),
1892 .addr.size = int128_make64(size),
1893 .match_data = match_data,
1894 .data = data,
1895 .e = e,
1896 };
1897 unsigned i;
1898
1899 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1900 userspace_eventfd_warning))) {
1901 userspace_eventfd_warning = true;
1902 error_report("Using eventfd without MMIO binding in KVM. "
1903 "Suboptimal performance expected");
1904 }
1905
1906 if (size) {
1907 adjust_endianness(mr, &mrfd.data, size);
1908 }
1909 memory_region_transaction_begin();
1910 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1911 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1912 break;
1913 }
1914 }
1915 ++mr->ioeventfd_nb;
1916 mr->ioeventfds = g_realloc(mr->ioeventfds,
1917 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1918 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1919 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1920 mr->ioeventfds[i] = mrfd;
1921 ioeventfd_update_pending |= mr->enabled;
1922 memory_region_transaction_commit();
1923 }
1924
1925 void memory_region_del_eventfd(MemoryRegion *mr,
1926 hwaddr addr,
1927 unsigned size,
1928 bool match_data,
1929 uint64_t data,
1930 EventNotifier *e)
1931 {
1932 MemoryRegionIoeventfd mrfd = {
1933 .addr.start = int128_make64(addr),
1934 .addr.size = int128_make64(size),
1935 .match_data = match_data,
1936 .data = data,
1937 .e = e,
1938 };
1939 unsigned i;
1940
1941 if (size) {
1942 adjust_endianness(mr, &mrfd.data, size);
1943 }
1944 memory_region_transaction_begin();
1945 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1946 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1947 break;
1948 }
1949 }
1950 assert(i != mr->ioeventfd_nb);
1951 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1952 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1953 --mr->ioeventfd_nb;
1954 mr->ioeventfds = g_realloc(mr->ioeventfds,
1955 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1956 ioeventfd_update_pending |= mr->enabled;
1957 memory_region_transaction_commit();
1958 }
1959
1960 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1961 {
1962 MemoryRegion *mr = subregion->container;
1963 MemoryRegion *other;
1964
1965 memory_region_transaction_begin();
1966
1967 memory_region_ref(subregion);
1968 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1969 if (subregion->priority >= other->priority) {
1970 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1971 goto done;
1972 }
1973 }
1974 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1975 done:
1976 memory_region_update_pending |= mr->enabled && subregion->enabled;
1977 memory_region_transaction_commit();
1978 }
1979
1980 static void memory_region_add_subregion_common(MemoryRegion *mr,
1981 hwaddr offset,
1982 MemoryRegion *subregion)
1983 {
1984 assert(!subregion->container);
1985 subregion->container = mr;
1986 subregion->addr = offset;
1987 memory_region_update_container_subregions(subregion);
1988 }
1989
1990 void memory_region_add_subregion(MemoryRegion *mr,
1991 hwaddr offset,
1992 MemoryRegion *subregion)
1993 {
1994 subregion->priority = 0;
1995 memory_region_add_subregion_common(mr, offset, subregion);
1996 }
1997
1998 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1999 hwaddr offset,
2000 MemoryRegion *subregion,
2001 int priority)
2002 {
2003 subregion->priority = priority;
2004 memory_region_add_subregion_common(mr, offset, subregion);
2005 }
2006
2007 void memory_region_del_subregion(MemoryRegion *mr,
2008 MemoryRegion *subregion)
2009 {
2010 memory_region_transaction_begin();
2011 assert(subregion->container == mr);
2012 subregion->container = NULL;
2013 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2014 memory_region_unref(subregion);
2015 memory_region_update_pending |= mr->enabled && subregion->enabled;
2016 memory_region_transaction_commit();
2017 }
2018
2019 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2020 {
2021 if (enabled == mr->enabled) {
2022 return;
2023 }
2024 memory_region_transaction_begin();
2025 mr->enabled = enabled;
2026 memory_region_update_pending = true;
2027 memory_region_transaction_commit();
2028 }
2029
2030 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2031 {
2032 Int128 s = int128_make64(size);
2033
2034 if (size == UINT64_MAX) {
2035 s = int128_2_64();
2036 }
2037 if (int128_eq(s, mr->size)) {
2038 return;
2039 }
2040 memory_region_transaction_begin();
2041 mr->size = s;
2042 memory_region_update_pending = true;
2043 memory_region_transaction_commit();
2044 }
2045
2046 static void memory_region_readd_subregion(MemoryRegion *mr)
2047 {
2048 MemoryRegion *container = mr->container;
2049
2050 if (container) {
2051 memory_region_transaction_begin();
2052 memory_region_ref(mr);
2053 memory_region_del_subregion(container, mr);
2054 mr->container = container;
2055 memory_region_update_container_subregions(mr);
2056 memory_region_unref(mr);
2057 memory_region_transaction_commit();
2058 }
2059 }
2060
2061 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2062 {
2063 if (addr != mr->addr) {
2064 mr->addr = addr;
2065 memory_region_readd_subregion(mr);
2066 }
2067 }
2068
2069 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2070 {
2071 assert(mr->alias);
2072
2073 if (offset == mr->alias_offset) {
2074 return;
2075 }
2076
2077 memory_region_transaction_begin();
2078 mr->alias_offset = offset;
2079 memory_region_update_pending |= mr->enabled;
2080 memory_region_transaction_commit();
2081 }
2082
2083 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2084 {
2085 return mr->align;
2086 }
2087
2088 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2089 {
2090 const AddrRange *addr = addr_;
2091 const FlatRange *fr = fr_;
2092
2093 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2094 return -1;
2095 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2096 return 1;
2097 }
2098 return 0;
2099 }
2100
2101 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2102 {
2103 return bsearch(&addr, view->ranges, view->nr,
2104 sizeof(FlatRange), cmp_flatrange_addr);
2105 }
2106
2107 bool memory_region_is_mapped(MemoryRegion *mr)
2108 {
2109 return mr->container ? true : false;
2110 }
2111
2112 /* Same as memory_region_find, but it does not add a reference to the
2113 * returned region. It must be called from an RCU critical section.
2114 */
2115 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2116 hwaddr addr, uint64_t size)
2117 {
2118 MemoryRegionSection ret = { .mr = NULL };
2119 MemoryRegion *root;
2120 AddressSpace *as;
2121 AddrRange range;
2122 FlatView *view;
2123 FlatRange *fr;
2124
2125 addr += mr->addr;
2126 for (root = mr; root->container; ) {
2127 root = root->container;
2128 addr += root->addr;
2129 }
2130
2131 as = memory_region_to_address_space(root);
2132 if (!as) {
2133 return ret;
2134 }
2135 range = addrrange_make(int128_make64(addr), int128_make64(size));
2136
2137 view = atomic_rcu_read(&as->current_map);
2138 fr = flatview_lookup(view, range);
2139 if (!fr) {
2140 return ret;
2141 }
2142
2143 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2144 --fr;
2145 }
2146
2147 ret.mr = fr->mr;
2148 ret.address_space = as;
2149 range = addrrange_intersection(range, fr->addr);
2150 ret.offset_within_region = fr->offset_in_region;
2151 ret.offset_within_region += int128_get64(int128_sub(range.start,
2152 fr->addr.start));
2153 ret.size = range.size;
2154 ret.offset_within_address_space = int128_get64(range.start);
2155 ret.readonly = fr->readonly;
2156 return ret;
2157 }
2158
2159 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2160 hwaddr addr, uint64_t size)
2161 {
2162 MemoryRegionSection ret;
2163 rcu_read_lock();
2164 ret = memory_region_find_rcu(mr, addr, size);
2165 if (ret.mr) {
2166 memory_region_ref(ret.mr);
2167 }
2168 rcu_read_unlock();
2169 return ret;
2170 }
2171
2172 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2173 {
2174 MemoryRegion *mr;
2175
2176 rcu_read_lock();
2177 mr = memory_region_find_rcu(container, addr, 1).mr;
2178 rcu_read_unlock();
2179 return mr && mr != container;
2180 }
2181
2182 void address_space_sync_dirty_bitmap(AddressSpace *as)
2183 {
2184 FlatView *view;
2185 FlatRange *fr;
2186
2187 view = address_space_get_flatview(as);
2188 FOR_EACH_FLAT_RANGE(fr, view) {
2189 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2190 }
2191 flatview_unref(view);
2192 }
2193
2194 void memory_global_dirty_log_start(void)
2195 {
2196 global_dirty_log = true;
2197
2198 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2199
2200 /* Refresh DIRTY_LOG_MIGRATION bit. */
2201 memory_region_transaction_begin();
2202 memory_region_update_pending = true;
2203 memory_region_transaction_commit();
2204 }
2205
2206 void memory_global_dirty_log_stop(void)
2207 {
2208 global_dirty_log = false;
2209
2210 /* Refresh DIRTY_LOG_MIGRATION bit. */
2211 memory_region_transaction_begin();
2212 memory_region_update_pending = true;
2213 memory_region_transaction_commit();
2214
2215 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2216 }
2217
2218 static void listener_add_address_space(MemoryListener *listener,
2219 AddressSpace *as)
2220 {
2221 FlatView *view;
2222 FlatRange *fr;
2223
2224 if (listener->address_space_filter
2225 && listener->address_space_filter != as) {
2226 return;
2227 }
2228
2229 if (listener->begin) {
2230 listener->begin(listener);
2231 }
2232 if (global_dirty_log) {
2233 if (listener->log_global_start) {
2234 listener->log_global_start(listener);
2235 }
2236 }
2237
2238 view = address_space_get_flatview(as);
2239 FOR_EACH_FLAT_RANGE(fr, view) {
2240 MemoryRegionSection section = {
2241 .mr = fr->mr,
2242 .address_space = as,
2243 .offset_within_region = fr->offset_in_region,
2244 .size = fr->addr.size,
2245 .offset_within_address_space = int128_get64(fr->addr.start),
2246 .readonly = fr->readonly,
2247 };
2248 if (fr->dirty_log_mask && listener->log_start) {
2249 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2250 }
2251 if (listener->region_add) {
2252 listener->region_add(listener, &section);
2253 }
2254 }
2255 if (listener->commit) {
2256 listener->commit(listener);
2257 }
2258 flatview_unref(view);
2259 }
2260
2261 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2262 {
2263 MemoryListener *other = NULL;
2264 AddressSpace *as;
2265
2266 listener->address_space_filter = filter;
2267 if (QTAILQ_EMPTY(&memory_listeners)
2268 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2269 memory_listeners)->priority) {
2270 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2271 } else {
2272 QTAILQ_FOREACH(other, &memory_listeners, link) {
2273 if (listener->priority < other->priority) {
2274 break;
2275 }
2276 }
2277 QTAILQ_INSERT_BEFORE(other, listener, link);
2278 }
2279
2280 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2281 listener_add_address_space(listener, as);
2282 }
2283 }
2284
2285 void memory_listener_unregister(MemoryListener *listener)
2286 {
2287 QTAILQ_REMOVE(&memory_listeners, listener, link);
2288 }
2289
2290 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2291 {
2292 memory_region_ref(root);
2293 memory_region_transaction_begin();
2294 as->ref_count = 1;
2295 as->root = root;
2296 as->malloced = false;
2297 as->current_map = g_new(FlatView, 1);
2298 flatview_init(as->current_map);
2299 as->ioeventfd_nb = 0;
2300 as->ioeventfds = NULL;
2301 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2302 as->name = g_strdup(name ? name : "anonymous");
2303 address_space_init_dispatch(as);
2304 memory_region_update_pending |= root->enabled;
2305 memory_region_transaction_commit();
2306 }
2307
2308 static void do_address_space_destroy(AddressSpace *as)
2309 {
2310 MemoryListener *listener;
2311 bool do_free = as->malloced;
2312
2313 address_space_destroy_dispatch(as);
2314
2315 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2316 assert(listener->address_space_filter != as);
2317 }
2318
2319 flatview_unref(as->current_map);
2320 g_free(as->name);
2321 g_free(as->ioeventfds);
2322 memory_region_unref(as->root);
2323 if (do_free) {
2324 g_free(as);
2325 }
2326 }
2327
2328 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2329 {
2330 AddressSpace *as;
2331
2332 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2333 if (root == as->root && as->malloced) {
2334 as->ref_count++;
2335 return as;
2336 }
2337 }
2338
2339 as = g_malloc0(sizeof *as);
2340 address_space_init(as, root, name);
2341 as->malloced = true;
2342 return as;
2343 }
2344
2345 void address_space_destroy(AddressSpace *as)
2346 {
2347 MemoryRegion *root = as->root;
2348
2349 as->ref_count--;
2350 if (as->ref_count) {
2351 return;
2352 }
2353 /* Flush out anything from MemoryListeners listening in on this */
2354 memory_region_transaction_begin();
2355 as->root = NULL;
2356 memory_region_transaction_commit();
2357 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2358 address_space_unregister(as);
2359
2360 /* At this point, as->dispatch and as->current_map are dummy
2361 * entries that the guest should never use. Wait for the old
2362 * values to expire before freeing the data.
2363 */
2364 as->root = root;
2365 call_rcu(as, do_address_space_destroy, rcu);
2366 }
2367
2368 typedef struct MemoryRegionList MemoryRegionList;
2369
2370 struct MemoryRegionList {
2371 const MemoryRegion *mr;
2372 QTAILQ_ENTRY(MemoryRegionList) queue;
2373 };
2374
2375 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2376
2377 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2378 const MemoryRegion *mr, unsigned int level,
2379 hwaddr base,
2380 MemoryRegionListHead *alias_print_queue)
2381 {
2382 MemoryRegionList *new_ml, *ml, *next_ml;
2383 MemoryRegionListHead submr_print_queue;
2384 const MemoryRegion *submr;
2385 unsigned int i;
2386
2387 if (!mr) {
2388 return;
2389 }
2390
2391 for (i = 0; i < level; i++) {
2392 mon_printf(f, " ");
2393 }
2394
2395 if (mr->alias) {
2396 MemoryRegionList *ml;
2397 bool found = false;
2398
2399 /* check if the alias is already in the queue */
2400 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2401 if (ml->mr == mr->alias) {
2402 found = true;
2403 }
2404 }
2405
2406 if (!found) {
2407 ml = g_new(MemoryRegionList, 1);
2408 ml->mr = mr->alias;
2409 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2410 }
2411 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2412 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2413 "-" TARGET_FMT_plx "%s\n",
2414 base + mr->addr,
2415 base + mr->addr
2416 + (int128_nz(mr->size) ?
2417 (hwaddr)int128_get64(int128_sub(mr->size,
2418 int128_one())) : 0),
2419 mr->priority,
2420 mr->romd_mode ? 'R' : '-',
2421 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2422 : '-',
2423 memory_region_name(mr),
2424 memory_region_name(mr->alias),
2425 mr->alias_offset,
2426 mr->alias_offset
2427 + (int128_nz(mr->size) ?
2428 (hwaddr)int128_get64(int128_sub(mr->size,
2429 int128_one())) : 0),
2430 mr->enabled ? "" : " [disabled]");
2431 } else {
2432 mon_printf(f,
2433 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2434 base + mr->addr,
2435 base + mr->addr
2436 + (int128_nz(mr->size) ?
2437 (hwaddr)int128_get64(int128_sub(mr->size,
2438 int128_one())) : 0),
2439 mr->priority,
2440 mr->romd_mode ? 'R' : '-',
2441 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2442 : '-',
2443 memory_region_name(mr),
2444 mr->enabled ? "" : " [disabled]");
2445 }
2446
2447 QTAILQ_INIT(&submr_print_queue);
2448
2449 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2450 new_ml = g_new(MemoryRegionList, 1);
2451 new_ml->mr = submr;
2452 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2453 if (new_ml->mr->addr < ml->mr->addr ||
2454 (new_ml->mr->addr == ml->mr->addr &&
2455 new_ml->mr->priority > ml->mr->priority)) {
2456 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2457 new_ml = NULL;
2458 break;
2459 }
2460 }
2461 if (new_ml) {
2462 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2463 }
2464 }
2465
2466 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2467 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2468 alias_print_queue);
2469 }
2470
2471 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2472 g_free(ml);
2473 }
2474 }
2475
2476 void mtree_info(fprintf_function mon_printf, void *f)
2477 {
2478 MemoryRegionListHead ml_head;
2479 MemoryRegionList *ml, *ml2;
2480 AddressSpace *as;
2481
2482 QTAILQ_INIT(&ml_head);
2483
2484 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2485 mon_printf(f, "address-space: %s\n", as->name);
2486 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2487 mon_printf(f, "\n");
2488 }
2489
2490 /* print aliased regions */
2491 QTAILQ_FOREACH(ml, &ml_head, queue) {
2492 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2493 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2494 mon_printf(f, "\n");
2495 }
2496
2497 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2498 g_free(ml);
2499 }
2500 }
2501
2502 static const TypeInfo memory_region_info = {
2503 .parent = TYPE_OBJECT,
2504 .name = TYPE_MEMORY_REGION,
2505 .instance_size = sizeof(MemoryRegion),
2506 .instance_init = memory_region_initfn,
2507 .instance_finalize = memory_region_finalize,
2508 };
2509
2510 static void memory_register_types(void)
2511 {
2512 type_register_static(&memory_region_info);
2513 }
2514
2515 type_init(memory_register_types)
AR7 emulation for QEMU