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Merge remote-tracking branch 'qemu/master'
[qemu/ar7.git] / memory.c
blobab1458bf519d2705703ceab038b0948045f6cd6a
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/exec-all.h" /* qemu_sprint_backtrace */
21 #include "exec/memory.h"
22 #include "exec/address-spaces.h"
23 #include "exec/ioport.h"
24 #include "qapi/visitor.h"
25 #include "qemu/bitops.h"
26 #include "qemu/error-report.h"
27 #include "qom/object.h"
28 #include "trace-root.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/sysemu.h"
34
35 //#define DEBUG_UNASSIGNED
36
37 static unsigned memory_region_transaction_depth;
38 static bool memory_region_update_pending;
39 static bool ioeventfd_update_pending;
40 static bool global_dirty_log = false;
41
42 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
43 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
44
45 static QTAILQ_HEAD(, AddressSpace) address_spaces
46 = QTAILQ_HEAD_INITIALIZER(address_spaces);
47
48 typedef struct AddrRange AddrRange;
49
50 /*
51 * Note that signed integers are needed for negative offsetting in aliases
52 * (large MemoryRegion::alias_offset).
53 */
54 struct AddrRange {
55 Int128 start;
56 Int128 size;
57 };
58
59 static AddrRange addrrange_make(Int128 start, Int128 size)
60 {
61 return (AddrRange) { start, size };
62 }
63
64 static bool addrrange_equal(AddrRange r1, AddrRange r2)
65 {
66 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
67 }
68
69 static Int128 addrrange_end(AddrRange r)
70 {
71 return int128_add(r.start, r.size);
72 }
73
74 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
75 {
76 int128_addto(&range.start, delta);
77 return range;
78 }
79
80 static bool addrrange_contains(AddrRange range, Int128 addr)
81 {
82 return int128_ge(addr, range.start)
83 && int128_lt(addr, addrrange_end(range));
84 }
85
86 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
87 {
88 return addrrange_contains(r1, r2.start)
89 || addrrange_contains(r2, r1.start);
90 }
91
92 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
93 {
94 Int128 start = int128_max(r1.start, r2.start);
95 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
96 return addrrange_make(start, int128_sub(end, start));
97 }
98
99 enum ListenerDirection { Forward, Reverse };
100
101 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
102 do { \
103 MemoryListener *_listener; \
104 \
105 switch (_direction) { \
106 case Forward: \
107 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
108 if (_listener->_callback) { \
109 _listener->_callback(_listener, ##_args); \
110 } \
111 } \
112 break; \
113 case Reverse: \
114 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
115 memory_listeners, link) { \
116 if (_listener->_callback) { \
117 _listener->_callback(_listener, ##_args); \
118 } \
119 } \
120 break; \
121 default: \
122 abort(); \
123 } \
124 } while (0)
125
126 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
127 do { \
128 MemoryListener *_listener; \
129 struct memory_listeners_as *list = &(_as)->listeners; \
130 \
131 switch (_direction) { \
132 case Forward: \
133 QTAILQ_FOREACH(_listener, list, link_as) { \
134 if (_listener->_callback) { \
135 _listener->_callback(_listener, _section, ##_args); \
136 } \
137 } \
138 break; \
139 case Reverse: \
140 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
141 link_as) { \
142 if (_listener->_callback) { \
143 _listener->_callback(_listener, _section, ##_args); \
144 } \
145 } \
146 break; \
147 default: \
148 abort(); \
149 } \
150 } while (0)
151
152 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
153 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
154 do { \
155 MemoryRegionSection mrs = section_from_flat_range(fr, as); \
156 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
157 } while(0)
158
159 struct CoalescedMemoryRange {
160 AddrRange addr;
161 QTAILQ_ENTRY(CoalescedMemoryRange) link;
162 };
163
164 struct MemoryRegionIoeventfd {
165 AddrRange addr;
166 bool match_data;
167 uint64_t data;
168 EventNotifier *e;
169 };
170
171 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
172 MemoryRegionIoeventfd b)
173 {
174 if (int128_lt(a.addr.start, b.addr.start)) {
175 return true;
176 } else if (int128_gt(a.addr.start, b.addr.start)) {
177 return false;
178 } else if (int128_lt(a.addr.size, b.addr.size)) {
179 return true;
180 } else if (int128_gt(a.addr.size, b.addr.size)) {
181 return false;
182 } else if (a.match_data < b.match_data) {
183 return true;
184 } else if (a.match_data > b.match_data) {
185 return false;
186 } else if (a.match_data) {
187 if (a.data < b.data) {
188 return true;
189 } else if (a.data > b.data) {
190 return false;
191 }
192 }
193 if (a.e < b.e) {
194 return true;
195 } else if (a.e > b.e) {
196 return false;
197 }
198 return false;
199 }
200
201 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
202 MemoryRegionIoeventfd b)
203 {
204 return !memory_region_ioeventfd_before(a, b)
205 && !memory_region_ioeventfd_before(b, a);
206 }
207
208 typedef struct FlatRange FlatRange;
209 typedef struct FlatView FlatView;
210
211 /* Range of memory in the global map. Addresses are absolute. */
212 struct FlatRange {
213 MemoryRegion *mr;
214 hwaddr offset_in_region;
215 AddrRange addr;
216 uint8_t dirty_log_mask;
217 bool romd_mode;
218 bool readonly;
219 };
220
221 /* Flattened global view of current active memory hierarchy. Kept in sorted
222 * order.
223 */
224 struct FlatView {
225 struct rcu_head rcu;
226 unsigned ref;
227 FlatRange *ranges;
228 unsigned nr;
229 unsigned nr_allocated;
230 };
231
232 typedef struct AddressSpaceOps AddressSpaceOps;
233
234 #define FOR_EACH_FLAT_RANGE(var, view) \
235 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
236
237 static inline MemoryRegionSection
238 section_from_flat_range(FlatRange *fr, AddressSpace *as)
239 {
240 return (MemoryRegionSection) {
241 .mr = fr->mr,
242 .address_space = as,
243 .offset_within_region = fr->offset_in_region,
244 .size = fr->addr.size,
245 .offset_within_address_space = int128_get64(fr->addr.start),
246 .readonly = fr->readonly,
247 };
248 }
249
250 static bool flatrange_equal(FlatRange *a, FlatRange *b)
251 {
252 return a->mr == b->mr
253 && addrrange_equal(a->addr, b->addr)
254 && a->offset_in_region == b->offset_in_region
255 && a->romd_mode == b->romd_mode
256 && a->readonly == b->readonly;
257 }
258
259 static void flatview_init(FlatView *view)
260 {
261 view->ref = 1;
262 view->ranges = NULL;
263 view->nr = 0;
264 view->nr_allocated = 0;
265 }
266
267 /* Insert a range into a given position. Caller is responsible for maintaining
268 * sorting order.
269 */
270 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
271 {
272 if (view->nr == view->nr_allocated) {
273 view->nr_allocated = MAX(2 * view->nr, 10);
274 view->ranges = g_realloc(view->ranges,
275 view->nr_allocated * sizeof(*view->ranges));
276 }
277 memmove(view->ranges + pos + 1, view->ranges + pos,
278 (view->nr - pos) * sizeof(FlatRange));
279 view->ranges[pos] = *range;
280 memory_region_ref(range->mr);
281 ++view->nr;
282 }
283
284 static void flatview_destroy(FlatView *view)
285 {
286 int i;
287
288 for (i = 0; i < view->nr; i++) {
289 memory_region_unref(view->ranges[i].mr);
290 }
291 g_free(view->ranges);
292 g_free(view);
293 }
294
295 static void flatview_ref(FlatView *view)
296 {
297 atomic_inc(&view->ref);
298 }
299
300 static void flatview_unref(FlatView *view)
301 {
302 if (atomic_fetch_dec(&view->ref) == 1) {
303 flatview_destroy(view);
304 }
305 }
306
307 static bool can_merge(FlatRange *r1, FlatRange *r2)
308 {
309 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
310 && r1->mr == r2->mr
311 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
312 r1->addr.size),
313 int128_make64(r2->offset_in_region))
314 && r1->dirty_log_mask == r2->dirty_log_mask
315 && r1->romd_mode == r2->romd_mode
316 && r1->readonly == r2->readonly;
317 }
318
319 /* Attempt to simplify a view by merging adjacent ranges */
320 static void flatview_simplify(FlatView *view)
321 {
322 unsigned i, j;
323
324 i = 0;
325 while (i < view->nr) {
326 j = i + 1;
327 while (j < view->nr
328 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
329 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
330 ++j;
331 }
332 ++i;
333 memmove(&view->ranges[i], &view->ranges[j],
334 (view->nr - j) * sizeof(view->ranges[j]));
335 view->nr -= j - i;
336 }
337 }
338
339 static bool memory_region_big_endian(MemoryRegion *mr)
340 {
341 #ifdef TARGET_WORDS_BIGENDIAN
342 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
343 #else
344 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
345 #endif
346 }
347
348 static bool memory_region_wrong_endianness(MemoryRegion *mr)
349 {
350 #ifdef TARGET_WORDS_BIGENDIAN
351 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
352 #else
353 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
354 #endif
355 }
356
357 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
358 {
359 if (memory_region_wrong_endianness(mr)) {
360 switch (size) {
361 case 1:
362 break;
363 case 2:
364 *data = bswap16(*data);
365 break;
366 case 4:
367 *data = bswap32(*data);
368 break;
369 case 8:
370 *data = bswap64(*data);
371 break;
372 default:
373 abort();
374 }
375 }
376 }
377
378 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
379 {
380 MemoryRegion *root;
381 hwaddr abs_addr = offset;
382
383 abs_addr += mr->addr;
384 for (root = mr; root->container; ) {
385 root = root->container;
386 abs_addr += root->addr;
387 }
388
389 return abs_addr;
390 }
391
392 static int get_cpu_index(void)
393 {
394 if (current_cpu) {
395 return current_cpu->cpu_index;
396 }
397 return -1;
398 }
399
400 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
401 hwaddr addr,
402 uint64_t *value,
403 unsigned size,
404 unsigned shift,
405 uint64_t mask,
406 MemTxAttrs attrs)
407 {
408 uint64_t tmp;
409
410 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
411 if (mr->subpage) {
412 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
413 } else if (mr == &io_mem_notdirty) {
414 /* Accesses to code which has previously been translated into a TB show
415 * up in the MMIO path, as accesses to the io_mem_notdirty
416 * MemoryRegion. */
417 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
418 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
419 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
420 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
421 }
422 *value |= (tmp & mask) << shift;
423 return MEMTX_OK;
424 }
425
426 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
427 hwaddr addr,
428 uint64_t *value,
429 unsigned size,
430 unsigned shift,
431 uint64_t mask,
432 MemTxAttrs attrs)
433 {
434 uint64_t tmp;
435
436 tmp = mr->ops->read(mr->opaque, addr, size);
437 if (mr->subpage) {
438 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
439 } else if (mr == &io_mem_notdirty) {
440 /* Accesses to code which has previously been translated into a TB show
441 * up in the MMIO path, as accesses to the io_mem_notdirty
442 * MemoryRegion. */
443 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
444 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
445 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
446 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
447 }
448 *value |= (tmp & mask) << shift;
449 return MEMTX_OK;
450 }
451
452 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
453 hwaddr addr,
454 uint64_t *value,
455 unsigned size,
456 unsigned shift,
457 uint64_t mask,
458 MemTxAttrs attrs)
459 {
460 uint64_t tmp = 0;
461 MemTxResult r;
462
463 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
464 if (mr->subpage) {
465 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
466 } else if (mr == &io_mem_notdirty) {
467 /* Accesses to code which has previously been translated into a TB show
468 * up in the MMIO path, as accesses to the io_mem_notdirty
469 * MemoryRegion. */
470 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
471 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
474 }
475 *value |= (tmp & mask) << shift;
476 return r;
477 }
478
479 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
480 hwaddr addr,
481 uint64_t *value,
482 unsigned size,
483 unsigned shift,
484 uint64_t mask,
485 MemTxAttrs attrs)
486 {
487 uint64_t tmp;
488
489 tmp = (*value >> shift) & mask;
490 if (mr->subpage) {
491 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
492 } else if (mr == &io_mem_notdirty) {
493 /* Accesses to code which has previously been translated into a TB show
494 * up in the MMIO path, as accesses to the io_mem_notdirty
495 * MemoryRegion. */
496 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
497 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
498 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
499 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
500 }
501 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
502 return MEMTX_OK;
503 }
504
505 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
506 hwaddr addr,
507 uint64_t *value,
508 unsigned size,
509 unsigned shift,
510 uint64_t mask,
511 MemTxAttrs attrs)
512 {
513 uint64_t tmp;
514
515 tmp = (*value >> shift) & mask;
516 if (mr->subpage) {
517 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
518 } else if (mr == &io_mem_notdirty) {
519 /* Accesses to code which has previously been translated into a TB show
520 * up in the MMIO path, as accesses to the io_mem_notdirty
521 * MemoryRegion. */
522 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
523 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
524 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
525 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
526 }
527 mr->ops->write(mr->opaque, addr, tmp, size);
528 return MEMTX_OK;
529 }
530
531 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
532 hwaddr addr,
533 uint64_t *value,
534 unsigned size,
535 unsigned shift,
536 uint64_t mask,
537 MemTxAttrs attrs)
538 {
539 uint64_t tmp;
540
541 tmp = (*value >> shift) & mask;
542 if (mr->subpage) {
543 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
544 } else if (mr == &io_mem_notdirty) {
545 /* Accesses to code which has previously been translated into a TB show
546 * up in the MMIO path, as accesses to the io_mem_notdirty
547 * MemoryRegion. */
548 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
549 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
550 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
551 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
552 }
553 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
554 }
555
556 static MemTxResult access_with_adjusted_size(hwaddr addr,
557 uint64_t *value,
558 unsigned size,
559 unsigned access_size_min,
560 unsigned access_size_max,
561 MemTxResult (*access)(MemoryRegion *mr,
562 hwaddr addr,
563 uint64_t *value,
564 unsigned size,
565 unsigned shift,
566 uint64_t mask,
567 MemTxAttrs attrs),
568 MemoryRegion *mr,
569 MemTxAttrs attrs)
570 {
571 uint64_t access_mask;
572 unsigned access_size;
573 unsigned i;
574 MemTxResult r = MEMTX_OK;
575
576 if (!access_size_min) {
577 access_size_min = 1;
578 }
579 if (!access_size_max) {
580 access_size_max = 4;
581 }
582
583 /* FIXME: support unaligned access? */
584 access_size = MAX(MIN(size, access_size_max), access_size_min);
585 access_mask = -1ULL >> (64 - access_size * 8);
586 if (memory_region_big_endian(mr)) {
587 for (i = 0; i < size; i += access_size) {
588 r |= access(mr, addr + i, value, access_size,
589 (size - access_size - i) * 8, access_mask, attrs);
590 }
591 } else {
592 for (i = 0; i < size; i += access_size) {
593 r |= access(mr, addr + i, value, access_size, i * 8,
594 access_mask, attrs);
595 }
596 }
597 return r;
598 }
599
600 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
601 {
602 AddressSpace *as;
603
604 while (mr->container) {
605 mr = mr->container;
606 }
607 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
608 if (mr == as->root) {
609 return as;
610 }
611 }
612 return NULL;
613 }
614
615 /* Render a memory region into the global view. Ranges in @view obscure
616 * ranges in @mr.
617 */
618 static void render_memory_region(FlatView *view,
619 MemoryRegion *mr,
620 Int128 base,
621 AddrRange clip,
622 bool readonly)
623 {
624 MemoryRegion *subregion;
625 unsigned i;
626 hwaddr offset_in_region;
627 Int128 remain;
628 Int128 now;
629 FlatRange fr;
630 AddrRange tmp;
631
632 if (!mr->enabled) {
633 return;
634 }
635
636 int128_addto(&base, int128_make64(mr->addr));
637 readonly |= mr->readonly;
638
639 tmp = addrrange_make(base, mr->size);
640
641 if (!addrrange_intersects(tmp, clip)) {
642 return;
643 }
644
645 clip = addrrange_intersection(tmp, clip);
646
647 if (mr->alias) {
648 int128_subfrom(&base, int128_make64(mr->alias->addr));
649 int128_subfrom(&base, int128_make64(mr->alias_offset));
650 render_memory_region(view, mr->alias, base, clip, readonly);
651 return;
652 }
653
654 /* Render subregions in priority order. */
655 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
656 render_memory_region(view, subregion, base, clip, readonly);
657 }
658
659 if (!mr->terminates) {
660 return;
661 }
662
663 offset_in_region = int128_get64(int128_sub(clip.start, base));
664 base = clip.start;
665 remain = clip.size;
666
667 fr.mr = mr;
668 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
669 fr.romd_mode = mr->romd_mode;
670 fr.readonly = readonly;
671
672 /* Render the region itself into any gaps left by the current view. */
673 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
674 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
675 continue;
676 }
677 if (int128_lt(base, view->ranges[i].addr.start)) {
678 now = int128_min(remain,
679 int128_sub(view->ranges[i].addr.start, base));
680 fr.offset_in_region = offset_in_region;
681 fr.addr = addrrange_make(base, now);
682 flatview_insert(view, i, &fr);
683 ++i;
684 int128_addto(&base, now);
685 offset_in_region += int128_get64(now);
686 int128_subfrom(&remain, now);
687 }
688 now = int128_sub(int128_min(int128_add(base, remain),
689 addrrange_end(view->ranges[i].addr)),
690 base);
691 int128_addto(&base, now);
692 offset_in_region += int128_get64(now);
693 int128_subfrom(&remain, now);
694 }
695 if (int128_nz(remain)) {
696 fr.offset_in_region = offset_in_region;
697 fr.addr = addrrange_make(base, remain);
698 flatview_insert(view, i, &fr);
699 }
700 }
701
702 /* Render a memory topology into a list of disjoint absolute ranges. */
703 static FlatView *generate_memory_topology(MemoryRegion *mr)
704 {
705 FlatView *view;
706
707 view = g_new(FlatView, 1);
708 flatview_init(view);
709
710 if (mr) {
711 render_memory_region(view, mr, int128_zero(),
712 addrrange_make(int128_zero(), int128_2_64()), false);
713 }
714 flatview_simplify(view);
715
716 return view;
717 }
718
719 static void address_space_add_del_ioeventfds(AddressSpace *as,
720 MemoryRegionIoeventfd *fds_new,
721 unsigned fds_new_nb,
722 MemoryRegionIoeventfd *fds_old,
723 unsigned fds_old_nb)
724 {
725 unsigned iold, inew;
726 MemoryRegionIoeventfd *fd;
727 MemoryRegionSection section;
728
729 /* Generate a symmetric difference of the old and new fd sets, adding
730 * and deleting as necessary.
731 */
732
733 iold = inew = 0;
734 while (iold < fds_old_nb || inew < fds_new_nb) {
735 if (iold < fds_old_nb
736 && (inew == fds_new_nb
737 || memory_region_ioeventfd_before(fds_old[iold],
738 fds_new[inew]))) {
739 fd = &fds_old[iold];
740 section = (MemoryRegionSection) {
741 .address_space = as,
742 .offset_within_address_space = int128_get64(fd->addr.start),
743 .size = fd->addr.size,
744 };
745 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
746 fd->match_data, fd->data, fd->e);
747 ++iold;
748 } else if (inew < fds_new_nb
749 && (iold == fds_old_nb
750 || memory_region_ioeventfd_before(fds_new[inew],
751 fds_old[iold]))) {
752 fd = &fds_new[inew];
753 section = (MemoryRegionSection) {
754 .address_space = as,
755 .offset_within_address_space = int128_get64(fd->addr.start),
756 .size = fd->addr.size,
757 };
758 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
759 fd->match_data, fd->data, fd->e);
760 ++inew;
761 } else {
762 ++iold;
763 ++inew;
764 }
765 }
766 }
767
768 static FlatView *address_space_get_flatview(AddressSpace *as)
769 {
770 FlatView *view;
771
772 rcu_read_lock();
773 view = atomic_rcu_read(&as->current_map);
774 flatview_ref(view);
775 rcu_read_unlock();
776 return view;
777 }
778
779 static void address_space_update_ioeventfds(AddressSpace *as)
780 {
781 FlatView *view;
782 FlatRange *fr;
783 unsigned ioeventfd_nb = 0;
784 MemoryRegionIoeventfd *ioeventfds = NULL;
785 AddrRange tmp;
786 unsigned i;
787
788 view = address_space_get_flatview(as);
789 FOR_EACH_FLAT_RANGE(fr, view) {
790 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
791 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
792 int128_sub(fr->addr.start,
793 int128_make64(fr->offset_in_region)));
794 if (addrrange_intersects(fr->addr, tmp)) {
795 ++ioeventfd_nb;
796 ioeventfds = g_realloc(ioeventfds,
797 ioeventfd_nb * sizeof(*ioeventfds));
798 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
799 ioeventfds[ioeventfd_nb-1].addr = tmp;
800 }
801 }
802 }
803
804 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
805 as->ioeventfds, as->ioeventfd_nb);
806
807 g_free(as->ioeventfds);
808 as->ioeventfds = ioeventfds;
809 as->ioeventfd_nb = ioeventfd_nb;
810 flatview_unref(view);
811 }
812
813 static void address_space_update_topology_pass(AddressSpace *as,
814 const FlatView *old_view,
815 const FlatView *new_view,
816 bool adding)
817 {
818 unsigned iold, inew;
819 FlatRange *frold, *frnew;
820
821 /* Generate a symmetric difference of the old and new memory maps.
822 * Kill ranges in the old map, and instantiate ranges in the new map.
823 */
824 iold = inew = 0;
825 while (iold < old_view->nr || inew < new_view->nr) {
826 if (iold < old_view->nr) {
827 frold = &old_view->ranges[iold];
828 } else {
829 frold = NULL;
830 }
831 if (inew < new_view->nr) {
832 frnew = &new_view->ranges[inew];
833 } else {
834 frnew = NULL;
835 }
836
837 if (frold
838 && (!frnew
839 || int128_lt(frold->addr.start, frnew->addr.start)
840 || (int128_eq(frold->addr.start, frnew->addr.start)
841 && !flatrange_equal(frold, frnew)))) {
842 /* In old but not in new, or in both but attributes changed. */
843
844 if (!adding) {
845 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
846 }
847
848 ++iold;
849 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
850 /* In both and unchanged (except logging may have changed) */
851
852 if (adding) {
853 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
854 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
855 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
856 frold->dirty_log_mask,
857 frnew->dirty_log_mask);
858 }
859 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
860 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
861 frold->dirty_log_mask,
862 frnew->dirty_log_mask);
863 }
864 }
865
866 ++iold;
867 ++inew;
868 } else {
869 /* In new */
870
871 if (adding) {
872 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
873 }
874
875 ++inew;
876 }
877 }
878 }
879
880
881 static void address_space_update_topology(AddressSpace *as)
882 {
883 FlatView *old_view = address_space_get_flatview(as);
884 FlatView *new_view = generate_memory_topology(as->root);
885
886 address_space_update_topology_pass(as, old_view, new_view, false);
887 address_space_update_topology_pass(as, old_view, new_view, true);
888
889 /* Writes are protected by the BQL. */
890 atomic_rcu_set(&as->current_map, new_view);
891 call_rcu(old_view, flatview_unref, rcu);
892
893 /* Note that all the old MemoryRegions are still alive up to this
894 * point. This relieves most MemoryListeners from the need to
895 * ref/unref the MemoryRegions they get---unless they use them
896 * outside the iothread mutex, in which case precise reference
897 * counting is necessary.
898 */
899 flatview_unref(old_view);
900
901 address_space_update_ioeventfds(as);
902 }
903
904 void memory_region_transaction_begin(void)
905 {
906 qemu_flush_coalesced_mmio_buffer();
907 ++memory_region_transaction_depth;
908 }
909
910 static void memory_region_clear_pending(void)
911 {
912 memory_region_update_pending = false;
913 ioeventfd_update_pending = false;
914 }
915
916 void memory_region_transaction_commit(void)
917 {
918 AddressSpace *as;
919
920 assert(memory_region_transaction_depth);
921 assert(qemu_mutex_iothread_locked());
922
923 --memory_region_transaction_depth;
924 if (!memory_region_transaction_depth) {
925 if (memory_region_update_pending) {
926 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
927
928 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
929 address_space_update_topology(as);
930 }
931
932 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
933 } else if (ioeventfd_update_pending) {
934 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
935 address_space_update_ioeventfds(as);
936 }
937 }
938 memory_region_clear_pending();
939 }
940 }
941
942 static void memory_region_destructor_none(MemoryRegion *mr)
943 {
944 }
945
946 static void memory_region_destructor_ram(MemoryRegion *mr)
947 {
948 qemu_ram_free(mr->ram_block);
949 }
950
951 static bool memory_region_need_escape(char c)
952 {
953 return c == '/' || c == '[' || c == '\\' || c == ']';
954 }
955
956 static char *memory_region_escape_name(const char *name)
957 {
958 const char *p;
959 char *escaped, *q;
960 uint8_t c;
961 size_t bytes = 0;
962
963 for (p = name; *p; p++) {
964 bytes += memory_region_need_escape(*p) ? 4 : 1;
965 }
966 if (bytes == p - name) {
967 return g_memdup(name, bytes + 1);
968 }
969
970 escaped = g_malloc(bytes + 1);
971 for (p = name, q = escaped; *p; p++) {
972 c = *p;
973 if (unlikely(memory_region_need_escape(c))) {
974 *q++ = '\\';
975 *q++ = 'x';
976 *q++ = "0123456789abcdef"[c >> 4];
977 c = "0123456789abcdef"[c & 15];
978 }
979 *q++ = c;
980 }
981 *q = 0;
982 return escaped;
983 }
984
985 void memory_region_init(MemoryRegion *mr,
986 Object *owner,
987 const char *name,
988 uint64_t size)
989 {
990 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
991 mr->size = int128_make64(size);
992 if (size == UINT64_MAX) {
993 mr->size = int128_2_64();
994 }
995 mr->name = g_strdup(name);
996 mr->owner = owner;
997 mr->ram_block = NULL;
998
999 if (name) {
1000 char *escaped_name = memory_region_escape_name(name);
1001 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1002
1003 if (!owner) {
1004 owner = container_get(qdev_get_machine(), "/unattached");
1005 }
1006
1007 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1008 object_unref(OBJECT(mr));
1009 g_free(name_array);
1010 g_free(escaped_name);
1011 }
1012 }
1013
1014 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1015 void *opaque, Error **errp)
1016 {
1017 MemoryRegion *mr = MEMORY_REGION(obj);
1018 uint64_t value = mr->addr;
1019
1020 visit_type_uint64(v, name, &value, errp);
1021 }
1022
1023 static void memory_region_get_container(Object *obj, Visitor *v,
1024 const char *name, void *opaque,
1025 Error **errp)
1026 {
1027 MemoryRegion *mr = MEMORY_REGION(obj);
1028 gchar *path = (gchar *)"";
1029
1030 if (mr->container) {
1031 path = object_get_canonical_path(OBJECT(mr->container));
1032 }
1033 visit_type_str(v, name, &path, errp);
1034 if (mr->container) {
1035 g_free(path);
1036 }
1037 }
1038
1039 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1040 const char *part)
1041 {
1042 MemoryRegion *mr = MEMORY_REGION(obj);
1043
1044 return OBJECT(mr->container);
1045 }
1046
1047 static void memory_region_get_priority(Object *obj, Visitor *v,
1048 const char *name, void *opaque,
1049 Error **errp)
1050 {
1051 MemoryRegion *mr = MEMORY_REGION(obj);
1052 int32_t value = mr->priority;
1053
1054 visit_type_int32(v, name, &value, errp);
1055 }
1056
1057 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1058 void *opaque, Error **errp)
1059 {
1060 MemoryRegion *mr = MEMORY_REGION(obj);
1061 uint64_t value = memory_region_size(mr);
1062
1063 visit_type_uint64(v, name, &value, errp);
1064 }
1065
1066 static void memory_region_initfn(Object *obj)
1067 {
1068 MemoryRegion *mr = MEMORY_REGION(obj);
1069 ObjectProperty *op;
1070
1071 mr->ops = &unassigned_mem_ops;
1072 mr->enabled = true;
1073 mr->romd_mode = true;
1074 mr->global_locking = true;
1075 mr->destructor = memory_region_destructor_none;
1076 QTAILQ_INIT(&mr->subregions);
1077 QTAILQ_INIT(&mr->coalesced);
1078
1079 op = object_property_add(OBJECT(mr), "container",
1080 "link<" TYPE_MEMORY_REGION ">",
1081 memory_region_get_container,
1082 NULL, /* memory_region_set_container */
1083 NULL, NULL, &error_abort);
1084 op->resolve = memory_region_resolve_container;
1085
1086 object_property_add(OBJECT(mr), "addr", "uint64",
1087 memory_region_get_addr,
1088 NULL, /* memory_region_set_addr */
1089 NULL, NULL, &error_abort);
1090 object_property_add(OBJECT(mr), "priority", "uint32",
1091 memory_region_get_priority,
1092 NULL, /* memory_region_set_priority */
1093 NULL, NULL, &error_abort);
1094 object_property_add(OBJECT(mr), "size", "uint64",
1095 memory_region_get_size,
1096 NULL, /* memory_region_set_size, */
1097 NULL, NULL, &error_abort);
1098 }
1099
1100 static int qemu_target_backtrace(target_ulong *array, size_t size)
1101 {
1102 int n = 0;
1103 if (size >= 2) {
1104 #if defined(TARGET_ARM)
1105 CPUArchState *env = current_cpu->env_ptr;
1106 array[0] = env->regs[15];
1107 array[1] = env->regs[14];
1108 #elif defined(TARGET_MIPS)
1109 CPUArchState *env = current_cpu->env_ptr;
1110 array[0] = env->active_tc.PC;
1111 array[1] = env->active_tc.gpr[31];
1112 #else
1113 array[0] = 0;
1114 array[1] = 0;
1115 #endif
1116 n = 2;
1117 }
1118 return n;
1119 }
1120
1121 #include "disas/disas.h"
1122 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1123 {
1124 char *p = buffer;
1125 if (current_cpu) {
1126 target_ulong caller[2];
1127 const char *symbol;
1128 qemu_target_backtrace(caller, 2);
1129 symbol = lookup_symbol(caller[0]);
1130 p += sprintf(p, "[%s]", symbol);
1131 symbol = lookup_symbol(caller[1]);
1132 p += sprintf(p, "[%s]", symbol);
1133 } else {
1134 p += sprintf(p, "[cpu not running]");
1135 }
1136 assert((p - buffer) < length);
1137 return buffer;
1138 }
1139
1140 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1141 unsigned size)
1142 {
1143 if (trace_unassigned) {
1144 char buffer[256];
1145 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1146 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1147 }
1148 //~ vm_stop(0);
1149 if (current_cpu != NULL) {
1150 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1151 }
1152 return 0;
1153 }
1154
1155 static void unassigned_mem_write(void *opaque, hwaddr addr,
1156 uint64_t val, unsigned size)
1157 {
1158 if (trace_unassigned) {
1159 char buffer[256];
1160 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1161 " = 0x%" PRIx64 " %s\n",
1162 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1163 }
1164 if (current_cpu != NULL) {
1165 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1166 }
1167 }
1168
1169 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1170 unsigned size, bool is_write)
1171 {
1172 return false;
1173 }
1174
1175 const MemoryRegionOps unassigned_mem_ops = {
1176 .valid.accepts = unassigned_mem_accepts,
1177 .endianness = DEVICE_NATIVE_ENDIAN,
1178 };
1179
1180 static uint64_t memory_region_ram_device_read(void *opaque,
1181 hwaddr addr, unsigned size)
1182 {
1183 MemoryRegion *mr = opaque;
1184 uint64_t data = (uint64_t)~0;
1185
1186 switch (size) {
1187 case 1:
1188 data = *(uint8_t *)(mr->ram_block->host + addr);
1189 break;
1190 case 2:
1191 data = *(uint16_t *)(mr->ram_block->host + addr);
1192 break;
1193 case 4:
1194 data = *(uint32_t *)(mr->ram_block->host + addr);
1195 break;
1196 case 8:
1197 data = *(uint64_t *)(mr->ram_block->host + addr);
1198 break;
1199 }
1200
1201 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1202
1203 return data;
1204 }
1205
1206 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1207 uint64_t data, unsigned size)
1208 {
1209 MemoryRegion *mr = opaque;
1210
1211 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1212
1213 switch (size) {
1214 case 1:
1215 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1216 break;
1217 case 2:
1218 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1219 break;
1220 case 4:
1221 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1222 break;
1223 case 8:
1224 *(uint64_t *)(mr->ram_block->host + addr) = data;
1225 break;
1226 }
1227 }
1228
1229 static const MemoryRegionOps ram_device_mem_ops = {
1230 .read = memory_region_ram_device_read,
1231 .write = memory_region_ram_device_write,
1232 .endianness = DEVICE_HOST_ENDIAN,
1233 .valid = {
1234 .min_access_size = 1,
1235 .max_access_size = 8,
1236 .unaligned = true,
1237 },
1238 .impl = {
1239 .min_access_size = 1,
1240 .max_access_size = 8,
1241 .unaligned = true,
1242 },
1243 };
1244
1245 bool memory_region_access_valid(MemoryRegion *mr,
1246 hwaddr addr,
1247 unsigned size,
1248 bool is_write)
1249 {
1250 int access_size_min, access_size_max;
1251 int access_size, i;
1252
1253 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1254 fprintf(stderr, "Misaligned i/o to address %08" HWADDR_PRIx
1255 " with size %u for memory region %s\n",
1256 addr, size, mr->name);
1257 return false;
1258 }
1259
1260 if (!mr->ops->valid.accepts) {
1261 return true;
1262 }
1263
1264 access_size_min = mr->ops->valid.min_access_size;
1265 if (!mr->ops->valid.min_access_size) {
1266 access_size_min = 1;
1267 }
1268
1269 access_size_max = mr->ops->valid.max_access_size;
1270 if (!mr->ops->valid.max_access_size) {
1271 access_size_max = 4;
1272 }
1273
1274 access_size = MAX(MIN(size, access_size_max), access_size_min);
1275 for (i = 0; i < size; i += access_size) {
1276 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1277 is_write)) {
1278 return false;
1279 }
1280 }
1281
1282 return true;
1283 }
1284
1285 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1286 hwaddr addr,
1287 uint64_t *pval,
1288 unsigned size,
1289 MemTxAttrs attrs)
1290 {
1291 *pval = 0;
1292
1293 if (mr->ops->read) {
1294 return access_with_adjusted_size(addr, pval, size,
1295 mr->ops->impl.min_access_size,
1296 mr->ops->impl.max_access_size,
1297 memory_region_read_accessor,
1298 mr, attrs);
1299 } else if (mr->ops->read_with_attrs) {
1300 return access_with_adjusted_size(addr, pval, size,
1301 mr->ops->impl.min_access_size,
1302 mr->ops->impl.max_access_size,
1303 memory_region_read_with_attrs_accessor,
1304 mr, attrs);
1305 } else {
1306 return access_with_adjusted_size(addr, pval, size, 1, 4,
1307 memory_region_oldmmio_read_accessor,
1308 mr, attrs);
1309 }
1310 }
1311
1312 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1313 hwaddr addr,
1314 uint64_t *pval,
1315 unsigned size,
1316 MemTxAttrs attrs)
1317 {
1318 MemTxResult r;
1319
1320 if (!memory_region_access_valid(mr, addr, size, false)) {
1321 *pval = unassigned_mem_read(mr, addr, size);
1322 return MEMTX_DECODE_ERROR;
1323 }
1324
1325 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1326 adjust_endianness(mr, pval, size);
1327 return r;
1328 }
1329
1330 /* Return true if an eventfd was signalled */
1331 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1332 hwaddr addr,
1333 uint64_t data,
1334 unsigned size,
1335 MemTxAttrs attrs)
1336 {
1337 MemoryRegionIoeventfd ioeventfd = {
1338 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1339 .data = data,
1340 };
1341 unsigned i;
1342
1343 for (i = 0; i < mr->ioeventfd_nb; i++) {
1344 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1345 ioeventfd.e = mr->ioeventfds[i].e;
1346
1347 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1348 event_notifier_set(ioeventfd.e);
1349 return true;
1350 }
1351 }
1352
1353 return false;
1354 }
1355
1356 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1357 hwaddr addr,
1358 uint64_t data,
1359 unsigned size,
1360 MemTxAttrs attrs)
1361 {
1362 if (!memory_region_access_valid(mr, addr, size, true)) {
1363 unassigned_mem_write(mr, addr, data, size);
1364 return MEMTX_DECODE_ERROR;
1365 }
1366
1367 adjust_endianness(mr, &data, size);
1368
1369 if ((!kvm_eventfds_enabled()) &&
1370 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1371 return MEMTX_OK;
1372 }
1373
1374 if (mr->ops->write) {
1375 return access_with_adjusted_size(addr, &data, size,
1376 mr->ops->impl.min_access_size,
1377 mr->ops->impl.max_access_size,
1378 memory_region_write_accessor, mr,
1379 attrs);
1380 } else if (mr->ops->write_with_attrs) {
1381 return
1382 access_with_adjusted_size(addr, &data, size,
1383 mr->ops->impl.min_access_size,
1384 mr->ops->impl.max_access_size,
1385 memory_region_write_with_attrs_accessor,
1386 mr, attrs);
1387 } else {
1388 return access_with_adjusted_size(addr, &data, size, 1, 4,
1389 memory_region_oldmmio_write_accessor,
1390 mr, attrs);
1391 }
1392 }
1393
1394 void memory_region_init_io(MemoryRegion *mr,
1395 Object *owner,
1396 const MemoryRegionOps *ops,
1397 void *opaque,
1398 const char *name,
1399 uint64_t size)
1400 {
1401 memory_region_init(mr, owner, name, size);
1402 mr->ops = ops ? ops : &unassigned_mem_ops;
1403 mr->opaque = opaque;
1404 mr->terminates = true;
1405 }
1406
1407 void memory_region_init_ram(MemoryRegion *mr,
1408 Object *owner,
1409 const char *name,
1410 uint64_t size,
1411 Error **errp)
1412 {
1413 memory_region_init(mr, owner, name, size);
1414 mr->ram = true;
1415 mr->terminates = true;
1416 mr->destructor = memory_region_destructor_ram;
1417 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1418 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1419 }
1420
1421 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1422 Object *owner,
1423 const char *name,
1424 uint64_t size,
1425 uint64_t max_size,
1426 void (*resized)(const char*,
1427 uint64_t length,
1428 void *host),
1429 Error **errp)
1430 {
1431 memory_region_init(mr, owner, name, size);
1432 mr->ram = true;
1433 mr->terminates = true;
1434 mr->destructor = memory_region_destructor_ram;
1435 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1436 mr, errp);
1437 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1438 }
1439
1440 #ifdef __linux__
1441 void memory_region_init_ram_from_file(MemoryRegion *mr,
1442 struct Object *owner,
1443 const char *name,
1444 uint64_t size,
1445 bool share,
1446 const char *path,
1447 Error **errp)
1448 {
1449 memory_region_init(mr, owner, name, size);
1450 mr->ram = true;
1451 mr->terminates = true;
1452 mr->destructor = memory_region_destructor_ram;
1453 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1454 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1455 }
1456 #endif
1457
1458 void memory_region_init_ram_ptr(MemoryRegion *mr,
1459 Object *owner,
1460 const char *name,
1461 uint64_t size,
1462 void *ptr)
1463 {
1464 memory_region_init(mr, owner, name, size);
1465 mr->ram = true;
1466 mr->terminates = true;
1467 mr->destructor = memory_region_destructor_ram;
1468 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1469
1470 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1471 assert(ptr != NULL);
1472 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1473 }
1474
1475 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1476 Object *owner,
1477 const char *name,
1478 uint64_t size,
1479 void *ptr)
1480 {
1481 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1482 mr->ram_device = true;
1483 mr->ops = &ram_device_mem_ops;
1484 mr->opaque = mr;
1485 }
1486
1487 void memory_region_init_alias(MemoryRegion *mr,
1488 Object *owner,
1489 const char *name,
1490 MemoryRegion *orig,
1491 hwaddr offset,
1492 uint64_t size)
1493 {
1494 memory_region_init(mr, owner, name, size);
1495 mr->alias = orig;
1496 mr->alias_offset = offset;
1497 }
1498
1499 void memory_region_init_rom(MemoryRegion *mr,
1500 struct Object *owner,
1501 const char *name,
1502 uint64_t size,
1503 Error **errp)
1504 {
1505 memory_region_init(mr, owner, name, size);
1506 mr->ram = true;
1507 mr->readonly = true;
1508 mr->terminates = true;
1509 mr->destructor = memory_region_destructor_ram;
1510 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1511 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1512 }
1513
1514 void memory_region_init_rom_device(MemoryRegion *mr,
1515 Object *owner,
1516 const MemoryRegionOps *ops,
1517 void *opaque,
1518 const char *name,
1519 uint64_t size,
1520 Error **errp)
1521 {
1522 assert(ops);
1523 memory_region_init(mr, owner, name, size);
1524 mr->ops = ops;
1525 mr->opaque = opaque;
1526 mr->terminates = true;
1527 mr->rom_device = true;
1528 mr->destructor = memory_region_destructor_ram;
1529 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1530 }
1531
1532 void memory_region_init_iommu(MemoryRegion *mr,
1533 Object *owner,
1534 const MemoryRegionIOMMUOps *ops,
1535 const char *name,
1536 uint64_t size)
1537 {
1538 memory_region_init(mr, owner, name, size);
1539 mr->iommu_ops = ops,
1540 mr->terminates = true; /* then re-forwards */
1541 QLIST_INIT(&mr->iommu_notify);
1542 mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1543 }
1544
1545 static void memory_region_finalize(Object *obj)
1546 {
1547 MemoryRegion *mr = MEMORY_REGION(obj);
1548
1549 assert(!mr->container);
1550
1551 /* We know the region is not visible in any address space (it
1552 * does not have a container and cannot be a root either because
1553 * it has no references, so we can blindly clear mr->enabled.
1554 * memory_region_set_enabled instead could trigger a transaction
1555 * and cause an infinite loop.
1556 */
1557 mr->enabled = false;
1558 memory_region_transaction_begin();
1559 while (!QTAILQ_EMPTY(&mr->subregions)) {
1560 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1561 memory_region_del_subregion(mr, subregion);
1562 }
1563 memory_region_transaction_commit();
1564
1565 mr->destructor(mr);
1566 memory_region_clear_coalescing(mr);
1567 g_free((char *)mr->name);
1568 g_free(mr->ioeventfds);
1569 }
1570
1571 Object *memory_region_owner(MemoryRegion *mr)
1572 {
1573 Object *obj = OBJECT(mr);
1574 return obj->parent;
1575 }
1576
1577 void memory_region_ref(MemoryRegion *mr)
1578 {
1579 /* MMIO callbacks most likely will access data that belongs
1580 * to the owner, hence the need to ref/unref the owner whenever
1581 * the memory region is in use.
1582 *
1583 * The memory region is a child of its owner. As long as the
1584 * owner doesn't call unparent itself on the memory region,
1585 * ref-ing the owner will also keep the memory region alive.
1586 * Memory regions without an owner are supposed to never go away;
1587 * we do not ref/unref them because it slows down DMA sensibly.
1588 */
1589 if (mr && mr->owner) {
1590 object_ref(mr->owner);
1591 }
1592 }
1593
1594 void memory_region_unref(MemoryRegion *mr)
1595 {
1596 if (mr && mr->owner) {
1597 object_unref(mr->owner);
1598 }
1599 }
1600
1601 uint64_t memory_region_size(MemoryRegion *mr)
1602 {
1603 if (int128_eq(mr->size, int128_2_64())) {
1604 return UINT64_MAX;
1605 }
1606 return int128_get64(mr->size);
1607 }
1608
1609 const char *memory_region_name(const MemoryRegion *mr)
1610 {
1611 if (!mr->name) {
1612 ((MemoryRegion *)mr)->name =
1613 object_get_canonical_path_component(OBJECT(mr));
1614 }
1615 return mr->name;
1616 }
1617
1618 bool memory_region_is_ram_device(MemoryRegion *mr)
1619 {
1620 return mr->ram_device;
1621 }
1622
1623 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1624 {
1625 uint8_t mask = mr->dirty_log_mask;
1626 if (global_dirty_log && mr->ram_block) {
1627 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1628 }
1629 return mask;
1630 }
1631
1632 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1633 {
1634 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1635 }
1636
1637 static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1638 {
1639 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1640 IOMMUNotifier *iommu_notifier;
1641
1642 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1643 flags |= iommu_notifier->notifier_flags;
1644 }
1645
1646 if (flags != mr->iommu_notify_flags &&
1647 mr->iommu_ops->notify_flag_changed) {
1648 mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1649 flags);
1650 }
1651
1652 mr->iommu_notify_flags = flags;
1653 }
1654
1655 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1656 IOMMUNotifier *n)
1657 {
1658 if (mr->alias) {
1659 memory_region_register_iommu_notifier(mr->alias, n);
1660 return;
1661 }
1662
1663 /* We need to register for at least one bitfield */
1664 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1665 QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
1666 memory_region_update_iommu_notify_flags(mr);
1667 }
1668
1669 uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1670 {
1671 assert(memory_region_is_iommu(mr));
1672 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1673 return mr->iommu_ops->get_min_page_size(mr);
1674 }
1675 return TARGET_PAGE_SIZE;
1676 }
1677
1678 void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1679 bool is_write)
1680 {
1681 hwaddr addr, granularity;
1682 IOMMUTLBEntry iotlb;
1683
1684 granularity = memory_region_iommu_get_min_page_size(mr);
1685
1686 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1687 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1688 if (iotlb.perm != IOMMU_NONE) {
1689 n->notify(n, &iotlb);
1690 }
1691
1692 /* if (2^64 - MR size) < granularity, it's possible to get an
1693 * infinite loop here. This should catch such a wraparound */
1694 if ((addr + granularity) < addr) {
1695 break;
1696 }
1697 }
1698 }
1699
1700 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1701 IOMMUNotifier *n)
1702 {
1703 if (mr->alias) {
1704 memory_region_unregister_iommu_notifier(mr->alias, n);
1705 return;
1706 }
1707 QLIST_REMOVE(n, node);
1708 memory_region_update_iommu_notify_flags(mr);
1709 }
1710
1711 void memory_region_notify_iommu(MemoryRegion *mr,
1712 IOMMUTLBEntry entry)
1713 {
1714 IOMMUNotifier *iommu_notifier;
1715 IOMMUNotifierFlag request_flags;
1716
1717 assert(memory_region_is_iommu(mr));
1718
1719 if (entry.perm & IOMMU_RW) {
1720 request_flags = IOMMU_NOTIFIER_MAP;
1721 } else {
1722 request_flags = IOMMU_NOTIFIER_UNMAP;
1723 }
1724
1725 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1726 if (iommu_notifier->notifier_flags & request_flags) {
1727 iommu_notifier->notify(iommu_notifier, &entry);
1728 }
1729 }
1730 }
1731
1732 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1733 {
1734 uint8_t mask = 1 << client;
1735 uint8_t old_logging;
1736
1737 assert(client == DIRTY_MEMORY_VGA);
1738 old_logging = mr->vga_logging_count;
1739 mr->vga_logging_count += log ? 1 : -1;
1740 if (!!old_logging == !!mr->vga_logging_count) {
1741 return;
1742 }
1743
1744 memory_region_transaction_begin();
1745 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1746 memory_region_update_pending |= mr->enabled;
1747 memory_region_transaction_commit();
1748 }
1749
1750 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1751 hwaddr size, unsigned client)
1752 {
1753 assert(mr->ram_block);
1754 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1755 size, client);
1756 }
1757
1758 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1759 hwaddr size)
1760 {
1761 assert(mr->ram_block);
1762 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1763 size,
1764 memory_region_get_dirty_log_mask(mr));
1765 }
1766
1767 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1768 hwaddr size, unsigned client)
1769 {
1770 assert(mr->ram_block);
1771 return cpu_physical_memory_test_and_clear_dirty(
1772 memory_region_get_ram_addr(mr) + addr, size, client);
1773 }
1774
1775
1776 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1777 {
1778 MemoryListener *listener;
1779 AddressSpace *as;
1780 FlatView *view;
1781 FlatRange *fr;
1782
1783 /* If the same address space has multiple log_sync listeners, we
1784 * visit that address space's FlatView multiple times. But because
1785 * log_sync listeners are rare, it's still cheaper than walking each
1786 * address space once.
1787 */
1788 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1789 if (!listener->log_sync) {
1790 continue;
1791 }
1792 as = listener->address_space;
1793 view = address_space_get_flatview(as);
1794 FOR_EACH_FLAT_RANGE(fr, view) {
1795 if (fr->mr == mr) {
1796 MemoryRegionSection mrs = section_from_flat_range(fr, as);
1797 listener->log_sync(listener, &mrs);
1798 }
1799 }
1800 flatview_unref(view);
1801 }
1802 }
1803
1804 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1805 {
1806 if (mr->readonly != readonly) {
1807 memory_region_transaction_begin();
1808 mr->readonly = readonly;
1809 memory_region_update_pending |= mr->enabled;
1810 memory_region_transaction_commit();
1811 }
1812 }
1813
1814 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1815 {
1816 if (mr->romd_mode != romd_mode) {
1817 memory_region_transaction_begin();
1818 mr->romd_mode = romd_mode;
1819 memory_region_update_pending |= mr->enabled;
1820 memory_region_transaction_commit();
1821 }
1822 }
1823
1824 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1825 hwaddr size, unsigned client)
1826 {
1827 assert(mr->ram_block);
1828 cpu_physical_memory_test_and_clear_dirty(
1829 memory_region_get_ram_addr(mr) + addr, size, client);
1830 }
1831
1832 int memory_region_get_fd(MemoryRegion *mr)
1833 {
1834 int fd;
1835
1836 rcu_read_lock();
1837 while (mr->alias) {
1838 mr = mr->alias;
1839 }
1840 fd = mr->ram_block->fd;
1841 rcu_read_unlock();
1842
1843 return fd;
1844 }
1845
1846 void memory_region_set_fd(MemoryRegion *mr, int fd)
1847 {
1848 rcu_read_lock();
1849 while (mr->alias) {
1850 mr = mr->alias;
1851 }
1852 mr->ram_block->fd = fd;
1853 rcu_read_unlock();
1854 }
1855
1856 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1857 {
1858 void *ptr;
1859 uint64_t offset = 0;
1860
1861 rcu_read_lock();
1862 while (mr->alias) {
1863 offset += mr->alias_offset;
1864 mr = mr->alias;
1865 }
1866 assert(mr->ram_block);
1867 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1868 rcu_read_unlock();
1869
1870 return ptr;
1871 }
1872
1873 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1874 {
1875 RAMBlock *block;
1876
1877 block = qemu_ram_block_from_host(ptr, false, offset);
1878 if (!block) {
1879 return NULL;
1880 }
1881
1882 return block->mr;
1883 }
1884
1885 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1886 {
1887 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1888 }
1889
1890 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1891 {
1892 assert(mr->ram_block);
1893
1894 qemu_ram_resize(mr->ram_block, newsize, errp);
1895 }
1896
1897 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1898 {
1899 FlatView *view;
1900 FlatRange *fr;
1901 CoalescedMemoryRange *cmr;
1902 AddrRange tmp;
1903 MemoryRegionSection section;
1904
1905 view = address_space_get_flatview(as);
1906 FOR_EACH_FLAT_RANGE(fr, view) {
1907 if (fr->mr == mr) {
1908 section = (MemoryRegionSection) {
1909 .address_space = as,
1910 .offset_within_address_space = int128_get64(fr->addr.start),
1911 .size = fr->addr.size,
1912 };
1913
1914 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
1915 int128_get64(fr->addr.start),
1916 int128_get64(fr->addr.size));
1917 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1918 tmp = addrrange_shift(cmr->addr,
1919 int128_sub(fr->addr.start,
1920 int128_make64(fr->offset_in_region)));
1921 if (!addrrange_intersects(tmp, fr->addr)) {
1922 continue;
1923 }
1924 tmp = addrrange_intersection(tmp, fr->addr);
1925 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
1926 int128_get64(tmp.start),
1927 int128_get64(tmp.size));
1928 }
1929 }
1930 }
1931 flatview_unref(view);
1932 }
1933
1934 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1935 {
1936 AddressSpace *as;
1937
1938 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1939 memory_region_update_coalesced_range_as(mr, as);
1940 }
1941 }
1942
1943 void memory_region_set_coalescing(MemoryRegion *mr)
1944 {
1945 memory_region_clear_coalescing(mr);
1946 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1947 }
1948
1949 void memory_region_add_coalescing(MemoryRegion *mr,
1950 hwaddr offset,
1951 uint64_t size)
1952 {
1953 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1954
1955 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1956 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1957 memory_region_update_coalesced_range(mr);
1958 memory_region_set_flush_coalesced(mr);
1959 }
1960
1961 void memory_region_clear_coalescing(MemoryRegion *mr)
1962 {
1963 CoalescedMemoryRange *cmr;
1964 bool updated = false;
1965
1966 qemu_flush_coalesced_mmio_buffer();
1967 mr->flush_coalesced_mmio = false;
1968
1969 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1970 cmr = QTAILQ_FIRST(&mr->coalesced);
1971 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1972 g_free(cmr);
1973 updated = true;
1974 }
1975
1976 if (updated) {
1977 memory_region_update_coalesced_range(mr);
1978 }
1979 }
1980
1981 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1982 {
1983 mr->flush_coalesced_mmio = true;
1984 }
1985
1986 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1987 {
1988 qemu_flush_coalesced_mmio_buffer();
1989 if (QTAILQ_EMPTY(&mr->coalesced)) {
1990 mr->flush_coalesced_mmio = false;
1991 }
1992 }
1993
1994 void memory_region_set_global_locking(MemoryRegion *mr)
1995 {
1996 mr->global_locking = true;
1997 }
1998
1999 void memory_region_clear_global_locking(MemoryRegion *mr)
2000 {
2001 mr->global_locking = false;
2002 }
2003
2004 static bool userspace_eventfd_warning;
2005
2006 void memory_region_add_eventfd(MemoryRegion *mr,
2007 hwaddr addr,
2008 unsigned size,
2009 bool match_data,
2010 uint64_t data,
2011 EventNotifier *e)
2012 {
2013 MemoryRegionIoeventfd mrfd = {
2014 .addr.start = int128_make64(addr),
2015 .addr.size = int128_make64(size),
2016 .match_data = match_data,
2017 .data = data,
2018 .e = e,
2019 };
2020 unsigned i;
2021
2022 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2023 userspace_eventfd_warning))) {
2024 userspace_eventfd_warning = true;
2025 error_report("Using eventfd without MMIO binding in KVM. "
2026 "Suboptimal performance expected");
2027 }
2028
2029 if (size) {
2030 adjust_endianness(mr, &mrfd.data, size);
2031 }
2032 memory_region_transaction_begin();
2033 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2034 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2035 break;
2036 }
2037 }
2038 ++mr->ioeventfd_nb;
2039 mr->ioeventfds = g_realloc(mr->ioeventfds,
2040 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2041 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2042 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2043 mr->ioeventfds[i] = mrfd;
2044 ioeventfd_update_pending |= mr->enabled;
2045 memory_region_transaction_commit();
2046 }
2047
2048 void memory_region_del_eventfd(MemoryRegion *mr,
2049 hwaddr addr,
2050 unsigned size,
2051 bool match_data,
2052 uint64_t data,
2053 EventNotifier *e)
2054 {
2055 MemoryRegionIoeventfd mrfd = {
2056 .addr.start = int128_make64(addr),
2057 .addr.size = int128_make64(size),
2058 .match_data = match_data,
2059 .data = data,
2060 .e = e,
2061 };
2062 unsigned i;
2063
2064 if (size) {
2065 adjust_endianness(mr, &mrfd.data, size);
2066 }
2067 memory_region_transaction_begin();
2068 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2069 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2070 break;
2071 }
2072 }
2073 assert(i != mr->ioeventfd_nb);
2074 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2075 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2076 --mr->ioeventfd_nb;
2077 mr->ioeventfds = g_realloc(mr->ioeventfds,
2078 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2079 ioeventfd_update_pending |= mr->enabled;
2080 memory_region_transaction_commit();
2081 }
2082
2083 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2084 {
2085 MemoryRegion *mr = subregion->container;
2086 MemoryRegion *other;
2087
2088 memory_region_transaction_begin();
2089
2090 memory_region_ref(subregion);
2091 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2092 if (subregion->priority >= other->priority) {
2093 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2094 goto done;
2095 }
2096 }
2097 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2098 done:
2099 memory_region_update_pending |= mr->enabled && subregion->enabled;
2100 memory_region_transaction_commit();
2101 }
2102
2103 static void memory_region_add_subregion_common(MemoryRegion *mr,
2104 hwaddr offset,
2105 MemoryRegion *subregion)
2106 {
2107 assert(!subregion->container);
2108 subregion->container = mr;
2109 subregion->addr = offset;
2110 memory_region_update_container_subregions(subregion);
2111 }
2112
2113 void memory_region_add_subregion(MemoryRegion *mr,
2114 hwaddr offset,
2115 MemoryRegion *subregion)
2116 {
2117 subregion->priority = 0;
2118 memory_region_add_subregion_common(mr, offset, subregion);
2119 }
2120
2121 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2122 hwaddr offset,
2123 MemoryRegion *subregion,
2124 int priority)
2125 {
2126 subregion->priority = priority;
2127 memory_region_add_subregion_common(mr, offset, subregion);
2128 }
2129
2130 void memory_region_del_subregion(MemoryRegion *mr,
2131 MemoryRegion *subregion)
2132 {
2133 memory_region_transaction_begin();
2134 assert(subregion->container == mr);
2135 subregion->container = NULL;
2136 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2137 memory_region_unref(subregion);
2138 memory_region_update_pending |= mr->enabled && subregion->enabled;
2139 memory_region_transaction_commit();
2140 }
2141
2142 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2143 {
2144 if (enabled == mr->enabled) {
2145 return;
2146 }
2147 memory_region_transaction_begin();
2148 mr->enabled = enabled;
2149 memory_region_update_pending = true;
2150 memory_region_transaction_commit();
2151 }
2152
2153 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2154 {
2155 Int128 s = int128_make64(size);
2156
2157 if (size == UINT64_MAX) {
2158 s = int128_2_64();
2159 }
2160 if (int128_eq(s, mr->size)) {
2161 return;
2162 }
2163 memory_region_transaction_begin();
2164 mr->size = s;
2165 memory_region_update_pending = true;
2166 memory_region_transaction_commit();
2167 }
2168
2169 static void memory_region_readd_subregion(MemoryRegion *mr)
2170 {
2171 MemoryRegion *container = mr->container;
2172
2173 if (container) {
2174 memory_region_transaction_begin();
2175 memory_region_ref(mr);
2176 memory_region_del_subregion(container, mr);
2177 mr->container = container;
2178 memory_region_update_container_subregions(mr);
2179 memory_region_unref(mr);
2180 memory_region_transaction_commit();
2181 }
2182 }
2183
2184 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2185 {
2186 if (addr != mr->addr) {
2187 mr->addr = addr;
2188 memory_region_readd_subregion(mr);
2189 }
2190 }
2191
2192 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2193 {
2194 assert(mr->alias);
2195
2196 if (offset == mr->alias_offset) {
2197 return;
2198 }
2199
2200 memory_region_transaction_begin();
2201 mr->alias_offset = offset;
2202 memory_region_update_pending |= mr->enabled;
2203 memory_region_transaction_commit();
2204 }
2205
2206 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2207 {
2208 return mr->align;
2209 }
2210
2211 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2212 {
2213 const AddrRange *addr = addr_;
2214 const FlatRange *fr = fr_;
2215
2216 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2217 return -1;
2218 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2219 return 1;
2220 }
2221 return 0;
2222 }
2223
2224 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2225 {
2226 return bsearch(&addr, view->ranges, view->nr,
2227 sizeof(FlatRange), cmp_flatrange_addr);
2228 }
2229
2230 bool memory_region_is_mapped(MemoryRegion *mr)
2231 {
2232 return mr->container ? true : false;
2233 }
2234
2235 /* Same as memory_region_find, but it does not add a reference to the
2236 * returned region. It must be called from an RCU critical section.
2237 */
2238 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2239 hwaddr addr, uint64_t size)
2240 {
2241 MemoryRegionSection ret = { .mr = NULL };
2242 MemoryRegion *root;
2243 AddressSpace *as;
2244 AddrRange range;
2245 FlatView *view;
2246 FlatRange *fr;
2247
2248 addr += mr->addr;
2249 for (root = mr; root->container; ) {
2250 root = root->container;
2251 addr += root->addr;
2252 }
2253
2254 as = memory_region_to_address_space(root);
2255 if (!as) {
2256 return ret;
2257 }
2258 range = addrrange_make(int128_make64(addr), int128_make64(size));
2259
2260 view = atomic_rcu_read(&as->current_map);
2261 fr = flatview_lookup(view, range);
2262 if (!fr) {
2263 return ret;
2264 }
2265
2266 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2267 --fr;
2268 }
2269
2270 ret.mr = fr->mr;
2271 ret.address_space = as;
2272 range = addrrange_intersection(range, fr->addr);
2273 ret.offset_within_region = fr->offset_in_region;
2274 ret.offset_within_region += int128_get64(int128_sub(range.start,
2275 fr->addr.start));
2276 ret.size = range.size;
2277 ret.offset_within_address_space = int128_get64(range.start);
2278 ret.readonly = fr->readonly;
2279 return ret;
2280 }
2281
2282 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2283 hwaddr addr, uint64_t size)
2284 {
2285 MemoryRegionSection ret;
2286 rcu_read_lock();
2287 ret = memory_region_find_rcu(mr, addr, size);
2288 if (ret.mr) {
2289 memory_region_ref(ret.mr);
2290 }
2291 rcu_read_unlock();
2292 return ret;
2293 }
2294
2295 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2296 {
2297 MemoryRegion *mr;
2298
2299 rcu_read_lock();
2300 mr = memory_region_find_rcu(container, addr, 1).mr;
2301 rcu_read_unlock();
2302 return mr && mr != container;
2303 }
2304
2305 void memory_global_dirty_log_sync(void)
2306 {
2307 MemoryListener *listener;
2308 AddressSpace *as;
2309 FlatView *view;
2310 FlatRange *fr;
2311
2312 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2313 if (!listener->log_sync) {
2314 continue;
2315 }
2316 as = listener->address_space;
2317 view = address_space_get_flatview(as);
2318 FOR_EACH_FLAT_RANGE(fr, view) {
2319 if (fr->dirty_log_mask) {
2320 MemoryRegionSection mrs = section_from_flat_range(fr, as);
2321 listener->log_sync(listener, &mrs);
2322 }
2323 }
2324 flatview_unref(view);
2325 }
2326 }
2327
2328 void memory_global_dirty_log_start(void)
2329 {
2330 global_dirty_log = true;
2331
2332 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2333
2334 /* Refresh DIRTY_LOG_MIGRATION bit. */
2335 memory_region_transaction_begin();
2336 memory_region_update_pending = true;
2337 memory_region_transaction_commit();
2338 }
2339
2340 void memory_global_dirty_log_stop(void)
2341 {
2342 global_dirty_log = false;
2343
2344 /* Refresh DIRTY_LOG_MIGRATION bit. */
2345 memory_region_transaction_begin();
2346 memory_region_update_pending = true;
2347 memory_region_transaction_commit();
2348
2349 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2350 }
2351
2352 static void listener_add_address_space(MemoryListener *listener,
2353 AddressSpace *as)
2354 {
2355 FlatView *view;
2356 FlatRange *fr;
2357
2358 if (listener->begin) {
2359 listener->begin(listener);
2360 }
2361 if (global_dirty_log) {
2362 if (listener->log_global_start) {
2363 listener->log_global_start(listener);
2364 }
2365 }
2366
2367 view = address_space_get_flatview(as);
2368 FOR_EACH_FLAT_RANGE(fr, view) {
2369 MemoryRegionSection section = {
2370 .mr = fr->mr,
2371 .address_space = as,
2372 .offset_within_region = fr->offset_in_region,
2373 .size = fr->addr.size,
2374 .offset_within_address_space = int128_get64(fr->addr.start),
2375 .readonly = fr->readonly,
2376 };
2377 if (fr->dirty_log_mask && listener->log_start) {
2378 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2379 }
2380 if (listener->region_add) {
2381 listener->region_add(listener, &section);
2382 }
2383 }
2384 if (listener->commit) {
2385 listener->commit(listener);
2386 }
2387 flatview_unref(view);
2388 }
2389
2390 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2391 {
2392 MemoryListener *other = NULL;
2393
2394 listener->address_space = as;
2395 if (QTAILQ_EMPTY(&memory_listeners)
2396 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2397 memory_listeners)->priority) {
2398 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2399 } else {
2400 QTAILQ_FOREACH(other, &memory_listeners, link) {
2401 if (listener->priority < other->priority) {
2402 break;
2403 }
2404 }
2405 QTAILQ_INSERT_BEFORE(other, listener, link);
2406 }
2407
2408 if (QTAILQ_EMPTY(&as->listeners)
2409 || listener->priority >= QTAILQ_LAST(&as->listeners,
2410 memory_listeners)->priority) {
2411 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2412 } else {
2413 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2414 if (listener->priority < other->priority) {
2415 break;
2416 }
2417 }
2418 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2419 }
2420
2421 listener_add_address_space(listener, as);
2422 }
2423
2424 void memory_listener_unregister(MemoryListener *listener)
2425 {
2426 if (!listener->address_space) {
2427 return;
2428 }
2429
2430 QTAILQ_REMOVE(&memory_listeners, listener, link);
2431 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2432 listener->address_space = NULL;
2433 }
2434
2435 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2436 {
2437 memory_region_ref(root);
2438 memory_region_transaction_begin();
2439 as->ref_count = 1;
2440 as->root = root;
2441 as->malloced = false;
2442 as->current_map = g_new(FlatView, 1);
2443 flatview_init(as->current_map);
2444 as->ioeventfd_nb = 0;
2445 as->ioeventfds = NULL;
2446 QTAILQ_INIT(&as->listeners);
2447 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2448 as->name = g_strdup(name ? name : "anonymous");
2449 address_space_init_dispatch(as);
2450 memory_region_update_pending |= root->enabled;
2451 memory_region_transaction_commit();
2452 }
2453
2454 static void do_address_space_destroy(AddressSpace *as)
2455 {
2456 bool do_free = as->malloced;
2457
2458 address_space_destroy_dispatch(as);
2459 assert(QTAILQ_EMPTY(&as->listeners));
2460
2461 flatview_unref(as->current_map);
2462 g_free(as->name);
2463 g_free(as->ioeventfds);
2464 memory_region_unref(as->root);
2465 if (do_free) {
2466 g_free(as);
2467 }
2468 }
2469
2470 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2471 {
2472 AddressSpace *as;
2473
2474 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2475 if (root == as->root && as->malloced) {
2476 as->ref_count++;
2477 return as;
2478 }
2479 }
2480
2481 as = g_malloc0(sizeof *as);
2482 address_space_init(as, root, name);
2483 as->malloced = true;
2484 return as;
2485 }
2486
2487 void address_space_destroy(AddressSpace *as)
2488 {
2489 MemoryRegion *root = as->root;
2490
2491 as->ref_count--;
2492 if (as->ref_count) {
2493 return;
2494 }
2495 /* Flush out anything from MemoryListeners listening in on this */
2496 memory_region_transaction_begin();
2497 as->root = NULL;
2498 memory_region_transaction_commit();
2499 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2500 address_space_unregister(as);
2501
2502 /* At this point, as->dispatch and as->current_map are dummy
2503 * entries that the guest should never use. Wait for the old
2504 * values to expire before freeing the data.
2505 */
2506 as->root = root;
2507 call_rcu(as, do_address_space_destroy, rcu);
2508 }
2509
2510 static const char *memory_region_type(MemoryRegion *mr)
2511 {
2512 if (memory_region_is_ram_device(mr)) {
2513 return "ramd";
2514 } else if (memory_region_is_romd(mr)) {
2515 return "romd";
2516 } else if (memory_region_is_rom(mr)) {
2517 return "rom";
2518 } else if (memory_region_is_ram(mr)) {
2519 return "ram";
2520 } else {
2521 return "i/o";
2522 }
2523 }
2524
2525 typedef struct MemoryRegionList MemoryRegionList;
2526
2527 struct MemoryRegionList {
2528 const MemoryRegion *mr;
2529 QTAILQ_ENTRY(MemoryRegionList) queue;
2530 };
2531
2532 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2533
2534 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2535 int128_sub((size), int128_one())) : 0)
2536 #define MTREE_INDENT " "
2537
2538 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2539 const MemoryRegion *mr, unsigned int level,
2540 hwaddr base,
2541 MemoryRegionListHead *alias_print_queue)
2542 {
2543 MemoryRegionList *new_ml, *ml, *next_ml;
2544 MemoryRegionListHead submr_print_queue;
2545 const MemoryRegion *submr;
2546 unsigned int i;
2547
2548 if (!mr) {
2549 return;
2550 }
2551
2552 for (i = 0; i < level; i++) {
2553 mon_printf(f, MTREE_INDENT);
2554 }
2555
2556 if (mr->alias) {
2557 MemoryRegionList *ml;
2558 bool found = false;
2559
2560 /* check if the alias is already in the queue */
2561 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2562 if (ml->mr == mr->alias) {
2563 found = true;
2564 }
2565 }
2566
2567 if (!found) {
2568 ml = g_new(MemoryRegionList, 1);
2569 ml->mr = mr->alias;
2570 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2571 }
2572 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2573 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2574 "-" TARGET_FMT_plx "%s\n",
2575 base + mr->addr,
2576 base + mr->addr + MR_SIZE(mr->size),
2577 mr->priority,
2578 memory_region_type((MemoryRegion *)mr),
2579 memory_region_name(mr),
2580 memory_region_name(mr->alias),
2581 mr->alias_offset,
2582 mr->alias_offset + MR_SIZE(mr->size),
2583 mr->enabled ? "" : " [disabled]");
2584 } else {
2585 mon_printf(f,
2586 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
2587 base + mr->addr,
2588 base + mr->addr + MR_SIZE(mr->size),
2589 mr->priority,
2590 memory_region_type((MemoryRegion *)mr),
2591 memory_region_name(mr),
2592 mr->enabled ? "" : " [disabled]");
2593 }
2594
2595 QTAILQ_INIT(&submr_print_queue);
2596
2597 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2598 new_ml = g_new(MemoryRegionList, 1);
2599 new_ml->mr = submr;
2600 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2601 if (new_ml->mr->addr < ml->mr->addr ||
2602 (new_ml->mr->addr == ml->mr->addr &&
2603 new_ml->mr->priority > ml->mr->priority)) {
2604 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2605 new_ml = NULL;
2606 break;
2607 }
2608 }
2609 if (new_ml) {
2610 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2611 }
2612 }
2613
2614 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2615 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2616 alias_print_queue);
2617 }
2618
2619 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2620 g_free(ml);
2621 }
2622 }
2623
2624 static void mtree_print_flatview(fprintf_function p, void *f,
2625 AddressSpace *as)
2626 {
2627 FlatView *view = address_space_get_flatview(as);
2628 FlatRange *range = &view->ranges[0];
2629 MemoryRegion *mr;
2630 int n = view->nr;
2631
2632 if (n <= 0) {
2633 p(f, MTREE_INDENT "No rendered FlatView for "
2634 "address space '%s'\n", as->name);
2635 flatview_unref(view);
2636 return;
2637 }
2638
2639 while (n--) {
2640 mr = range->mr;
2641 if (range->offset_in_region) {
2642 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2643 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
2644 int128_get64(range->addr.start),
2645 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2646 mr->priority,
2647 range->readonly ? "rom" : memory_region_type(mr),
2648 memory_region_name(mr),
2649 range->offset_in_region);
2650 } else {
2651 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2652 TARGET_FMT_plx " (prio %d, %s): %s\n",
2653 int128_get64(range->addr.start),
2654 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2655 mr->priority,
2656 range->readonly ? "rom" : memory_region_type(mr),
2657 memory_region_name(mr));
2658 }
2659 range++;
2660 }
2661
2662 flatview_unref(view);
2663 }
2664
2665 void mtree_info(fprintf_function mon_printf, void *f, bool flatview)
2666 {
2667 MemoryRegionListHead ml_head;
2668 MemoryRegionList *ml, *ml2;
2669 AddressSpace *as;
2670
2671 if (flatview) {
2672 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2673 mon_printf(f, "address-space (flat view): %s\n", as->name);
2674 mtree_print_flatview(mon_printf, f, as);
2675 mon_printf(f, "\n");
2676 }
2677 return;
2678 }
2679
2680 QTAILQ_INIT(&ml_head);
2681
2682 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2683 mon_printf(f, "address-space: %s\n", as->name);
2684 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2685 mon_printf(f, "\n");
2686 }
2687
2688 /* print aliased regions */
2689 QTAILQ_FOREACH(ml, &ml_head, queue) {
2690 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2691 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2692 mon_printf(f, "\n");
2693 }
2694
2695 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2696 g_free(ml);
2697 }
2698 }
2699
2700 static const TypeInfo memory_region_info = {
2701 .parent = TYPE_OBJECT,
2702 .name = TYPE_MEMORY_REGION,
2703 .instance_size = sizeof(MemoryRegion),
2704 .instance_init = memory_region_initfn,
2705 .instance_finalize = memory_region_finalize,
2706 };
2707
2708 static void memory_register_types(void)
2709 {
2710 type_register_static(&memory_region_info);
2711 }
2712
2713 type_init(memory_register_types)
AR7 emulation for QEMU