2 * QEMU Firmware configuration device emulation
4 * Copyright (c) 2008 Gleb Natapov
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 #include "qemu/osdep.h"
26 #include "sysemu/sysemu.h"
27 #include "sysemu/dma.h"
28 #include "hw/boards.h"
29 #include "hw/isa/isa.h"
30 #include "hw/nvram/fw_cfg.h"
31 #include "hw/sysbus.h"
33 #include "qemu/error-report.h"
34 #include "qemu/config-file.h"
35 #include "qemu/cutils.h"
36 #include "qapi/error.h"
38 #define FW_CFG_FILE_SLOTS_DFLT 0x20
40 /* FW_CFG_VERSION bits */
41 #define FW_CFG_VERSION 0x01
42 #define FW_CFG_VERSION_DMA 0x02
44 /* FW_CFG_DMA_CONTROL bits */
45 #define FW_CFG_DMA_CTL_ERROR 0x01
46 #define FW_CFG_DMA_CTL_READ 0x02
47 #define FW_CFG_DMA_CTL_SKIP 0x04
48 #define FW_CFG_DMA_CTL_SELECT 0x08
49 #define FW_CFG_DMA_CTL_WRITE 0x10
51 #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
57 void *callback_opaque
;
58 FWCfgCallback select_cb
;
64 static char *read_splashfile(char *filename
, gsize
*file_sizep
,
71 unsigned int filehead
;
74 res
= g_file_get_contents(filename
, &content
, file_sizep
, &err
);
76 error_report("failed to read splash file '%s'", filename
);
82 if (*file_sizep
< 30) {
87 filehead
= ((content
[0] & 0xff) + (content
[1] << 8)) & 0xffff;
88 if (filehead
== 0xd8ff) {
90 } else if (filehead
== 0x4d42) {
97 if (file_type
== BMP_FILE
) {
98 bmp_bpp
= (content
[28] + (content
[29] << 8)) & 0xffff;
105 *file_typep
= file_type
;
110 error_report("splash file '%s' format not recognized; must be JPEG "
111 "or 24 bit BMP", filename
);
116 static void fw_cfg_bootsplash(FWCfgState
*s
)
118 int boot_splash_time
= -1;
119 const char *boot_splash_filename
= NULL
;
121 char *filename
, *file_data
;
126 /* get user configuration */
127 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
128 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
130 temp
= qemu_opt_get(opts
, "splash");
132 boot_splash_filename
= temp
;
134 temp
= qemu_opt_get(opts
, "splash-time");
137 boot_splash_time
= strtol(p
, &p
, 10);
141 /* insert splash time if user configurated */
142 if (boot_splash_time
>= 0) {
143 /* validate the input */
144 if (boot_splash_time
> 0xffff) {
145 error_report("splash time is big than 65535, force it to 65535.");
146 boot_splash_time
= 0xffff;
148 /* use little endian format */
149 qemu_extra_params_fw
[0] = (uint8_t)(boot_splash_time
& 0xff);
150 qemu_extra_params_fw
[1] = (uint8_t)((boot_splash_time
>> 8) & 0xff);
151 fw_cfg_add_file(s
, "etc/boot-menu-wait", qemu_extra_params_fw
, 2);
154 /* insert splash file if user configurated */
155 if (boot_splash_filename
!= NULL
) {
156 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, boot_splash_filename
);
157 if (filename
== NULL
) {
158 error_report("failed to find file '%s'.", boot_splash_filename
);
162 /* loading file data */
163 file_data
= read_splashfile(filename
, &file_size
, &file_type
);
164 if (file_data
== NULL
) {
168 g_free(boot_splash_filedata
);
169 boot_splash_filedata
= (uint8_t *)file_data
;
170 boot_splash_filedata_size
= file_size
;
173 if (file_type
== JPG_FILE
) {
174 fw_cfg_add_file(s
, "bootsplash.jpg",
175 boot_splash_filedata
, boot_splash_filedata_size
);
177 fw_cfg_add_file(s
, "bootsplash.bmp",
178 boot_splash_filedata
, boot_splash_filedata_size
);
184 static void fw_cfg_reboot(FWCfgState
*s
)
186 int reboot_timeout
= -1;
190 /* get user configuration */
191 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
192 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
194 temp
= qemu_opt_get(opts
, "reboot-timeout");
197 reboot_timeout
= strtol(p
, &p
, 10);
200 /* validate the input */
201 if (reboot_timeout
> 0xffff) {
202 error_report("reboot timeout is larger than 65535, force it to 65535.");
203 reboot_timeout
= 0xffff;
205 fw_cfg_add_file(s
, "etc/boot-fail-wait", g_memdup(&reboot_timeout
, 4), 4);
208 static void fw_cfg_write(FWCfgState
*s
, uint8_t value
)
210 /* nothing, write support removed in QEMU v2.4+ */
213 static inline uint16_t fw_cfg_file_slots(const FWCfgState
*s
)
215 return s
->file_slots
;
218 /* Note: this function returns an exclusive limit. */
219 static inline uint32_t fw_cfg_max_entry(const FWCfgState
*s
)
221 return FW_CFG_FILE_FIRST
+ fw_cfg_file_slots(s
);
224 static int fw_cfg_select(FWCfgState
*s
, uint16_t key
)
230 if ((key
& FW_CFG_ENTRY_MASK
) >= fw_cfg_max_entry(s
)) {
231 s
->cur_entry
= FW_CFG_INVALID
;
236 /* entry successfully selected, now run callback if present */
237 arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
238 e
= &s
->entries
[arch
][key
& FW_CFG_ENTRY_MASK
];
240 e
->select_cb(e
->callback_opaque
);
244 trace_fw_cfg_select(s
, key
, ret
);
248 static uint64_t fw_cfg_data_read(void *opaque
, hwaddr addr
, unsigned size
)
250 FWCfgState
*s
= opaque
;
251 int arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
252 FWCfgEntry
*e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
253 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
256 assert(size
> 0 && size
<= sizeof(value
));
257 if (s
->cur_entry
!= FW_CFG_INVALID
&& e
->data
&& s
->cur_offset
< e
->len
) {
258 /* The least significant 'size' bytes of the return value are
259 * expected to contain a string preserving portion of the item
260 * data, padded with zeros on the right in case we run out early.
261 * In technical terms, we're composing the host-endian representation
262 * of the big endian interpretation of the fw_cfg string.
265 value
= (value
<< 8) | e
->data
[s
->cur_offset
++];
266 } while (--size
&& s
->cur_offset
< e
->len
);
267 /* If size is still not zero, we *did* run out early, so continue
268 * left-shifting, to add the appropriate number of padding zeros
274 trace_fw_cfg_read(s
, value
);
278 static void fw_cfg_data_mem_write(void *opaque
, hwaddr addr
,
279 uint64_t value
, unsigned size
)
281 FWCfgState
*s
= opaque
;
285 fw_cfg_write(s
, value
>> (8 * --i
));
289 static void fw_cfg_dma_transfer(FWCfgState
*s
)
295 int read
= 0, write
= 0;
298 /* Reset the address before the next access */
299 dma_addr
= s
->dma_addr
;
302 if (dma_memory_read(s
->dma_as
, dma_addr
, &dma
, sizeof(dma
))) {
303 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
304 FW_CFG_DMA_CTL_ERROR
);
308 dma
.address
= be64_to_cpu(dma
.address
);
309 dma
.length
= be32_to_cpu(dma
.length
);
310 dma
.control
= be32_to_cpu(dma
.control
);
312 if (dma
.control
& FW_CFG_DMA_CTL_SELECT
) {
313 fw_cfg_select(s
, dma
.control
>> 16);
316 arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
317 e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
318 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
320 if (dma
.control
& FW_CFG_DMA_CTL_READ
) {
323 } else if (dma
.control
& FW_CFG_DMA_CTL_WRITE
) {
326 } else if (dma
.control
& FW_CFG_DMA_CTL_SKIP
) {
335 while (dma
.length
> 0 && !(dma
.control
& FW_CFG_DMA_CTL_ERROR
)) {
336 if (s
->cur_entry
== FW_CFG_INVALID
|| !e
->data
||
337 s
->cur_offset
>= e
->len
) {
340 /* If the access is not a read access, it will be a skip access,
344 if (dma_memory_set(s
->dma_as
, dma
.address
, 0, len
)) {
345 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
349 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
352 if (dma
.length
<= (e
->len
- s
->cur_offset
)) {
355 len
= (e
->len
- s
->cur_offset
);
358 /* If the access is not a read access, it will be a skip access,
362 if (dma_memory_write(s
->dma_as
, dma
.address
,
363 &e
->data
[s
->cur_offset
], len
)) {
364 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
368 if (!e
->allow_write
||
370 dma_memory_read(s
->dma_as
, dma
.address
,
371 &e
->data
[s
->cur_offset
], len
)) {
372 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
376 s
->cur_offset
+= len
;
384 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
387 trace_fw_cfg_read(s
, 0);
390 static uint64_t fw_cfg_dma_mem_read(void *opaque
, hwaddr addr
,
393 /* Return a signature value (and handle various read sizes) */
394 return extract64(FW_CFG_DMA_SIGNATURE
, (8 - addr
- size
) * 8, size
* 8);
397 static void fw_cfg_dma_mem_write(void *opaque
, hwaddr addr
,
398 uint64_t value
, unsigned size
)
400 FWCfgState
*s
= opaque
;
404 /* FWCfgDmaAccess high address */
405 s
->dma_addr
= value
<< 32;
406 } else if (addr
== 4) {
407 /* FWCfgDmaAccess low address */
408 s
->dma_addr
|= value
;
409 fw_cfg_dma_transfer(s
);
411 } else if (size
== 8 && addr
== 0) {
413 fw_cfg_dma_transfer(s
);
417 static bool fw_cfg_dma_mem_valid(void *opaque
, hwaddr addr
,
418 unsigned size
, bool is_write
)
420 return !is_write
|| ((size
== 4 && (addr
== 0 || addr
== 4)) ||
421 (size
== 8 && addr
== 0));
424 static bool fw_cfg_data_mem_valid(void *opaque
, hwaddr addr
,
425 unsigned size
, bool is_write
)
430 static void fw_cfg_ctl_mem_write(void *opaque
, hwaddr addr
,
431 uint64_t value
, unsigned size
)
433 fw_cfg_select(opaque
, (uint16_t)value
);
436 static bool fw_cfg_ctl_mem_valid(void *opaque
, hwaddr addr
,
437 unsigned size
, bool is_write
)
439 return is_write
&& size
== 2;
442 static void fw_cfg_comb_write(void *opaque
, hwaddr addr
,
443 uint64_t value
, unsigned size
)
447 fw_cfg_write(opaque
, (uint8_t)value
);
450 fw_cfg_select(opaque
, (uint16_t)value
);
455 static bool fw_cfg_comb_valid(void *opaque
, hwaddr addr
,
456 unsigned size
, bool is_write
)
458 return (size
== 1) || (is_write
&& size
== 2);
461 static const MemoryRegionOps fw_cfg_ctl_mem_ops
= {
462 .write
= fw_cfg_ctl_mem_write
,
463 .endianness
= DEVICE_BIG_ENDIAN
,
464 .valid
.accepts
= fw_cfg_ctl_mem_valid
,
467 static const MemoryRegionOps fw_cfg_data_mem_ops
= {
468 .read
= fw_cfg_data_read
,
469 .write
= fw_cfg_data_mem_write
,
470 .endianness
= DEVICE_BIG_ENDIAN
,
472 .min_access_size
= 1,
473 .max_access_size
= 1,
474 .accepts
= fw_cfg_data_mem_valid
,
478 static const MemoryRegionOps fw_cfg_comb_mem_ops
= {
479 .read
= fw_cfg_data_read
,
480 .write
= fw_cfg_comb_write
,
481 .endianness
= DEVICE_LITTLE_ENDIAN
,
482 .valid
.accepts
= fw_cfg_comb_valid
,
485 static const MemoryRegionOps fw_cfg_dma_mem_ops
= {
486 .read
= fw_cfg_dma_mem_read
,
487 .write
= fw_cfg_dma_mem_write
,
488 .endianness
= DEVICE_BIG_ENDIAN
,
489 .valid
.accepts
= fw_cfg_dma_mem_valid
,
490 .valid
.max_access_size
= 8,
491 .impl
.max_access_size
= 8,
494 static void fw_cfg_reset(DeviceState
*d
)
496 FWCfgState
*s
= FW_CFG(d
);
498 /* we never register a read callback for FW_CFG_SIGNATURE */
499 fw_cfg_select(s
, FW_CFG_SIGNATURE
);
502 /* Save restore 32 bit int as uint16_t
503 This is a Big hack, but it is how the old state did it.
504 Or we broke compatibility in the state, or we can't use struct tm
507 static int get_uint32_as_uint16(QEMUFile
*f
, void *pv
, size_t size
,
511 *v
= qemu_get_be16(f
);
515 static int put_unused(QEMUFile
*f
, void *pv
, size_t size
, VMStateField
*field
,
518 fprintf(stderr
, "uint32_as_uint16 is only used for backward compatibility.\n");
519 fprintf(stderr
, "This functions shouldn't be called.\n");
524 static const VMStateInfo vmstate_hack_uint32_as_uint16
= {
525 .name
= "int32_as_uint16",
526 .get
= get_uint32_as_uint16
,
530 #define VMSTATE_UINT16_HACK(_f, _s, _t) \
531 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
534 static bool is_version_1(void *opaque
, int version_id
)
536 return version_id
== 1;
539 bool fw_cfg_dma_enabled(void *opaque
)
541 FWCfgState
*s
= opaque
;
543 return s
->dma_enabled
;
546 static const VMStateDescription vmstate_fw_cfg_dma
= {
547 .name
= "fw_cfg/dma",
548 .needed
= fw_cfg_dma_enabled
,
549 .fields
= (VMStateField
[]) {
550 VMSTATE_UINT64(dma_addr
, FWCfgState
),
551 VMSTATE_END_OF_LIST()
555 static const VMStateDescription vmstate_fw_cfg
= {
558 .minimum_version_id
= 1,
559 .fields
= (VMStateField
[]) {
560 VMSTATE_UINT16(cur_entry
, FWCfgState
),
561 VMSTATE_UINT16_HACK(cur_offset
, FWCfgState
, is_version_1
),
562 VMSTATE_UINT32_V(cur_offset
, FWCfgState
, 2),
563 VMSTATE_END_OF_LIST()
565 .subsections
= (const VMStateDescription
*[]) {
571 static void fw_cfg_add_bytes_callback(FWCfgState
*s
, uint16_t key
,
572 FWCfgCallback select_cb
,
573 void *callback_opaque
,
574 void *data
, size_t len
,
577 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
579 key
&= FW_CFG_ENTRY_MASK
;
581 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
582 assert(s
->entries
[arch
][key
].data
== NULL
); /* avoid key conflict */
584 s
->entries
[arch
][key
].data
= data
;
585 s
->entries
[arch
][key
].len
= (uint32_t)len
;
586 s
->entries
[arch
][key
].select_cb
= select_cb
;
587 s
->entries
[arch
][key
].callback_opaque
= callback_opaque
;
588 s
->entries
[arch
][key
].allow_write
= !read_only
;
591 static void *fw_cfg_modify_bytes_read(FWCfgState
*s
, uint16_t key
,
592 void *data
, size_t len
)
595 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
597 key
&= FW_CFG_ENTRY_MASK
;
599 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
601 /* return the old data to the function caller, avoid memory leak */
602 ptr
= s
->entries
[arch
][key
].data
;
603 s
->entries
[arch
][key
].data
= data
;
604 s
->entries
[arch
][key
].len
= len
;
605 s
->entries
[arch
][key
].callback_opaque
= NULL
;
606 s
->entries
[arch
][key
].allow_write
= false;
611 void fw_cfg_add_bytes(FWCfgState
*s
, uint16_t key
, void *data
, size_t len
)
613 fw_cfg_add_bytes_callback(s
, key
, NULL
, NULL
, data
, len
, true);
616 void fw_cfg_add_string(FWCfgState
*s
, uint16_t key
, const char *value
)
618 size_t sz
= strlen(value
) + 1;
620 fw_cfg_add_bytes(s
, key
, g_memdup(value
, sz
), sz
);
623 void fw_cfg_add_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
627 copy
= g_malloc(sizeof(value
));
628 *copy
= cpu_to_le16(value
);
629 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
632 void fw_cfg_modify_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
634 uint16_t *copy
, *old
;
636 copy
= g_malloc(sizeof(value
));
637 *copy
= cpu_to_le16(value
);
638 old
= fw_cfg_modify_bytes_read(s
, key
, copy
, sizeof(value
));
642 void fw_cfg_add_i32(FWCfgState
*s
, uint16_t key
, uint32_t value
)
646 copy
= g_malloc(sizeof(value
));
647 *copy
= cpu_to_le32(value
);
648 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
651 void fw_cfg_add_i64(FWCfgState
*s
, uint16_t key
, uint64_t value
)
655 copy
= g_malloc(sizeof(value
));
656 *copy
= cpu_to_le64(value
);
657 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
660 void fw_cfg_set_order_override(FWCfgState
*s
, int order
)
662 assert(s
->fw_cfg_order_override
== 0);
663 s
->fw_cfg_order_override
= order
;
666 void fw_cfg_reset_order_override(FWCfgState
*s
)
668 assert(s
->fw_cfg_order_override
!= 0);
669 s
->fw_cfg_order_override
= 0;
673 * This is the legacy order list. For legacy systems, files are in
674 * the fw_cfg in the order defined below, by the "order" value. Note
675 * that some entries (VGA ROMs, NIC option ROMS, etc.) go into a
676 * specific area, but there may be more than one and they occur in the
677 * order that the user specifies them on the command line. Those are
678 * handled in a special manner, using the order override above.
680 * For non-legacy, the files are sorted by filename to avoid this kind
681 * of complexity in the future.
683 * This is only for x86, other arches don't implement versioning so
684 * they won't set legacy mode.
690 { "etc/boot-menu-wait", 10 },
691 { "bootsplash.jpg", 11 },
692 { "bootsplash.bmp", 12 },
693 { "etc/boot-fail-wait", 15 },
694 { "etc/smbios/smbios-tables", 20 },
695 { "etc/smbios/smbios-anchor", 30 },
697 { "etc/reserved-memory-end", 50 },
698 { "genroms/kvmvapic.bin", 55 },
699 { "genroms/linuxboot.bin", 60 },
700 { }, /* VGA ROMs from pc_vga_init come here, 70. */
701 { }, /* NIC option ROMs from pc_nic_init come here, 80. */
702 { "etc/system-states", 90 },
703 { }, /* User ROMs come here, 100. */
704 { }, /* Device FW comes here, 110. */
705 { "etc/extra-pci-roots", 120 },
706 { "etc/acpi/tables", 130 },
707 { "etc/table-loader", 140 },
708 { "etc/tpm/log", 150 },
709 { "etc/acpi/rsdp", 160 },
710 { "bootorder", 170 },
712 #define FW_CFG_ORDER_OVERRIDE_LAST 200
715 static int get_fw_cfg_order(FWCfgState
*s
, const char *name
)
719 if (s
->fw_cfg_order_override
> 0) {
720 return s
->fw_cfg_order_override
;
723 for (i
= 0; i
< ARRAY_SIZE(fw_cfg_order
); i
++) {
724 if (fw_cfg_order
[i
].name
== NULL
) {
728 if (strcmp(name
, fw_cfg_order
[i
].name
) == 0) {
729 return fw_cfg_order
[i
].order
;
733 /* Stick unknown stuff at the end. */
734 warn_report("Unknown firmware file in legacy mode: %s", name
);
735 return FW_CFG_ORDER_OVERRIDE_LAST
;
738 void fw_cfg_add_file_callback(FWCfgState
*s
, const char *filename
,
739 FWCfgCallback select_cb
,
740 void *callback_opaque
,
741 void *data
, size_t len
, bool read_only
)
745 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
749 dsize
= sizeof(uint32_t) + sizeof(FWCfgFile
) * fw_cfg_file_slots(s
);
750 s
->files
= g_malloc0(dsize
);
751 fw_cfg_add_bytes(s
, FW_CFG_FILE_DIR
, s
->files
, dsize
);
754 count
= be32_to_cpu(s
->files
->count
);
755 assert(count
< fw_cfg_file_slots(s
));
757 /* Find the insertion point. */
758 if (mc
->legacy_fw_cfg_order
) {
760 * Sort by order. For files with the same order, we keep them
761 * in the sequence in which they were added.
763 order
= get_fw_cfg_order(s
, filename
);
765 index
> 0 && order
< s
->entry_order
[index
- 1];
768 /* Sort by file name. */
770 index
> 0 && strcmp(filename
, s
->files
->f
[index
- 1].name
) < 0;
775 * Move all the entries from the index point and after down one
776 * to create a slot for the new entry. Because calculations are
777 * being done with the index, make it so that "i" is the current
778 * index and "i - 1" is the one being copied from, thus the
779 * unusual start and end in the for statement.
781 for (i
= count
+ 1; i
> index
; i
--) {
782 s
->files
->f
[i
] = s
->files
->f
[i
- 1];
783 s
->files
->f
[i
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ i
);
784 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
] =
785 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
- 1];
786 s
->entry_order
[i
] = s
->entry_order
[i
- 1];
789 memset(&s
->files
->f
[index
], 0, sizeof(FWCfgFile
));
790 memset(&s
->entries
[0][FW_CFG_FILE_FIRST
+ index
], 0, sizeof(FWCfgEntry
));
792 pstrcpy(s
->files
->f
[index
].name
, sizeof(s
->files
->f
[index
].name
), filename
);
793 for (i
= 0; i
<= count
; i
++) {
795 strcmp(s
->files
->f
[index
].name
, s
->files
->f
[i
].name
) == 0) {
796 error_report("duplicate fw_cfg file name: %s",
797 s
->files
->f
[index
].name
);
802 fw_cfg_add_bytes_callback(s
, FW_CFG_FILE_FIRST
+ index
,
804 callback_opaque
, data
, len
,
807 s
->files
->f
[index
].size
= cpu_to_be32(len
);
808 s
->files
->f
[index
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ index
);
809 s
->entry_order
[index
] = order
;
810 trace_fw_cfg_add_file(s
, index
, s
->files
->f
[index
].name
, len
);
812 s
->files
->count
= cpu_to_be32(count
+1);
815 void fw_cfg_add_file(FWCfgState
*s
, const char *filename
,
816 void *data
, size_t len
)
818 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, data
, len
, true);
821 void *fw_cfg_modify_file(FWCfgState
*s
, const char *filename
,
822 void *data
, size_t len
)
829 index
= be32_to_cpu(s
->files
->count
);
830 assert(index
< fw_cfg_file_slots(s
));
832 for (i
= 0; i
< index
; i
++) {
833 if (strcmp(filename
, s
->files
->f
[i
].name
) == 0) {
834 ptr
= fw_cfg_modify_bytes_read(s
, FW_CFG_FILE_FIRST
+ i
,
836 s
->files
->f
[i
].size
= cpu_to_be32(len
);
841 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, data
, len
, true);
845 static void fw_cfg_machine_reset(void *opaque
)
849 FWCfgState
*s
= opaque
;
850 char *bootindex
= get_boot_devices_list(&len
, false);
852 ptr
= fw_cfg_modify_file(s
, "bootorder", (uint8_t *)bootindex
, len
);
856 static void fw_cfg_machine_ready(struct Notifier
*n
, void *data
)
858 FWCfgState
*s
= container_of(n
, FWCfgState
, machine_ready
);
859 qemu_register_reset(fw_cfg_machine_reset
, s
);
864 static void fw_cfg_common_realize(DeviceState
*dev
, Error
**errp
)
866 FWCfgState
*s
= FW_CFG(dev
);
867 MachineState
*machine
= MACHINE(qdev_get_machine());
868 uint32_t version
= FW_CFG_VERSION
;
870 if (!fw_cfg_find()) {
871 error_setg(errp
, "at most one %s device is permitted", TYPE_FW_CFG
);
875 fw_cfg_add_bytes(s
, FW_CFG_SIGNATURE
, (char *)"QEMU", 4);
876 fw_cfg_add_bytes(s
, FW_CFG_UUID
, &qemu_uuid
, 16);
877 fw_cfg_add_i16(s
, FW_CFG_NOGRAPHIC
, (uint16_t)!machine
->enable_graphics
);
878 fw_cfg_add_i16(s
, FW_CFG_BOOT_MENU
, (uint16_t)boot_menu
);
879 fw_cfg_bootsplash(s
);
882 if (s
->dma_enabled
) {
883 version
|= FW_CFG_VERSION_DMA
;
886 fw_cfg_add_i32(s
, FW_CFG_ID
, version
);
888 s
->machine_ready
.notify
= fw_cfg_machine_ready
;
889 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
892 FWCfgState
*fw_cfg_init_io_dma(uint32_t iobase
, uint32_t dma_iobase
,
893 AddressSpace
*dma_as
)
899 bool dma_requested
= dma_iobase
&& dma_as
;
901 dev
= qdev_create(NULL
, TYPE_FW_CFG_IO
);
902 if (!dma_requested
) {
903 qdev_prop_set_bit(dev
, "dma_enabled", false);
906 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
908 qdev_init_nofail(dev
);
910 sbd
= SYS_BUS_DEVICE(dev
);
911 ios
= FW_CFG_IO(dev
);
912 sysbus_add_io(sbd
, iobase
, &ios
->comb_iomem
);
916 if (s
->dma_enabled
) {
917 /* 64 bits for the address field */
920 sysbus_add_io(sbd
, dma_iobase
, &s
->dma_iomem
);
926 FWCfgState
*fw_cfg_init_io(uint32_t iobase
)
928 return fw_cfg_init_io_dma(iobase
, 0, NULL
);
931 FWCfgState
*fw_cfg_init_mem_wide(hwaddr ctl_addr
,
932 hwaddr data_addr
, uint32_t data_width
,
933 hwaddr dma_addr
, AddressSpace
*dma_as
)
938 bool dma_requested
= dma_addr
&& dma_as
;
940 dev
= qdev_create(NULL
, TYPE_FW_CFG_MEM
);
941 qdev_prop_set_uint32(dev
, "data_width", data_width
);
942 if (!dma_requested
) {
943 qdev_prop_set_bit(dev
, "dma_enabled", false);
946 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
948 qdev_init_nofail(dev
);
950 sbd
= SYS_BUS_DEVICE(dev
);
951 sysbus_mmio_map(sbd
, 0, ctl_addr
);
952 sysbus_mmio_map(sbd
, 1, data_addr
);
956 if (s
->dma_enabled
) {
959 sysbus_mmio_map(sbd
, 2, dma_addr
);
965 FWCfgState
*fw_cfg_init_mem(hwaddr ctl_addr
, hwaddr data_addr
)
967 return fw_cfg_init_mem_wide(ctl_addr
, data_addr
,
968 fw_cfg_data_mem_ops
.valid
.max_access_size
,
973 FWCfgState
*fw_cfg_find(void)
975 /* Returns NULL unless there is exactly one fw_cfg device */
976 return FW_CFG(object_resolve_path_type("", TYPE_FW_CFG
, NULL
));
980 static void fw_cfg_class_init(ObjectClass
*klass
, void *data
)
982 DeviceClass
*dc
= DEVICE_CLASS(klass
);
984 dc
->reset
= fw_cfg_reset
;
985 dc
->vmsd
= &vmstate_fw_cfg
;
988 static const TypeInfo fw_cfg_info
= {
990 .parent
= TYPE_SYS_BUS_DEVICE
,
992 .instance_size
= sizeof(FWCfgState
),
993 .class_init
= fw_cfg_class_init
,
996 static void fw_cfg_file_slots_allocate(FWCfgState
*s
, Error
**errp
)
998 uint16_t file_slots_max
;
1000 if (fw_cfg_file_slots(s
) < FW_CFG_FILE_SLOTS_MIN
) {
1001 error_setg(errp
, "\"file_slots\" must be at least 0x%x",
1002 FW_CFG_FILE_SLOTS_MIN
);
1006 /* (UINT16_MAX & FW_CFG_ENTRY_MASK) is the highest inclusive selector value
1007 * that we permit. The actual (exclusive) value coming from the
1008 * configuration is (FW_CFG_FILE_FIRST + fw_cfg_file_slots(s)). */
1009 file_slots_max
= (UINT16_MAX
& FW_CFG_ENTRY_MASK
) - FW_CFG_FILE_FIRST
+ 1;
1010 if (fw_cfg_file_slots(s
) > file_slots_max
) {
1011 error_setg(errp
, "\"file_slots\" must not exceed 0x%" PRIx16
,
1016 s
->entries
[0] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1017 s
->entries
[1] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1018 s
->entry_order
= g_new0(int, fw_cfg_max_entry(s
));
1021 static Property fw_cfg_io_properties
[] = {
1022 DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState
, parent_obj
.dma_enabled
,
1024 DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState
, parent_obj
.file_slots
,
1025 FW_CFG_FILE_SLOTS_DFLT
),
1026 DEFINE_PROP_END_OF_LIST(),
1029 static void fw_cfg_io_realize(DeviceState
*dev
, Error
**errp
)
1031 FWCfgIoState
*s
= FW_CFG_IO(dev
);
1032 Error
*local_err
= NULL
;
1034 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1036 error_propagate(errp
, local_err
);
1040 /* when using port i/o, the 8-bit data register ALWAYS overlaps
1041 * with half of the 16-bit control register. Hence, the total size
1042 * of the i/o region used is FW_CFG_CTL_SIZE */
1043 memory_region_init_io(&s
->comb_iomem
, OBJECT(s
), &fw_cfg_comb_mem_ops
,
1044 FW_CFG(s
), "fwcfg", FW_CFG_CTL_SIZE
);
1046 if (FW_CFG(s
)->dma_enabled
) {
1047 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1048 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1049 sizeof(dma_addr_t
));
1052 fw_cfg_common_realize(dev
, errp
);
1055 static void fw_cfg_io_class_init(ObjectClass
*klass
, void *data
)
1057 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1059 dc
->realize
= fw_cfg_io_realize
;
1060 dc
->props
= fw_cfg_io_properties
;
1063 static const TypeInfo fw_cfg_io_info
= {
1064 .name
= TYPE_FW_CFG_IO
,
1065 .parent
= TYPE_FW_CFG
,
1066 .instance_size
= sizeof(FWCfgIoState
),
1067 .class_init
= fw_cfg_io_class_init
,
1071 static Property fw_cfg_mem_properties
[] = {
1072 DEFINE_PROP_UINT32("data_width", FWCfgMemState
, data_width
, -1),
1073 DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState
, parent_obj
.dma_enabled
,
1075 DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState
, parent_obj
.file_slots
,
1076 FW_CFG_FILE_SLOTS_DFLT
),
1077 DEFINE_PROP_END_OF_LIST(),
1080 static void fw_cfg_mem_realize(DeviceState
*dev
, Error
**errp
)
1082 FWCfgMemState
*s
= FW_CFG_MEM(dev
);
1083 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
1084 const MemoryRegionOps
*data_ops
= &fw_cfg_data_mem_ops
;
1085 Error
*local_err
= NULL
;
1087 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1089 error_propagate(errp
, local_err
);
1093 memory_region_init_io(&s
->ctl_iomem
, OBJECT(s
), &fw_cfg_ctl_mem_ops
,
1094 FW_CFG(s
), "fwcfg.ctl", FW_CFG_CTL_SIZE
);
1095 sysbus_init_mmio(sbd
, &s
->ctl_iomem
);
1097 if (s
->data_width
> data_ops
->valid
.max_access_size
) {
1098 /* memberwise copy because the "old_mmio" member is const */
1099 s
->wide_data_ops
.read
= data_ops
->read
;
1100 s
->wide_data_ops
.write
= data_ops
->write
;
1101 s
->wide_data_ops
.endianness
= data_ops
->endianness
;
1102 s
->wide_data_ops
.valid
= data_ops
->valid
;
1103 s
->wide_data_ops
.impl
= data_ops
->impl
;
1105 s
->wide_data_ops
.valid
.max_access_size
= s
->data_width
;
1106 s
->wide_data_ops
.impl
.max_access_size
= s
->data_width
;
1107 data_ops
= &s
->wide_data_ops
;
1109 memory_region_init_io(&s
->data_iomem
, OBJECT(s
), data_ops
, FW_CFG(s
),
1110 "fwcfg.data", data_ops
->valid
.max_access_size
);
1111 sysbus_init_mmio(sbd
, &s
->data_iomem
);
1113 if (FW_CFG(s
)->dma_enabled
) {
1114 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1115 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1116 sizeof(dma_addr_t
));
1117 sysbus_init_mmio(sbd
, &FW_CFG(s
)->dma_iomem
);
1120 fw_cfg_common_realize(dev
, errp
);
1123 static void fw_cfg_mem_class_init(ObjectClass
*klass
, void *data
)
1125 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1127 dc
->realize
= fw_cfg_mem_realize
;
1128 dc
->props
= fw_cfg_mem_properties
;
1131 static const TypeInfo fw_cfg_mem_info
= {
1132 .name
= TYPE_FW_CFG_MEM
,
1133 .parent
= TYPE_FW_CFG
,
1134 .instance_size
= sizeof(FWCfgMemState
),
1135 .class_init
= fw_cfg_mem_class_init
,
1139 static void fw_cfg_register_types(void)
1141 type_register_static(&fw_cfg_info
);
1142 type_register_static(&fw_cfg_io_info
);
1143 type_register_static(&fw_cfg_mem_info
);
1146 type_init(fw_cfg_register_types
)