hw/mips/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "qemu/osdep.h"
  11 #include "qapi/error.h"
  12 #include "qemu-common.h"
  13 #include "cpu.h"
  14 #include "hw/hw.h"
  15 #include "hw/mips/mips.h"
  16 #include "hw/mips/cpudevs.h"
  17 #include "hw/i386/pc.h"
  18 #include "hw/char/serial.h"
  19 #include "hw/isa/isa.h"
  20 #include "net/net.h"
  21 #include "sysemu/sysemu.h"
  22 #include "hw/boards.h"
  23 #include "hw/block/flash.h"
  24 #include "qemu/log.h"
  25 #include "hw/mips/bios.h"
  26 #include "hw/ide.h"
  27 #include "hw/loader.h"
  28 #include "elf.h"
  29 #include "hw/timer/mc146818rtc.h"
  30 #include "hw/timer/i8254.h"
  31 #include "sysemu/block-backend.h"
  32 #include "exec/address-spaces.h"
  33 #include "sysemu/qtest.h"
  34
  35 #define MAX_IDE_BUS 2
  36
  37 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  38 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  39 static const int ide_irq[2] = { 14, 15 };
  40
  41 static ISADevice *pit; /* PIT i8254 */
  42
  43 static bool bigendian;
  44
  45 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  46
  47 static struct _loaderparams {
  48     int ram_size;
  49     const char *kernel_filename;
  50     const char *kernel_cmdline;
  51     const char *initrd_filename;
  52 } loaderparams;
  53
  54 static void mips_qemu_write (void *opaque, hwaddr addr,
  55                              uint64_t val, unsigned size)
  56 {
  57     if ((addr & 0xffff) == 0 && val == 42)
  58         qemu_system_reset_request ();
  59     else if ((addr & 0xffff) == 4 && val == 42)
  60         qemu_system_shutdown_request ();
  61 }
  62
  63 static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
  64                                 unsigned size)
  65 {
  66     return 0;
  67 }
  68
  69 static const MemoryRegionOps mips_qemu_ops = {
  70     .read = mips_qemu_read,
  71     .write = mips_qemu_write,
  72     .endianness = DEVICE_NATIVE_ENDIAN,
  73 };
  74
  75 typedef struct ResetData {
  76     MIPSCPU *cpu;
  77     uint64_t vector;
  78 } ResetData;
  79
  80 static int64_t load_kernel(void)
  81 {
  82     int64_t entry, kernel_high;
  83     long kernel_size, initrd_size, params_size;
  84     ram_addr_t initrd_offset;
  85     uint32_t *params_buf;
  86     int big_endian;
  87
  88 #ifdef TARGET_WORDS_BIGENDIAN
  89     big_endian = 1;
  90 #else
  91     big_endian = 0;
  92 #endif
  93     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  94                            NULL, (uint64_t *)&entry, NULL,
  95                            (uint64_t *)&kernel_high, big_endian,
  96                            EM_MIPS, 1, 0);
  97     if (kernel_size >= 0) {
  98         if ((entry & ~0x7fffffffULL) == 0x80000000)
  99             entry = (int32_t)entry;
 100     } else {
 101         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 102                 loaderparams.kernel_filename);
 103         exit(1);
 104     }
 105
 106     /* Set SP (needed for some kernels) - normally set by bootloader. */
 107     //~ env->active_tc.gpr[29] = (entry + (kernel_size & 0xfffffffc)) + 0x1000;
 108
 109     /* load initrd */
 110     initrd_size = 0;
 111     initrd_offset = 0;
 112     if (loaderparams.initrd_filename) {
 113         initrd_size = get_image_size (loaderparams.initrd_filename);
 114         if (initrd_size > 0) {
 115             initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
 116             if (initrd_offset + initrd_size > ram_size) {
 117                 fprintf(stderr,
 118                         "qemu: memory too small for initial ram disk '%s'\n",
 119                         loaderparams.initrd_filename);
 120                 exit(1);
 121             }
 122             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 123                                               initrd_offset,
 124                                               ram_size - initrd_offset);
 125         }
 126         if (initrd_size == (target_ulong) -1) {
 127             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 128                     loaderparams.initrd_filename);
 129             exit(1);
 130         }
 131     }
 132
 133     /* Store command line.  */
 134     params_size = 264;
 135     params_buf = g_malloc(params_size);
 136
 137     params_buf[0] = tswap32(ram_size);
 138     params_buf[1] = tswap32(0x12345678);
 139
 140     if (initrd_size > 0) {
 141         snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 142                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 143                  initrd_size, loaderparams.kernel_cmdline);
 144     } else {
 145         snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 146     }
 147
 148     rom_add_blob_fixed("params", params_buf, params_size,
 149                        (16 << 20) - 264);
 150
 151     g_free(params_buf);
 152     return entry;
 153 }
 154
 155 static void main_cpu_reset(void *opaque)
 156 {
 157     ResetData *s = (ResetData *)opaque;
 158     CPUMIPSState *env = &s->cpu->env;
 159
 160     cpu_reset(CPU(s->cpu));
 161     env->active_tc.PC = s->vector;
 162 }
 163
 164 static const int sector_len = 32 * 1024;
 165
 166 static
 167 void mips_init(MachineState *machine)
 168 {
 169     ram_addr_t ram_size = machine->ram_size;
 170     const char *cpu_model = machine->cpu_model;
 171     const char *kernel_filename = machine->kernel_filename;
 172     const char *kernel_cmdline = machine->kernel_cmdline;
 173     const char *initrd_filename = machine->initrd_filename;
 174     char *filename;
 175     MemoryRegion *address_space_mem = get_system_memory();
 176     MemoryRegion *ram = g_new(MemoryRegion, 1);
 177     MemoryRegion *bios;
 178     MemoryRegion *iomem = g_new(MemoryRegion, 1);
 179     MemoryRegion *isa_io = g_new(MemoryRegion, 1);
 180     MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
 181     int bios_size;
 182     MIPSCPU *cpu;
 183     CPUMIPSState *env;
 184     ResetData *reset_info;
 185     int i;
 186     qemu_irq *i8259;
 187     ISABus *isa_bus;
 188     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 189     DriveInfo *dinfo;
 190
 191     /* init CPUs */
 192     if (cpu_model == NULL) {
 193 #ifdef TARGET_MIPS64
 194         cpu_model = "R4000";
 195 #else
 196         cpu_model = "24Kf";
 197 #endif
 198     }
 199     cpu = cpu_mips_init(cpu_model);
 200     if (cpu == NULL) {
 201         fprintf(stderr, "Unable to find CPU definition\n");
 202         exit(1);
 203     }
 204     env = &cpu->env;
 205
 206     reset_info = g_malloc0(sizeof(ResetData));
 207     reset_info->cpu = cpu;
 208     reset_info->vector = env->active_tc.PC;
 209     qemu_register_reset(main_cpu_reset, reset_info);
 210
 211     /* allocate RAM */
 212     if (ram_size > (256 << 20)) {
 213         fprintf(stderr,
 214                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 215                 ((unsigned int)ram_size / (1 << 20)));
 216         exit(1);
 217     }
 218     memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
 219
 220     memory_region_add_subregion(address_space_mem, 0, ram);
 221
 222     memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
 223     memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
 224
 225     /* Try to load a BIOS image. If this fails, we continue regardless,
 226        but initialize the hardware ourselves. When a kernel gets
 227        preloaded we also initialize the hardware, since the BIOS wasn't
 228        run. */
 229     if (bios_name == NULL)
 230         bios_name = BIOS_FILENAME;
 231     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 232     if (filename) {
 233         bios_size = get_image_size(filename);
 234     } else {
 235         bios_size = -1;
 236     }
 237     g_assert(ENV_GET_CPU(env)->bigendian == bigendian);
 238     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 239         bios = g_new(MemoryRegion, 1);
 240         memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
 241                                &error_fatal);
 242         vmstate_register_ram_global(bios);
 243         memory_region_set_readonly(bios, true);
 244         memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
 245
 246         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 247     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 248         uint32_t mips_rom = 0x00400000;
 249         if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
 250                                    blk_by_legacy_dinfo(dinfo),
 251                                    sector_len, mips_rom / sector_len,
 252                                    4, 0, 0, 0, 0, bigendian)) {
 253             fprintf(stderr, "qemu: Error registering flash memory.\n");
 254         }
 255     } else if (!qtest_enabled()) {
 256         /* not fatal */
 257         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 258                 bios_name);
 259     }
 260     g_free(filename);
 261
 262     if (kernel_filename) {
 263         loaderparams.ram_size = ram_size;
 264         loaderparams.kernel_filename = kernel_filename;
 265         loaderparams.kernel_cmdline = kernel_cmdline;
 266         loaderparams.initrd_filename = initrd_filename;
 267         reset_info->vector = load_kernel();
 268     }
 269
 270     /* Init CPU internal devices */
 271     cpu_mips_irq_init_cpu(cpu);
 272     cpu_mips_clock_init(cpu);
 273
 274     /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
 275     memory_region_init_alias(isa_io, NULL, "isa-io",
 276                              get_system_io(), 0, 0x00010000);
 277     memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
 278     memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
 279     memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
 280     isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort);
 281
 282     /* The PIC is attached to the MIPS CPU INT0 pin */
 283     i8259 = i8259_init(isa_bus, env->irq[2]);
 284     isa_bus_irqs(isa_bus, i8259);
 285
 286     rtc_init(isa_bus, 2000, NULL);
 287
 288     pit = pit_init(isa_bus, 0x40, 0, NULL);
 289
 290     serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
 291
 292     isa_vga_init(isa_bus);
 293
 294     if (nd_table[0].used)
 295         isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
 296
 297     ide_drive_get(hd, ARRAY_SIZE(hd));
 298     for(i = 0; i < MAX_IDE_BUS; i++)
 299         isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
 300                      hd[MAX_IDE_DEVS * i],
 301                      hd[MAX_IDE_DEVS * i + 1]);
 302
 303     isa_create_simple(isa_bus, "i8042");
 304 }
 305
 306 static
 307 void mips_r4k_init(MachineState *machine)
 308 {
 309     /* Run MIPS system in standard endian mode. */
 310 #if defined(TARGET_WORDS_BIGENDIAN)
 311     bigendian = true;
 312 #else
 313     bigendian = false;
 314 #endif
 315     mips_init(machine);
 316 }
 317
 318 static
 319 void mipsel_r4k_init(MachineState *machine)
 320 {
 321     /* Run MIPS system in little endian mode. */
 322     bigendian = false;
 323     mips_init(machine);
 324 }
 325
 326 static void mips_machine_init(MachineClass *mc)
 327 {
 328     mc->desc = "mips r4k platform";
 329     mc->init = mips_r4k_init;
 330     mc->block_default_type = IF_IDE;
 331 }
 332
 333 DEFINE_MACHINE("mips", mips_machine_init)
 334
 335 static void mipsel_machine_init(MachineClass *mc)
 336 {
 337     mc->desc = "misp r4k platform (little endian)";
 338     mc->init = mipsel_r4k_init;
 339 };
 340
 341 DEFINE_MACHINE("mipsel", mipsel_machine_init)