virtio-9p: Add P9_TVERSION support
[qemu/aliguori-queue.git] / hw / pc.h
blob5f86b37fb2be185fb6a57efc14628f32f87a8a59
1 #ifndef HW_PC_H
2 #define HW_PC_H
4 #include "qemu-common.h"
5 #include "ioport.h"
7 /* PC-style peripherals (also used by other machines). */
9 /* serial.c */
11 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
12 CharDriverState *chr);
13 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
14 qemu_irq irq, int baudbase,
15 CharDriverState *chr, int ioregister,
16 int be);
17 SerialState *serial_isa_init(int index, CharDriverState *chr);
18 void serial_set_frequency(SerialState *s, uint32_t frequency);
20 /* parallel.c */
22 typedef struct ParallelState ParallelState;
23 ParallelState *parallel_init(int index, CharDriverState *chr);
24 ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
26 /* i8259.c */
28 typedef struct PicState2 PicState2;
29 extern PicState2 *isa_pic;
30 void pic_set_irq(int irq, int level);
31 void pic_set_irq_new(void *opaque, int irq, int level);
32 qemu_irq *i8259_init(qemu_irq parent_irq);
33 int pic_read_irq(PicState2 *s);
34 void pic_update_irq(PicState2 *s);
35 uint32_t pic_intack_read(PicState2 *s);
36 void pic_info(Monitor *mon);
37 void irq_info(Monitor *mon);
39 /* i8254.c */
41 #define PIT_FREQ 1193182
43 typedef struct PITState PITState;
45 PITState *pit_init(int base, qemu_irq irq);
46 void pit_set_gate(PITState *pit, int channel, int val);
47 int pit_get_gate(PITState *pit, int channel);
48 int pit_get_initial_count(PITState *pit, int channel);
49 int pit_get_mode(PITState *pit, int channel);
50 int pit_get_out(PITState *pit, int channel, int64_t current_time);
52 void hpet_pit_disable(void);
53 void hpet_pit_enable(void);
55 /* vmport.c */
56 void vmport_init(void);
57 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
59 /* vmmouse.c */
60 void *vmmouse_init(void *m);
62 /* pckbd.c */
64 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
65 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
66 target_phys_addr_t base, ram_addr_t size,
67 target_phys_addr_t mask);
69 /* mc146818rtc.c */
71 typedef struct RTCState RTCState;
73 RTCState *rtc_init(int base_year);
74 void rtc_set_memory(RTCState *s, int addr, int val);
75 void rtc_set_date(RTCState *s, const struct tm *tm);
77 /* pc.c */
78 extern int fd_bootchk;
80 void ioport_set_a20(int enable);
81 int ioport_get_a20(void);
83 /* acpi.c */
84 extern int acpi_enabled;
85 extern char *acpi_tables;
86 extern size_t acpi_tables_len;
88 void acpi_bios_init(void);
89 int acpi_table_add(const char *table_desc);
91 /* acpi_piix.c */
93 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
94 qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
95 int kvm_enabled);
96 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
97 void piix4_acpi_system_hot_add_init(PCIBus *bus);
99 /* hpet.c */
100 extern int no_hpet;
102 /* pcspk.c */
103 void pcspk_init(PITState *);
104 int pcspk_audio_init(qemu_irq *pic);
106 /* piix_pci.c */
107 struct PCII440FXState;
108 typedef struct PCII440FXState PCII440FXState;
110 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic);
111 void i440fx_set_smm(PCII440FXState *d, int val);
112 void i440fx_init_memory_mappings(PCII440FXState *d);
114 /* piix4.c */
115 extern PCIDevice *piix4_dev;
116 int piix4_init(PCIBus *bus, int devfn);
118 /* vga.c */
119 enum vga_retrace_method {
120 VGA_RETRACE_DUMB,
121 VGA_RETRACE_PRECISE
124 extern enum vga_retrace_method vga_retrace_method;
126 int isa_vga_init(void);
127 int pci_vga_init(PCIBus *bus,
128 unsigned long vga_bios_offset, int vga_bios_size);
129 int isa_vga_mm_init(target_phys_addr_t vram_base,
130 target_phys_addr_t ctrl_base, int it_shift);
132 /* cirrus_vga.c */
133 void pci_cirrus_vga_init(PCIBus *bus);
134 void isa_cirrus_vga_init(void);
136 /* ne2000.c */
138 void isa_ne2000_init(int base, int irq, NICInfo *nd);
140 /* e820 types */
141 #define E820_RAM 1
142 #define E820_RESERVED 2
143 #define E820_ACPI 3
144 #define E820_NVS 4
145 #define E820_UNUSABLE 5
147 int e820_add_entry(uint64_t, uint64_t, uint32_t);
149 #endif