target-ppc/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "kvm.h"
   4
   5 void cpu_save(QEMUFile *f, void *opaque)
   6 {
   7     CPUState *env = (CPUState *)opaque;
   8     unsigned int i, j;
   9
  10     for (i = 0; i < 32; i++)
  11         qemu_put_betls(f, &env->gpr[i]);
  12 #if !defined(TARGET_PPC64)
  13     for (i = 0; i < 32; i++)
  14         qemu_put_betls(f, &env->gprh[i]);
  15 #endif
  16     qemu_put_betls(f, &env->lr);
  17     qemu_put_betls(f, &env->ctr);
  18     for (i = 0; i < 8; i++)
  19         qemu_put_be32s(f, &env->crf[i]);
  20     qemu_put_betls(f, &env->xer);
  21     qemu_put_betls(f, &env->reserve_addr);
  22     qemu_put_betls(f, &env->msr);
  23     for (i = 0; i < 4; i++)
  24         qemu_put_betls(f, &env->tgpr[i]);
  25     for (i = 0; i < 32; i++) {
  26         union {
  27             float64 d;
  28             uint64_t l;
  29         } u;
  30         u.d = env->fpr[i];
  31         qemu_put_be64(f, u.l);
  32     }
  33     qemu_put_be32s(f, &env->fpscr);
  34     qemu_put_sbe32s(f, &env->access_type);
  35 #if !defined(CONFIG_USER_ONLY)
  36 #if defined(TARGET_PPC64)
  37     qemu_put_betls(f, &env->asr);
  38     qemu_put_sbe32s(f, &env->slb_nr);
  39 #endif
  40     qemu_put_betls(f, &env->sdr1);
  41     for (i = 0; i < 32; i++)
  42         qemu_put_betls(f, &env->sr[i]);
  43     for (i = 0; i < 2; i++)
  44         for (j = 0; j < 8; j++)
  45             qemu_put_betls(f, &env->DBAT[i][j]);
  46     for (i = 0; i < 2; i++)
  47         for (j = 0; j < 8; j++)
  48             qemu_put_betls(f, &env->IBAT[i][j]);
  49     qemu_put_sbe32s(f, &env->nb_tlb);
  50     qemu_put_sbe32s(f, &env->tlb_per_way);
  51     qemu_put_sbe32s(f, &env->nb_ways);
  52     qemu_put_sbe32s(f, &env->last_way);
  53     qemu_put_sbe32s(f, &env->id_tlbs);
  54     qemu_put_sbe32s(f, &env->nb_pids);
  55     if (env->tlb) {
  56         // XXX assumes 6xx
  57         for (i = 0; i < env->nb_tlb; i++) {
  58             qemu_put_betls(f, &env->tlb[i].tlb6.pte0);
  59             qemu_put_betls(f, &env->tlb[i].tlb6.pte1);
  60             qemu_put_betls(f, &env->tlb[i].tlb6.EPN);
  61         }
  62     }
  63     for (i = 0; i < 4; i++)
  64         qemu_put_betls(f, &env->pb[i]);
  65 #endif
  66     for (i = 0; i < 1024; i++)
  67         qemu_put_betls(f, &env->spr[i]);
  68     qemu_put_be32s(f, &env->vscr);
  69     qemu_put_be64s(f, &env->spe_acc);
  70     qemu_put_be32s(f, &env->spe_fscr);
  71     qemu_put_betls(f, &env->msr_mask);
  72     qemu_put_be32s(f, &env->flags);
  73     qemu_put_sbe32s(f, &env->error_code);
  74     qemu_put_be32s(f, &env->pending_interrupts);
  75 #if !defined(CONFIG_USER_ONLY)
  76     qemu_put_be32s(f, &env->irq_input_state);
  77     for (i = 0; i < POWERPC_EXCP_NB; i++)
  78         qemu_put_betls(f, &env->excp_vectors[i]);
  79     qemu_put_betls(f, &env->excp_prefix);
  80     qemu_put_betls(f, &env->hreset_excp_prefix);
  81     qemu_put_betls(f, &env->ivor_mask);
  82     qemu_put_betls(f, &env->ivpr_mask);
  83     qemu_put_betls(f, &env->hreset_vector);
  84 #endif
  85     qemu_put_betls(f, &env->nip);
  86     qemu_put_betls(f, &env->hflags);
  87     qemu_put_betls(f, &env->hflags_nmsr);
  88     qemu_put_sbe32s(f, &env->mmu_idx);
  89     qemu_put_sbe32s(f, &env->power_mode);
  90 }
  91
  92 int cpu_load(QEMUFile *f, void *opaque, int version_id)
  93 {
  94     CPUState *env = (CPUState *)opaque;
  95     unsigned int i, j;
  96
  97     for (i = 0; i < 32; i++)
  98         qemu_get_betls(f, &env->gpr[i]);
  99 #if !defined(TARGET_PPC64)
 100     for (i = 0; i < 32; i++)
 101         qemu_get_betls(f, &env->gprh[i]);
 102 #endif
 103     qemu_get_betls(f, &env->lr);
 104     qemu_get_betls(f, &env->ctr);
 105     for (i = 0; i < 8; i++)
 106         qemu_get_be32s(f, &env->crf[i]);
 107     qemu_get_betls(f, &env->xer);
 108     qemu_get_betls(f, &env->reserve_addr);
 109     qemu_get_betls(f, &env->msr);
 110     for (i = 0; i < 4; i++)
 111         qemu_get_betls(f, &env->tgpr[i]);
 112     for (i = 0; i < 32; i++) {
 113         union {
 114             float64 d;
 115             uint64_t l;
 116         } u;
 117         u.l = qemu_get_be64(f);
 118         env->fpr[i] = u.d;
 119     }
 120     qemu_get_be32s(f, &env->fpscr);
 121     qemu_get_sbe32s(f, &env->access_type);
 122 #if !defined(CONFIG_USER_ONLY)
 123 #if defined(TARGET_PPC64)
 124     qemu_get_betls(f, &env->asr);
 125     qemu_get_sbe32s(f, &env->slb_nr);
 126 #endif
 127     qemu_get_betls(f, &env->sdr1);
 128     for (i = 0; i < 32; i++)
 129         qemu_get_betls(f, &env->sr[i]);
 130     for (i = 0; i < 2; i++)
 131         for (j = 0; j < 8; j++)
 132             qemu_get_betls(f, &env->DBAT[i][j]);
 133     for (i = 0; i < 2; i++)
 134         for (j = 0; j < 8; j++)
 135             qemu_get_betls(f, &env->IBAT[i][j]);
 136     qemu_get_sbe32s(f, &env->nb_tlb);
 137     qemu_get_sbe32s(f, &env->tlb_per_way);
 138     qemu_get_sbe32s(f, &env->nb_ways);
 139     qemu_get_sbe32s(f, &env->last_way);
 140     qemu_get_sbe32s(f, &env->id_tlbs);
 141     qemu_get_sbe32s(f, &env->nb_pids);
 142     if (env->tlb) {
 143         // XXX assumes 6xx
 144         for (i = 0; i < env->nb_tlb; i++) {
 145             qemu_get_betls(f, &env->tlb[i].tlb6.pte0);
 146             qemu_get_betls(f, &env->tlb[i].tlb6.pte1);
 147             qemu_get_betls(f, &env->tlb[i].tlb6.EPN);
 148         }
 149     }
 150     for (i = 0; i < 4; i++)
 151         qemu_get_betls(f, &env->pb[i]);
 152 #endif
 153     for (i = 0; i < 1024; i++)
 154         qemu_get_betls(f, &env->spr[i]);
 155     qemu_get_be32s(f, &env->vscr);
 156     qemu_get_be64s(f, &env->spe_acc);
 157     qemu_get_be32s(f, &env->spe_fscr);
 158     qemu_get_betls(f, &env->msr_mask);
 159     qemu_get_be32s(f, &env->flags);
 160     qemu_get_sbe32s(f, &env->error_code);
 161     qemu_get_be32s(f, &env->pending_interrupts);
 162 #if !defined(CONFIG_USER_ONLY)
 163     qemu_get_be32s(f, &env->irq_input_state);
 164     for (i = 0; i < POWERPC_EXCP_NB; i++)
 165         qemu_get_betls(f, &env->excp_vectors[i]);
 166     qemu_get_betls(f, &env->excp_prefix);
 167     qemu_get_betls(f, &env->hreset_excp_prefix);
 168     qemu_get_betls(f, &env->ivor_mask);
 169     qemu_get_betls(f, &env->ivpr_mask);
 170     qemu_get_betls(f, &env->hreset_vector);
 171 #endif
 172     qemu_get_betls(f, &env->nip);
 173     qemu_get_betls(f, &env->hflags);
 174     qemu_get_betls(f, &env->hflags_nmsr);
 175     qemu_get_sbe32s(f, &env->mmu_idx);
 176     qemu_get_sbe32s(f, &env->power_mode);
 177
 178     return 0;
 179 }