hw/pci_host.c

   1 /*
   2  * pci_host.c
   3  *
   4  * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   5  *                    VA Linux Systems Japan K.K.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "pci.h"
  22 #include "pci_host.h"
  23
  24 /* debug PCI */
  25 //#define DEBUG_PCI
  26
  27 #ifdef DEBUG_PCI
  28 #define PCI_DPRINTF(fmt, ...) \
  29 do { printf("pci_host_data: " fmt , ## __VA_ARGS__); } while (0)
  30 #else
  31 #define PCI_DPRINTF(fmt, ...)
  32 #endif
  33
  34 /*
  35  * PCI address
  36  * bit 16 - 24: bus number
  37  * bit  8 - 15: devfun number
  38  * bit  0 -  7: offset in configuration space of a given pci device
  39  */
  40
  41 /* the helper functio to get a PCIDeice* for a given pci address */
  42 static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr)
  43 {
  44     uint8_t bus_num = addr >> 16;
  45     uint8_t devfn = addr >> 8;
  46
  47     return pci_find_device(bus, bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn));
  48 }
  49
  50 void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len)
  51 {
  52     PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr);
  53     uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1);
  54
  55     if (!pci_dev)
  56         return;
  57
  58     PCI_DPRINTF("%s: %s: addr=%02" PRIx32 " val=%08" PRIx32 " len=%d\n",
  59                 __func__, pci_dev->name, config_addr, val, len);
  60     pci_dev->config_write(pci_dev, config_addr, val, len);
  61 }
  62
  63 uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len)
  64 {
  65     PCIDevice *pci_dev = pci_dev_find_by_addr(s, addr);
  66     uint32_t config_addr = addr & (PCI_CONFIG_SPACE_SIZE - 1);
  67     uint32_t val;
  68
  69     assert(len == 1 || len == 2 || len == 4);
  70     if (!pci_dev) {
  71         return ~0x0;
  72     }
  73
  74     val = pci_dev->config_read(pci_dev, config_addr, len);
  75     PCI_DPRINTF("%s: %s: addr=%02"PRIx32" val=%08"PRIx32" len=%d\n",
  76                 __func__, pci_dev->name, config_addr, val, len);
  77
  78     return val;
  79 }
  80
  81 static void pci_host_config_write(ReadWriteHandler *handler,
  82                                   pcibus_t addr, uint32_t val, int len)
  83 {
  84     PCIHostState *s = container_of(handler, PCIHostState, conf_handler);
  85
  86     PCI_DPRINTF("%s addr %" FMT_PCIBUS " %d val %"PRIx32"\n",
  87                 __func__, addr, len, val);
  88 #ifdef TARGET_WORDS_BIGENDIAN
  89     val = qemu_bswap_len(val, len);
  90 #endif
  91     s->config_reg = val;
  92 }
  93
  94 static uint32_t pci_host_config_read(ReadWriteHandler *handler,
  95                                             pcibus_t addr, int len)
  96 {
  97     PCIHostState *s = container_of(handler, PCIHostState, conf_handler);
  98     uint32_t val = s->config_reg;
  99 #ifdef TARGET_WORDS_BIGENDIAN
 100     val = qemu_bswap_len(val, len);
 101 #endif
 102     PCI_DPRINTF("%s addr %" FMT_PCIBUS " len %d val %"PRIx32"\n",
 103                 __func__, addr, len, val);
 104     return val;
 105 }
 106
 107 static void pci_host_config_write_noswap(ReadWriteHandler *handler,
 108                                          pcibus_t addr, uint32_t val, int len)
 109 {
 110     PCIHostState *s = container_of(handler, PCIHostState, conf_noswap_handler);
 111
 112     PCI_DPRINTF("%s addr %" FMT_PCIBUS " %d val %"PRIx32"\n",
 113                 __func__, addr, len, val);
 114     s->config_reg = val;
 115 }
 116
 117 static uint32_t pci_host_config_read_noswap(ReadWriteHandler *handler,
 118                                             pcibus_t addr, int len)
 119 {
 120     PCIHostState *s = container_of(handler, PCIHostState, conf_noswap_handler);
 121     uint32_t val = s->config_reg;
 122
 123     PCI_DPRINTF("%s addr %" FMT_PCIBUS " len %d val %"PRIx32"\n",
 124                 __func__, addr, len, val);
 125     return val;
 126 }
 127
 128 static void pci_host_data_write(ReadWriteHandler *handler,
 129                                 pcibus_t addr, uint32_t val, int len)
 130 {
 131     PCIHostState *s = container_of(handler, PCIHostState, data_handler);
 132 #ifdef TARGET_WORDS_BIGENDIAN
 133     val = qemu_bswap_len(val, len);
 134 #endif
 135     PCI_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n",
 136                 addr, len, val);
 137     if (s->config_reg & (1u << 31))
 138         pci_data_write(s->bus, s->config_reg | (addr & 3), val, len);
 139 }
 140
 141 static uint32_t pci_host_data_read(ReadWriteHandler *handler,
 142                                    pcibus_t addr, int len)
 143 {
 144     PCIHostState *s = container_of(handler, PCIHostState, data_handler);
 145     uint32_t val;
 146     if (!(s->config_reg & (1 << 31)))
 147         return 0xffffffff;
 148     val = pci_data_read(s->bus, s->config_reg | (addr & 3), len);
 149     PCI_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n",
 150                 addr, len, val);
 151 #ifdef TARGET_WORDS_BIGENDIAN
 152     val = qemu_bswap_len(val, len);
 153 #endif
 154     return val;
 155 }
 156
 157 static void pci_host_init(PCIHostState *s)
 158 {
 159     s->conf_handler.write = pci_host_config_write;
 160     s->conf_handler.read = pci_host_config_read;
 161     s->conf_noswap_handler.write = pci_host_config_write_noswap;
 162     s->conf_noswap_handler.read = pci_host_config_read_noswap;
 163     s->data_handler.write = pci_host_data_write;
 164     s->data_handler.read = pci_host_data_read;
 165 }
 166
 167 int pci_host_conf_register_mmio(PCIHostState *s)
 168 {
 169     pci_host_init(s);
 170     return cpu_register_io_memory_simple(&s->conf_handler);
 171 }
 172
 173 int pci_host_conf_register_mmio_noswap(PCIHostState *s)
 174 {
 175     pci_host_init(s);
 176     return cpu_register_io_memory_simple(&s->conf_noswap_handler);
 177 }
 178
 179 void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s)
 180 {
 181     pci_host_init(s);
 182     register_ioport_simple(&s->conf_noswap_handler, ioport, 4, 4);
 183 }
 184
 185 int pci_host_data_register_mmio(PCIHostState *s)
 186 {
 187     pci_host_init(s);
 188     return cpu_register_io_memory_simple(&s->data_handler);
 189 }
 190
 191 void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s)
 192 {
 193     pci_host_init(s);
 194     register_ioport_simple(&s->data_handler, ioport, 4, 1);
 195     register_ioport_simple(&s->data_handler, ioport, 4, 2);
 196     register_ioport_simple(&s->data_handler, ioport, 4, 4);
 197 }