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virtio-serial: Turn props any virtio-serial-bus device must have into bus props
[qemu.git] / hw / wm8750.c
blobc9c674451b4c5664ffa037237d2ebd8f154cea3b
1 /*
2 * WM8750 audio CODEC.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This file is licensed under GNU GPL.
8 */
9
10 #include "hw.h"
11 #include "i2c.h"
12 #include "audio/audio.h"
13
14 #define IN_PORT_N 3
15 #define OUT_PORT_N 3
16
17 #define CODEC "wm8750"
18
19 typedef struct {
20 int adc;
21 int adc_hz;
22 int dac;
23 int dac_hz;
24 } WMRate;
25
26 typedef struct {
27 i2c_slave i2c;
28 uint8_t i2c_data[2];
29 int i2c_len;
30 QEMUSoundCard card;
31 SWVoiceIn *adc_voice[IN_PORT_N];
32 SWVoiceOut *dac_voice[OUT_PORT_N];
33 int enable;
34 void (*data_req)(void *, int, int);
35 void *opaque;
36 uint8_t data_in[4096];
37 uint8_t data_out[4096];
38 int idx_in, req_in;
39 int idx_out, req_out;
40
41 SWVoiceOut **out[2];
42 uint8_t outvol[7], outmute[2];
43 SWVoiceIn **in[2];
44 uint8_t invol[4], inmute[2];
45
46 uint8_t diff[2], pol, ds, monomix[2], alc, mute;
47 uint8_t path[4], mpath[2], power, format;
48 const WMRate *rate;
49 uint8_t rate_vmstate;
50 int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master;
51 } WM8750State;
52
53 /* pow(10.0, -i / 20.0) * 255, i = 0..42 */
54 static const uint8_t wm8750_vol_db_table[] = {
55 255, 227, 203, 181, 161, 143, 128, 114, 102, 90, 81, 72, 64, 57, 51, 45,
56 40, 36, 32, 29, 26, 23, 20, 18, 16, 14, 13, 11, 10, 9, 8, 7, 6, 6, 5, 5,
57 4, 4, 3, 3, 3, 2, 2
58 };
59
60 #define WM8750_OUTVOL_TRANSFORM(x) wm8750_vol_db_table[(0x7f - x) / 3]
61 #define WM8750_INVOL_TRANSFORM(x) (x << 2)
62
63 static inline void wm8750_in_load(WM8750State *s)
64 {
65 if (s->idx_in + s->req_in <= sizeof(s->data_in))
66 return;
67 s->idx_in = audio_MAX(0, (int) sizeof(s->data_in) - s->req_in);
68 AUD_read(*s->in[0], s->data_in + s->idx_in,
69 sizeof(s->data_in) - s->idx_in);
70 }
71
72 static inline void wm8750_out_flush(WM8750State *s)
73 {
74 int sent = 0;
75 while (sent < s->idx_out)
76 sent += AUD_write(*s->out[0], s->data_out + sent, s->idx_out - sent)
77 ?: s->idx_out;
78 s->idx_out = 0;
79 }
80
81 static void wm8750_audio_in_cb(void *opaque, int avail_b)
82 {
83 WM8750State *s = (WM8750State *) opaque;
84 s->req_in = avail_b;
85 s->data_req(s->opaque, s->req_out >> 2, avail_b >> 2);
86 }
87
88 static void wm8750_audio_out_cb(void *opaque, int free_b)
89 {
90 WM8750State *s = (WM8750State *) opaque;
91
92 if (s->idx_out >= free_b) {
93 s->idx_out = free_b;
94 s->req_out = 0;
95 wm8750_out_flush(s);
96 } else
97 s->req_out = free_b - s->idx_out;
98
99 s->data_req(s->opaque, s->req_out >> 2, s->req_in >> 2);
100 }
101
102 static const WMRate wm_rate_table[] = {
103 { 256, 48000, 256, 48000 }, /* SR: 00000 */
104 { 384, 48000, 384, 48000 }, /* SR: 00001 */
105 { 256, 48000, 1536, 8000 }, /* SR: 00010 */
106 { 384, 48000, 2304, 8000 }, /* SR: 00011 */
107 { 1536, 8000, 256, 48000 }, /* SR: 00100 */
108 { 2304, 8000, 384, 48000 }, /* SR: 00101 */
109 { 1536, 8000, 1536, 8000 }, /* SR: 00110 */
110 { 2304, 8000, 2304, 8000 }, /* SR: 00111 */
111 { 1024, 12000, 1024, 12000 }, /* SR: 01000 */
112 { 1526, 12000, 1536, 12000 }, /* SR: 01001 */
113 { 768, 16000, 768, 16000 }, /* SR: 01010 */
114 { 1152, 16000, 1152, 16000 }, /* SR: 01011 */
115 { 384, 32000, 384, 32000 }, /* SR: 01100 */
116 { 576, 32000, 576, 32000 }, /* SR: 01101 */
117 { 128, 96000, 128, 96000 }, /* SR: 01110 */
118 { 192, 96000, 192, 96000 }, /* SR: 01111 */
119 { 256, 44100, 256, 44100 }, /* SR: 10000 */
120 { 384, 44100, 384, 44100 }, /* SR: 10001 */
121 { 256, 44100, 1408, 8018 }, /* SR: 10010 */
122 { 384, 44100, 2112, 8018 }, /* SR: 10011 */
123 { 1408, 8018, 256, 44100 }, /* SR: 10100 */
124 { 2112, 8018, 384, 44100 }, /* SR: 10101 */
125 { 1408, 8018, 1408, 8018 }, /* SR: 10110 */
126 { 2112, 8018, 2112, 8018 }, /* SR: 10111 */
127 { 1024, 11025, 1024, 11025 }, /* SR: 11000 */
128 { 1536, 11025, 1536, 11025 }, /* SR: 11001 */
129 { 512, 22050, 512, 22050 }, /* SR: 11010 */
130 { 768, 22050, 768, 22050 }, /* SR: 11011 */
131 { 512, 24000, 512, 24000 }, /* SR: 11100 */
132 { 768, 24000, 768, 24000 }, /* SR: 11101 */
133 { 128, 88200, 128, 88200 }, /* SR: 11110 */
134 { 192, 88200, 192, 88200 }, /* SR: 11111 */
135 };
136
137 static void wm8750_vol_update(WM8750State *s)
138 {
139 /* FIXME: multiply all volumes by s->invol[2], s->invol[3] */
140
141 AUD_set_volume_in(s->adc_voice[0], s->mute,
142 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
143 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
144 AUD_set_volume_in(s->adc_voice[1], s->mute,
145 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
146 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
147 AUD_set_volume_in(s->adc_voice[2], s->mute,
148 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
149 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
150
151 /* FIXME: multiply all volumes by s->outvol[0], s->outvol[1] */
152
153 /* Speaker: LOUT2VOL ROUT2VOL */
154 AUD_set_volume_out(s->dac_voice[0], s->mute,
155 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[4]),
156 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[5]));
157
158 /* Headphone: LOUT1VOL ROUT1VOL */
159 AUD_set_volume_out(s->dac_voice[1], s->mute,
160 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[2]),
161 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[3]));
162
163 /* MONOOUT: MONOVOL MONOVOL */
164 AUD_set_volume_out(s->dac_voice[2], s->mute,
165 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]),
166 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]));
167 }
168
169 static void wm8750_set_format(WM8750State *s)
170 {
171 int i;
172 struct audsettings in_fmt;
173 struct audsettings out_fmt;
174
175 wm8750_out_flush(s);
176
177 if (s->in[0] && *s->in[0])
178 AUD_set_active_in(*s->in[0], 0);
179 if (s->out[0] && *s->out[0])
180 AUD_set_active_out(*s->out[0], 0);
181
182 for (i = 0; i < IN_PORT_N; i ++)
183 if (s->adc_voice[i]) {
184 AUD_close_in(&s->card, s->adc_voice[i]);
185 s->adc_voice[i] = NULL;
186 }
187 for (i = 0; i < OUT_PORT_N; i ++)
188 if (s->dac_voice[i]) {
189 AUD_close_out(&s->card, s->dac_voice[i]);
190 s->dac_voice[i] = NULL;
191 }
192
193 if (!s->enable)
194 return;
195
196 /* Setup input */
197 in_fmt.endianness = 0;
198 in_fmt.nchannels = 2;
199 in_fmt.freq = s->adc_hz;
200 in_fmt.fmt = AUD_FMT_S16;
201
202 s->adc_voice[0] = AUD_open_in(&s->card, s->adc_voice[0],
203 CODEC ".input1", s, wm8750_audio_in_cb, &in_fmt);
204 s->adc_voice[1] = AUD_open_in(&s->card, s->adc_voice[1],
205 CODEC ".input2", s, wm8750_audio_in_cb, &in_fmt);
206 s->adc_voice[2] = AUD_open_in(&s->card, s->adc_voice[2],
207 CODEC ".input3", s, wm8750_audio_in_cb, &in_fmt);
208
209 /* Setup output */
210 out_fmt.endianness = 0;
211 out_fmt.nchannels = 2;
212 out_fmt.freq = s->dac_hz;
213 out_fmt.fmt = AUD_FMT_S16;
214
215 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
216 CODEC ".speaker", s, wm8750_audio_out_cb, &out_fmt);
217 s->dac_voice[1] = AUD_open_out(&s->card, s->dac_voice[1],
218 CODEC ".headphone", s, wm8750_audio_out_cb, &out_fmt);
219 /* MONOMIX is also in stereo for simplicity */
220 s->dac_voice[2] = AUD_open_out(&s->card, s->dac_voice[2],
221 CODEC ".monomix", s, wm8750_audio_out_cb, &out_fmt);
222 /* no sense emulating OUT3 which is a mix of other outputs */
223
224 wm8750_vol_update(s);
225
226 /* We should connect the left and right channels to their
227 * respective inputs/outputs but we have completely no need
228 * for mixing or combining paths to different ports, so we
229 * connect both channels to where the left channel is routed. */
230 if (s->in[0] && *s->in[0])
231 AUD_set_active_in(*s->in[0], 1);
232 if (s->out[0] && *s->out[0])
233 AUD_set_active_out(*s->out[0], 1);
234 }
235
236 static void wm8750_clk_update(WM8750State *s, int ext)
237 {
238 if (s->master || !s->ext_dac_hz)
239 s->dac_hz = s->rate->dac_hz;
240 else
241 s->dac_hz = s->ext_dac_hz;
242
243 if (s->master || !s->ext_adc_hz)
244 s->adc_hz = s->rate->adc_hz;
245 else
246 s->adc_hz = s->ext_adc_hz;
247
248 if (s->master || (!s->ext_dac_hz && !s->ext_adc_hz)) {
249 if (!ext)
250 wm8750_set_format(s);
251 } else {
252 if (ext)
253 wm8750_set_format(s);
254 }
255 }
256
257 static void wm8750_reset(i2c_slave *i2c)
258 {
259 WM8750State *s = (WM8750State *) i2c;
260 s->rate = &wm_rate_table[0];
261 s->enable = 0;
262 wm8750_clk_update(s, 1);
263 s->diff[0] = 0;
264 s->diff[1] = 0;
265 s->ds = 0;
266 s->alc = 0;
267 s->in[0] = &s->adc_voice[0];
268 s->invol[0] = 0x17;
269 s->invol[1] = 0x17;
270 s->invol[2] = 0xc3;
271 s->invol[3] = 0xc3;
272 s->out[0] = &s->dac_voice[0];
273 s->outvol[0] = 0xff;
274 s->outvol[1] = 0xff;
275 s->outvol[2] = 0x79;
276 s->outvol[3] = 0x79;
277 s->outvol[4] = 0x79;
278 s->outvol[5] = 0x79;
279 s->outvol[6] = 0x79;
280 s->inmute[0] = 0;
281 s->inmute[1] = 0;
282 s->outmute[0] = 0;
283 s->outmute[1] = 0;
284 s->mute = 1;
285 s->path[0] = 0;
286 s->path[1] = 0;
287 s->path[2] = 0;
288 s->path[3] = 0;
289 s->mpath[0] = 0;
290 s->mpath[1] = 0;
291 s->format = 0x0a;
292 s->idx_in = sizeof(s->data_in);
293 s->req_in = 0;
294 s->idx_out = 0;
295 s->req_out = 0;
296 wm8750_vol_update(s);
297 s->i2c_len = 0;
298 }
299
300 static void wm8750_event(i2c_slave *i2c, enum i2c_event event)
301 {
302 WM8750State *s = (WM8750State *) i2c;
303
304 switch (event) {
305 case I2C_START_SEND:
306 s->i2c_len = 0;
307 break;
308 case I2C_FINISH:
309 #ifdef VERBOSE
310 if (s->i2c_len < 2)
311 printf("%s: message too short (%i bytes)\n",
312 __FUNCTION__, s->i2c_len);
313 #endif
314 break;
315 default:
316 break;
317 }
318 }
319
320 #define WM8750_LINVOL 0x00
321 #define WM8750_RINVOL 0x01
322 #define WM8750_LOUT1V 0x02
323 #define WM8750_ROUT1V 0x03
324 #define WM8750_ADCDAC 0x05
325 #define WM8750_IFACE 0x07
326 #define WM8750_SRATE 0x08
327 #define WM8750_LDAC 0x0a
328 #define WM8750_RDAC 0x0b
329 #define WM8750_BASS 0x0c
330 #define WM8750_TREBLE 0x0d
331 #define WM8750_RESET 0x0f
332 #define WM8750_3D 0x10
333 #define WM8750_ALC1 0x11
334 #define WM8750_ALC2 0x12
335 #define WM8750_ALC3 0x13
336 #define WM8750_NGATE 0x14
337 #define WM8750_LADC 0x15
338 #define WM8750_RADC 0x16
339 #define WM8750_ADCTL1 0x17
340 #define WM8750_ADCTL2 0x18
341 #define WM8750_PWR1 0x19
342 #define WM8750_PWR2 0x1a
343 #define WM8750_ADCTL3 0x1b
344 #define WM8750_ADCIN 0x1f
345 #define WM8750_LADCIN 0x20
346 #define WM8750_RADCIN 0x21
347 #define WM8750_LOUTM1 0x22
348 #define WM8750_LOUTM2 0x23
349 #define WM8750_ROUTM1 0x24
350 #define WM8750_ROUTM2 0x25
351 #define WM8750_MOUTM1 0x26
352 #define WM8750_MOUTM2 0x27
353 #define WM8750_LOUT2V 0x28
354 #define WM8750_ROUT2V 0x29
355 #define WM8750_MOUTV 0x2a
356
357 static int wm8750_tx(i2c_slave *i2c, uint8_t data)
358 {
359 WM8750State *s = (WM8750State *) i2c;
360 uint8_t cmd;
361 uint16_t value;
362
363 if (s->i2c_len >= 2) {
364 printf("%s: long message (%i bytes)\n", __FUNCTION__, s->i2c_len);
365 #ifdef VERBOSE
366 return 1;
367 #endif
368 }
369 s->i2c_data[s->i2c_len ++] = data;
370 if (s->i2c_len != 2)
371 return 0;
372
373 cmd = s->i2c_data[0] >> 1;
374 value = ((s->i2c_data[0] << 8) | s->i2c_data[1]) & 0x1ff;
375
376 switch (cmd) {
377 case WM8750_LADCIN: /* ADC Signal Path Control (Left) */
378 s->diff[0] = (((value >> 6) & 3) == 3); /* LINSEL */
379 if (s->diff[0])
380 s->in[0] = &s->adc_voice[0 + s->ds * 1];
381 else
382 s->in[0] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
383 break;
384
385 case WM8750_RADCIN: /* ADC Signal Path Control (Right) */
386 s->diff[1] = (((value >> 6) & 3) == 3); /* RINSEL */
387 if (s->diff[1])
388 s->in[1] = &s->adc_voice[0 + s->ds * 1];
389 else
390 s->in[1] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
391 break;
392
393 case WM8750_ADCIN: /* ADC Input Mode */
394 s->ds = (value >> 8) & 1; /* DS */
395 if (s->diff[0])
396 s->in[0] = &s->adc_voice[0 + s->ds * 1];
397 if (s->diff[1])
398 s->in[1] = &s->adc_voice[0 + s->ds * 1];
399 s->monomix[0] = (value >> 6) & 3; /* MONOMIX */
400 break;
401
402 case WM8750_ADCTL1: /* Additional Control (1) */
403 s->monomix[1] = (value >> 1) & 1; /* DMONOMIX */
404 break;
405
406 case WM8750_PWR1: /* Power Management (1) */
407 s->enable = ((value >> 6) & 7) == 3; /* VMIDSEL, VREF */
408 wm8750_set_format(s);
409 break;
410
411 case WM8750_LINVOL: /* Left Channel PGA */
412 s->invol[0] = value & 0x3f; /* LINVOL */
413 s->inmute[0] = (value >> 7) & 1; /* LINMUTE */
414 wm8750_vol_update(s);
415 break;
416
417 case WM8750_RINVOL: /* Right Channel PGA */
418 s->invol[1] = value & 0x3f; /* RINVOL */
419 s->inmute[1] = (value >> 7) & 1; /* RINMUTE */
420 wm8750_vol_update(s);
421 break;
422
423 case WM8750_ADCDAC: /* ADC and DAC Control */
424 s->pol = (value >> 5) & 3; /* ADCPOL */
425 s->mute = (value >> 3) & 1; /* DACMU */
426 wm8750_vol_update(s);
427 break;
428
429 case WM8750_ADCTL3: /* Additional Control (3) */
430 break;
431
432 case WM8750_LADC: /* Left ADC Digital Volume */
433 s->invol[2] = value & 0xff; /* LADCVOL */
434 wm8750_vol_update(s);
435 break;
436
437 case WM8750_RADC: /* Right ADC Digital Volume */
438 s->invol[3] = value & 0xff; /* RADCVOL */
439 wm8750_vol_update(s);
440 break;
441
442 case WM8750_ALC1: /* ALC Control (1) */
443 s->alc = (value >> 7) & 3; /* ALCSEL */
444 break;
445
446 case WM8750_NGATE: /* Noise Gate Control */
447 case WM8750_3D: /* 3D enhance */
448 break;
449
450 case WM8750_LDAC: /* Left Channel Digital Volume */
451 s->outvol[0] = value & 0xff; /* LDACVOL */
452 wm8750_vol_update(s);
453 break;
454
455 case WM8750_RDAC: /* Right Channel Digital Volume */
456 s->outvol[1] = value & 0xff; /* RDACVOL */
457 wm8750_vol_update(s);
458 break;
459
460 case WM8750_BASS: /* Bass Control */
461 break;
462
463 case WM8750_LOUTM1: /* Left Mixer Control (1) */
464 s->path[0] = (value >> 8) & 1; /* LD2LO */
465 /* TODO: mute/unmute respective paths */
466 wm8750_vol_update(s);
467 break;
468
469 case WM8750_LOUTM2: /* Left Mixer Control (2) */
470 s->path[1] = (value >> 8) & 1; /* RD2LO */
471 /* TODO: mute/unmute respective paths */
472 wm8750_vol_update(s);
473 break;
474
475 case WM8750_ROUTM1: /* Right Mixer Control (1) */
476 s->path[2] = (value >> 8) & 1; /* LD2RO */
477 /* TODO: mute/unmute respective paths */
478 wm8750_vol_update(s);
479 break;
480
481 case WM8750_ROUTM2: /* Right Mixer Control (2) */
482 s->path[3] = (value >> 8) & 1; /* RD2RO */
483 /* TODO: mute/unmute respective paths */
484 wm8750_vol_update(s);
485 break;
486
487 case WM8750_MOUTM1: /* Mono Mixer Control (1) */
488 s->mpath[0] = (value >> 8) & 1; /* LD2MO */
489 /* TODO: mute/unmute respective paths */
490 wm8750_vol_update(s);
491 break;
492
493 case WM8750_MOUTM2: /* Mono Mixer Control (2) */
494 s->mpath[1] = (value >> 8) & 1; /* RD2MO */
495 /* TODO: mute/unmute respective paths */
496 wm8750_vol_update(s);
497 break;
498
499 case WM8750_LOUT1V: /* LOUT1 Volume */
500 s->outvol[2] = value & 0x7f; /* LOUT1VOL */
501 wm8750_vol_update(s);
502 break;
503
504 case WM8750_LOUT2V: /* LOUT2 Volume */
505 s->outvol[4] = value & 0x7f; /* LOUT2VOL */
506 wm8750_vol_update(s);
507 break;
508
509 case WM8750_ROUT1V: /* ROUT1 Volume */
510 s->outvol[3] = value & 0x7f; /* ROUT1VOL */
511 wm8750_vol_update(s);
512 break;
513
514 case WM8750_ROUT2V: /* ROUT2 Volume */
515 s->outvol[5] = value & 0x7f; /* ROUT2VOL */
516 wm8750_vol_update(s);
517 break;
518
519 case WM8750_MOUTV: /* MONOOUT Volume */
520 s->outvol[6] = value & 0x7f; /* MONOOUTVOL */
521 wm8750_vol_update(s);
522 break;
523
524 case WM8750_ADCTL2: /* Additional Control (2) */
525 break;
526
527 case WM8750_PWR2: /* Power Management (2) */
528 s->power = value & 0x7e;
529 /* TODO: mute/unmute respective paths */
530 wm8750_vol_update(s);
531 break;
532
533 case WM8750_IFACE: /* Digital Audio Interface Format */
534 s->format = value;
535 s->master = (value >> 6) & 1; /* MS */
536 wm8750_clk_update(s, s->master);
537 break;
538
539 case WM8750_SRATE: /* Clocking and Sample Rate Control */
540 s->rate = &wm_rate_table[(value >> 1) & 0x1f];
541 wm8750_clk_update(s, 0);
542 break;
543
544 case WM8750_RESET: /* Reset */
545 wm8750_reset(&s->i2c);
546 break;
547
548 #ifdef VERBOSE
549 default:
550 printf("%s: unknown register %02x\n", __FUNCTION__, cmd);
551 #endif
552 }
553
554 return 0;
555 }
556
557 static int wm8750_rx(i2c_slave *i2c)
558 {
559 return 0x00;
560 }
561
562 static void wm8750_pre_save(void *opaque)
563 {
564 WM8750State *s = opaque;
565
566 s->rate_vmstate = (s->rate - wm_rate_table) / sizeof(*s->rate);
567 }
568
569 static int wm8750_post_load(void *opaque, int version_id)
570 {
571 WM8750State *s = opaque;
572
573 s->rate = &wm_rate_table[s->rate_vmstate & 0x1f];
574 return 0;
575 }
576
577 static const VMStateDescription vmstate_wm8750 = {
578 .name = CODEC,
579 .version_id = 0,
580 .minimum_version_id = 0,
581 .minimum_version_id_old = 0,
582 .pre_save = wm8750_pre_save,
583 .post_load = wm8750_post_load,
584 .fields = (VMStateField []) {
585 VMSTATE_UINT8_ARRAY(i2c_data, WM8750State, 2),
586 VMSTATE_INT32(i2c_len, WM8750State),
587 VMSTATE_INT32(enable, WM8750State),
588 VMSTATE_INT32(idx_in, WM8750State),
589 VMSTATE_INT32(req_in, WM8750State),
590 VMSTATE_INT32(idx_out, WM8750State),
591 VMSTATE_INT32(req_out, WM8750State),
592 VMSTATE_UINT8_ARRAY(outvol, WM8750State, 7),
593 VMSTATE_UINT8_ARRAY(outmute, WM8750State, 2),
594 VMSTATE_UINT8_ARRAY(invol, WM8750State, 4),
595 VMSTATE_UINT8_ARRAY(inmute, WM8750State, 2),
596 VMSTATE_UINT8_ARRAY(diff, WM8750State, 2),
597 VMSTATE_UINT8(pol, WM8750State),
598 VMSTATE_UINT8(ds, WM8750State),
599 VMSTATE_UINT8_ARRAY(monomix, WM8750State, 2),
600 VMSTATE_UINT8(alc, WM8750State),
601 VMSTATE_UINT8(mute, WM8750State),
602 VMSTATE_UINT8_ARRAY(path, WM8750State, 4),
603 VMSTATE_UINT8_ARRAY(mpath, WM8750State, 2),
604 VMSTATE_UINT8(format, WM8750State),
605 VMSTATE_UINT8(power, WM8750State),
606 VMSTATE_UINT8(rate_vmstate, WM8750State),
607 VMSTATE_I2C_SLAVE(i2c, WM8750State),
608 VMSTATE_END_OF_LIST()
609 }
610 };
611
612 static int wm8750_init(i2c_slave *i2c)
613 {
614 WM8750State *s = FROM_I2C_SLAVE(WM8750State, i2c);
615
616 AUD_register_card(CODEC, &s->card);
617 wm8750_reset(&s->i2c);
618
619 return 0;
620 }
621
622 #if 0
623 static void wm8750_fini(i2c_slave *i2c)
624 {
625 WM8750State *s = (WM8750State *) i2c;
626 wm8750_reset(&s->i2c);
627 AUD_remove_card(&s->card);
628 qemu_free(s);
629 }
630 #endif
631
632 void wm8750_data_req_set(DeviceState *dev,
633 void (*data_req)(void *, int, int), void *opaque)
634 {
635 WM8750State *s = FROM_I2C_SLAVE(WM8750State, I2C_SLAVE_FROM_QDEV(dev));
636 s->data_req = data_req;
637 s->opaque = opaque;
638 }
639
640 void wm8750_dac_dat(void *opaque, uint32_t sample)
641 {
642 WM8750State *s = (WM8750State *) opaque;
643
644 *(uint32_t *) &s->data_out[s->idx_out] = sample;
645 s->req_out -= 4;
646 s->idx_out += 4;
647 if (s->idx_out >= sizeof(s->data_out) || s->req_out <= 0)
648 wm8750_out_flush(s);
649 }
650
651 void *wm8750_dac_buffer(void *opaque, int samples)
652 {
653 WM8750State *s = (WM8750State *) opaque;
654 /* XXX: Should check if there are <i>samples</i> free samples available */
655 void *ret = s->data_out + s->idx_out;
656
657 s->idx_out += samples << 2;
658 s->req_out -= samples << 2;
659 return ret;
660 }
661
662 void wm8750_dac_commit(void *opaque)
663 {
664 WM8750State *s = (WM8750State *) opaque;
665
666 wm8750_out_flush(s);
667 }
668
669 uint32_t wm8750_adc_dat(void *opaque)
670 {
671 WM8750State *s = (WM8750State *) opaque;
672 uint32_t *data;
673
674 if (s->idx_in >= sizeof(s->data_in))
675 wm8750_in_load(s);
676
677 data = (uint32_t *) &s->data_in[s->idx_in];
678 s->req_in -= 4;
679 s->idx_in += 4;
680 return *data;
681 }
682
683 void wm8750_set_bclk_in(void *opaque, int new_hz)
684 {
685 WM8750State *s = (WM8750State *) opaque;
686
687 s->ext_adc_hz = new_hz;
688 s->ext_dac_hz = new_hz;
689 wm8750_clk_update(s, 1);
690 }
691
692 static I2CSlaveInfo wm8750_info = {
693 .qdev.name = "wm8750",
694 .qdev.size = sizeof(WM8750State),
695 .qdev.vmsd = &vmstate_wm8750,
696 .init = wm8750_init,
697 .event = wm8750_event,
698 .recv = wm8750_rx,
699 .send = wm8750_tx
700 };
701
702 static void wm8750_register_devices(void)
703 {
704 i2c_register_slave(&wm8750_info);
705 }
706
707 device_init(wm8750_register_devices)
QEmu