fpu: Bound increment for scalbn
[qemu.git] / tests / ivshmem-test.c
blob8af16ee79a00bf64220f99149410adcb81addddb
1 /*
2 * QTest testcase for ivshmem
4 * Copyright (c) 2014 SUSE LINUX Products GmbH
5 * Copyright (c) 2015 Red Hat, Inc.
7 * This work is licensed under the terms of the GNU GPL, version 2 or later.
8 * See the COPYING file in the top-level directory.
9 */
11 #include "qemu/osdep.h"
12 #include <glib/gstdio.h>
13 #include "contrib/ivshmem-server/ivshmem-server.h"
14 #include "libqos/libqos-pc.h"
15 #include "libqos/libqos-spapr.h"
16 #include "libqtest.h"
17 #include "qemu-common.h"
19 #define TMPSHMSIZE (1 << 20)
20 static char *tmpshm;
21 static void *tmpshmem;
22 static char *tmpdir;
23 static char *tmpserver;
25 static void save_fn(QPCIDevice *dev, int devfn, void *data)
27 QPCIDevice **pdev = (QPCIDevice **) data;
29 *pdev = dev;
32 static QPCIDevice *get_device(QPCIBus *pcibus)
34 QPCIDevice *dev;
36 dev = NULL;
37 qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
38 g_assert(dev != NULL);
40 return dev;
43 typedef struct _IVState {
44 QOSState *qs;
45 QPCIBar reg_bar, mem_bar;
46 QPCIDevice *dev;
47 } IVState;
49 enum Reg {
50 INTRMASK = 0,
51 INTRSTATUS = 4,
52 IVPOSITION = 8,
53 DOORBELL = 12,
56 static const char* reg2str(enum Reg reg) {
57 switch (reg) {
58 case INTRMASK:
59 return "IntrMask";
60 case INTRSTATUS:
61 return "IntrStatus";
62 case IVPOSITION:
63 return "IVPosition";
64 case DOORBELL:
65 return "DoorBell";
66 default:
67 return NULL;
71 static inline unsigned in_reg(IVState *s, enum Reg reg)
73 const char *name = reg2str(reg);
74 QTestState *qtest = global_qtest;
75 unsigned res;
77 global_qtest = s->qs->qts;
78 res = qpci_io_readl(s->dev, s->reg_bar, reg);
79 g_test_message("*%s -> %x\n", name, res);
80 global_qtest = qtest;
82 return res;
85 static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
87 const char *name = reg2str(reg);
88 QTestState *qtest = global_qtest;
90 global_qtest = s->qs->qts;
91 g_test_message("%x -> *%s\n", v, name);
92 qpci_io_writel(s->dev, s->reg_bar, reg, v);
93 global_qtest = qtest;
96 static inline void read_mem(IVState *s, uint64_t off, void *buf, size_t len)
98 QTestState *qtest = global_qtest;
100 global_qtest = s->qs->qts;
101 qpci_memread(s->dev, s->mem_bar, off, buf, len);
102 global_qtest = qtest;
105 static inline void write_mem(IVState *s, uint64_t off,
106 const void *buf, size_t len)
108 QTestState *qtest = global_qtest;
110 global_qtest = s->qs->qts;
111 qpci_memwrite(s->dev, s->mem_bar, off, buf, len);
112 global_qtest = qtest;
115 static void cleanup_vm(IVState *s)
117 g_free(s->dev);
118 qtest_shutdown(s->qs);
121 static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
123 uint64_t barsize;
124 const char *arch = qtest_get_arch();
126 if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
127 s->qs = qtest_pc_boot(cmd);
128 } else if (strcmp(arch, "ppc64") == 0) {
129 s->qs = qtest_spapr_boot(cmd);
130 } else {
131 g_printerr("ivshmem-test tests are only available on x86 or ppc64\n");
132 exit(EXIT_FAILURE);
134 global_qtest = s->qs->qts;
135 s->dev = get_device(s->qs->pcibus);
137 s->reg_bar = qpci_iomap(s->dev, 0, &barsize);
138 g_assert_cmpuint(barsize, ==, 256);
140 if (msix) {
141 qpci_msix_enable(s->dev);
144 s->mem_bar = qpci_iomap(s->dev, 2, &barsize);
145 g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
147 qpci_device_enable(s->dev);
150 static void setup_vm(IVState *s)
152 char *cmd = g_strdup_printf("-object memory-backend-file"
153 ",id=mb1,size=1M,share,mem-path=/dev/shm%s"
154 " -device ivshmem-plain,memdev=mb1", tmpshm);
156 setup_vm_cmd(s, cmd, false);
158 g_free(cmd);
161 static void test_ivshmem_single(void)
163 IVState state, *s;
164 uint32_t data[1024];
165 int i;
167 setup_vm(&state);
168 s = &state;
170 /* initial state of readable registers */
171 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0);
172 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
173 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0);
175 /* trigger interrupt via registers */
176 out_reg(s, INTRMASK, 0xffffffff);
177 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
178 out_reg(s, INTRSTATUS, 1);
179 /* check interrupt status */
180 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
181 /* reading clears */
182 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
183 /* TODO intercept actual interrupt (needs qtest work) */
185 /* invalid register access */
186 out_reg(s, IVPOSITION, 1);
187 in_reg(s, DOORBELL);
189 /* ring the (non-functional) doorbell */
190 out_reg(s, DOORBELL, 8 << 16);
192 /* write shared memory */
193 for (i = 0; i < G_N_ELEMENTS(data); i++) {
194 data[i] = i;
196 write_mem(s, 0, data, sizeof(data));
198 /* verify write */
199 for (i = 0; i < G_N_ELEMENTS(data); i++) {
200 g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
203 /* read it back and verify read */
204 memset(data, 0, sizeof(data));
205 read_mem(s, 0, data, sizeof(data));
206 for (i = 0; i < G_N_ELEMENTS(data); i++) {
207 g_assert_cmpuint(data[i], ==, i);
210 cleanup_vm(s);
213 static void test_ivshmem_pair(void)
215 IVState state1, state2, *s1, *s2;
216 char *data;
217 int i;
219 setup_vm(&state1);
220 s1 = &state1;
221 setup_vm(&state2);
222 s2 = &state2;
224 data = g_malloc0(TMPSHMSIZE);
226 /* host write, guest 1 & 2 read */
227 memset(tmpshmem, 0x42, TMPSHMSIZE);
228 read_mem(s1, 0, data, TMPSHMSIZE);
229 for (i = 0; i < TMPSHMSIZE; i++) {
230 g_assert_cmpuint(data[i], ==, 0x42);
232 read_mem(s2, 0, data, TMPSHMSIZE);
233 for (i = 0; i < TMPSHMSIZE; i++) {
234 g_assert_cmpuint(data[i], ==, 0x42);
237 /* guest 1 write, guest 2 read */
238 memset(data, 0x43, TMPSHMSIZE);
239 write_mem(s1, 0, data, TMPSHMSIZE);
240 memset(data, 0, TMPSHMSIZE);
241 read_mem(s2, 0, data, TMPSHMSIZE);
242 for (i = 0; i < TMPSHMSIZE; i++) {
243 g_assert_cmpuint(data[i], ==, 0x43);
246 /* guest 2 write, guest 1 read */
247 memset(data, 0x44, TMPSHMSIZE);
248 write_mem(s2, 0, data, TMPSHMSIZE);
249 memset(data, 0, TMPSHMSIZE);
250 read_mem(s1, 0, data, TMPSHMSIZE);
251 for (i = 0; i < TMPSHMSIZE; i++) {
252 g_assert_cmpuint(data[i], ==, 0x44);
255 cleanup_vm(s1);
256 cleanup_vm(s2);
257 g_free(data);
260 typedef struct ServerThread {
261 GThread *thread;
262 IvshmemServer *server;
263 int pipe[2]; /* to handle quit */
264 } ServerThread;
266 static void *server_thread(void *data)
268 ServerThread *t = data;
269 IvshmemServer *server = t->server;
271 while (true) {
272 fd_set fds;
273 int maxfd, ret;
275 FD_ZERO(&fds);
276 FD_SET(t->pipe[0], &fds);
277 maxfd = t->pipe[0] + 1;
279 ivshmem_server_get_fds(server, &fds, &maxfd);
281 ret = select(maxfd, &fds, NULL, NULL, NULL);
283 if (ret < 0) {
284 if (errno == EINTR) {
285 continue;
288 g_critical("select error: %s\n", strerror(errno));
289 break;
291 if (ret == 0) {
292 continue;
295 if (FD_ISSET(t->pipe[0], &fds)) {
296 break;
299 if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
300 g_critical("ivshmem_server_handle_fds() failed\n");
301 break;
305 return NULL;
308 static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
310 char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
311 "-device ivshmem%s,chardev=chr0,vectors=%d",
312 tmpserver,
313 msi ? "-doorbell" : ",size=1M,msi=off",
314 nvectors);
316 setup_vm_cmd(s, cmd, msi);
318 g_free(cmd);
321 static void test_ivshmem_server(bool msi)
323 IVState state1, state2, *s1, *s2;
324 ServerThread thread;
325 IvshmemServer server;
326 int ret, vm1, vm2;
327 int nvectors = 2;
328 guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
330 ret = ivshmem_server_init(&server, tmpserver, tmpshm, true,
331 TMPSHMSIZE, nvectors,
332 g_test_verbose());
333 g_assert_cmpint(ret, ==, 0);
335 ret = ivshmem_server_start(&server);
336 g_assert_cmpint(ret, ==, 0);
338 thread.server = &server;
339 ret = pipe(thread.pipe);
340 g_assert_cmpint(ret, ==, 0);
341 thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
342 g_assert(thread.thread != NULL);
344 setup_vm_with_server(&state1, nvectors, msi);
345 s1 = &state1;
346 setup_vm_with_server(&state2, nvectors, msi);
347 s2 = &state2;
349 /* check got different VM ids */
350 vm1 = in_reg(s1, IVPOSITION);
351 vm2 = in_reg(s2, IVPOSITION);
352 g_assert_cmpint(vm1, >=, 0);
353 g_assert_cmpint(vm2, >=, 0);
354 g_assert_cmpint(vm1, !=, vm2);
356 /* check number of MSI-X vectors */
357 global_qtest = s1->qs->qts;
358 if (msi) {
359 ret = qpci_msix_table_size(s1->dev);
360 g_assert_cmpuint(ret, ==, nvectors);
363 /* TODO test behavior before MSI-X is enabled */
365 /* ping vm2 -> vm1 on vector 0 */
366 if (msi) {
367 ret = qpci_msix_pending(s1->dev, 0);
368 g_assert_cmpuint(ret, ==, 0);
369 } else {
370 g_assert_cmpuint(in_reg(s1, INTRSTATUS), ==, 0);
372 out_reg(s2, DOORBELL, vm1 << 16);
373 do {
374 g_usleep(10000);
375 ret = msi ? qpci_msix_pending(s1->dev, 0) : in_reg(s1, INTRSTATUS);
376 } while (ret == 0 && g_get_monotonic_time() < end_time);
377 g_assert_cmpuint(ret, !=, 0);
379 /* ping vm1 -> vm2 on vector 1 */
380 global_qtest = s2->qs->qts;
381 if (msi) {
382 ret = qpci_msix_pending(s2->dev, 1);
383 g_assert_cmpuint(ret, ==, 0);
384 } else {
385 g_assert_cmpuint(in_reg(s2, INTRSTATUS), ==, 0);
387 out_reg(s1, DOORBELL, vm2 << 16 | 1);
388 do {
389 g_usleep(10000);
390 ret = msi ? qpci_msix_pending(s2->dev, 1) : in_reg(s2, INTRSTATUS);
391 } while (ret == 0 && g_get_monotonic_time() < end_time);
392 g_assert_cmpuint(ret, !=, 0);
394 cleanup_vm(s2);
395 cleanup_vm(s1);
397 if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
398 g_error("qemu_write_full: %s", g_strerror(errno));
401 g_thread_join(thread.thread);
403 ivshmem_server_close(&server);
404 close(thread.pipe[1]);
405 close(thread.pipe[0]);
408 static void test_ivshmem_server_msi(void)
410 test_ivshmem_server(true);
413 static void test_ivshmem_server_irq(void)
415 test_ivshmem_server(false);
418 #define PCI_SLOT_HP 0x06
420 static void test_ivshmem_hotplug(void)
422 const char *arch = qtest_get_arch();
423 gchar *opts;
425 qtest_start("");
427 opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
429 qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
430 if (strcmp(arch, "ppc64") != 0) {
431 qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
434 qtest_end();
435 g_free(opts);
438 static void test_ivshmem_memdev(void)
440 IVState state;
442 /* just for the sake of checking memory-backend property */
443 setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
444 " -device ivshmem-plain,memdev=mb1", false);
446 cleanup_vm(&state);
449 static void cleanup(void)
451 if (tmpshmem) {
452 munmap(tmpshmem, TMPSHMSIZE);
453 tmpshmem = NULL;
456 if (tmpshm) {
457 shm_unlink(tmpshm);
458 g_free(tmpshm);
459 tmpshm = NULL;
462 if (tmpserver) {
463 g_unlink(tmpserver);
464 g_free(tmpserver);
465 tmpserver = NULL;
468 if (tmpdir) {
469 g_rmdir(tmpdir);
470 tmpdir = NULL;
474 static void abrt_handler(void *data)
476 cleanup();
479 static gchar *mktempshm(int size, int *fd)
481 while (true) {
482 gchar *name;
484 name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
485 *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
486 S_IRWXU|S_IRWXG|S_IRWXO);
487 if (*fd > 0) {
488 g_assert(ftruncate(*fd, size) == 0);
489 return name;
492 g_free(name);
494 if (errno != EEXIST) {
495 perror("shm_open");
496 return NULL;
501 int main(int argc, char **argv)
503 int ret, fd;
504 const char *arch = qtest_get_arch();
505 gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
507 #if !GLIB_CHECK_VERSION(2, 31, 0)
508 if (!g_thread_supported()) {
509 g_thread_init(NULL);
511 #endif
513 g_test_init(&argc, &argv, NULL);
515 qtest_add_abrt_handler(abrt_handler, NULL);
516 /* shm */
517 tmpshm = mktempshm(TMPSHMSIZE, &fd);
518 if (!tmpshm) {
519 return 0;
521 tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
522 g_assert(tmpshmem != MAP_FAILED);
523 /* server */
524 if (mkdtemp(dir) == NULL) {
525 g_error("mkdtemp: %s", g_strerror(errno));
527 tmpdir = dir;
528 tmpserver = g_strconcat(tmpdir, "/server", NULL);
530 qtest_add_func("/ivshmem/single", test_ivshmem_single);
531 qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
532 qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
533 if (g_test_slow()) {
534 qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
535 if (strcmp(arch, "ppc64") != 0) {
536 qtest_add_func("/ivshmem/server-msi", test_ivshmem_server_msi);
537 qtest_add_func("/ivshmem/server-irq", test_ivshmem_server_irq);
541 ret = g_test_run();
543 cleanup();
545 return ret;