hw/rdma: PVRDMA commands and data-path ops
[qemu.git] / hw / hppa / hppa_hardware.h
blob2c61b1f77ccb8e1466bd7321f70637bf85f8ce59
1 /* HPPA cores and system support chips. */
3 #define FIRMWARE_START 0xf0000000
4 #define FIRMWARE_END 0xf0800000
6 #define DEVICE_HPA_LEN 0x00100000
8 #define GSC_HPA 0xffc00000
9 #define DINO_HPA 0xfff80000
10 #define DINO_UART_HPA 0xfff83000
11 #define DINO_UART_BASE 0xfff83800
12 #define DINO_SCSI_HPA 0xfff8c000
13 #define LASI_HPA 0xffd00000
14 #define LASI_UART_HPA 0xffd05000
15 #define LASI_SCSI_HPA 0xffd06000
16 #define LASI_LAN_HPA 0xffd07000
17 #define LASI_LPT_HPA 0xffd02000
18 #define LASI_AUDIO_HPA 0xffd04000
19 #define LASI_PS2KBD_HPA 0xffd08000
20 #define LASI_PS2MOU_HPA 0xffd08100
21 #define LASI_GFX_HPA 0xf8000000
22 #define CPU_HPA 0xfff10000
23 #define MEMORY_HPA 0xfffbf000
25 #define PCI_HPA DINO_HPA /* PCI bus */
26 #define IDE_HPA 0xf9000000 /* Boot disc controller */
28 /* offsets to DINO HPA: */
29 #define DINO_PCI_ADDR 0x064
30 #define DINO_CONFIG_DATA 0x068
31 #define DINO_IO_DATA 0x06c
33 #define PORT_PCI_CMD (PCI_HPA + DINO_PCI_ADDR)
34 #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA)
36 #define PORT_SERIAL1 (DINO_UART_HPA + 0x800)
37 #define PORT_SERIAL2 (LASI_UART_HPA + 0x800)
39 #define HPPA_MAX_CPUS 32 /* max. number of SMP CPUs */
40 #define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */