disas.c

   1 /* General "disassemble this chunk" code.  Used for debugging. */
   2 #include "config.h"
   3 #include "disas/bfd.h"
   4 #include "elf.h"
   5 #include <errno.h>
   6
   7 #include "cpu.h"
   8 #include "disas/disas.h"
   9
  10 typedef struct CPUDebug {
  11     struct disassemble_info info;
  12     CPUState *cpu;
  13 } CPUDebug;
  14
  15 /* Filled in by elfload.c.  Simplistic, but will do for now. */
  16 struct syminfo *syminfos = NULL;
  17
  18 /* Get LENGTH bytes from info's buffer, at target address memaddr.
  19    Transfer them to myaddr.  */
  20 int
  21 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
  22                    struct disassemble_info *info)
  23 {
  24     if (memaddr < info->buffer_vma
  25         || memaddr + length > info->buffer_vma + info->buffer_length)
  26         /* Out of bounds.  Use EIO because GDB uses it.  */
  27         return EIO;
  28     memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
  29     return 0;
  30 }
  31
  32 /* Get LENGTH bytes from info's buffer, at target address memaddr.
  33    Transfer them to myaddr.  */
  34 static int
  35 target_read_memory (bfd_vma memaddr,
  36                     bfd_byte *myaddr,
  37                     int length,
  38                     struct disassemble_info *info)
  39 {
  40     CPUDebug *s = container_of(info, CPUDebug, info);
  41
  42     cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
  43     return 0;
  44 }
  45
  46 /* Print an error message.  We can assume that this is in response to
  47    an error return from buffer_read_memory.  */
  48 void
  49 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
  50 {
  51   if (status != EIO)
  52     /* Can't happen.  */
  53     (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  54   else
  55     /* Actually, address between memaddr and memaddr + len was
  56        out of bounds.  */
  57     (*info->fprintf_func) (info->stream,
  58                            "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
  59 }
  60
  61 /* This could be in a separate file, to save minuscule amounts of space
  62    in statically linked executables.  */
  63
  64 /* Just print the address is hex.  This is included for completeness even
  65    though both GDB and objdump provide their own (to print symbolic
  66    addresses).  */
  67
  68 void
  69 generic_print_address (bfd_vma addr, struct disassemble_info *info)
  70 {
  71     (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
  72 }
  73
  74 /* Print address in hex, truncated to the width of a target virtual address. */
  75 static void
  76 generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
  77 {
  78     uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
  79     generic_print_address(addr & mask, info);
  80 }
  81
  82 /* Print address in hex, truncated to the width of a host virtual address. */
  83 static void
  84 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
  85 {
  86     uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
  87     generic_print_address(addr & mask, info);
  88 }
  89
  90 /* Just return the given address.  */
  91
  92 int
  93 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
  94 {
  95   return 1;
  96 }
  97
  98 bfd_vma bfd_getl64 (const bfd_byte *addr)
  99 {
 100   unsigned long long v;
 101
 102   v = (unsigned long long) addr[0];
 103   v |= (unsigned long long) addr[1] << 8;
 104   v |= (unsigned long long) addr[2] << 16;
 105   v |= (unsigned long long) addr[3] << 24;
 106   v |= (unsigned long long) addr[4] << 32;
 107   v |= (unsigned long long) addr[5] << 40;
 108   v |= (unsigned long long) addr[6] << 48;
 109   v |= (unsigned long long) addr[7] << 56;
 110   return (bfd_vma) v;
 111 }
 112
 113 bfd_vma bfd_getl32 (const bfd_byte *addr)
 114 {
 115   unsigned long v;
 116
 117   v = (unsigned long) addr[0];
 118   v |= (unsigned long) addr[1] << 8;
 119   v |= (unsigned long) addr[2] << 16;
 120   v |= (unsigned long) addr[3] << 24;
 121   return (bfd_vma) v;
 122 }
 123
 124 bfd_vma bfd_getb32 (const bfd_byte *addr)
 125 {
 126   unsigned long v;
 127
 128   v = (unsigned long) addr[0] << 24;
 129   v |= (unsigned long) addr[1] << 16;
 130   v |= (unsigned long) addr[2] << 8;
 131   v |= (unsigned long) addr[3];
 132   return (bfd_vma) v;
 133 }
 134
 135 bfd_vma bfd_getl16 (const bfd_byte *addr)
 136 {
 137   unsigned long v;
 138
 139   v = (unsigned long) addr[0];
 140   v |= (unsigned long) addr[1] << 8;
 141   return (bfd_vma) v;
 142 }
 143
 144 bfd_vma bfd_getb16 (const bfd_byte *addr)
 145 {
 146   unsigned long v;
 147
 148   v = (unsigned long) addr[0] << 24;
 149   v |= (unsigned long) addr[1] << 16;
 150   return (bfd_vma) v;
 151 }
 152
 153 #ifdef TARGET_ARM
 154 static int
 155 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
 156 {
 157   return print_insn_arm(pc | 1, info);
 158 }
 159 #endif
 160
 161 static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
 162                               const char *prefix)
 163 {
 164     int i, n = info->buffer_length;
 165     uint8_t *buf = g_malloc(n);
 166
 167     info->read_memory_func(pc, buf, n, info);
 168
 169     for (i = 0; i < n; ++i) {
 170         if (i % 32 == 0) {
 171             info->fprintf_func(info->stream, "\n%s: ", prefix);
 172         }
 173         info->fprintf_func(info->stream, "%02x", buf[i]);
 174     }
 175
 176     g_free(buf);
 177     return n;
 178 }
 179
 180 static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
 181 {
 182     return print_insn_objdump(pc, info, "OBJD-H");
 183 }
 184
 185 static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
 186 {
 187     return print_insn_objdump(pc, info, "OBJD-T");
 188 }
 189
 190 /* Disassemble this for me please... (debugging). 'flags' has the following
 191    values:
 192     i386 - 1 means 16 bit code, 2 means 64 bit code
 193     arm  - bit 0 = thumb, bit 1 = reverse endian, bit 2 = A64
 194     ppc  - bits 0:15 specify (optionally) the machine instruction set;
 195            bit 16 indicates little endian.
 196     other targets - unused
 197  */
 198 void target_disas(FILE *out, CPUState *cpu, target_ulong code,
 199                   target_ulong size, int flags)
 200 {
 201     target_ulong pc;
 202     int count;
 203     CPUDebug s;
 204     int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
 205
 206     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 207
 208     s.cpu = cpu;
 209     s.info.read_memory_func = target_read_memory;
 210     s.info.buffer_vma = code;
 211     s.info.buffer_length = size;
 212     s.info.print_address_func = generic_print_target_address;
 213
 214 #ifdef TARGET_WORDS_BIGENDIAN
 215     s.info.endian = BFD_ENDIAN_BIG;
 216 #else
 217     s.info.endian = BFD_ENDIAN_LITTLE;
 218 #endif
 219 #if defined(TARGET_I386)
 220     if (flags == 2) {
 221         s.info.mach = bfd_mach_x86_64;
 222     } else if (flags == 1) {
 223         s.info.mach = bfd_mach_i386_i8086;
 224     } else {
 225         s.info.mach = bfd_mach_i386_i386;
 226     }
 227     print_insn = print_insn_i386;
 228 #elif defined(TARGET_ARM)
 229     if (flags & 4) {
 230         /* We might not be compiled with the A64 disassembler
 231          * because it needs a C++ compiler; in that case we will
 232          * fall through to the default print_insn_od case.
 233          */
 234 #if defined(CONFIG_ARM_A64_DIS)
 235         print_insn = print_insn_arm_a64;
 236 #endif
 237     } else if (flags & 1) {
 238         print_insn = print_insn_thumb1;
 239     } else {
 240         print_insn = print_insn_arm;
 241     }
 242     if (flags & 2) {
 243 #ifdef TARGET_WORDS_BIGENDIAN
 244         s.info.endian = BFD_ENDIAN_LITTLE;
 245 #else
 246         s.info.endian = BFD_ENDIAN_BIG;
 247 #endif
 248     }
 249 #elif defined(TARGET_SPARC)
 250     print_insn = print_insn_sparc;
 251 #ifdef TARGET_SPARC64
 252     s.info.mach = bfd_mach_sparc_v9b;
 253 #endif
 254 #elif defined(TARGET_PPC)
 255     if ((flags >> 16) & 1) {
 256         s.info.endian = BFD_ENDIAN_LITTLE;
 257     }
 258     if (flags & 0xFFFF) {
 259         /* If we have a precise definition of the instruction set, use it. */
 260         s.info.mach = flags & 0xFFFF;
 261     } else {
 262 #ifdef TARGET_PPC64
 263         s.info.mach = bfd_mach_ppc64;
 264 #else
 265         s.info.mach = bfd_mach_ppc;
 266 #endif
 267     }
 268     s.info.disassembler_options = (char *)"any";
 269     print_insn = print_insn_ppc;
 270 #elif defined(TARGET_M68K)
 271     print_insn = print_insn_m68k;
 272 #elif defined(TARGET_MIPS)
 273 #ifdef TARGET_WORDS_BIGENDIAN
 274     print_insn = print_insn_big_mips;
 275 #else
 276     print_insn = print_insn_little_mips;
 277 #endif
 278 #elif defined(TARGET_SH4)
 279     s.info.mach = bfd_mach_sh4;
 280     print_insn = print_insn_sh;
 281 #elif defined(TARGET_ALPHA)
 282     s.info.mach = bfd_mach_alpha_ev6;
 283     print_insn = print_insn_alpha;
 284 #elif defined(TARGET_CRIS)
 285     if (flags != 32) {
 286         s.info.mach = bfd_mach_cris_v0_v10;
 287         print_insn = print_insn_crisv10;
 288     } else {
 289         s.info.mach = bfd_mach_cris_v32;
 290         print_insn = print_insn_crisv32;
 291     }
 292 #elif defined(TARGET_S390X)
 293     s.info.mach = bfd_mach_s390_64;
 294     print_insn = print_insn_s390;
 295 #elif defined(TARGET_MICROBLAZE)
 296     s.info.mach = bfd_arch_microblaze;
 297     print_insn = print_insn_microblaze;
 298 #elif defined(TARGET_MOXIE)
 299     s.info.mach = bfd_arch_moxie;
 300     print_insn = print_insn_moxie;
 301 #elif defined(TARGET_LM32)
 302     s.info.mach = bfd_mach_lm32;
 303     print_insn = print_insn_lm32;
 304 #endif
 305     if (print_insn == NULL) {
 306         print_insn = print_insn_od_target;
 307     }
 308
 309     for (pc = code; size > 0; pc += count, size -= count) {
 310         fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
 311         count = print_insn(pc, &s.info);
 312 #if 0
 313         {
 314             int i;
 315             uint8_t b;
 316             fprintf(out, " {");
 317             for(i = 0; i < count; i++) {
 318                 target_read_memory(pc + i, &b, 1, &s.info);
 319                 fprintf(out, " %02x", b);
 320             }
 321             fprintf(out, " }");
 322         }
 323 #endif
 324         fprintf(out, "\n");
 325         if (count < 0)
 326             break;
 327         if (size < count) {
 328             fprintf(out,
 329                     "Disassembler disagrees with translator over instruction "
 330                     "decoding\n"
 331                     "Please report this to qemu-devel@nongnu.org\n");
 332             break;
 333         }
 334     }
 335 }
 336
 337 /* Disassemble this for me please... (debugging). */
 338 void disas(FILE *out, void *code, unsigned long size)
 339 {
 340     uintptr_t pc;
 341     int count;
 342     CPUDebug s;
 343     int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
 344
 345     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 346     s.info.print_address_func = generic_print_host_address;
 347
 348     s.info.buffer = code;
 349     s.info.buffer_vma = (uintptr_t)code;
 350     s.info.buffer_length = size;
 351
 352 #ifdef HOST_WORDS_BIGENDIAN
 353     s.info.endian = BFD_ENDIAN_BIG;
 354 #else
 355     s.info.endian = BFD_ENDIAN_LITTLE;
 356 #endif
 357 #if defined(CONFIG_TCG_INTERPRETER)
 358     print_insn = print_insn_tci;
 359 #elif defined(__i386__)
 360     s.info.mach = bfd_mach_i386_i386;
 361     print_insn = print_insn_i386;
 362 #elif defined(__x86_64__)
 363     s.info.mach = bfd_mach_x86_64;
 364     print_insn = print_insn_i386;
 365 #elif defined(_ARCH_PPC)
 366     s.info.disassembler_options = (char *)"any";
 367     print_insn = print_insn_ppc;
 368 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
 369     print_insn = print_insn_arm_a64;
 370 #elif defined(__alpha__)
 371     print_insn = print_insn_alpha;
 372 #elif defined(__sparc__)
 373     print_insn = print_insn_sparc;
 374     s.info.mach = bfd_mach_sparc_v9b;
 375 #elif defined(__arm__)
 376     print_insn = print_insn_arm;
 377 #elif defined(__MIPSEB__)
 378     print_insn = print_insn_big_mips;
 379 #elif defined(__MIPSEL__)
 380     print_insn = print_insn_little_mips;
 381 #elif defined(__m68k__)
 382     print_insn = print_insn_m68k;
 383 #elif defined(__s390__)
 384     print_insn = print_insn_s390;
 385 #elif defined(__hppa__)
 386     print_insn = print_insn_hppa;
 387 #elif defined(__ia64__)
 388     print_insn = print_insn_ia64;
 389 #endif
 390     if (print_insn == NULL) {
 391         print_insn = print_insn_od_host;
 392     }
 393     for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
 394         fprintf(out, "0x%08" PRIxPTR ":  ", pc);
 395         count = print_insn(pc, &s.info);
 396         fprintf(out, "\n");
 397         if (count < 0)
 398             break;
 399     }
 400 }
 401
 402 /* Look up symbol for debugging purpose.  Returns "" if unknown. */
 403 const char *lookup_symbol(target_ulong orig_addr)
 404 {
 405     const char *symbol = "";
 406     struct syminfo *s;
 407
 408     for (s = syminfos; s; s = s->next) {
 409         symbol = s->lookup_symbol(s, orig_addr);
 410         if (symbol[0] != '\0') {
 411             break;
 412         }
 413     }
 414
 415     return symbol;
 416 }
 417
 418 #if !defined(CONFIG_USER_ONLY)
 419
 420 #include "monitor/monitor.h"
 421
 422 static int monitor_disas_is_physical;
 423
 424 static int
 425 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
 426                      struct disassemble_info *info)
 427 {
 428     CPUDebug *s = container_of(info, CPUDebug, info);
 429
 430     if (monitor_disas_is_physical) {
 431         cpu_physical_memory_read(memaddr, myaddr, length);
 432     } else {
 433         cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
 434     }
 435     return 0;
 436 }
 437
 438 static int GCC_FMT_ATTR(2, 3)
 439 monitor_fprintf(FILE *stream, const char *fmt, ...)
 440 {
 441     va_list ap;
 442     va_start(ap, fmt);
 443     monitor_vprintf((Monitor *)stream, fmt, ap);
 444     va_end(ap);
 445     return 0;
 446 }
 447
 448 /* Disassembler for the monitor.
 449    See target_disas for a description of flags. */
 450 void monitor_disas(Monitor *mon, CPUState *cpu,
 451                    target_ulong pc, int nb_insn, int is_physical, int flags)
 452 {
 453     int count, i;
 454     CPUDebug s;
 455     int (*print_insn)(bfd_vma pc, disassemble_info *info);
 456
 457     INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
 458
 459     s.cpu = cpu;
 460     monitor_disas_is_physical = is_physical;
 461     s.info.read_memory_func = monitor_read_memory;
 462     s.info.print_address_func = generic_print_target_address;
 463
 464     s.info.buffer_vma = pc;
 465
 466 #ifdef TARGET_WORDS_BIGENDIAN
 467     s.info.endian = BFD_ENDIAN_BIG;
 468 #else
 469     s.info.endian = BFD_ENDIAN_LITTLE;
 470 #endif
 471 #if defined(TARGET_I386)
 472     if (flags == 2) {
 473         s.info.mach = bfd_mach_x86_64;
 474     } else if (flags == 1) {
 475         s.info.mach = bfd_mach_i386_i8086;
 476     } else {
 477         s.info.mach = bfd_mach_i386_i386;
 478     }
 479     print_insn = print_insn_i386;
 480 #elif defined(TARGET_ARM)
 481     print_insn = print_insn_arm;
 482 #elif defined(TARGET_ALPHA)
 483     print_insn = print_insn_alpha;
 484 #elif defined(TARGET_SPARC)
 485     print_insn = print_insn_sparc;
 486 #ifdef TARGET_SPARC64
 487     s.info.mach = bfd_mach_sparc_v9b;
 488 #endif
 489 #elif defined(TARGET_PPC)
 490     if (flags & 0xFFFF) {
 491         /* If we have a precise definition of the instruction set, use it. */
 492         s.info.mach = flags & 0xFFFF;
 493     } else {
 494 #ifdef TARGET_PPC64
 495         s.info.mach = bfd_mach_ppc64;
 496 #else
 497         s.info.mach = bfd_mach_ppc;
 498 #endif
 499     }
 500     if ((flags >> 16) & 1) {
 501         s.info.endian = BFD_ENDIAN_LITTLE;
 502     }
 503     print_insn = print_insn_ppc;
 504 #elif defined(TARGET_M68K)
 505     print_insn = print_insn_m68k;
 506 #elif defined(TARGET_MIPS)
 507 #ifdef TARGET_WORDS_BIGENDIAN
 508     print_insn = print_insn_big_mips;
 509 #else
 510     print_insn = print_insn_little_mips;
 511 #endif
 512 #elif defined(TARGET_SH4)
 513     s.info.mach = bfd_mach_sh4;
 514     print_insn = print_insn_sh;
 515 #elif defined(TARGET_S390X)
 516     s.info.mach = bfd_mach_s390_64;
 517     print_insn = print_insn_s390;
 518 #elif defined(TARGET_MOXIE)
 519     s.info.mach = bfd_arch_moxie;
 520     print_insn = print_insn_moxie;
 521 #elif defined(TARGET_LM32)
 522     s.info.mach = bfd_mach_lm32;
 523     print_insn = print_insn_lm32;
 524 #else
 525     monitor_printf(mon, "0x" TARGET_FMT_lx
 526                    ": Asm output not supported on this arch\n", pc);
 527     return;
 528 #endif
 529
 530     for(i = 0; i < nb_insn; i++) {
 531         monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
 532         count = print_insn(pc, &s.info);
 533         monitor_printf(mon, "\n");
 534         if (count < 0)
 535             break;
 536         pc += count;
 537     }
 538 }
 539 #endif