hw/syborg_timer.c

   1 /*
   2  * Syborg Interval Timer.
   3  *
   4  * Copyright (c) 2008 CodeSourcery
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "sysbus.h"
  26 #include "qemu-timer.h"
  27 #include "syborg.h"
  28
  29 //#define DEBUG_SYBORG_TIMER
  30
  31 #ifdef DEBUG_SYBORG_TIMER
  32 #define DPRINTF(fmt, ...) \
  33 do { printf("syborg_timer: " fmt , ##args); } while (0)
  34 #define BADF(fmt, ...) \
  35 do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__); \
  36     exit(1);} while (0)
  37 #else
  38 #define DPRINTF(fmt, ...) do {} while(0)
  39 #define BADF(fmt, ...) \
  40 do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__);} while (0)
  41 #endif
  42
  43 enum {
  44     TIMER_ID          = 0,
  45     TIMER_RUNNING     = 1,
  46     TIMER_ONESHOT     = 2,
  47     TIMER_LIMIT       = 3,
  48     TIMER_VALUE       = 4,
  49     TIMER_INT_ENABLE  = 5,
  50     TIMER_INT_STATUS  = 6,
  51     TIMER_FREQ        = 7
  52 };
  53
  54 typedef struct {
  55     SysBusDevice busdev;
  56     MemoryRegion iomem;
  57     ptimer_state *timer;
  58     int running;
  59     int oneshot;
  60     uint32_t limit;
  61     uint32_t freq;
  62     uint32_t int_level;
  63     uint32_t int_enabled;
  64     qemu_irq irq;
  65 } SyborgTimerState;
  66
  67 static void syborg_timer_update(SyborgTimerState *s)
  68 {
  69     /* Update interrupt.  */
  70     if (s->int_level && s->int_enabled) {
  71         qemu_irq_raise(s->irq);
  72     } else {
  73         qemu_irq_lower(s->irq);
  74     }
  75 }
  76
  77 static void syborg_timer_tick(void *opaque)
  78 {
  79     SyborgTimerState *s = (SyborgTimerState *)opaque;
  80     //DPRINTF("Timer Tick\n");
  81     s->int_level = 1;
  82     if (s->oneshot)
  83         s->running = 0;
  84     syborg_timer_update(s);
  85 }
  86
  87 static uint64_t syborg_timer_read(void *opaque, target_phys_addr_t offset,
  88                                   unsigned size)
  89 {
  90     SyborgTimerState *s = (SyborgTimerState *)opaque;
  91
  92     DPRINTF("Reg read %d\n", (int)offset);
  93     offset &= 0xfff;
  94     switch (offset >> 2) {
  95     case TIMER_ID:
  96         return SYBORG_ID_TIMER;
  97     case TIMER_RUNNING:
  98         return s->running;
  99     case TIMER_ONESHOT:
 100         return s->oneshot;
 101     case TIMER_LIMIT:
 102         return s->limit;
 103     case TIMER_VALUE:
 104         return ptimer_get_count(s->timer);
 105     case TIMER_INT_ENABLE:
 106         return s->int_enabled;
 107     case TIMER_INT_STATUS:
 108         return s->int_level;
 109     case TIMER_FREQ:
 110         return s->freq;
 111     default:
 112         cpu_abort(cpu_single_env, "syborg_timer_read: Bad offset %x\n",
 113                   (int)offset);
 114         return 0;
 115     }
 116 }
 117
 118 static void syborg_timer_write(void *opaque, target_phys_addr_t offset,
 119                                uint64_t value, unsigned size)
 120 {
 121     SyborgTimerState *s = (SyborgTimerState *)opaque;
 122
 123     DPRINTF("Reg write %d\n", (int)offset);
 124     offset &= 0xfff;
 125     switch (offset >> 2) {
 126     case TIMER_RUNNING:
 127         if (value == s->running)
 128             break;
 129         s->running = value;
 130         if (value) {
 131             ptimer_run(s->timer, s->oneshot);
 132         } else {
 133             ptimer_stop(s->timer);
 134         }
 135         break;
 136     case TIMER_ONESHOT:
 137         if (s->running) {
 138             ptimer_stop(s->timer);
 139         }
 140         s->oneshot = value;
 141         if (s->running) {
 142             ptimer_run(s->timer, s->oneshot);
 143         }
 144         break;
 145     case TIMER_LIMIT:
 146         s->limit = value;
 147         ptimer_set_limit(s->timer, value, 1);
 148         break;
 149     case TIMER_VALUE:
 150         ptimer_set_count(s->timer, value);
 151         break;
 152     case TIMER_INT_ENABLE:
 153         s->int_enabled = value;
 154         syborg_timer_update(s);
 155         break;
 156     case TIMER_INT_STATUS:
 157         s->int_level &= ~value;
 158         syborg_timer_update(s);
 159         break;
 160     default:
 161         cpu_abort(cpu_single_env, "syborg_timer_write: Bad offset %x\n",
 162                   (int)offset);
 163         break;
 164     }
 165 }
 166
 167 static const MemoryRegionOps syborg_timer_ops = {
 168     .read = syborg_timer_read,
 169     .write = syborg_timer_write,
 170     .endianness = DEVICE_NATIVE_ENDIAN,
 171 };
 172
 173 static const VMStateDescription vmstate_syborg_timer = {
 174     .name = "syborg_timer",
 175     .version_id = 1,
 176     .minimum_version_id = 1,
 177     .minimum_version_id_old = 1,
 178     .fields      = (VMStateField[]) {
 179         VMSTATE_INT32(running, SyborgTimerState),
 180         VMSTATE_INT32(oneshot, SyborgTimerState),
 181         VMSTATE_UINT32(limit, SyborgTimerState),
 182         VMSTATE_UINT32(int_level, SyborgTimerState),
 183         VMSTATE_UINT32(int_enabled, SyborgTimerState),
 184         VMSTATE_PTIMER(timer, SyborgTimerState),
 185         VMSTATE_END_OF_LIST()
 186     }
 187 };
 188
 189 static int syborg_timer_init(SysBusDevice *dev)
 190 {
 191     SyborgTimerState *s = FROM_SYSBUS(SyborgTimerState, dev);
 192     QEMUBH *bh;
 193
 194     if (s->freq == 0) {
 195         fprintf(stderr, "syborg_timer: Zero/unset frequency\n");
 196         exit(1);
 197     }
 198     sysbus_init_irq(dev, &s->irq);
 199     memory_region_init_io(&s->iomem, &syborg_timer_ops, s, "timer", 0x1000);
 200     sysbus_init_mmio(dev, &s->iomem);
 201
 202     bh = qemu_bh_new(syborg_timer_tick, s);
 203     s->timer = ptimer_init(bh);
 204     ptimer_set_freq(s->timer, s->freq);
 205     vmstate_register(&dev->qdev, -1, &vmstate_syborg_timer, s);
 206     return 0;
 207 }
 208
 209 static SysBusDeviceInfo syborg_timer_info = {
 210     .init = syborg_timer_init,
 211     .qdev.name  = "syborg,timer",
 212     .qdev.size  = sizeof(SyborgTimerState),
 213     .qdev.props = (Property[]) {
 214         DEFINE_PROP_UINT32("frequency",SyborgTimerState, freq, 0),
 215         DEFINE_PROP_END_OF_LIST(),
 216     }
 217 };
 218
 219 static void syborg_timer_register_devices(void)
 220 {
 221     sysbus_register_withprop(&syborg_timer_info);
 222 }
 223
 224 device_init(syborg_timer_register_devices)