Merge branch 'master' of git://git.qemu.org/qemu
[qemu.git] / hw / bitbang_i2c.c
blob18df411ebc0b77e39af9628bbe0dfae6a24e2729
1 /*
2 * Bit-Bang i2c emulation extracted from
3 * Marvell MV88W8618 / Freecom MusicPal emulation.
5 * Copyright (c) 2008 Jan Kiszka
7 * This code is licensed under the GNU GPL v2.
8 */
9 #include "hw.h"
10 #include "bitbang_i2c.h"
11 #include "sysbus.h"
13 //#define DEBUG_BITBANG_I2C
15 #ifdef DEBUG_BITBANG_I2C
16 #define DPRINTF(fmt, ...) \
17 do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0)
18 #else
19 #define DPRINTF(fmt, ...) do {} while(0)
20 #endif
22 typedef enum bitbang_i2c_state {
23 STOPPED = 0,
24 SENDING_BIT7,
25 SENDING_BIT6,
26 SENDING_BIT5,
27 SENDING_BIT4,
28 SENDING_BIT3,
29 SENDING_BIT2,
30 SENDING_BIT1,
31 SENDING_BIT0,
32 WAITING_FOR_ACK,
33 RECEIVING_BIT7,
34 RECEIVING_BIT6,
35 RECEIVING_BIT5,
36 RECEIVING_BIT4,
37 RECEIVING_BIT3,
38 RECEIVING_BIT2,
39 RECEIVING_BIT1,
40 RECEIVING_BIT0,
41 SENDING_ACK,
42 SENT_NACK
43 } bitbang_i2c_state;
45 struct bitbang_i2c_interface {
46 i2c_bus *bus;
47 bitbang_i2c_state state;
48 int last_data;
49 int last_clock;
50 int device_out;
51 uint8_t buffer;
52 int current_addr;
55 static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c)
57 DPRINTF("STOP\n");
58 if (i2c->current_addr >= 0)
59 i2c_end_transfer(i2c->bus);
60 i2c->current_addr = -1;
61 i2c->state = STOPPED;
64 /* Set device data pin. */
65 static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level)
67 i2c->device_out = level;
68 //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out);
69 return level & i2c->last_data;
72 /* Leave device data pin unodified. */
73 static int bitbang_i2c_nop(bitbang_i2c_interface *i2c)
75 return bitbang_i2c_ret(i2c, i2c->device_out);
78 /* Returns data line level. */
79 int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
81 int data;
83 if (level != 0 && level != 1) {
84 abort();
87 if (line == BITBANG_I2C_SDA) {
88 if (level == i2c->last_data) {
89 return bitbang_i2c_nop(i2c);
91 i2c->last_data = level;
92 if (i2c->last_clock == 0) {
93 return bitbang_i2c_nop(i2c);
95 if (level == 0) {
96 DPRINTF("START\n");
97 /* START condition. */
98 i2c->state = SENDING_BIT7;
99 i2c->current_addr = -1;
100 } else {
101 /* STOP condition. */
102 bitbang_i2c_enter_stop(i2c);
104 return bitbang_i2c_ret(i2c, 1);
107 data = i2c->last_data;
108 if (i2c->last_clock == level) {
109 return bitbang_i2c_nop(i2c);
111 i2c->last_clock = level;
112 if (level == 0) {
113 /* State is set/read at the start of the clock pulse.
114 release the data line at the end. */
115 return bitbang_i2c_ret(i2c, 1);
117 switch (i2c->state) {
118 case STOPPED:
119 case SENT_NACK:
120 return bitbang_i2c_ret(i2c, 1);
122 case SENDING_BIT7 ... SENDING_BIT0:
123 i2c->buffer = (i2c->buffer << 1) | data;
124 /* will end up in WAITING_FOR_ACK */
125 i2c->state++;
126 return bitbang_i2c_ret(i2c, 1);
128 case WAITING_FOR_ACK:
129 if (i2c->current_addr < 0) {
130 i2c->current_addr = i2c->buffer;
131 DPRINTF("Address 0x%02x\n", i2c->current_addr);
132 i2c_start_transfer(i2c->bus, i2c->current_addr >> 1,
133 i2c->current_addr & 1);
134 } else {
135 DPRINTF("Sent 0x%02x\n", i2c->buffer);
136 i2c_send(i2c->bus, i2c->buffer);
138 if (i2c->current_addr & 1) {
139 i2c->state = RECEIVING_BIT7;
140 } else {
141 i2c->state = SENDING_BIT7;
143 return bitbang_i2c_ret(i2c, 0);
145 case RECEIVING_BIT7:
146 i2c->buffer = i2c_recv(i2c->bus);
147 DPRINTF("RX byte 0x%02x\n", i2c->buffer);
148 /* Fall through... */
149 case RECEIVING_BIT6 ... RECEIVING_BIT0:
150 data = i2c->buffer >> 7;
151 /* will end up in SENDING_ACK */
152 i2c->state++;
153 i2c->buffer <<= 1;
154 return bitbang_i2c_ret(i2c, data);
156 case SENDING_ACK:
157 i2c->state = RECEIVING_BIT7;
158 if (data != 0) {
159 DPRINTF("NACKED\n");
160 i2c->state = SENT_NACK;
161 i2c_nack(i2c->bus);
162 } else {
163 DPRINTF("ACKED\n");
165 return bitbang_i2c_ret(i2c, 1);
167 abort();
170 bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus)
172 bitbang_i2c_interface *s;
174 s = g_malloc0(sizeof(bitbang_i2c_interface));
176 s->bus = bus;
177 s->last_data = 1;
178 s->last_clock = 1;
179 s->device_out = 1;
181 return s;
184 /* GPIO interface. */
185 typedef struct {
186 SysBusDevice busdev;
187 MemoryRegion dummy_iomem;
188 bitbang_i2c_interface *bitbang;
189 int last_level;
190 qemu_irq out;
191 } GPIOI2CState;
193 static void bitbang_i2c_gpio_set(void *opaque, int irq, int level)
195 GPIOI2CState *s = opaque;
197 level = bitbang_i2c_set(s->bitbang, irq, level);
198 if (level != s->last_level) {
199 s->last_level = level;
200 qemu_set_irq(s->out, level);
204 static int gpio_i2c_init(SysBusDevice *dev)
206 GPIOI2CState *s = FROM_SYSBUS(GPIOI2CState, dev);
207 i2c_bus *bus;
209 memory_region_init(&s->dummy_iomem, "gpio_i2c", 0);
210 sysbus_init_mmio(dev, &s->dummy_iomem);
212 bus = i2c_init_bus(&dev->qdev, "i2c");
213 s->bitbang = bitbang_i2c_init(bus);
215 qdev_init_gpio_in(&dev->qdev, bitbang_i2c_gpio_set, 2);
216 qdev_init_gpio_out(&dev->qdev, &s->out, 1);
218 return 0;
221 static SysBusDeviceInfo gpio_i2c_info = {
222 .init = gpio_i2c_init,
223 .qdev.name = "gpio_i2c",
224 .qdev.desc = "Virtual GPIO to I2C bridge",
225 .qdev.size = sizeof(GPIOI2CState),
228 static void bitbang_i2c_register(void)
230 sysbus_register_withprop(&gpio_i2c_info);
233 device_init(bitbang_i2c_register)