target-xtensa/cpu.c

   1 /*
   2  * QEMU Xtensa CPU
   3  *
   4  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   5  * Copyright (c) 2012 SUSE LINUX Products GmbH
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in the
  14  *       documentation and/or other materials provided with the distribution.
  15  *     * Neither the name of the Open Source and Linux Lab nor the
  16  *       names of its contributors may be used to endorse or promote products
  17  *       derived from this software without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  23  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  26  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #include "cpu.h"
  32 #include "qemu-common.h"
  33 #include "migration/vmstate.h"
  34
  35
  36 static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
  37 {
  38     XtensaCPU *cpu = XTENSA_CPU(cs);
  39
  40     cpu->env.pc = value;
  41 }
  42
  43 static bool xtensa_cpu_has_work(CPUState *cs)
  44 {
  45     XtensaCPU *cpu = XTENSA_CPU(cs);
  46
  47     return cpu->env.pending_irq_level;
  48 }
  49
  50 /* CPUClass::reset() */
  51 static void xtensa_cpu_reset(CPUState *s)
  52 {
  53     XtensaCPU *cpu = XTENSA_CPU(s);
  54     XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(cpu);
  55     CPUXtensaState *env = &cpu->env;
  56
  57     xcc->parent_reset(s);
  58
  59     env->exception_taken = 0;
  60     env->pc = env->config->exception_vector[EXC_RESET];
  61     env->sregs[LITBASE] &= ~1;
  62     env->sregs[PS] = xtensa_option_enabled(env->config,
  63             XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
  64     env->sregs[VECBASE] = env->config->vecbase;
  65     env->sregs[IBREAKENABLE] = 0;
  66     env->sregs[CACHEATTR] = 0x22222222;
  67     env->sregs[ATOMCTL] = xtensa_option_enabled(env->config,
  68             XTENSA_OPTION_ATOMCTL) ? 0x28 : 0x15;
  69     env->sregs[CONFIGID0] = env->config->configid[0];
  70     env->sregs[CONFIGID1] = env->config->configid[1];
  71
  72     env->pending_irq_level = 0;
  73     reset_mmu(env);
  74 }
  75
  76 static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
  77 {
  78     ObjectClass *oc;
  79     char *typename;
  80
  81     if (cpu_model == NULL) {
  82         return NULL;
  83     }
  84
  85     typename = g_strdup_printf("%s-" TYPE_XTENSA_CPU, cpu_model);
  86     oc = object_class_by_name(typename);
  87     g_free(typename);
  88     if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
  89         object_class_is_abstract(oc)) {
  90         return NULL;
  91     }
  92     return oc;
  93 }
  94
  95 static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
  96 {
  97     CPUState *cs = CPU(dev);
  98     XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
  99
 100     cs->gdb_num_regs = xcc->config->gdb_regmap.num_regs;
 101
 102     qemu_init_vcpu(cs);
 103
 104     xcc->parent_realize(dev, errp);
 105 }
 106
 107 static void xtensa_cpu_initfn(Object *obj)
 108 {
 109     CPUState *cs = CPU(obj);
 110     XtensaCPU *cpu = XTENSA_CPU(obj);
 111     XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(obj);
 112     CPUXtensaState *env = &cpu->env;
 113     static bool tcg_inited;
 114
 115     cs->env_ptr = env;
 116     env->config = xcc->config;
 117     cpu_exec_init(env);
 118
 119     if (tcg_enabled() && !tcg_inited) {
 120         tcg_inited = true;
 121         xtensa_translate_init();
 122         cpu_set_debug_excp_handler(xtensa_breakpoint_handler);
 123     }
 124 }
 125
 126 static const VMStateDescription vmstate_xtensa_cpu = {
 127     .name = "cpu",
 128     .unmigratable = 1,
 129 };
 130
 131 static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
 132 {
 133     DeviceClass *dc = DEVICE_CLASS(oc);
 134     CPUClass *cc = CPU_CLASS(oc);
 135     XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc);
 136
 137     xcc->parent_realize = dc->realize;
 138     dc->realize = xtensa_cpu_realizefn;
 139
 140     xcc->parent_reset = cc->reset;
 141     cc->reset = xtensa_cpu_reset;
 142
 143     cc->class_by_name = xtensa_cpu_class_by_name;
 144     cc->has_work = xtensa_cpu_has_work;
 145     cc->do_interrupt = xtensa_cpu_do_interrupt;
 146     cc->dump_state = xtensa_cpu_dump_state;
 147     cc->set_pc = xtensa_cpu_set_pc;
 148     cc->gdb_read_register = xtensa_cpu_gdb_read_register;
 149     cc->gdb_write_register = xtensa_cpu_gdb_write_register;
 150 #ifndef CONFIG_USER_ONLY
 151     cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug;
 152 #endif
 153     dc->vmsd = &vmstate_xtensa_cpu;
 154 }
 155
 156 static const TypeInfo xtensa_cpu_type_info = {
 157     .name = TYPE_XTENSA_CPU,
 158     .parent = TYPE_CPU,
 159     .instance_size = sizeof(XtensaCPU),
 160     .instance_init = xtensa_cpu_initfn,
 161     .abstract = true,
 162     .class_size = sizeof(XtensaCPUClass),
 163     .class_init = xtensa_cpu_class_init,
 164 };
 165
 166 static void xtensa_cpu_register_types(void)
 167 {
 168     type_register_static(&xtensa_cpu_type_info);
 169 }
 170
 171 type_init(xtensa_cpu_register_types)