include/exec/softmmu_exec.h

   1 /*
   2  *  Software MMU support
   3  *
   4  * Generate inline load/store functions for all MMU modes (typically
   5  * at least _user and _kernel) as well as _data versions, for all data
   6  * sizes.
   7  *
   8  * Used by target op helpers.
   9  *
  10  * MMU mode suffixes are defined in target cpu.h.
  11  */
  12
  13 /* XXX: find something cleaner.
  14  * Furthermore, this is false for 64 bits targets
  15  */
  16 #define ldul_user       ldl_user
  17 #define ldul_kernel     ldl_kernel
  18 #define ldul_hypv       ldl_hypv
  19 #define ldul_executive  ldl_executive
  20 #define ldul_supervisor ldl_supervisor
  21
  22 /* The memory helpers for tcg-generated code need tcg_target_long etc.  */
  23 #include "tcg.h"
  24
  25 #define ACCESS_TYPE 0
  26 #define MEMSUFFIX MMU_MODE0_SUFFIX
  27 #define DATA_SIZE 1
  28 #include "exec/softmmu_header.h"
  29
  30 #define DATA_SIZE 2
  31 #include "exec/softmmu_header.h"
  32
  33 #define DATA_SIZE 4
  34 #include "exec/softmmu_header.h"
  35
  36 #define DATA_SIZE 8
  37 #include "exec/softmmu_header.h"
  38 #undef ACCESS_TYPE
  39 #undef MEMSUFFIX
  40
  41 #define ACCESS_TYPE 1
  42 #define MEMSUFFIX MMU_MODE1_SUFFIX
  43 #define DATA_SIZE 1
  44 #include "exec/softmmu_header.h"
  45
  46 #define DATA_SIZE 2
  47 #include "exec/softmmu_header.h"
  48
  49 #define DATA_SIZE 4
  50 #include "exec/softmmu_header.h"
  51
  52 #define DATA_SIZE 8
  53 #include "exec/softmmu_header.h"
  54 #undef ACCESS_TYPE
  55 #undef MEMSUFFIX
  56
  57 #if (NB_MMU_MODES >= 3)
  58
  59 #define ACCESS_TYPE 2
  60 #define MEMSUFFIX MMU_MODE2_SUFFIX
  61 #define DATA_SIZE 1
  62 #include "exec/softmmu_header.h"
  63
  64 #define DATA_SIZE 2
  65 #include "exec/softmmu_header.h"
  66
  67 #define DATA_SIZE 4
  68 #include "exec/softmmu_header.h"
  69
  70 #define DATA_SIZE 8
  71 #include "exec/softmmu_header.h"
  72 #undef ACCESS_TYPE
  73 #undef MEMSUFFIX
  74 #endif /* (NB_MMU_MODES >= 3) */
  75
  76 #if (NB_MMU_MODES >= 4)
  77
  78 #define ACCESS_TYPE 3
  79 #define MEMSUFFIX MMU_MODE3_SUFFIX
  80 #define DATA_SIZE 1
  81 #include "exec/softmmu_header.h"
  82
  83 #define DATA_SIZE 2
  84 #include "exec/softmmu_header.h"
  85
  86 #define DATA_SIZE 4
  87 #include "exec/softmmu_header.h"
  88
  89 #define DATA_SIZE 8
  90 #include "exec/softmmu_header.h"
  91 #undef ACCESS_TYPE
  92 #undef MEMSUFFIX
  93 #endif /* (NB_MMU_MODES >= 4) */
  94
  95 #if (NB_MMU_MODES >= 5)
  96
  97 #define ACCESS_TYPE 4
  98 #define MEMSUFFIX MMU_MODE4_SUFFIX
  99 #define DATA_SIZE 1
 100 #include "exec/softmmu_header.h"
 101
 102 #define DATA_SIZE 2
 103 #include "exec/softmmu_header.h"
 104
 105 #define DATA_SIZE 4
 106 #include "exec/softmmu_header.h"
 107
 108 #define DATA_SIZE 8
 109 #include "exec/softmmu_header.h"
 110 #undef ACCESS_TYPE
 111 #undef MEMSUFFIX
 112 #endif /* (NB_MMU_MODES >= 5) */
 113
 114 #if (NB_MMU_MODES >= 6)
 115
 116 #define ACCESS_TYPE 5
 117 #define MEMSUFFIX MMU_MODE5_SUFFIX
 118 #define DATA_SIZE 1
 119 #include "exec/softmmu_header.h"
 120
 121 #define DATA_SIZE 2
 122 #include "exec/softmmu_header.h"
 123
 124 #define DATA_SIZE 4
 125 #include "exec/softmmu_header.h"
 126
 127 #define DATA_SIZE 8
 128 #include "exec/softmmu_header.h"
 129 #undef ACCESS_TYPE
 130 #undef MEMSUFFIX
 131 #endif /* (NB_MMU_MODES >= 6) */
 132
 133 #if (NB_MMU_MODES > 6)
 134 #error "NB_MMU_MODES > 6 is not supported for now"
 135 #endif /* (NB_MMU_MODES > 6) */
 136
 137 /* these access are slower, they must be as rare as possible */
 138 #define ACCESS_TYPE (NB_MMU_MODES)
 139 #define MEMSUFFIX _data
 140 #define DATA_SIZE 1
 141 #include "exec/softmmu_header.h"
 142
 143 #define DATA_SIZE 2
 144 #include "exec/softmmu_header.h"
 145
 146 #define DATA_SIZE 4
 147 #include "exec/softmmu_header.h"
 148
 149 #define DATA_SIZE 8
 150 #include "exec/softmmu_header.h"
 151 #undef ACCESS_TYPE
 152 #undef MEMSUFFIX
 153
 154 #define ldub(p) ldub_data(p)
 155 #define ldsb(p) ldsb_data(p)
 156 #define lduw(p) lduw_data(p)
 157 #define ldsw(p) ldsw_data(p)
 158 #define ldl(p) ldl_data(p)
 159 #define ldq(p) ldq_data(p)
 160
 161 #define stb(p, v) stb_data(p, v)
 162 #define stw(p, v) stw_data(p, v)
 163 #define stl(p, v) stl_data(p, v)
 164 #define stq(p, v) stq_data(p, v)
 165
 166 /**
 167  * tlb_vaddr_to_host:
 168  * @env: CPUArchState
 169  * @addr: guest virtual address to look up
 170  * @access_type: 0 for read, 1 for write, 2 for execute
 171  * @mmu_idx: MMU index to use for lookup
 172  *
 173  * Look up the specified guest virtual index in the TCG softmmu TLB.
 174  * If the TLB contains a host virtual address suitable for direct RAM
 175  * access, then return it. Otherwise (TLB miss, TLB entry is for an
 176  * I/O access, etc) return NULL.
 177  *
 178  * This is the equivalent of the initial fast-path code used by
 179  * TCG backends for guest load and store accesses.
 180  */
 181 static inline void *tlb_vaddr_to_host(CPUArchState *env, target_ulong addr,
 182                                       int access_type, int mmu_idx)
 183 {
 184     int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 185     CPUTLBEntry *tlbentry = &env->tlb_table[mmu_idx][index];
 186     target_ulong tlb_addr;
 187     uintptr_t haddr;
 188
 189     switch (access_type) {
 190     case 0:
 191         tlb_addr = tlbentry->addr_read;
 192         break;
 193     case 1:
 194         tlb_addr = tlbentry->addr_write;
 195         break;
 196     case 2:
 197         tlb_addr = tlbentry->addr_code;
 198         break;
 199     default:
 200         g_assert_not_reached();
 201     }
 202
 203     if ((addr & TARGET_PAGE_MASK)
 204         != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
 205         /* TLB entry is for a different page */
 206         return NULL;
 207     }
 208
 209     if (tlb_addr & ~TARGET_PAGE_MASK) {
 210         /* IO access */
 211         return NULL;
 212     }
 213
 214     haddr = addr + env->tlb_table[mmu_idx][index].addend;
 215     return (void *)haddr;
 216 }