main: switch qemu_set_fd_handler to g_io_add_watch
[qemu.git] / hw / ppc_oldworld.c
blob235d2efc7b07eb1f3e7890ccad2cc662163f9c26
2 /*
3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
26 #include "hw.h"
27 #include "ppc.h"
28 #include "ppc_mac.h"
29 #include "mac_dbdma.h"
30 #include "nvram.h"
31 #include "pc.h"
32 #include "sysemu.h"
33 #include "net.h"
34 #include "isa.h"
35 #include "pci.h"
36 #include "usb-ohci.h"
37 #include "boards.h"
38 #include "fw_cfg.h"
39 #include "escc.h"
40 #include "ide.h"
41 #include "loader.h"
42 #include "elf.h"
43 #include "kvm.h"
44 #include "kvm_ppc.h"
45 #include "blockdev.h"
46 #include "exec-memory.h"
48 #define MAX_IDE_BUS 2
49 #define CFG_ADDR 0xf0000510
51 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
53 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
54 return 0;
58 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
60 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
63 static target_phys_addr_t round_page(target_phys_addr_t addr)
65 return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
68 static void ppc_heathrow_init (ram_addr_t ram_size,
69 const char *boot_device,
70 const char *kernel_filename,
71 const char *kernel_cmdline,
72 const char *initrd_filename,
73 const char *cpu_model)
75 CPUState *env = NULL;
76 char *filename;
77 qemu_irq *pic, **heathrow_irqs;
78 int linux_boot, i;
79 ram_addr_t ram_offset, bios_offset;
80 uint32_t kernel_base, initrd_base, cmdline_base = 0;
81 int32_t kernel_size, initrd_size;
82 PCIBus *pci_bus;
83 MacIONVRAMState *nvr;
84 int bios_size;
85 MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem;
86 MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2];
87 uint16_t ppc_boot_device;
88 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
89 void *fw_cfg;
90 void *dbdma;
92 linux_boot = (kernel_filename != NULL);
94 /* init CPUs */
95 if (cpu_model == NULL)
96 cpu_model = "G3";
97 for (i = 0; i < smp_cpus; i++) {
98 env = cpu_init(cpu_model);
99 if (!env) {
100 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
101 exit(1);
103 /* Set time-base frequency to 16.6 Mhz */
104 cpu_ppc_tb_init(env, 16600000UL);
105 qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
108 /* allocate RAM */
109 if (ram_size > (2047 << 20)) {
110 fprintf(stderr,
111 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
112 ((unsigned int)ram_size / (1 << 20)));
113 exit(1);
116 ram_offset = qemu_ram_alloc(NULL, "ppc_heathrow.ram", ram_size);
117 cpu_register_physical_memory(0, ram_size, ram_offset);
119 /* allocate and load BIOS */
120 bios_offset = qemu_ram_alloc(NULL, "ppc_heathrow.bios", BIOS_SIZE);
121 if (bios_name == NULL)
122 bios_name = PROM_FILENAME;
123 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
124 cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
126 /* Load OpenBIOS (ELF) */
127 if (filename) {
128 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
129 1, ELF_MACHINE, 0);
130 g_free(filename);
131 } else {
132 bios_size = -1;
134 if (bios_size < 0 || bios_size > BIOS_SIZE) {
135 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
136 exit(1);
139 if (linux_boot) {
140 uint64_t lowaddr = 0;
141 int bswap_needed;
143 #ifdef BSWAP_NEEDED
144 bswap_needed = 1;
145 #else
146 bswap_needed = 0;
147 #endif
148 kernel_base = KERNEL_LOAD_ADDR;
149 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
150 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
151 if (kernel_size < 0)
152 kernel_size = load_aout(kernel_filename, kernel_base,
153 ram_size - kernel_base, bswap_needed,
154 TARGET_PAGE_SIZE);
155 if (kernel_size < 0)
156 kernel_size = load_image_targphys(kernel_filename,
157 kernel_base,
158 ram_size - kernel_base);
159 if (kernel_size < 0) {
160 hw_error("qemu: could not load kernel '%s'\n",
161 kernel_filename);
162 exit(1);
164 /* load initrd */
165 if (initrd_filename) {
166 initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
167 initrd_size = load_image_targphys(initrd_filename, initrd_base,
168 ram_size - initrd_base);
169 if (initrd_size < 0) {
170 hw_error("qemu: could not load initial ram disk '%s'\n",
171 initrd_filename);
172 exit(1);
174 cmdline_base = round_page(initrd_base + initrd_size);
175 } else {
176 initrd_base = 0;
177 initrd_size = 0;
178 cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
180 ppc_boot_device = 'm';
181 } else {
182 kernel_base = 0;
183 kernel_size = 0;
184 initrd_base = 0;
185 initrd_size = 0;
186 ppc_boot_device = '\0';
187 for (i = 0; boot_device[i] != '\0'; i++) {
188 /* TOFIX: for now, the second IDE channel is not properly
189 * used by OHW. The Mac floppy disk are not emulated.
190 * For now, OHW cannot boot from the network.
192 #if 0
193 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
194 ppc_boot_device = boot_device[i];
195 break;
197 #else
198 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
199 ppc_boot_device = boot_device[i];
200 break;
202 #endif
204 if (ppc_boot_device == '\0') {
205 fprintf(stderr, "No valid boot device for G3 Beige machine\n");
206 exit(1);
210 isa_mem_base = 0x80000000;
212 /* Register 2 MB of ISA IO space */
213 isa_mmio_init(0xfe000000, 0x00200000);
215 /* XXX: we register only 1 output pin for heathrow PIC */
216 heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
217 heathrow_irqs[0] =
218 g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
219 /* Connect the heathrow PIC outputs to the 6xx bus */
220 for (i = 0; i < smp_cpus; i++) {
221 switch (PPC_INPUT(env)) {
222 case PPC_FLAGS_INPUT_6xx:
223 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
224 heathrow_irqs[i][0] =
225 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
226 break;
227 default:
228 hw_error("Bus model not supported on OldWorld Mac machine\n");
232 /* init basic PC hardware */
233 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
234 hw_error("Only 6xx bus is supported on heathrow machine\n");
236 pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
237 pci_bus = pci_grackle_init(0xfec00000, pic,
238 get_system_memory(),
239 get_system_io());
240 pci_vga_init(pci_bus);
242 escc_mem = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
243 serial_hds[1], ESCC_CLOCK, 4);
244 memory_region_init_alias(escc_bar, "escc-bar",
245 escc_mem, 0, memory_region_size(escc_mem));
247 for(i = 0; i < nb_nics; i++)
248 pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
251 ide_drive_get(hd, MAX_IDE_BUS);
253 /* First IDE channel is a MAC IDE on the MacIO bus */
254 dbdma = DBDMA_init(&dbdma_mem);
255 ide_mem[0] = NULL;
256 ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
258 /* Second IDE channel is a CMD646 on the PCI bus */
259 hd[0] = hd[MAX_IDE_DEVS];
260 hd[1] = hd[MAX_IDE_DEVS + 1];
261 hd[3] = hd[2] = NULL;
262 pci_cmd646_ide_init(pci_bus, hd, 0);
264 /* cuda also initialize ADB */
265 cuda_init(&cuda_mem, pic[0x12]);
267 adb_kbd_init(&adb_bus);
268 adb_mouse_init(&adb_bus);
270 nvr = macio_nvram_init(0x2000, 4);
271 pmac_format_nvram_partition(nvr, 0x2000);
273 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem,
274 dbdma_mem, cuda_mem, nvr, 2, ide_mem, escc_bar);
276 if (usb_enabled) {
277 usb_ohci_init_pci(pci_bus, -1);
280 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
281 graphic_depth = 15;
283 /* No PCI init: the BIOS will do it */
285 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
286 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
287 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
288 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
289 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
290 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
291 if (kernel_cmdline) {
292 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
293 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
294 } else {
295 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
297 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
298 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
299 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
301 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
302 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
303 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
305 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
306 if (kvm_enabled()) {
307 #ifdef CONFIG_KVM
308 uint8_t *hypercall;
310 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
311 hypercall = g_malloc(16);
312 kvmppc_get_hypercall(env, hypercall, 16);
313 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
314 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
315 #endif
316 } else {
317 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
320 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
323 static QEMUMachine heathrow_machine = {
324 .name = "g3beige",
325 .desc = "Heathrow based PowerMAC",
326 .init = ppc_heathrow_init,
327 .max_cpus = MAX_CPUS,
328 #ifndef TARGET_PPC64
329 .is_default = 1,
330 #endif
333 static void heathrow_machine_init(void)
335 qemu_register_machine(&heathrow_machine);
338 machine_init(heathrow_machine_init);