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Add Cserve_Get_VM_Time
[qemu-palcode.git] / vgatables.c
blob8c934c054982bf94d6c13c7bea1ef36837cb7595
1 // Tables used by VGA bios
2 //
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2001-2008 the LGPL VGABios developers Team
5 //
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
7
8 #include "protos.h"
9 #include "vgatables.h" // struct VideoParamTableEntry_s
10
11 #define ARRAY_SIZE(var) (sizeof(var) / sizeof(var[0]))
12 #define GET_GLOBAL(var) (var)
13 #define VAR16
14
15 /****************************************************************
16 * Video parameter table
17 ****************************************************************/
18
19 struct VideoParam_s video_param_table[] VAR16 = {
20 // index=0x00 no mode defined
21 {},
22 // index=0x01 no mode defined
23 {},
24 // index=0x02 no mode defined
25 {},
26 // index=0x03 no mode defined
27 {},
28 // index=0x04 vga mode 0x04
29 { 40, 24, 8, 0x0800, /* tw, th-1, ch, slength */
30 { 0x09, 0x03, 0x00, 0x02 }, /* sequ_regs */
31 0x63, /* miscreg */
32 { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
33 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
34 0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
35 0xff }, /* crtc_regs */
36 { 0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
37 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
38 0x01, 0x00, 0x03, 0x00 }, /* actl_regs */
39 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff }, /* grdc_regs */
40 },
41 /* index=0x05 vga mode 0x05 */
42 { 40, 24, 8, 0x0800, /* tw, th-1, ch, slength */
43 { 0x09, 0x03, 0x00, 0x02 }, /* sequ_regs */
44 0x63, /* miscreg */
45 { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
46 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
47 0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
48 0xff }, /* crtc_regs */
49 { 0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
50 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
51 0x01, 0x00, 0x03, 0x00 }, /* actl_regs */
52 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff }, /* grdc_regs */
53 },
54 /* index=0x06 vga mode 0x06 */
55 { 80, 24, 8, 0x1000, /* tw, th-1, ch, slength */
56 { 0x01, 0x01, 0x00, 0x06 }, /* sequ_regs */
57 0x63, /* miscreg */
58 { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
59 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
60 0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2,
61 0xff }, /* crtc_regs */
62 { 0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
63 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
64 0x01, 0x00, 0x01, 0x00 }, /* actl_regs */
65 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0xff }, /* grdc_regs */
66 },
67 /* index=0x07 vga mode 0x07 */
68 { 80, 24, 16, 0x1000, /* tw, th-1, ch, slength */
69 { 0x00, 0x03, 0x00, 0x02 }, /* sequ_regs */
70 0x66, /* miscreg */
71 { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
72 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
73 0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
74 0xff }, /* crtc_regs */
75 { 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
76 0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
77 0x0e, 0x00, 0x0f, 0x08 }, /* actl_regs */
78 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff }, /* grdc_regs */
79 },
80 /* index=0x08 no mode defined */
81 {},
82 /* index=0x09 no mode defined */
83 {},
84 /* index=0x0a no mode defined */
85 {},
86 /* index=0x0b no mode defined */
87 {},
88 /* index=0x0c no mode defined */
89 {},
90 /* index=0x0d vga mode 0x0d */
91 { 40, 24, 8, 0x2000, /* tw, th-1, ch, slength */
92 { 0x09, 0x0f, 0x00, 0x06 }, /* sequ_regs */
93 0x63, /* miscreg */
94 { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
95 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
96 0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3,
97 0xff }, /* crtc_regs */
98 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
99 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
100 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */
101 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
102 },
103 /* index=0x0e vga mode 0x0e */
104 { 80, 24, 8, 0x4000, /* tw, th-1, ch, slength */
105 { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */
106 0x63, /* miscreg */
107 { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
108 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
109 0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3,
110 0xff }, /* crtc_regs */
111 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
112 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
113 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */
114 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
115 },
116 /* index=0x0f no mode defined */
117 {},
118 /* index=0x10 no mode defined */
119 {},
120 /* index=0x11 vga mode 0x0f */
121 { 80, 24, 14, 0x8000, /* tw, th-1, ch, slength */
122 { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */
123 0xa3, /* miscreg */
124 { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
125 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
126 0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
127 0xff }, /* crtc_regs */
128 { 0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
129 0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
130 0x01, 0x00, 0x01, 0x00 }, /* actl_regs */
131 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
132 },
133 /* index=0x12 vga mode 0x10 */
134 { 80, 24, 14, 0x8000, /* tw, th-1, ch, slength */
135 { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */
136 0xa3, /* miscreg */
137 { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
138 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
139 0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
140 0xff }, /* crtc_regs */
141 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
142 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
143 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */
144 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
145 },
146 /* index=0x13 no mode defined */
147 {},
148 /* index=0x14 no mode defined */
149 {},
150 /* index=0x15 no mode defined */
151 {},
152 /* index=0x16 no mode defined */
153 {},
154 /* index=0x17 vga mode 0x01 */
155 { 40, 24, 16, 0x0800, /* tw, th-1, ch, slength */
156 { 0x08, 0x03, 0x00, 0x02 }, /* sequ_regs */
157 0x67, /* miscreg */
158 { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
159 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
160 0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
161 0xff }, /* crtc_regs */
162 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
163 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
164 0x0c, 0x00, 0x0f, 0x08 }, /* actl_regs */
165 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }, /* grdc_regs */
166 },
167 /* index=0x18 vga mode 0x03 */
168 { 80, 24, 16, 0x1000, /* tw, th-1, ch, slength */
169 { 0x00, 0x03, 0x00, 0x02 }, /* sequ_regs */
170 0x67, /* miscreg */
171 { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
172 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
173 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
174 0xff }, /* crtc_regs */
175 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
176 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
177 0x0c, 0x00, 0x0f, 0x08 }, /* actl_regs */
178 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }, /* grdc_regs */
179 },
180 /* index=0x19 vga mode 0x07 */
181 { 80, 24, 16, 0x1000, /* tw, th-1, ch, slength */
182 { 0x00, 0x03, 0x00, 0x02 }, /* sequ_regs */
183 0x66, /* miscreg */
184 { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
185 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
186 0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
187 0xff }, /* crtc_regs */
188 { 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
189 0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
190 0x0e, 0x00, 0x0f, 0x08 }, /* actl_regs */
191 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff }, /* grdc_regs */
192 },
193 /* index=0x1a vga mode 0x11 */
194 { 80, 29, 16, 0x0000, /* tw, th-1, ch, slength */
195 { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */
196 0xe3, /* miscreg */
197 { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
198 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
199 0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
200 0xff }, /* crtc_regs */
201 { 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
202 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
203 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */
204 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
205 },
206 /* index=0x1b vga mode 0x12 */
207 { 80, 29, 16, 0x0000, /* tw, th-1, ch, slength */
208 { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */
209 0xe3, /* miscreg */
210 { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
211 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
212 0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
213 0xff }, /* crtc_regs */
214 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
215 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
216 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */
217 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
218 },
219 /* index=0x1c vga mode 0x13 */
220 { 40, 24, 8, 0x0000, /* tw, th-1, ch, slength */
221 { 0x01, 0x0f, 0x00, 0x0e }, /* sequ_regs */
222 0x63, /* miscreg */
223 { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
224 0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
225 0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3,
226 0xff }, /* crtc_regs */
227 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
228 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
229 0x41, 0x00, 0x0f, 0x00 }, /* actl_regs */
230 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff }, /* grdc_regs */
231 },
232 /* index=0x1d vga mode 0x6a */
233 { 100, 36, 16, 0x0000, /* tw, th-1, ch, slength */
234 { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */
235 0xe3, /* miscreg */
236 { 0x7f, 0x63, 0x63, 0x83, 0x6b, 0x1b, 0x72, 0xf0,
237 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
238 0x59, 0x8d, 0x57, 0x32, 0x00, 0x57, 0x73, 0xe3,
239 0xff }, /* crtc_regs */
240 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
241 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
242 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */
243 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
244 },
245 };
246
247
248 /****************************************************************
249 * Palette definitions
250 ****************************************************************/
251
252 /* Mono */
253 static u8 palette0[] VAR16 = {
254 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
255 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
256 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
257 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
258 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
259 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
260 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
261 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
262 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
263 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
264 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
265 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
266 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
267 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
268 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
269 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f
270 };
271
272 static u8 palette1[] VAR16 = {
273 0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
274 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
275 0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
276 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
277 0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
278 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
279 0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
280 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
281 0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
282 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
283 0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
284 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
285 0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
286 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
287 0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
288 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f
289 };
290
291 static u8 palette2[] VAR16 = {
292 0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
293 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x2a,0x00, 0x2a,0x2a,0x2a,
294 0x00,0x00,0x15, 0x00,0x00,0x3f, 0x00,0x2a,0x15, 0x00,0x2a,0x3f,
295 0x2a,0x00,0x15, 0x2a,0x00,0x3f, 0x2a,0x2a,0x15, 0x2a,0x2a,0x3f,
296 0x00,0x15,0x00, 0x00,0x15,0x2a, 0x00,0x3f,0x00, 0x00,0x3f,0x2a,
297 0x2a,0x15,0x00, 0x2a,0x15,0x2a, 0x2a,0x3f,0x00, 0x2a,0x3f,0x2a,
298 0x00,0x15,0x15, 0x00,0x15,0x3f, 0x00,0x3f,0x15, 0x00,0x3f,0x3f,
299 0x2a,0x15,0x15, 0x2a,0x15,0x3f, 0x2a,0x3f,0x15, 0x2a,0x3f,0x3f,
300 0x15,0x00,0x00, 0x15,0x00,0x2a, 0x15,0x2a,0x00, 0x15,0x2a,0x2a,
301 0x3f,0x00,0x00, 0x3f,0x00,0x2a, 0x3f,0x2a,0x00, 0x3f,0x2a,0x2a,
302 0x15,0x00,0x15, 0x15,0x00,0x3f, 0x15,0x2a,0x15, 0x15,0x2a,0x3f,
303 0x3f,0x00,0x15, 0x3f,0x00,0x3f, 0x3f,0x2a,0x15, 0x3f,0x2a,0x3f,
304 0x15,0x15,0x00, 0x15,0x15,0x2a, 0x15,0x3f,0x00, 0x15,0x3f,0x2a,
305 0x3f,0x15,0x00, 0x3f,0x15,0x2a, 0x3f,0x3f,0x00, 0x3f,0x3f,0x2a,
306 0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
307 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f
308 };
309
310 static u8 palette3[] VAR16 = {
311 0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
312 0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
313 0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
314 0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
315 0x00,0x00,0x00, 0x05,0x05,0x05, 0x08,0x08,0x08, 0x0b,0x0b,0x0b,
316 0x0e,0x0e,0x0e, 0x11,0x11,0x11, 0x14,0x14,0x14, 0x18,0x18,0x18,
317 0x1c,0x1c,0x1c, 0x20,0x20,0x20, 0x24,0x24,0x24, 0x28,0x28,0x28,
318 0x2d,0x2d,0x2d, 0x32,0x32,0x32, 0x38,0x38,0x38, 0x3f,0x3f,0x3f,
319 0x00,0x00,0x3f, 0x10,0x00,0x3f, 0x1f,0x00,0x3f, 0x2f,0x00,0x3f,
320 0x3f,0x00,0x3f, 0x3f,0x00,0x2f, 0x3f,0x00,0x1f, 0x3f,0x00,0x10,
321 0x3f,0x00,0x00, 0x3f,0x10,0x00, 0x3f,0x1f,0x00, 0x3f,0x2f,0x00,
322 0x3f,0x3f,0x00, 0x2f,0x3f,0x00, 0x1f,0x3f,0x00, 0x10,0x3f,0x00,
323 0x00,0x3f,0x00, 0x00,0x3f,0x10, 0x00,0x3f,0x1f, 0x00,0x3f,0x2f,
324 0x00,0x3f,0x3f, 0x00,0x2f,0x3f, 0x00,0x1f,0x3f, 0x00,0x10,0x3f,
325 0x1f,0x1f,0x3f, 0x27,0x1f,0x3f, 0x2f,0x1f,0x3f, 0x37,0x1f,0x3f,
326 0x3f,0x1f,0x3f, 0x3f,0x1f,0x37, 0x3f,0x1f,0x2f, 0x3f,0x1f,0x27,
327
328 0x3f,0x1f,0x1f, 0x3f,0x27,0x1f, 0x3f,0x2f,0x1f, 0x3f,0x37,0x1f,
329 0x3f,0x3f,0x1f, 0x37,0x3f,0x1f, 0x2f,0x3f,0x1f, 0x27,0x3f,0x1f,
330 0x1f,0x3f,0x1f, 0x1f,0x3f,0x27, 0x1f,0x3f,0x2f, 0x1f,0x3f,0x37,
331 0x1f,0x3f,0x3f, 0x1f,0x37,0x3f, 0x1f,0x2f,0x3f, 0x1f,0x27,0x3f,
332 0x2d,0x2d,0x3f, 0x31,0x2d,0x3f, 0x36,0x2d,0x3f, 0x3a,0x2d,0x3f,
333 0x3f,0x2d,0x3f, 0x3f,0x2d,0x3a, 0x3f,0x2d,0x36, 0x3f,0x2d,0x31,
334 0x3f,0x2d,0x2d, 0x3f,0x31,0x2d, 0x3f,0x36,0x2d, 0x3f,0x3a,0x2d,
335 0x3f,0x3f,0x2d, 0x3a,0x3f,0x2d, 0x36,0x3f,0x2d, 0x31,0x3f,0x2d,
336 0x2d,0x3f,0x2d, 0x2d,0x3f,0x31, 0x2d,0x3f,0x36, 0x2d,0x3f,0x3a,
337 0x2d,0x3f,0x3f, 0x2d,0x3a,0x3f, 0x2d,0x36,0x3f, 0x2d,0x31,0x3f,
338 0x00,0x00,0x1c, 0x07,0x00,0x1c, 0x0e,0x00,0x1c, 0x15,0x00,0x1c,
339 0x1c,0x00,0x1c, 0x1c,0x00,0x15, 0x1c,0x00,0x0e, 0x1c,0x00,0x07,
340 0x1c,0x00,0x00, 0x1c,0x07,0x00, 0x1c,0x0e,0x00, 0x1c,0x15,0x00,
341 0x1c,0x1c,0x00, 0x15,0x1c,0x00, 0x0e,0x1c,0x00, 0x07,0x1c,0x00,
342 0x00,0x1c,0x00, 0x00,0x1c,0x07, 0x00,0x1c,0x0e, 0x00,0x1c,0x15,
343 0x00,0x1c,0x1c, 0x00,0x15,0x1c, 0x00,0x0e,0x1c, 0x00,0x07,0x1c,
344
345 0x0e,0x0e,0x1c, 0x11,0x0e,0x1c, 0x15,0x0e,0x1c, 0x18,0x0e,0x1c,
346 0x1c,0x0e,0x1c, 0x1c,0x0e,0x18, 0x1c,0x0e,0x15, 0x1c,0x0e,0x11,
347 0x1c,0x0e,0x0e, 0x1c,0x11,0x0e, 0x1c,0x15,0x0e, 0x1c,0x18,0x0e,
348 0x1c,0x1c,0x0e, 0x18,0x1c,0x0e, 0x15,0x1c,0x0e, 0x11,0x1c,0x0e,
349 0x0e,0x1c,0x0e, 0x0e,0x1c,0x11, 0x0e,0x1c,0x15, 0x0e,0x1c,0x18,
350 0x0e,0x1c,0x1c, 0x0e,0x18,0x1c, 0x0e,0x15,0x1c, 0x0e,0x11,0x1c,
351 0x14,0x14,0x1c, 0x16,0x14,0x1c, 0x18,0x14,0x1c, 0x1a,0x14,0x1c,
352 0x1c,0x14,0x1c, 0x1c,0x14,0x1a, 0x1c,0x14,0x18, 0x1c,0x14,0x16,
353 0x1c,0x14,0x14, 0x1c,0x16,0x14, 0x1c,0x18,0x14, 0x1c,0x1a,0x14,
354 0x1c,0x1c,0x14, 0x1a,0x1c,0x14, 0x18,0x1c,0x14, 0x16,0x1c,0x14,
355 0x14,0x1c,0x14, 0x14,0x1c,0x16, 0x14,0x1c,0x18, 0x14,0x1c,0x1a,
356 0x14,0x1c,0x1c, 0x14,0x1a,0x1c, 0x14,0x18,0x1c, 0x14,0x16,0x1c,
357 0x00,0x00,0x10, 0x04,0x00,0x10, 0x08,0x00,0x10, 0x0c,0x00,0x10,
358 0x10,0x00,0x10, 0x10,0x00,0x0c, 0x10,0x00,0x08, 0x10,0x00,0x04,
359 0x10,0x00,0x00, 0x10,0x04,0x00, 0x10,0x08,0x00, 0x10,0x0c,0x00,
360 0x10,0x10,0x00, 0x0c,0x10,0x00, 0x08,0x10,0x00, 0x04,0x10,0x00,
361
362 0x00,0x10,0x00, 0x00,0x10,0x04, 0x00,0x10,0x08, 0x00,0x10,0x0c,
363 0x00,0x10,0x10, 0x00,0x0c,0x10, 0x00,0x08,0x10, 0x00,0x04,0x10,
364 0x08,0x08,0x10, 0x0a,0x08,0x10, 0x0c,0x08,0x10, 0x0e,0x08,0x10,
365 0x10,0x08,0x10, 0x10,0x08,0x0e, 0x10,0x08,0x0c, 0x10,0x08,0x0a,
366 0x10,0x08,0x08, 0x10,0x0a,0x08, 0x10,0x0c,0x08, 0x10,0x0e,0x08,
367 0x10,0x10,0x08, 0x0e,0x10,0x08, 0x0c,0x10,0x08, 0x0a,0x10,0x08,
368 0x08,0x10,0x08, 0x08,0x10,0x0a, 0x08,0x10,0x0c, 0x08,0x10,0x0e,
369 0x08,0x10,0x10, 0x08,0x0e,0x10, 0x08,0x0c,0x10, 0x08,0x0a,0x10,
370 0x0b,0x0b,0x10, 0x0c,0x0b,0x10, 0x0d,0x0b,0x10, 0x0f,0x0b,0x10,
371 0x10,0x0b,0x10, 0x10,0x0b,0x0f, 0x10,0x0b,0x0d, 0x10,0x0b,0x0c,
372 0x10,0x0b,0x0b, 0x10,0x0c,0x0b, 0x10,0x0d,0x0b, 0x10,0x0f,0x0b,
373 0x10,0x10,0x0b, 0x0f,0x10,0x0b, 0x0d,0x10,0x0b, 0x0c,0x10,0x0b,
374 0x0b,0x10,0x0b, 0x0b,0x10,0x0c, 0x0b,0x10,0x0d, 0x0b,0x10,0x0f,
375 0x0b,0x10,0x10, 0x0b,0x0f,0x10, 0x0b,0x0d,0x10, 0x0b,0x0c,0x10,
376 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
377 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00
378 };
379
380
381 /****************************************************************
382 * Video mode list
383 ****************************************************************/
384
385 #define PAL(x) x, sizeof(x)
386 #define VPARAM(x) &video_param_table[x]
387
388 static struct vgamode_s vga_modes[] VAR16 = {
389 //mode vparam model bits sstart pelm dac
390 {0x00, VPARAM(0x17), CTEXT, 4, SEG_CTEXT, 0xFF, PAL(palette2)},
391 {0x01, VPARAM(0x17), CTEXT, 4, SEG_CTEXT, 0xFF, PAL(palette2)},
392 {0x02, VPARAM(0x18), CTEXT, 4, SEG_CTEXT, 0xFF, PAL(palette2)},
393 {0x03, VPARAM(0x18), CTEXT, 4, SEG_CTEXT, 0xFF, PAL(palette2)},
394 {0x04, VPARAM(0x04), CGA, 2, SEG_CTEXT, 0xFF, PAL(palette1)},
395 {0x05, VPARAM(0x05), CGA, 2, SEG_CTEXT, 0xFF, PAL(palette1)},
396 {0x06, VPARAM(0x06), CGA, 1, SEG_CTEXT, 0xFF, PAL(palette1)},
397 {0x07, VPARAM(0x07), MTEXT, 4, SEG_MTEXT, 0xFF, PAL(palette0)},
398 {0x0D, VPARAM(0x0d), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette1)},
399 {0x0E, VPARAM(0x0e), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette1)},
400 {0x0F, VPARAM(0x11), PLANAR1, 1, SEG_GRAPH, 0xFF, PAL(palette0)},
401 {0x10, VPARAM(0x12), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
402 {0x11, VPARAM(0x1a), PLANAR1, 1, SEG_GRAPH, 0xFF, PAL(palette2)},
403 {0x12, VPARAM(0x1b), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
404 {0x13, VPARAM(0x1c), LINEAR8, 8, SEG_GRAPH, 0xFF, PAL(palette3)},
405 {0x6A, VPARAM(0x1d), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
406 };
407
408 struct vgamode_s *
409 find_vga_entry(u8 mode)
410 {
411 int i;
412 for (i = 0; i < ARRAY_SIZE(vga_modes); i++) {
413 struct vgamode_s *vmode_g = &vga_modes[i];
414 if (GET_GLOBAL(vmode_g->svgamode) == mode)
415 return vmode_g;
416 }
417 return NULL;
418 }
419
420 // u16 video_save_pointer_table[14] VAR16;
421
422
423 /****************************************************************
424 * Static functionality table
425 ****************************************************************/
426
427 u8 static_functionality[0x10] VAR16 = {
428 /* 0 */ 0xff, // All modes supported #1
429 /* 1 */ 0xe0, // All modes supported #2
430 /* 2 */ 0x0f, // All modes supported #3
431 /* 3 */ 0x00, 0x00, 0x00, 0x00, // reserved
432 /* 7 */ 0x07, // 200, 350, 400 scan lines
433 /* 8 */ 0x02, // mamimum number of visible charsets in text mode
434 /* 9 */ 0x08, // total number of charset blocks in text mode
435 /* a */ 0xe7, // Change to add new functions
436 /* b */ 0x0c, // Change to add new functions
437 /* c */ 0x00, // reserved
438 /* d */ 0x00, // reserved
439 /* e */ 0x00, // Change to add new functions
440 /* f */ 0x00 // reserved
441 };
Firmware for Alpha emulation under QEMU