hw/msix.c

   1 /*
   2  * MSI-X device support
   3  *
   4  * This module includes support for MSI-X in pci devices.
   5  *
   6  * Author: Michael S. Tsirkin <mst@redhat.com>
   7  *
   8  *  Copyright (c) 2009, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
   9  *
  10  * This work is licensed under the terms of the GNU GPL, version 2.  See
  11  * the COPYING file in the top-level directory.
  12  */
  13
  14 #include "hw.h"
  15 #include "msix.h"
  16 #include "pci.h"
  17 #include "qemu-kvm.h"
  18
  19 /* Declaration from linux/pci_regs.h */
  20 #define  PCI_CAP_ID_MSIX 0x11 /* MSI-X */
  21 #define  PCI_MSIX_FLAGS 2     /* Table at lower 11 bits */
  22 #define  PCI_MSIX_FLAGS_QSIZE   0x7FF
  23 #define  PCI_MSIX_FLAGS_ENABLE  (1 << 15)
  24 #define  PCI_MSIX_FLAGS_BIRMASK (7 << 0)
  25
  26 /* MSI-X capability structure */
  27 #define MSIX_TABLE_OFFSET 4
  28 #define MSIX_PBA_OFFSET 8
  29 #define MSIX_CAP_LENGTH 12
  30
  31 /* MSI enable bit is in byte 1 in FLAGS register */
  32 #define MSIX_ENABLE_OFFSET (PCI_MSIX_FLAGS + 1)
  33 #define MSIX_ENABLE_MASK (PCI_MSIX_FLAGS_ENABLE >> 8)
  34
  35 /* MSI-X table format */
  36 #define MSIX_MSG_ADDR 0
  37 #define MSIX_MSG_UPPER_ADDR 4
  38 #define MSIX_MSG_DATA 8
  39 #define MSIX_VECTOR_CTRL 12
  40 #define MSIX_ENTRY_SIZE 16
  41 #define MSIX_VECTOR_MASK 0x1
  42
  43 /* How much space does an MSIX table need. */
  44 /* The spec requires giving the table structure
  45  * a 4K aligned region all by itself. Align it to
  46  * target pages so that drivers can do passthrough
  47  * on the rest of the region. */
  48 #define MSIX_PAGE_SIZE TARGET_PAGE_ALIGN(0x1000)
  49 /* Reserve second half of the page for pending bits */
  50 #define MSIX_PAGE_PENDING (MSIX_PAGE_SIZE / 2)
  51 #define MSIX_MAX_ENTRIES 32
  52
  53
  54 #ifdef MSIX_DEBUG
  55 #define DEBUG(fmt, ...)                                       \
  56     do {                                                      \
  57       fprintf(stderr, "%s: " fmt, __func__ , __VA_ARGS__);    \
  58     } while (0)
  59 #else
  60 #define DEBUG(fmt, ...) do { } while(0)
  61 #endif
  62
  63 /* Flag for interrupt controller to declare MSI-X support */
  64 int msix_supported;
  65
  66 #ifdef CONFIG_KVM
  67 /* KVM specific MSIX helpers */
  68 static void kvm_msix_free(PCIDevice *dev)
  69 {
  70     int vector, changed = 0;
  71     for (vector = 0; vector < dev->msix_entries_nr; ++vector) {
  72         if (dev->msix_entry_used[vector]) {
  73             kvm_del_routing_entry(kvm_context, &dev->msix_irq_entries[vector]);
  74             changed = 1;
  75         }
  76     }
  77     if (changed) {
  78         kvm_commit_irq_routes(kvm_context);
  79     }
  80 }
  81
  82 static void kvm_msix_routing_entry(PCIDevice *dev, unsigned vector,
  83                                    struct kvm_irq_routing_entry *entry)
  84 {
  85     uint8_t *table_entry = dev->msix_table_page + vector * MSIX_ENTRY_SIZE;
  86     entry->type = KVM_IRQ_ROUTING_MSI;
  87     entry->flags = 0;
  88     entry->u.msi.address_lo = pci_get_long(table_entry + MSIX_MSG_ADDR);
  89     entry->u.msi.address_hi = pci_get_long(table_entry + MSIX_MSG_UPPER_ADDR);
  90     entry->u.msi.data = pci_get_long(table_entry + MSIX_MSG_DATA);
  91 }
  92
  93 static void kvm_msix_update(PCIDevice *dev, int vector,
  94                             int was_masked, int is_masked)
  95 {
  96     struct kvm_irq_routing_entry e = {}, *entry;
  97     int mask_cleared = was_masked && !is_masked;
  98     /* It is only legal to change an entry when it is masked. Therefore, it is
  99      * enough to update the routing in kernel when mask is being cleared. */
 100     if (!mask_cleared) {
 101         return;
 102     }
 103     if (!dev->msix_entry_used[vector]) {
 104         return;
 105     }
 106     entry = dev->msix_irq_entries + vector;
 107     e.gsi = entry->gsi;
 108     kvm_msix_routing_entry(dev, vector, &e);
 109     if (memcmp(&entry->u.msi, &e.u.msi, sizeof entry->u.msi)) {
 110         int r;
 111         r = kvm_update_routing_entry(kvm_context, entry, &e);
 112         if (r) {
 113             fprintf(stderr, "%s: kvm_update_routing_entry failed: %s\n", __func__,
 114                     strerror(-r));
 115             exit(1);
 116         }
 117         memcpy(&entry->u.msi, &e.u.msi, sizeof entry->u.msi);
 118         r = kvm_commit_irq_routes(kvm_context);
 119         if (r) {
 120             fprintf(stderr, "%s: kvm_commit_irq_routes failed: %s\n", __func__,
 121                     strerror(-r));
 122             exit(1);
 123         }
 124     }
 125 }
 126
 127 static int kvm_msix_add(PCIDevice *dev, unsigned vector)
 128 {
 129     struct kvm_irq_routing_entry *entry = dev->msix_irq_entries + vector;
 130     int r;
 131
 132     r = kvm_get_irq_route_gsi(kvm_context);
 133     if (r < 0) {
 134         fprintf(stderr, "%s: kvm_get_irq_route_gsi failed: %s\n", __func__, strerror(-r));
 135         return r;
 136     }
 137     entry->gsi = r;
 138     kvm_msix_routing_entry(dev, vector, entry);
 139     r = kvm_add_routing_entry(kvm_context, entry);
 140     if (r < 0) {
 141         fprintf(stderr, "%s: kvm_add_routing_entry failed: %s\n", __func__, strerror(-r));
 142         return r;
 143     }
 144
 145     r = kvm_commit_irq_routes(kvm_context);
 146     if (r < 0) {
 147         fprintf(stderr, "%s: kvm_commit_irq_routes failed: %s\n", __func__, strerror(-r));
 148         return r;
 149     }
 150     return 0;
 151 }
 152
 153 static void kvm_msix_del(PCIDevice *dev, unsigned vector)
 154 {
 155     if (dev->msix_entry_used[vector]) {
 156         return;
 157     }
 158     kvm_del_routing_entry(kvm_context, &dev->msix_irq_entries[vector]);
 159     kvm_commit_irq_routes(kvm_context);
 160 }
 161 #else
 162
 163 static void kvm_msix_free(PCIDevice *dev) {}
 164 static void kvm_msix_update(PCIDevice *dev, int vector,
 165                             int was_masked, int is_masked) {}
 166 static int kvm_msix_add(PCIDevice *dev, unsigned vector) { return -1; }
 167 static void kvm_msix_del(PCIDevice *dev, unsigned vector) {}
 168 #endif
 169
 170 /* Add MSI-X capability to the config space for the device. */
 171 /* Given a bar and its size, add MSI-X table on top of it
 172  * and fill MSI-X capability in the config space.
 173  * Original bar size must be a power of 2 or 0.
 174  * New bar size is returned. */
 175 static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
 176                            unsigned bar_nr, unsigned bar_size)
 177 {
 178     int config_offset;
 179     uint8_t *config;
 180     uint32_t new_size;
 181
 182     if (nentries < 1 || nentries > PCI_MSIX_FLAGS_QSIZE + 1)
 183         return -EINVAL;
 184     if (bar_size > 0x80000000)
 185         return -ENOSPC;
 186
 187     /* Add space for MSI-X structures */
 188     if (!bar_size)
 189         new_size = MSIX_PAGE_SIZE;
 190     else if (bar_size < MSIX_PAGE_SIZE) {
 191         bar_size = MSIX_PAGE_SIZE;
 192         new_size = MSIX_PAGE_SIZE * 2;
 193     } else
 194         new_size = bar_size * 2;
 195
 196     pdev->msix_bar_size = new_size;
 197     config_offset = pci_add_capability(pdev, PCI_CAP_ID_MSIX, MSIX_CAP_LENGTH);
 198     if (config_offset < 0)
 199         return config_offset;
 200     config = pdev->config + config_offset;
 201
 202     pci_set_word(config + PCI_MSIX_FLAGS, nentries - 1);
 203     /* Table on top of BAR */
 204     pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr);
 205     /* Pending bits on top of that */
 206     pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) |
 207                  bar_nr);
 208     pdev->msix_cap = config_offset;
 209     /* Make flags bit writeable. */
 210     pdev->wmask[config_offset + MSIX_ENABLE_OFFSET] |= MSIX_ENABLE_MASK;
 211     return 0;
 212 }
 213
 214 static void msix_free_irq_entries(PCIDevice *dev)
 215 {
 216     int vector;
 217     if (kvm_enabled() && qemu_kvm_irqchip_in_kernel()) {
 218         kvm_msix_free(dev);
 219     }
 220
 221     for (vector = 0; vector < dev->msix_entries_nr; ++vector)
 222         dev->msix_entry_used[vector] = 0;
 223 }
 224
 225 /* Handle MSI-X capability config write. */
 226 void msix_write_config(PCIDevice *dev, uint32_t addr,
 227                        uint32_t val, int len)
 228 {
 229     unsigned enable_pos = dev->msix_cap + MSIX_ENABLE_OFFSET;
 230     if (addr + len <= enable_pos || addr > enable_pos)
 231         return;
 232
 233     if (msix_enabled(dev))
 234         qemu_set_irq(dev->irq[0], 0);
 235 }
 236
 237 static uint32_t msix_mmio_readl(void *opaque, target_phys_addr_t addr)
 238 {
 239     PCIDevice *dev = opaque;
 240     unsigned int offset = addr & (MSIX_PAGE_SIZE - 1);
 241     void *page = dev->msix_table_page;
 242     uint32_t val = 0;
 243
 244     memcpy(&val, (void *)((char *)page + offset), 4);
 245
 246     return val;
 247 }
 248
 249 static uint32_t msix_mmio_read_unallowed(void *opaque, target_phys_addr_t addr)
 250 {
 251     fprintf(stderr, "MSI-X: only dword read is allowed!\n");
 252     return 0;
 253 }
 254
 255 static uint8_t msix_pending_mask(int vector)
 256 {
 257     return 1 << (vector % 8);
 258 }
 259
 260 static uint8_t *msix_pending_byte(PCIDevice *dev, int vector)
 261 {
 262     return dev->msix_table_page + MSIX_PAGE_PENDING + vector / 8;
 263 }
 264
 265 static int msix_is_pending(PCIDevice *dev, int vector)
 266 {
 267     return *msix_pending_byte(dev, vector) & msix_pending_mask(vector);
 268 }
 269
 270 static void msix_set_pending(PCIDevice *dev, int vector)
 271 {
 272     *msix_pending_byte(dev, vector) |= msix_pending_mask(vector);
 273 }
 274
 275 static void msix_clr_pending(PCIDevice *dev, int vector)
 276 {
 277     *msix_pending_byte(dev, vector) &= ~msix_pending_mask(vector);
 278 }
 279
 280 static int msix_is_masked(PCIDevice *dev, int vector)
 281 {
 282     unsigned offset = vector * MSIX_ENTRY_SIZE + MSIX_VECTOR_CTRL;
 283     return dev->msix_table_page[offset] & MSIX_VECTOR_MASK;
 284 }
 285
 286 static void msix_mmio_writel(void *opaque, target_phys_addr_t addr,
 287                              uint32_t val)
 288 {
 289     PCIDevice *dev = opaque;
 290     unsigned int offset = addr & (MSIX_PAGE_SIZE - 1);
 291     int vector = offset / MSIX_ENTRY_SIZE;
 292     int was_masked = msix_is_masked(dev, vector);
 293     memcpy(dev->msix_table_page + offset, &val, 4);
 294     if (kvm_enabled() && qemu_kvm_irqchip_in_kernel()) {
 295         kvm_msix_update(dev, vector, was_masked, msix_is_masked(dev, vector));
 296     }
 297     if (!msix_is_masked(dev, vector) && msix_is_pending(dev, vector)) {
 298         msix_clr_pending(dev, vector);
 299         msix_notify(dev, vector);
 300     }
 301 }
 302
 303 static void msix_mmio_write_unallowed(void *opaque, target_phys_addr_t addr,
 304                                       uint32_t val)
 305 {
 306     fprintf(stderr, "MSI-X: only dword write is allowed!\n");
 307 }
 308
 309 static CPUWriteMemoryFunc *msix_mmio_write[] = {
 310     msix_mmio_write_unallowed, msix_mmio_write_unallowed, msix_mmio_writel
 311 };
 312
 313 static CPUReadMemoryFunc *msix_mmio_read[] = {
 314     msix_mmio_read_unallowed, msix_mmio_read_unallowed, msix_mmio_readl
 315 };
 316
 317 /* Should be called from device's map method. */
 318 void msix_mmio_map(PCIDevice *d, int region_num,
 319                    uint32_t addr, uint32_t size, int type)
 320 {
 321     uint8_t *config = d->config + d->msix_cap;
 322     uint32_t table = pci_get_long(config + MSIX_TABLE_OFFSET);
 323     uint32_t offset = table & ~(MSIX_PAGE_SIZE - 1);
 324     /* TODO: for assigned devices, we'll want to make it possible to map
 325      * pending bits separately in case they are in a separate bar. */
 326     int table_bir = table & PCI_MSIX_FLAGS_BIRMASK;
 327
 328     if (table_bir != region_num)
 329         return;
 330     if (size <= offset)
 331         return;
 332     cpu_register_physical_memory(addr + offset, size - offset,
 333                                  d->msix_mmio_index);
 334 }
 335
 336 /* Initialize the MSI-X structures. Note: if MSI-X is supported, BAR size is
 337  * modified, it should be retrieved with msix_bar_size. */
 338 int msix_init(struct PCIDevice *dev, unsigned short nentries,
 339               unsigned bar_nr, unsigned bar_size)
 340 {
 341     int ret;
 342     /* Nothing to do if MSI is not supported by interrupt controller */
 343     if (!msix_supported)
 344         return -ENOTSUP;
 345
 346     if (nentries > MSIX_MAX_ENTRIES)
 347         return -EINVAL;
 348
 349 #ifdef KVM_CAP_IRQCHIP
 350     if (kvm_enabled() && qemu_kvm_irqchip_in_kernel()) {
 351         dev->msix_irq_entries = qemu_malloc(nentries *
 352                                             sizeof *dev->msix_irq_entries);
 353     }
 354 #endif
 355     dev->msix_entry_used = qemu_mallocz(MSIX_MAX_ENTRIES *
 356                                         sizeof *dev->msix_entry_used);
 357
 358     dev->msix_table_page = qemu_mallocz(MSIX_PAGE_SIZE);
 359
 360     dev->msix_mmio_index = cpu_register_io_memory(msix_mmio_read,
 361                                                   msix_mmio_write, dev);
 362     if (dev->msix_mmio_index == -1) {
 363         ret = -EBUSY;
 364         goto err_index;
 365     }
 366
 367     dev->msix_entries_nr = nentries;
 368     ret = msix_add_config(dev, nentries, bar_nr, bar_size);
 369     if (ret)
 370         goto err_config;
 371
 372     dev->cap_present |= QEMU_PCI_CAP_MSIX;
 373     return 0;
 374
 375 err_config:
 376     dev->msix_entries_nr = 0;
 377     cpu_unregister_io_memory(dev->msix_mmio_index);
 378 err_index:
 379     qemu_free(dev->msix_table_page);
 380     dev->msix_table_page = NULL;
 381     qemu_free(dev->msix_entry_used);
 382     dev->msix_entry_used = NULL;
 383     return ret;
 384 }
 385
 386 /* Clean up resources for the device. */
 387 int msix_uninit(PCIDevice *dev)
 388 {
 389     if (!(dev->cap_present & QEMU_PCI_CAP_MSIX))
 390         return 0;
 391     pci_del_capability(dev, PCI_CAP_ID_MSIX, MSIX_CAP_LENGTH);
 392     dev->msix_cap = 0;
 393     msix_free_irq_entries(dev);
 394     dev->msix_entries_nr = 0;
 395     cpu_unregister_io_memory(dev->msix_mmio_index);
 396     qemu_free(dev->msix_table_page);
 397     dev->msix_table_page = NULL;
 398     qemu_free(dev->msix_entry_used);
 399     dev->msix_entry_used = NULL;
 400     qemu_free(dev->msix_irq_entries);
 401     dev->msix_irq_entries = NULL;
 402     dev->cap_present &= ~QEMU_PCI_CAP_MSIX;
 403     return 0;
 404 }
 405
 406 void msix_save(PCIDevice *dev, QEMUFile *f)
 407 {
 408     unsigned n = dev->msix_entries_nr;
 409
 410     if (!msix_supported) {
 411         return;
 412     }
 413
 414     if (!(dev->cap_present & QEMU_PCI_CAP_MSIX)) {
 415         return;
 416     }
 417     qemu_put_buffer(f, dev->msix_table_page, n * MSIX_ENTRY_SIZE);
 418     qemu_put_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8);
 419 }
 420
 421 /* Should be called after restoring the config space. */
 422 void msix_load(PCIDevice *dev, QEMUFile *f)
 423 {
 424     unsigned n = dev->msix_entries_nr;
 425
 426     if (!msix_supported)
 427         return;
 428
 429     if (!(dev->cap_present & QEMU_PCI_CAP_MSIX)) {
 430         return;
 431     }
 432
 433     msix_free_irq_entries(dev);
 434     qemu_get_buffer(f, dev->msix_table_page, n * MSIX_ENTRY_SIZE);
 435     qemu_get_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8);
 436 }
 437
 438 /* Does device support MSI-X? */
 439 int msix_present(PCIDevice *dev)
 440 {
 441     return dev->cap_present & QEMU_PCI_CAP_MSIX;
 442 }
 443
 444 /* Is MSI-X enabled? */
 445 int msix_enabled(PCIDevice *dev)
 446 {
 447     return (dev->cap_present & QEMU_PCI_CAP_MSIX) &&
 448         (dev->config[dev->msix_cap + MSIX_ENABLE_OFFSET] &
 449          MSIX_ENABLE_MASK);
 450 }
 451
 452 /* Size of bar where MSI-X table resides, or 0 if MSI-X not supported. */
 453 uint32_t msix_bar_size(PCIDevice *dev)
 454 {
 455     return (dev->cap_present & QEMU_PCI_CAP_MSIX) ?
 456         dev->msix_bar_size : 0;
 457 }
 458
 459 /* Send an MSI-X message */
 460 void msix_notify(PCIDevice *dev, unsigned vector)
 461 {
 462     uint8_t *table_entry = dev->msix_table_page + vector * MSIX_ENTRY_SIZE;
 463     uint64_t address;
 464     uint32_t data;
 465
 466     if (vector >= dev->msix_entries_nr || !dev->msix_entry_used[vector])
 467         return;
 468     if (msix_is_masked(dev, vector)) {
 469         msix_set_pending(dev, vector);
 470         return;
 471     }
 472
 473 #ifdef KVM_CAP_IRQCHIP
 474     if (kvm_enabled() && qemu_kvm_irqchip_in_kernel()) {
 475         kvm_set_irq(dev->msix_irq_entries[vector].gsi, 1, NULL);
 476         return;
 477     }
 478 #endif
 479
 480     address = pci_get_long(table_entry + MSIX_MSG_UPPER_ADDR);
 481     address = (address << 32) | pci_get_long(table_entry + MSIX_MSG_ADDR);
 482     data = pci_get_long(table_entry + MSIX_MSG_DATA);
 483     stl_phys(address, data);
 484 }
 485
 486 void msix_reset(PCIDevice *dev)
 487 {
 488     if (!(dev->cap_present & QEMU_PCI_CAP_MSIX))
 489         return;
 490     msix_free_irq_entries(dev);
 491     dev->config[dev->msix_cap + MSIX_ENABLE_OFFSET] &= MSIX_ENABLE_MASK;
 492     memset(dev->msix_table_page, 0, MSIX_PAGE_SIZE);
 493 }
 494
 495 /* PCI spec suggests that devices make it possible for software to configure
 496  * less vectors than supported by the device, but does not specify a standard
 497  * mechanism for devices to do so.
 498  *
 499  * We support this by asking devices to declare vectors software is going to
 500  * actually use, and checking this on the notification path. Devices that
 501  * don't want to follow the spec suggestion can declare all vectors as used. */
 502
 503 /* Mark vector as used. */
 504 int msix_vector_use(PCIDevice *dev, unsigned vector)
 505 {
 506     int ret;
 507     if (vector >= dev->msix_entries_nr)
 508         return -EINVAL;
 509     if (dev->msix_entry_used[vector]) {
 510         return 0;
 511     }
 512     if (kvm_enabled() && qemu_kvm_irqchip_in_kernel()) {
 513         ret = kvm_msix_add(dev, vector);
 514         if (ret) {
 515             return ret;
 516         }
 517     }
 518     ++dev->msix_entry_used[vector];
 519     return 0;
 520 }
 521
 522 /* Mark vector as unused. */
 523 void msix_vector_unuse(PCIDevice *dev, unsigned vector)
 524 {
 525     if (vector < dev->msix_entries_nr && dev->msix_entry_used[vector]) {
 526         --dev->msix_entry_used[vector];
 527         if (kvm_enabled() && qemu_kvm_irqchip_in_kernel()) {
 528             kvm_msix_del(dev, vector);
 529         }
 530     }
 531 }