4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
21 #include "qemu-common.h"
22 #ifdef CONFIG_USER_ONLY
34 #include "qemu-char.h"
40 #define MAX_PACKET_LENGTH 4096
42 #include "qemu_socket.h"
50 GDB_SIGNAL_UNKNOWN
= 143
53 #ifdef CONFIG_USER_ONLY
55 /* Map target signal numbers to GDB protocol signal numbers and vice
56 * versa. For user emulation's currently supported systems, we can
57 * assume most signals are defined.
60 static int gdb_signal_table
[] = {
220 /* In system mode we only need SIGINT and SIGTRAP; other signals
221 are not yet supported. */
228 static int gdb_signal_table
[] = {
238 #ifdef CONFIG_USER_ONLY
239 static int target_signal_to_gdb (int sig
)
242 for (i
= 0; i
< ARRAY_SIZE (gdb_signal_table
); i
++)
243 if (gdb_signal_table
[i
] == sig
)
245 return GDB_SIGNAL_UNKNOWN
;
249 static int gdb_signal_to_target (int sig
)
251 if (sig
< ARRAY_SIZE (gdb_signal_table
))
252 return gdb_signal_table
[sig
];
259 typedef struct GDBRegisterState
{
265 struct GDBRegisterState
*next
;
276 typedef struct GDBState
{
277 CPUState
*c_cpu
; /* current CPU for step/continue ops */
278 CPUState
*g_cpu
; /* current CPU for other ops */
279 CPUState
*query_cpu
; /* for q{f|s}ThreadInfo */
280 enum RSState state
; /* parsing state */
281 char line_buf
[MAX_PACKET_LENGTH
];
284 uint8_t last_packet
[MAX_PACKET_LENGTH
+ 4];
287 #ifdef CONFIG_USER_ONLY
291 CharDriverState
*chr
;
292 CharDriverState
*mon_chr
;
296 /* By default use no IRQs and no timers while single stepping so as to
297 * make single stepping like an ICE HW step.
299 static int sstep_flags
= SSTEP_ENABLE
|SSTEP_NOIRQ
|SSTEP_NOTIMER
;
301 static GDBState
*gdbserver_state
;
303 /* This is an ugly hack to cope with both new and old gdb.
304 If gdb sends qXfer:features:read then assume we're talking to a newish
305 gdb that understands target descriptions. */
306 static int gdb_has_xml
;
308 #ifdef CONFIG_USER_ONLY
309 /* XXX: This is not thread safe. Do we care? */
310 static int gdbserver_fd
= -1;
312 static int get_char(GDBState
*s
)
318 ret
= recv(s
->fd
, &ch
, 1, 0);
320 if (errno
== ECONNRESET
)
322 if (errno
!= EINTR
&& errno
!= EAGAIN
)
324 } else if (ret
== 0) {
336 static gdb_syscall_complete_cb gdb_current_syscall_cb
;
344 /* If gdb is connected when the first semihosting syscall occurs then use
345 remote gdb syscalls. Otherwise use native file IO. */
346 int use_gdb_syscalls(void)
348 if (gdb_syscall_mode
== GDB_SYS_UNKNOWN
) {
349 gdb_syscall_mode
= (gdbserver_state
? GDB_SYS_ENABLED
352 return gdb_syscall_mode
== GDB_SYS_ENABLED
;
355 /* Resume execution. */
356 static inline void gdb_continue(GDBState
*s
)
358 #ifdef CONFIG_USER_ONLY
359 s
->running_state
= 1;
365 static void put_buffer(GDBState
*s
, const uint8_t *buf
, int len
)
367 #ifdef CONFIG_USER_ONLY
371 ret
= send(s
->fd
, buf
, len
, 0);
373 if (errno
!= EINTR
&& errno
!= EAGAIN
)
381 qemu_chr_write(s
->chr
, buf
, len
);
385 static inline int fromhex(int v
)
387 if (v
>= '0' && v
<= '9')
389 else if (v
>= 'A' && v
<= 'F')
391 else if (v
>= 'a' && v
<= 'f')
397 static inline int tohex(int v
)
405 static void memtohex(char *buf
, const uint8_t *mem
, int len
)
410 for(i
= 0; i
< len
; i
++) {
412 *q
++ = tohex(c
>> 4);
413 *q
++ = tohex(c
& 0xf);
418 static void hextomem(uint8_t *mem
, const char *buf
, int len
)
422 for(i
= 0; i
< len
; i
++) {
423 mem
[i
] = (fromhex(buf
[0]) << 4) | fromhex(buf
[1]);
428 /* return -1 if error, 0 if OK */
429 static int put_packet_binary(GDBState
*s
, const char *buf
, int len
)
440 for(i
= 0; i
< len
; i
++) {
444 *(p
++) = tohex((csum
>> 4) & 0xf);
445 *(p
++) = tohex((csum
) & 0xf);
447 s
->last_packet_len
= p
- s
->last_packet
;
448 put_buffer(s
, (uint8_t *)s
->last_packet
, s
->last_packet_len
);
450 #ifdef CONFIG_USER_ONLY
463 /* return -1 if error, 0 if OK */
464 static int put_packet(GDBState
*s
, const char *buf
)
467 printf("reply='%s'\n", buf
);
470 return put_packet_binary(s
, buf
, strlen(buf
));
473 /* The GDB remote protocol transfers values in target byte order. This means
474 we can use the raw memory access routines to access the value buffer.
475 Conveniently, these also handle the case where the buffer is mis-aligned.
477 #define GET_REG8(val) do { \
478 stb_p(mem_buf, val); \
481 #define GET_REG16(val) do { \
482 stw_p(mem_buf, val); \
485 #define GET_REG32(val) do { \
486 stl_p(mem_buf, val); \
489 #define GET_REG64(val) do { \
490 stq_p(mem_buf, val); \
494 #if TARGET_LONG_BITS == 64
495 #define GET_REGL(val) GET_REG64(val)
496 #define ldtul_p(addr) ldq_p(addr)
498 #define GET_REGL(val) GET_REG32(val)
499 #define ldtul_p(addr) ldl_p(addr)
502 #if defined(TARGET_I386)
505 static const int gpr_map
[16] = {
506 R_EAX
, R_EBX
, R_ECX
, R_EDX
, R_ESI
, R_EDI
, R_EBP
, R_ESP
,
507 8, 9, 10, 11, 12, 13, 14, 15
510 static const int gpr_map
[8] = {0, 1, 2, 3, 4, 5, 6, 7};
513 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
515 #define IDX_IP_REG CPU_NB_REGS
516 #define IDX_FLAGS_REG (IDX_IP_REG + 1)
517 #define IDX_SEG_REGS (IDX_FLAGS_REG + 1)
518 #define IDX_FP_REGS (IDX_SEG_REGS + 6)
519 #define IDX_XMM_REGS (IDX_FP_REGS + 16)
520 #define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS)
522 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
524 if (n
< CPU_NB_REGS
) {
525 GET_REGL(env
->regs
[gpr_map
[n
]]);
526 } else if (n
>= IDX_FP_REGS
&& n
< IDX_FP_REGS
+ 8) {
527 #ifdef USE_X86LDOUBLE
528 /* FIXME: byteswap float values - after fixing fpregs layout. */
529 memcpy(mem_buf
, &env
->fpregs
[n
- IDX_FP_REGS
], 10);
531 memset(mem_buf
, 0, 10);
534 } else if (n
>= IDX_XMM_REGS
&& n
< IDX_XMM_REGS
+ CPU_NB_REGS
) {
536 stq_p(mem_buf
, env
->xmm_regs
[n
].XMM_Q(0));
537 stq_p(mem_buf
+ 8, env
->xmm_regs
[n
].XMM_Q(1));
541 case IDX_IP_REG
: GET_REGL(env
->eip
);
542 case IDX_FLAGS_REG
: GET_REG32(env
->eflags
);
544 case IDX_SEG_REGS
: GET_REG32(env
->segs
[R_CS
].selector
);
545 case IDX_SEG_REGS
+ 1: GET_REG32(env
->segs
[R_SS
].selector
);
546 case IDX_SEG_REGS
+ 2: GET_REG32(env
->segs
[R_DS
].selector
);
547 case IDX_SEG_REGS
+ 3: GET_REG32(env
->segs
[R_ES
].selector
);
548 case IDX_SEG_REGS
+ 4: GET_REG32(env
->segs
[R_FS
].selector
);
549 case IDX_SEG_REGS
+ 5: GET_REG32(env
->segs
[R_GS
].selector
);
551 case IDX_FP_REGS
+ 8: GET_REG32(env
->fpuc
);
552 case IDX_FP_REGS
+ 9: GET_REG32((env
->fpus
& ~0x3800) |
553 (env
->fpstt
& 0x7) << 11);
554 case IDX_FP_REGS
+ 10: GET_REG32(0); /* ftag */
555 case IDX_FP_REGS
+ 11: GET_REG32(0); /* fiseg */
556 case IDX_FP_REGS
+ 12: GET_REG32(0); /* fioff */
557 case IDX_FP_REGS
+ 13: GET_REG32(0); /* foseg */
558 case IDX_FP_REGS
+ 14: GET_REG32(0); /* fooff */
559 case IDX_FP_REGS
+ 15: GET_REG32(0); /* fop */
561 case IDX_MXCSR_REG
: GET_REG32(env
->mxcsr
);
567 static int cpu_x86_gdb_load_seg(CPUState
*env
, int sreg
, uint8_t *mem_buf
)
569 uint16_t selector
= ldl_p(mem_buf
);
571 if (selector
!= env
->segs
[sreg
].selector
) {
572 #if defined(CONFIG_USER_ONLY)
573 cpu_x86_load_seg(env
, sreg
, selector
);
575 unsigned int limit
, flags
;
578 if (!(env
->cr
[0] & CR0_PE_MASK
) || (env
->eflags
& VM_MASK
)) {
579 base
= selector
<< 4;
583 if (!cpu_x86_get_descr_debug(env
, selector
, &base
, &limit
, &flags
))
586 cpu_x86_load_seg_cache(env
, sreg
, selector
, base
, limit
, flags
);
592 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
596 if (n
< CPU_NB_REGS
) {
597 env
->regs
[gpr_map
[n
]] = ldtul_p(mem_buf
);
598 return sizeof(target_ulong
);
599 } else if (n
>= IDX_FP_REGS
&& n
< IDX_FP_REGS
+ 8) {
600 #ifdef USE_X86LDOUBLE
601 /* FIXME: byteswap float values - after fixing fpregs layout. */
602 memcpy(&env
->fpregs
[n
- IDX_FP_REGS
], mem_buf
, 10);
605 } else if (n
>= IDX_XMM_REGS
&& n
< IDX_XMM_REGS
+ CPU_NB_REGS
) {
607 env
->xmm_regs
[n
].XMM_Q(0) = ldq_p(mem_buf
);
608 env
->xmm_regs
[n
].XMM_Q(1) = ldq_p(mem_buf
+ 8);
613 env
->eip
= ldtul_p(mem_buf
);
614 return sizeof(target_ulong
);
616 env
->eflags
= ldl_p(mem_buf
);
619 case IDX_SEG_REGS
: return cpu_x86_gdb_load_seg(env
, R_CS
, mem_buf
);
620 case IDX_SEG_REGS
+ 1: return cpu_x86_gdb_load_seg(env
, R_SS
, mem_buf
);
621 case IDX_SEG_REGS
+ 2: return cpu_x86_gdb_load_seg(env
, R_DS
, mem_buf
);
622 case IDX_SEG_REGS
+ 3: return cpu_x86_gdb_load_seg(env
, R_ES
, mem_buf
);
623 case IDX_SEG_REGS
+ 4: return cpu_x86_gdb_load_seg(env
, R_FS
, mem_buf
);
624 case IDX_SEG_REGS
+ 5: return cpu_x86_gdb_load_seg(env
, R_GS
, mem_buf
);
626 case IDX_FP_REGS
+ 8:
627 env
->fpuc
= ldl_p(mem_buf
);
629 case IDX_FP_REGS
+ 9:
630 tmp
= ldl_p(mem_buf
);
631 env
->fpstt
= (tmp
>> 11) & 7;
632 env
->fpus
= tmp
& ~0x3800;
634 case IDX_FP_REGS
+ 10: /* ftag */ return 4;
635 case IDX_FP_REGS
+ 11: /* fiseg */ return 4;
636 case IDX_FP_REGS
+ 12: /* fioff */ return 4;
637 case IDX_FP_REGS
+ 13: /* foseg */ return 4;
638 case IDX_FP_REGS
+ 14: /* fooff */ return 4;
639 case IDX_FP_REGS
+ 15: /* fop */ return 4;
642 env
->mxcsr
= ldl_p(mem_buf
);
646 /* Unrecognised register. */
650 #elif defined (TARGET_PPC)
652 /* Old gdb always expects FP registers. Newer (xml-aware) gdb only
653 expects whatever the target description contains. Due to a
654 historical mishap the FP registers appear in between core integer
655 regs and PC, MSR, CR, and so forth. We hack round this by giving the
656 FP regs zero size when talking to a newer gdb. */
657 #define NUM_CORE_REGS 71
658 #if defined (TARGET_PPC64)
659 #define GDB_CORE_XML "power64-core.xml"
661 #define GDB_CORE_XML "power-core.xml"
664 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
668 GET_REGL(env
->gpr
[n
]);
673 stfq_p(mem_buf
, env
->fpr
[n
-32]);
677 case 64: GET_REGL(env
->nip
);
678 case 65: GET_REGL(env
->msr
);
683 for (i
= 0; i
< 8; i
++)
684 cr
|= env
->crf
[i
] << (32 - ((i
+ 1) * 4));
687 case 67: GET_REGL(env
->lr
);
688 case 68: GET_REGL(env
->ctr
);
689 case 69: GET_REGL(env
->xer
);
694 GET_REG32(0); /* fpscr */
701 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
705 env
->gpr
[n
] = ldtul_p(mem_buf
);
706 return sizeof(target_ulong
);
711 env
->fpr
[n
-32] = ldfq_p(mem_buf
);
716 env
->nip
= ldtul_p(mem_buf
);
717 return sizeof(target_ulong
);
719 ppc_store_msr(env
, ldtul_p(mem_buf
));
720 return sizeof(target_ulong
);
723 uint32_t cr
= ldl_p(mem_buf
);
725 for (i
= 0; i
< 8; i
++)
726 env
->crf
[i
] = (cr
>> (32 - ((i
+ 1) * 4))) & 0xF;
730 env
->lr
= ldtul_p(mem_buf
);
731 return sizeof(target_ulong
);
733 env
->ctr
= ldtul_p(mem_buf
);
734 return sizeof(target_ulong
);
736 env
->xer
= ldtul_p(mem_buf
);
737 return sizeof(target_ulong
);
748 #elif defined (TARGET_SPARC)
750 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
751 #define NUM_CORE_REGS 86
753 #define NUM_CORE_REGS 72
757 #define GET_REGA(val) GET_REG32(val)
759 #define GET_REGA(val) GET_REGL(val)
762 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
766 GET_REGA(env
->gregs
[n
]);
769 /* register window */
770 GET_REGA(env
->regwptr
[n
- 8]);
772 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
775 GET_REG32(*((uint32_t *)&env
->fpr
[n
- 32]));
777 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
779 case 64: GET_REGA(env
->y
);
780 case 65: GET_REGA(GET_PSR(env
));
781 case 66: GET_REGA(env
->wim
);
782 case 67: GET_REGA(env
->tbr
);
783 case 68: GET_REGA(env
->pc
);
784 case 69: GET_REGA(env
->npc
);
785 case 70: GET_REGA(env
->fsr
);
786 case 71: GET_REGA(0); /* csr */
787 default: GET_REGA(0);
792 GET_REG32(*((uint32_t *)&env
->fpr
[n
- 32]));
795 /* f32-f62 (double width, even numbers only) */
798 val
= (uint64_t)*((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 32]) << 32;
799 val
|= *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 33]);
803 case 80: GET_REGL(env
->pc
);
804 case 81: GET_REGL(env
->npc
);
805 case 82: GET_REGL(((uint64_t)GET_CCR(env
) << 32) |
806 ((env
->asi
& 0xff) << 24) |
807 ((env
->pstate
& 0xfff) << 8) |
809 case 83: GET_REGL(env
->fsr
);
810 case 84: GET_REGL(env
->fprs
);
811 case 85: GET_REGL(env
->y
);
817 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
819 #if defined(TARGET_ABI32)
822 tmp
= ldl_p(mem_buf
);
826 tmp
= ldtul_p(mem_buf
);
833 /* register window */
834 env
->regwptr
[n
- 8] = tmp
;
836 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
839 *((uint32_t *)&env
->fpr
[n
- 32]) = tmp
;
841 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
843 case 64: env
->y
= tmp
; break;
844 case 65: PUT_PSR(env
, tmp
); break;
845 case 66: env
->wim
= tmp
; break;
846 case 67: env
->tbr
= tmp
; break;
847 case 68: env
->pc
= tmp
; break;
848 case 69: env
->npc
= tmp
; break;
849 case 70: env
->fsr
= tmp
; break;
857 env
->fpr
[n
] = ldfl_p(mem_buf
);
860 /* f32-f62 (double width, even numbers only) */
861 *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 32]) = tmp
>> 32;
862 *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 33]) = tmp
;
865 case 80: env
->pc
= tmp
; break;
866 case 81: env
->npc
= tmp
; break;
868 PUT_CCR(env
, tmp
>> 32);
869 env
->asi
= (tmp
>> 24) & 0xff;
870 env
->pstate
= (tmp
>> 8) & 0xfff;
871 PUT_CWP64(env
, tmp
& 0xff);
873 case 83: env
->fsr
= tmp
; break;
874 case 84: env
->fprs
= tmp
; break;
875 case 85: env
->y
= tmp
; break;
882 #elif defined (TARGET_ARM)
884 /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
885 whatever the target description contains. Due to a historical mishap
886 the FPA registers appear in between core integer regs and the CPSR.
887 We hack round this by giving the FPA regs zero size when talking to a
889 #define NUM_CORE_REGS 26
890 #define GDB_CORE_XML "arm-core.xml"
892 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
895 /* Core integer register. */
896 GET_REG32(env
->regs
[n
]);
902 memset(mem_buf
, 0, 12);
907 /* FPA status register. */
913 GET_REG32(cpsr_read(env
));
915 /* Unknown register. */
919 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
923 tmp
= ldl_p(mem_buf
);
925 /* Mask out low bit of PC to workaround gdb bugs. This will probably
926 cause problems if we ever implement the Jazelle DBX extensions. */
931 /* Core integer register. */
935 if (n
< 24) { /* 16-23 */
936 /* FPA registers (ignored). */
943 /* FPA status register (ignored). */
949 cpsr_write (env
, tmp
, 0xffffffff);
952 /* Unknown register. */
956 #elif defined (TARGET_M68K)
958 #define NUM_CORE_REGS 18
960 #define GDB_CORE_XML "cf-core.xml"
962 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
966 GET_REG32(env
->dregs
[n
]);
969 GET_REG32(env
->aregs
[n
- 8]);
972 case 16: GET_REG32(env
->sr
);
973 case 17: GET_REG32(env
->pc
);
976 /* FP registers not included here because they vary between
977 ColdFire and m68k. Use XML bits for these. */
981 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
985 tmp
= ldl_p(mem_buf
);
992 env
->aregs
[n
- 8] = tmp
;
995 case 16: env
->sr
= tmp
; break;
996 case 17: env
->pc
= tmp
; break;
1002 #elif defined (TARGET_MIPS)
1004 #define NUM_CORE_REGS 73
1006 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1009 GET_REGL(env
->active_tc
.gpr
[n
]);
1011 if (env
->CP0_Config1
& (1 << CP0C1_FP
)) {
1012 if (n
>= 38 && n
< 70) {
1013 if (env
->CP0_Status
& (1 << CP0St_FR
))
1014 GET_REGL(env
->active_fpu
.fpr
[n
- 38].d
);
1016 GET_REGL(env
->active_fpu
.fpr
[n
- 38].w
[FP_ENDIAN_IDX
]);
1019 case 70: GET_REGL((int32_t)env
->active_fpu
.fcr31
);
1020 case 71: GET_REGL((int32_t)env
->active_fpu
.fcr0
);
1024 case 32: GET_REGL((int32_t)env
->CP0_Status
);
1025 case 33: GET_REGL(env
->active_tc
.LO
[0]);
1026 case 34: GET_REGL(env
->active_tc
.HI
[0]);
1027 case 35: GET_REGL(env
->CP0_BadVAddr
);
1028 case 36: GET_REGL((int32_t)env
->CP0_Cause
);
1029 case 37: GET_REGL(env
->active_tc
.PC
);
1030 case 72: GET_REGL(0); /* fp */
1031 case 89: GET_REGL((int32_t)env
->CP0_PRid
);
1033 if (n
>= 73 && n
<= 88) {
1034 /* 16 embedded regs. */
1041 /* convert MIPS rounding mode in FCR31 to IEEE library */
1042 static unsigned int ieee_rm
[] =
1044 float_round_nearest_even
,
1045 float_round_to_zero
,
1049 #define RESTORE_ROUNDING_MODE \
1050 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1052 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1056 tmp
= ldtul_p(mem_buf
);
1059 env
->active_tc
.gpr
[n
] = tmp
;
1060 return sizeof(target_ulong
);
1062 if (env
->CP0_Config1
& (1 << CP0C1_FP
)
1063 && n
>= 38 && n
< 73) {
1065 if (env
->CP0_Status
& (1 << CP0St_FR
))
1066 env
->active_fpu
.fpr
[n
- 38].d
= tmp
;
1068 env
->active_fpu
.fpr
[n
- 38].w
[FP_ENDIAN_IDX
] = tmp
;
1072 env
->active_fpu
.fcr31
= tmp
& 0xFF83FFFF;
1073 /* set rounding mode */
1074 RESTORE_ROUNDING_MODE
;
1075 #ifndef CONFIG_SOFTFLOAT
1076 /* no floating point exception for native float */
1077 SET_FP_ENABLE(env
->active_fpu
.fcr31
, 0);
1080 case 71: env
->active_fpu
.fcr0
= tmp
; break;
1082 return sizeof(target_ulong
);
1085 case 32: env
->CP0_Status
= tmp
; break;
1086 case 33: env
->active_tc
.LO
[0] = tmp
; break;
1087 case 34: env
->active_tc
.HI
[0] = tmp
; break;
1088 case 35: env
->CP0_BadVAddr
= tmp
; break;
1089 case 36: env
->CP0_Cause
= tmp
; break;
1090 case 37: env
->active_tc
.PC
= tmp
; break;
1091 case 72: /* fp, ignored */ break;
1095 /* Other registers are readonly. Ignore writes. */
1099 return sizeof(target_ulong
);
1101 #elif defined (TARGET_SH4)
1103 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
1104 /* FIXME: We should use XML for this. */
1106 #define NUM_CORE_REGS 59
1108 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1111 if ((env
->sr
& (SR_MD
| SR_RB
)) == (SR_MD
| SR_RB
)) {
1112 GET_REGL(env
->gregs
[n
+ 16]);
1114 GET_REGL(env
->gregs
[n
]);
1116 } else if (n
< 16) {
1117 GET_REGL(env
->gregs
[n
- 8]);
1118 } else if (n
>= 25 && n
< 41) {
1119 GET_REGL(env
->fregs
[(n
- 25) + ((env
->fpscr
& FPSCR_FR
) ? 16 : 0)]);
1120 } else if (n
>= 43 && n
< 51) {
1121 GET_REGL(env
->gregs
[n
- 43]);
1122 } else if (n
>= 51 && n
< 59) {
1123 GET_REGL(env
->gregs
[n
- (51 - 16)]);
1126 case 16: GET_REGL(env
->pc
);
1127 case 17: GET_REGL(env
->pr
);
1128 case 18: GET_REGL(env
->gbr
);
1129 case 19: GET_REGL(env
->vbr
);
1130 case 20: GET_REGL(env
->mach
);
1131 case 21: GET_REGL(env
->macl
);
1132 case 22: GET_REGL(env
->sr
);
1133 case 23: GET_REGL(env
->fpul
);
1134 case 24: GET_REGL(env
->fpscr
);
1135 case 41: GET_REGL(env
->ssr
);
1136 case 42: GET_REGL(env
->spc
);
1142 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1146 tmp
= ldl_p(mem_buf
);
1149 if ((env
->sr
& (SR_MD
| SR_RB
)) == (SR_MD
| SR_RB
)) {
1150 env
->gregs
[n
+ 16] = tmp
;
1152 env
->gregs
[n
] = tmp
;
1155 } else if (n
< 16) {
1156 env
->gregs
[n
- 8] = tmp
;
1158 } else if (n
>= 25 && n
< 41) {
1159 env
->fregs
[(n
- 25) + ((env
->fpscr
& FPSCR_FR
) ? 16 : 0)] = tmp
;
1160 } else if (n
>= 43 && n
< 51) {
1161 env
->gregs
[n
- 43] = tmp
;
1163 } else if (n
>= 51 && n
< 59) {
1164 env
->gregs
[n
- (51 - 16)] = tmp
;
1168 case 16: env
->pc
= tmp
;
1169 case 17: env
->pr
= tmp
;
1170 case 18: env
->gbr
= tmp
;
1171 case 19: env
->vbr
= tmp
;
1172 case 20: env
->mach
= tmp
;
1173 case 21: env
->macl
= tmp
;
1174 case 22: env
->sr
= tmp
;
1175 case 23: env
->fpul
= tmp
;
1176 case 24: env
->fpscr
= tmp
;
1177 case 41: env
->ssr
= tmp
;
1178 case 42: env
->spc
= tmp
;
1184 #elif defined (TARGET_MICROBLAZE)
1186 #define NUM_CORE_REGS (32 + 5)
1188 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1191 GET_REG32(env
->regs
[n
]);
1193 GET_REG32(env
->sregs
[n
- 32]);
1198 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1202 if (n
> NUM_CORE_REGS
)
1205 tmp
= ldl_p(mem_buf
);
1210 env
->sregs
[n
- 32] = tmp
;
1214 #elif defined (TARGET_CRIS)
1216 #define NUM_CORE_REGS 49
1218 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1222 srs
= env
->pregs
[PR_SRS
];
1224 GET_REG32(env
->regs
[n
]);
1227 if (n
>= 21 && n
< 32) {
1228 GET_REG32(env
->pregs
[n
- 16]);
1230 if (n
>= 33 && n
< 49) {
1231 GET_REG32(env
->sregs
[srs
][n
- 33]);
1234 case 16: GET_REG8(env
->pregs
[0]);
1235 case 17: GET_REG8(env
->pregs
[1]);
1236 case 18: GET_REG32(env
->pregs
[2]);
1237 case 19: GET_REG8(srs
);
1238 case 20: GET_REG16(env
->pregs
[4]);
1239 case 32: GET_REG32(env
->pc
);
1245 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1252 tmp
= ldl_p(mem_buf
);
1258 if (n
>= 21 && n
< 32) {
1259 env
->pregs
[n
- 16] = tmp
;
1262 /* FIXME: Should support function regs be writable? */
1266 case 18: env
->pregs
[PR_PID
] = tmp
; break;
1269 case 32: env
->pc
= tmp
; break;
1274 #elif defined (TARGET_ALPHA)
1276 #define NUM_CORE_REGS 65
1278 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1281 GET_REGL(env
->ir
[n
]);
1289 val
=*((uint64_t *)&env
->fir
[n
-32]);
1293 GET_REGL(env
->fpcr
);
1305 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1308 tmp
= ldtul_p(mem_buf
);
1314 if (n
> 31 && n
< 63) {
1315 env
->fir
[n
- 32] = ldfl_p(mem_buf
);
1326 #define NUM_CORE_REGS 0
1328 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1333 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1340 static int num_g_regs
= NUM_CORE_REGS
;
1343 /* Encode data using the encoding for 'x' packets. */
1344 static int memtox(char *buf
, const char *mem
, int len
)
1352 case '#': case '$': case '*': case '}':
1364 static const char *get_feature_xml(const char *p
, const char **newp
)
1366 extern const char *const xml_builtin
[][2];
1370 static char target_xml
[1024];
1373 while (p
[len
] && p
[len
] != ':')
1378 if (strncmp(p
, "target.xml", len
) == 0) {
1379 /* Generate the XML description for this CPU. */
1380 if (!target_xml
[0]) {
1381 GDBRegisterState
*r
;
1383 snprintf(target_xml
, sizeof(target_xml
),
1384 "<?xml version=\"1.0\"?>"
1385 "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1387 "<xi:include href=\"%s\"/>",
1390 for (r
= first_cpu
->gdb_regs
; r
; r
= r
->next
) {
1391 pstrcat(target_xml
, sizeof(target_xml
), "<xi:include href=\"");
1392 pstrcat(target_xml
, sizeof(target_xml
), r
->xml
);
1393 pstrcat(target_xml
, sizeof(target_xml
), "\"/>");
1395 pstrcat(target_xml
, sizeof(target_xml
), "</target>");
1399 for (i
= 0; ; i
++) {
1400 name
= xml_builtin
[i
][0];
1401 if (!name
|| (strncmp(name
, p
, len
) == 0 && strlen(name
) == len
))
1404 return name
? xml_builtin
[i
][1] : NULL
;
1408 static int gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int reg
)
1410 GDBRegisterState
*r
;
1412 if (reg
< NUM_CORE_REGS
)
1413 return cpu_gdb_read_register(env
, mem_buf
, reg
);
1415 for (r
= env
->gdb_regs
; r
; r
= r
->next
) {
1416 if (r
->base_reg
<= reg
&& reg
< r
->base_reg
+ r
->num_regs
) {
1417 return r
->get_reg(env
, mem_buf
, reg
- r
->base_reg
);
1423 static int gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int reg
)
1425 GDBRegisterState
*r
;
1427 if (reg
< NUM_CORE_REGS
)
1428 return cpu_gdb_write_register(env
, mem_buf
, reg
);
1430 for (r
= env
->gdb_regs
; r
; r
= r
->next
) {
1431 if (r
->base_reg
<= reg
&& reg
< r
->base_reg
+ r
->num_regs
) {
1432 return r
->set_reg(env
, mem_buf
, reg
- r
->base_reg
);
1438 /* Register a supplemental set of CPU registers. If g_pos is nonzero it
1439 specifies the first register number and these registers are included in
1440 a standard "g" packet. Direction is relative to gdb, i.e. get_reg is
1441 gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1444 void gdb_register_coprocessor(CPUState
* env
,
1445 gdb_reg_cb get_reg
, gdb_reg_cb set_reg
,
1446 int num_regs
, const char *xml
, int g_pos
)
1448 GDBRegisterState
*s
;
1449 GDBRegisterState
**p
;
1450 static int last_reg
= NUM_CORE_REGS
;
1452 s
= (GDBRegisterState
*)qemu_mallocz(sizeof(GDBRegisterState
));
1453 s
->base_reg
= last_reg
;
1454 s
->num_regs
= num_regs
;
1455 s
->get_reg
= get_reg
;
1456 s
->set_reg
= set_reg
;
1460 /* Check for duplicates. */
1461 if (strcmp((*p
)->xml
, xml
) == 0)
1465 /* Add to end of list. */
1466 last_reg
+= num_regs
;
1469 if (g_pos
!= s
->base_reg
) {
1470 fprintf(stderr
, "Error: Bad gdb register numbering for '%s'\n"
1471 "Expected %d got %d\n", xml
, g_pos
, s
->base_reg
);
1473 num_g_regs
= last_reg
;
1478 #ifndef CONFIG_USER_ONLY
1479 static const int xlat_gdb_type
[] = {
1480 [GDB_WATCHPOINT_WRITE
] = BP_GDB
| BP_MEM_WRITE
,
1481 [GDB_WATCHPOINT_READ
] = BP_GDB
| BP_MEM_READ
,
1482 [GDB_WATCHPOINT_ACCESS
] = BP_GDB
| BP_MEM_ACCESS
,
1486 static int gdb_breakpoint_insert(target_ulong addr
, target_ulong len
, int type
)
1492 return kvm_insert_breakpoint(gdbserver_state
->c_cpu
, addr
, len
, type
);
1495 case GDB_BREAKPOINT_SW
:
1496 case GDB_BREAKPOINT_HW
:
1497 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1498 err
= cpu_breakpoint_insert(env
, addr
, BP_GDB
, NULL
);
1503 #ifndef CONFIG_USER_ONLY
1504 case GDB_WATCHPOINT_WRITE
:
1505 case GDB_WATCHPOINT_READ
:
1506 case GDB_WATCHPOINT_ACCESS
:
1507 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1508 err
= cpu_watchpoint_insert(env
, addr
, len
, xlat_gdb_type
[type
],
1520 static int gdb_breakpoint_remove(target_ulong addr
, target_ulong len
, int type
)
1526 return kvm_remove_breakpoint(gdbserver_state
->c_cpu
, addr
, len
, type
);
1529 case GDB_BREAKPOINT_SW
:
1530 case GDB_BREAKPOINT_HW
:
1531 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1532 err
= cpu_breakpoint_remove(env
, addr
, BP_GDB
);
1537 #ifndef CONFIG_USER_ONLY
1538 case GDB_WATCHPOINT_WRITE
:
1539 case GDB_WATCHPOINT_READ
:
1540 case GDB_WATCHPOINT_ACCESS
:
1541 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1542 err
= cpu_watchpoint_remove(env
, addr
, len
, xlat_gdb_type
[type
]);
1553 static void gdb_breakpoint_remove_all(void)
1557 if (kvm_enabled()) {
1558 kvm_remove_all_breakpoints(gdbserver_state
->c_cpu
);
1562 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1563 cpu_breakpoint_remove_all(env
, BP_GDB
);
1564 #ifndef CONFIG_USER_ONLY
1565 cpu_watchpoint_remove_all(env
, BP_GDB
);
1570 static void gdb_set_cpu_pc(GDBState
*s
, target_ulong pc
)
1572 #if defined(TARGET_I386)
1574 cpu_synchronize_state(s
->c_cpu
, 1);
1575 #elif defined (TARGET_PPC)
1577 #elif defined (TARGET_SPARC)
1579 s
->c_cpu
->npc
= pc
+ 4;
1580 #elif defined (TARGET_ARM)
1581 s
->c_cpu
->regs
[15] = pc
;
1582 #elif defined (TARGET_SH4)
1584 #elif defined (TARGET_MIPS)
1585 s
->c_cpu
->active_tc
.PC
= pc
;
1586 #elif defined (TARGET_MICROBLAZE)
1587 s
->c_cpu
->sregs
[SR_PC
] = pc
;
1588 #elif defined (TARGET_CRIS)
1590 #elif defined (TARGET_ALPHA)
1595 static inline int gdb_id(CPUState
*env
)
1597 #if defined(CONFIG_USER_ONLY) && defined(USE_NPTL)
1598 return env
->host_tid
;
1600 return env
->cpu_index
+ 1;
1604 static CPUState
*find_cpu(uint32_t thread_id
)
1608 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1609 if (gdb_id(env
) == thread_id
) {
1617 static int gdb_handle_packet(GDBState
*s
, const char *line_buf
)
1622 int ch
, reg_size
, type
, res
;
1623 char buf
[MAX_PACKET_LENGTH
];
1624 uint8_t mem_buf
[MAX_PACKET_LENGTH
];
1626 target_ulong addr
, len
;
1629 printf("command='%s'\n", line_buf
);
1635 /* TODO: Make this return the correct value for user-mode. */
1636 snprintf(buf
, sizeof(buf
), "T%02xthread:%02x;", GDB_SIGNAL_TRAP
,
1639 /* Remove all the breakpoints when this query is issued,
1640 * because gdb is doing and initial connect and the state
1641 * should be cleaned up.
1643 gdb_breakpoint_remove_all();
1647 addr
= strtoull(p
, (char **)&p
, 16);
1648 gdb_set_cpu_pc(s
, addr
);
1654 s
->signal
= gdb_signal_to_target (strtoul(p
, (char **)&p
, 16));
1655 if (s
->signal
== -1)
1660 if (strncmp(p
, "Cont", 4) == 0) {
1661 int res_signal
, res_thread
;
1665 put_packet(s
, "vCont;c;C;s;S");
1680 if (action
== 'C' || action
== 'S') {
1681 signal
= strtoul(p
, (char **)&p
, 16);
1682 } else if (action
!= 'c' && action
!= 's') {
1688 thread
= strtoull(p
+1, (char **)&p
, 16);
1690 action
= tolower(action
);
1691 if (res
== 0 || (res
== 'c' && action
== 's')) {
1693 res_signal
= signal
;
1694 res_thread
= thread
;
1698 if (res_thread
!= -1 && res_thread
!= 0) {
1699 env
= find_cpu(res_thread
);
1701 put_packet(s
, "E22");
1707 cpu_single_step(s
->c_cpu
, sstep_flags
);
1709 s
->signal
= res_signal
;
1715 goto unknown_command
;
1718 /* Kill the target */
1719 fprintf(stderr
, "\nQEMU: Terminated via GDBstub\n");
1723 gdb_breakpoint_remove_all();
1725 put_packet(s
, "OK");
1729 addr
= strtoull(p
, (char **)&p
, 16);
1730 gdb_set_cpu_pc(s
, addr
);
1732 cpu_single_step(s
->c_cpu
, sstep_flags
);
1740 ret
= strtoull(p
, (char **)&p
, 16);
1743 err
= strtoull(p
, (char **)&p
, 16);
1750 if (gdb_current_syscall_cb
)
1751 gdb_current_syscall_cb(s
->c_cpu
, ret
, err
);
1753 put_packet(s
, "T02");
1760 cpu_synchronize_state(s
->g_cpu
, 0);
1762 for (addr
= 0; addr
< num_g_regs
; addr
++) {
1763 reg_size
= gdb_read_register(s
->g_cpu
, mem_buf
+ len
, addr
);
1766 memtohex(buf
, mem_buf
, len
);
1770 registers
= mem_buf
;
1771 len
= strlen(p
) / 2;
1772 hextomem((uint8_t *)registers
, p
, len
);
1773 for (addr
= 0; addr
< num_g_regs
&& len
> 0; addr
++) {
1774 reg_size
= gdb_write_register(s
->g_cpu
, registers
, addr
);
1776 registers
+= reg_size
;
1778 cpu_synchronize_state(s
->g_cpu
, 1);
1779 put_packet(s
, "OK");
1782 addr
= strtoull(p
, (char **)&p
, 16);
1785 len
= strtoull(p
, NULL
, 16);
1786 if (cpu_memory_rw_debug(s
->g_cpu
, addr
, mem_buf
, len
, 0) != 0) {
1787 put_packet (s
, "E14");
1789 memtohex(buf
, mem_buf
, len
);
1794 addr
= strtoull(p
, (char **)&p
, 16);
1797 len
= strtoull(p
, (char **)&p
, 16);
1800 hextomem(mem_buf
, p
, len
);
1801 if (cpu_memory_rw_debug(s
->g_cpu
, addr
, mem_buf
, len
, 1) != 0)
1802 put_packet(s
, "E14");
1804 put_packet(s
, "OK");
1807 /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1808 This works, but can be very slow. Anything new enough to
1809 understand XML also knows how to use this properly. */
1811 goto unknown_command
;
1812 addr
= strtoull(p
, (char **)&p
, 16);
1813 reg_size
= gdb_read_register(s
->g_cpu
, mem_buf
, addr
);
1815 memtohex(buf
, mem_buf
, reg_size
);
1818 put_packet(s
, "E14");
1823 goto unknown_command
;
1824 addr
= strtoull(p
, (char **)&p
, 16);
1827 reg_size
= strlen(p
) / 2;
1828 hextomem(mem_buf
, p
, reg_size
);
1829 gdb_write_register(s
->g_cpu
, mem_buf
, addr
);
1830 put_packet(s
, "OK");
1834 type
= strtoul(p
, (char **)&p
, 16);
1837 addr
= strtoull(p
, (char **)&p
, 16);
1840 len
= strtoull(p
, (char **)&p
, 16);
1842 res
= gdb_breakpoint_insert(addr
, len
, type
);
1844 res
= gdb_breakpoint_remove(addr
, len
, type
);
1846 put_packet(s
, "OK");
1847 else if (res
== -ENOSYS
)
1850 put_packet(s
, "E22");
1854 thread
= strtoull(p
, (char **)&p
, 16);
1855 if (thread
== -1 || thread
== 0) {
1856 put_packet(s
, "OK");
1859 env
= find_cpu(thread
);
1861 put_packet(s
, "E22");
1867 put_packet(s
, "OK");
1871 put_packet(s
, "OK");
1874 put_packet(s
, "E22");
1879 thread
= strtoull(p
, (char **)&p
, 16);
1880 env
= find_cpu(thread
);
1883 put_packet(s
, "OK");
1885 put_packet(s
, "E22");
1890 /* parse any 'q' packets here */
1891 if (!strcmp(p
,"qemu.sstepbits")) {
1892 /* Query Breakpoint bit definitions */
1893 snprintf(buf
, sizeof(buf
), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1899 } else if (strncmp(p
,"qemu.sstep",10) == 0) {
1900 /* Display or change the sstep_flags */
1903 /* Display current setting */
1904 snprintf(buf
, sizeof(buf
), "0x%x", sstep_flags
);
1909 type
= strtoul(p
, (char **)&p
, 16);
1911 put_packet(s
, "OK");
1913 } else if (strcmp(p
,"C") == 0) {
1914 /* "Current thread" remains vague in the spec, so always return
1915 * the first CPU (gdb returns the first thread). */
1916 put_packet(s
, "QC1");
1918 } else if (strcmp(p
,"fThreadInfo") == 0) {
1919 s
->query_cpu
= first_cpu
;
1920 goto report_cpuinfo
;
1921 } else if (strcmp(p
,"sThreadInfo") == 0) {
1924 snprintf(buf
, sizeof(buf
), "m%x", gdb_id(s
->query_cpu
));
1926 s
->query_cpu
= s
->query_cpu
->next_cpu
;
1930 } else if (strncmp(p
,"ThreadExtraInfo,", 16) == 0) {
1931 thread
= strtoull(p
+16, (char **)&p
, 16);
1932 env
= find_cpu(thread
);
1934 cpu_synchronize_state(env
, 0);
1935 len
= snprintf((char *)mem_buf
, sizeof(mem_buf
),
1936 "CPU#%d [%s]", env
->cpu_index
,
1937 env
->halted
? "halted " : "running");
1938 memtohex(buf
, mem_buf
, len
);
1943 #ifdef CONFIG_USER_ONLY
1944 else if (strncmp(p
, "Offsets", 7) == 0) {
1945 TaskState
*ts
= s
->c_cpu
->opaque
;
1947 snprintf(buf
, sizeof(buf
),
1948 "Text=" TARGET_ABI_FMT_lx
";Data=" TARGET_ABI_FMT_lx
1949 ";Bss=" TARGET_ABI_FMT_lx
,
1950 ts
->info
->code_offset
,
1951 ts
->info
->data_offset
,
1952 ts
->info
->data_offset
);
1956 #else /* !CONFIG_USER_ONLY */
1957 else if (strncmp(p
, "Rcmd,", 5) == 0) {
1958 int len
= strlen(p
+ 5);
1960 if ((len
% 2) != 0) {
1961 put_packet(s
, "E01");
1964 hextomem(mem_buf
, p
+ 5, len
);
1967 qemu_chr_read(s
->mon_chr
, mem_buf
, len
);
1968 put_packet(s
, "OK");
1971 #endif /* !CONFIG_USER_ONLY */
1972 if (strncmp(p
, "Supported", 9) == 0) {
1973 snprintf(buf
, sizeof(buf
), "PacketSize=%x", MAX_PACKET_LENGTH
);
1975 pstrcat(buf
, sizeof(buf
), ";qXfer:features:read+");
1981 if (strncmp(p
, "Xfer:features:read:", 19) == 0) {
1983 target_ulong total_len
;
1987 xml
= get_feature_xml(p
, &p
);
1989 snprintf(buf
, sizeof(buf
), "E00");
1996 addr
= strtoul(p
, (char **)&p
, 16);
1999 len
= strtoul(p
, (char **)&p
, 16);
2001 total_len
= strlen(xml
);
2002 if (addr
> total_len
) {
2003 snprintf(buf
, sizeof(buf
), "E00");
2007 if (len
> (MAX_PACKET_LENGTH
- 5) / 2)
2008 len
= (MAX_PACKET_LENGTH
- 5) / 2;
2009 if (len
< total_len
- addr
) {
2011 len
= memtox(buf
+ 1, xml
+ addr
, len
);
2014 len
= memtox(buf
+ 1, xml
+ addr
, total_len
- addr
);
2016 put_packet_binary(s
, buf
, len
+ 1);
2020 /* Unrecognised 'q' command. */
2021 goto unknown_command
;
2025 /* put empty packet */
2033 void gdb_set_stop_cpu(CPUState
*env
)
2035 gdbserver_state
->c_cpu
= env
;
2036 gdbserver_state
->g_cpu
= env
;
2039 #ifndef CONFIG_USER_ONLY
2040 static void gdb_vm_state_change(void *opaque
, int running
, int reason
)
2042 GDBState
*s
= gdbserver_state
;
2043 CPUState
*env
= s
->c_cpu
;
2048 if (running
|| (reason
!= EXCP_DEBUG
&& reason
!= EXCP_INTERRUPT
) ||
2049 s
->state
== RS_INACTIVE
|| s
->state
== RS_SYSCALL
)
2052 /* disable single step if it was enable */
2053 cpu_single_step(env
, 0);
2055 if (reason
== EXCP_DEBUG
) {
2056 if (env
->watchpoint_hit
) {
2057 switch (env
->watchpoint_hit
->flags
& BP_MEM_ACCESS
) {
2068 snprintf(buf
, sizeof(buf
),
2069 "T%02xthread:%02x;%swatch:" TARGET_FMT_lx
";",
2070 GDB_SIGNAL_TRAP
, gdb_id(env
), type
,
2071 env
->watchpoint_hit
->vaddr
);
2073 env
->watchpoint_hit
= NULL
;
2077 ret
= GDB_SIGNAL_TRAP
;
2079 ret
= GDB_SIGNAL_INT
;
2081 snprintf(buf
, sizeof(buf
), "T%02xthread:%02x;", ret
, gdb_id(env
));
2086 /* Send a gdb syscall request.
2087 This accepts limited printf-style format specifiers, specifically:
2088 %x - target_ulong argument printed in hex.
2089 %lx - 64-bit argument printed in hex.
2090 %s - string pointer (target_ulong) and length (int) pair. */
2091 void gdb_do_syscall(gdb_syscall_complete_cb cb
, const char *fmt
, ...)
2100 s
= gdbserver_state
;
2103 gdb_current_syscall_cb
= cb
;
2104 s
->state
= RS_SYSCALL
;
2105 #ifndef CONFIG_USER_ONLY
2106 vm_stop(EXCP_DEBUG
);
2117 addr
= va_arg(va
, target_ulong
);
2118 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, TARGET_FMT_lx
, addr
);
2121 if (*(fmt
++) != 'x')
2123 i64
= va_arg(va
, uint64_t);
2124 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, "%" PRIx64
, i64
);
2127 addr
= va_arg(va
, target_ulong
);
2128 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, TARGET_FMT_lx
"/%x",
2129 addr
, va_arg(va
, int));
2133 fprintf(stderr
, "gdbstub: Bad syscall format string '%s'\n",
2144 #ifdef CONFIG_USER_ONLY
2145 gdb_handlesig(s
->c_cpu
, 0);
2151 static void gdb_read_byte(GDBState
*s
, int ch
)
2156 #ifndef CONFIG_USER_ONLY
2157 if (s
->last_packet_len
) {
2158 /* Waiting for a response to the last packet. If we see the start
2159 of a new command then abandon the previous response. */
2162 printf("Got NACK, retransmitting\n");
2164 put_buffer(s
, (uint8_t *)s
->last_packet
, s
->last_packet_len
);
2168 printf("Got ACK\n");
2170 printf("Got '%c' when expecting ACK/NACK\n", ch
);
2172 if (ch
== '+' || ch
== '$')
2173 s
->last_packet_len
= 0;
2178 /* when the CPU is running, we cannot do anything except stop
2179 it when receiving a char */
2180 vm_stop(EXCP_INTERRUPT
);
2187 s
->line_buf_index
= 0;
2188 s
->state
= RS_GETLINE
;
2193 s
->state
= RS_CHKSUM1
;
2194 } else if (s
->line_buf_index
>= sizeof(s
->line_buf
) - 1) {
2197 s
->line_buf
[s
->line_buf_index
++] = ch
;
2201 s
->line_buf
[s
->line_buf_index
] = '\0';
2202 s
->line_csum
= fromhex(ch
) << 4;
2203 s
->state
= RS_CHKSUM2
;
2206 s
->line_csum
|= fromhex(ch
);
2208 for(i
= 0; i
< s
->line_buf_index
; i
++) {
2209 csum
+= s
->line_buf
[i
];
2211 if (s
->line_csum
!= (csum
& 0xff)) {
2213 put_buffer(s
, &reply
, 1);
2217 put_buffer(s
, &reply
, 1);
2218 s
->state
= gdb_handle_packet(s
, s
->line_buf
);
2227 #ifdef CONFIG_USER_ONLY
2233 s
= gdbserver_state
;
2235 if (gdbserver_fd
< 0 || s
->fd
< 0)
2242 gdb_handlesig (CPUState
*env
, int sig
)
2248 s
= gdbserver_state
;
2249 if (gdbserver_fd
< 0 || s
->fd
< 0)
2252 /* disable single step if it was enabled */
2253 cpu_single_step(env
, 0);
2258 snprintf(buf
, sizeof(buf
), "S%02x", target_signal_to_gdb (sig
));
2261 /* put_packet() might have detected that the peer terminated the
2268 s
->running_state
= 0;
2269 while (s
->running_state
== 0) {
2270 n
= read (s
->fd
, buf
, 256);
2275 for (i
= 0; i
< n
; i
++)
2276 gdb_read_byte (s
, buf
[i
]);
2278 else if (n
== 0 || errno
!= EAGAIN
)
2280 /* XXX: Connection closed. Should probably wait for annother
2281 connection before continuing. */
2290 /* Tell the remote gdb that the process has exited. */
2291 void gdb_exit(CPUState
*env
, int code
)
2296 s
= gdbserver_state
;
2297 if (gdbserver_fd
< 0 || s
->fd
< 0)
2300 snprintf(buf
, sizeof(buf
), "W%02x", code
);
2304 /* Tell the remote gdb that the process has exited due to SIG. */
2305 void gdb_signalled(CPUState
*env
, int sig
)
2310 s
= gdbserver_state
;
2311 if (gdbserver_fd
< 0 || s
->fd
< 0)
2314 snprintf(buf
, sizeof(buf
), "X%02x", target_signal_to_gdb (sig
));
2318 static void gdb_accept(void)
2321 struct sockaddr_in sockaddr
;
2326 len
= sizeof(sockaddr
);
2327 fd
= accept(gdbserver_fd
, (struct sockaddr
*)&sockaddr
, &len
);
2328 if (fd
< 0 && errno
!= EINTR
) {
2331 } else if (fd
>= 0) {
2336 /* set short latency */
2338 setsockopt(fd
, IPPROTO_TCP
, TCP_NODELAY
, (char *)&val
, sizeof(val
));
2340 s
= qemu_mallocz(sizeof(GDBState
));
2341 s
->c_cpu
= first_cpu
;
2342 s
->g_cpu
= first_cpu
;
2346 gdbserver_state
= s
;
2348 fcntl(fd
, F_SETFL
, O_NONBLOCK
);
2351 static int gdbserver_open(int port
)
2353 struct sockaddr_in sockaddr
;
2356 fd
= socket(PF_INET
, SOCK_STREAM
, 0);
2362 /* allow fast reuse */
2364 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (char *)&val
, sizeof(val
));
2366 sockaddr
.sin_family
= AF_INET
;
2367 sockaddr
.sin_port
= htons(port
);
2368 sockaddr
.sin_addr
.s_addr
= 0;
2369 ret
= bind(fd
, (struct sockaddr
*)&sockaddr
, sizeof(sockaddr
));
2374 ret
= listen(fd
, 0);
2382 int gdbserver_start(int port
)
2384 gdbserver_fd
= gdbserver_open(port
);
2385 if (gdbserver_fd
< 0)
2387 /* accept connections */
2392 /* Disable gdb stub for child processes. */
2393 void gdbserver_fork(CPUState
*env
)
2395 GDBState
*s
= gdbserver_state
;
2396 if (gdbserver_fd
< 0 || s
->fd
< 0)
2400 cpu_breakpoint_remove_all(env
, BP_GDB
);
2401 cpu_watchpoint_remove_all(env
, BP_GDB
);
2404 static int gdb_chr_can_receive(void *opaque
)
2406 /* We can handle an arbitrarily large amount of data.
2407 Pick the maximum packet size, which is as good as anything. */
2408 return MAX_PACKET_LENGTH
;
2411 static void gdb_chr_receive(void *opaque
, const uint8_t *buf
, int size
)
2415 for (i
= 0; i
< size
; i
++) {
2416 gdb_read_byte(gdbserver_state
, buf
[i
]);
2420 static void gdb_chr_event(void *opaque
, int event
)
2423 case CHR_EVENT_RESET
:
2424 vm_stop(EXCP_INTERRUPT
);
2432 static void gdb_monitor_output(GDBState
*s
, const char *msg
, int len
)
2434 char buf
[MAX_PACKET_LENGTH
];
2437 if (len
> (MAX_PACKET_LENGTH
/2) - 1)
2438 len
= (MAX_PACKET_LENGTH
/2) - 1;
2439 memtohex(buf
+ 1, (uint8_t *)msg
, len
);
2443 static int gdb_monitor_write(CharDriverState
*chr
, const uint8_t *buf
, int len
)
2445 const char *p
= (const char *)buf
;
2448 max_sz
= (sizeof(gdbserver_state
->last_packet
) - 2) / 2;
2450 if (len
<= max_sz
) {
2451 gdb_monitor_output(gdbserver_state
, p
, len
);
2454 gdb_monitor_output(gdbserver_state
, p
, max_sz
);
2462 static void gdb_sigterm_handler(int signal
)
2465 vm_stop(EXCP_INTERRUPT
);
2469 int gdbserver_start(const char *device
)
2472 char gdbstub_device_name
[128];
2473 CharDriverState
*chr
= NULL
;
2474 CharDriverState
*mon_chr
;
2478 if (strcmp(device
, "none") != 0) {
2479 if (strstart(device
, "tcp:", NULL
)) {
2480 /* enforce required TCP attributes */
2481 snprintf(gdbstub_device_name
, sizeof(gdbstub_device_name
),
2482 "%s,nowait,nodelay,server", device
);
2483 device
= gdbstub_device_name
;
2486 else if (strcmp(device
, "stdio") == 0) {
2487 struct sigaction act
;
2489 memset(&act
, 0, sizeof(act
));
2490 act
.sa_handler
= gdb_sigterm_handler
;
2491 sigaction(SIGINT
, &act
, NULL
);
2494 chr
= qemu_chr_open("gdb", device
, NULL
);
2498 qemu_chr_add_handlers(chr
, gdb_chr_can_receive
, gdb_chr_receive
,
2499 gdb_chr_event
, NULL
);
2502 s
= gdbserver_state
;
2504 s
= qemu_mallocz(sizeof(GDBState
));
2505 gdbserver_state
= s
;
2507 qemu_add_vm_change_state_handler(gdb_vm_state_change
, NULL
);
2509 /* Initialize a monitor terminal for gdb */
2510 mon_chr
= qemu_mallocz(sizeof(*mon_chr
));
2511 mon_chr
->chr_write
= gdb_monitor_write
;
2512 monitor_init(mon_chr
, 0);
2515 qemu_chr_close(s
->chr
);
2516 mon_chr
= s
->mon_chr
;
2517 memset(s
, 0, sizeof(GDBState
));
2519 s
->c_cpu
= first_cpu
;
2520 s
->g_cpu
= first_cpu
;
2522 s
->state
= chr
? RS_IDLE
: RS_INACTIVE
;
2523 s
->mon_chr
= mon_chr
;