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Make binary stripping conditional (Riku Voipio)
[qemu-kvm/fedora.git] / linux-user / main.c
blobc088502db5a5627f975449c5290c4e8d1150f1ec
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <stdarg.h>
24 #include <string.h>
25 #include <errno.h>
26 #include <unistd.h>
27 #include <sys/mman.h>
28
29 #include "qemu.h"
30 #include "qemu-common.h"
31 #include "cache-utils.h"
32 /* For tb_lock */
33 #include "exec-all.h"
34
35
36 #include "envlist.h"
37
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
39
40 char *exec_path;
41
42 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
43 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
44 const char *cpu_vendor_string = NULL;
45
46 #if defined(__i386__) && !defined(CONFIG_STATIC)
47 /* Force usage of an ELF interpreter even if it is an ELF shared
48 object ! */
49 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
50 #endif
51
52 /* for recent libc, we add these dummy symbols which are not declared
53 when generating a linked object (bug in ld ?) */
54 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
55 asm(".globl __preinit_array_start\n"
56 ".globl __preinit_array_end\n"
57 ".globl __init_array_start\n"
58 ".globl __init_array_end\n"
59 ".globl __fini_array_start\n"
60 ".globl __fini_array_end\n"
61 ".section \".rodata\"\n"
62 "__preinit_array_start:\n"
63 "__preinit_array_end:\n"
64 "__init_array_start:\n"
65 "__init_array_end:\n"
66 "__fini_array_start:\n"
67 "__fini_array_end:\n"
68 ".long 0\n"
69 ".previous\n");
70 #endif
71
72 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
73 we allocate a bigger stack. Need a better solution, for example
74 by remapping the process stack directly at the right place */
75 unsigned long x86_stack_size = 512 * 1024;
76
77 void gemu_log(const char *fmt, ...)
78 {
79 va_list ap;
80
81 va_start(ap, fmt);
82 vfprintf(stderr, fmt, ap);
83 va_end(ap);
84 }
85
86 void cpu_outb(CPUState *env, int addr, int val)
87 {
88 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
89 }
90
91 void cpu_outw(CPUState *env, int addr, int val)
92 {
93 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
94 }
95
96 void cpu_outl(CPUState *env, int addr, int val)
97 {
98 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
99 }
100
101 int cpu_inb(CPUState *env, int addr)
102 {
103 fprintf(stderr, "inb: port=0x%04x\n", addr);
104 return 0;
105 }
106
107 int cpu_inw(CPUState *env, int addr)
108 {
109 fprintf(stderr, "inw: port=0x%04x\n", addr);
110 return 0;
111 }
112
113 int cpu_inl(CPUState *env, int addr)
114 {
115 fprintf(stderr, "inl: port=0x%04x\n", addr);
116 return 0;
117 }
118
119 #if defined(TARGET_I386)
120 int cpu_get_pic_interrupt(CPUState *env)
121 {
122 return -1;
123 }
124 #endif
125
126 /* timers for rdtsc */
127
128 #if 0
129
130 static uint64_t emu_time;
131
132 int64_t cpu_get_real_ticks(void)
133 {
134 return emu_time++;
135 }
136
137 #endif
138
139 #if defined(USE_NPTL)
140 /***********************************************************/
141 /* Helper routines for implementing atomic operations. */
142
143 /* To implement exclusive operations we force all cpus to syncronise.
144 We don't require a full sync, only that no cpus are executing guest code.
145 The alternative is to map target atomic ops onto host equivalents,
146 which requires quite a lot of per host/target work. */
147 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
148 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
149 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
150 static int pending_cpus;
151
152 /* Make sure everything is in a consistent state for calling fork(). */
153 void fork_start(void)
154 {
155 mmap_fork_start();
156 pthread_mutex_lock(&tb_lock);
157 pthread_mutex_lock(&exclusive_lock);
158 }
159
160 void fork_end(int child)
161 {
162 if (child) {
163 /* Child processes created by fork() only have a single thread.
164 Discard information about the parent threads. */
165 first_cpu = thread_env;
166 thread_env->next_cpu = NULL;
167 pending_cpus = 0;
168 pthread_mutex_init(&exclusive_lock, NULL);
169 pthread_cond_init(&exclusive_cond, NULL);
170 pthread_cond_init(&exclusive_resume, NULL);
171 pthread_mutex_init(&tb_lock, NULL);
172 gdbserver_fork(thread_env);
173 } else {
174 pthread_mutex_unlock(&exclusive_lock);
175 pthread_mutex_unlock(&tb_lock);
176 }
177 mmap_fork_end(child);
178 }
179
180 /* Wait for pending exclusive operations to complete. The exclusive lock
181 must be held. */
182 static inline void exclusive_idle(void)
183 {
184 while (pending_cpus) {
185 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
186 }
187 }
188
189 /* Start an exclusive operation.
190 Must only be called from outside cpu_arm_exec. */
191 static inline void start_exclusive(void)
192 {
193 CPUState *other;
194 pthread_mutex_lock(&exclusive_lock);
195 exclusive_idle();
196
197 pending_cpus = 1;
198 /* Make all other cpus stop executing. */
199 for (other = first_cpu; other; other = other->next_cpu) {
200 if (other->running) {
201 pending_cpus++;
202 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
203 }
204 }
205 if (pending_cpus > 1) {
206 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
207 }
208 }
209
210 /* Finish an exclusive operation. */
211 static inline void end_exclusive(void)
212 {
213 pending_cpus = 0;
214 pthread_cond_broadcast(&exclusive_resume);
215 pthread_mutex_unlock(&exclusive_lock);
216 }
217
218 /* Wait for exclusive ops to finish, and begin cpu execution. */
219 static inline void cpu_exec_start(CPUState *env)
220 {
221 pthread_mutex_lock(&exclusive_lock);
222 exclusive_idle();
223 env->running = 1;
224 pthread_mutex_unlock(&exclusive_lock);
225 }
226
227 /* Mark cpu as not executing, and release pending exclusive ops. */
228 static inline void cpu_exec_end(CPUState *env)
229 {
230 pthread_mutex_lock(&exclusive_lock);
231 env->running = 0;
232 if (pending_cpus > 1) {
233 pending_cpus--;
234 if (pending_cpus == 1) {
235 pthread_cond_signal(&exclusive_cond);
236 }
237 }
238 exclusive_idle();
239 pthread_mutex_unlock(&exclusive_lock);
240 }
241 #else /* if !USE_NPTL */
242 /* These are no-ops because we are not threadsafe. */
243 static inline void cpu_exec_start(CPUState *env)
244 {
245 }
246
247 static inline void cpu_exec_end(CPUState *env)
248 {
249 }
250
251 static inline void start_exclusive(void)
252 {
253 }
254
255 static inline void end_exclusive(void)
256 {
257 }
258
259 void fork_start(void)
260 {
261 }
262
263 void fork_end(int child)
264 {
265 if (child) {
266 gdbserver_fork(thread_env);
267 }
268 }
269 #endif
270
271
272 #ifdef TARGET_I386
273 /***********************************************************/
274 /* CPUX86 core interface */
275
276 void cpu_smm_update(CPUState *env)
277 {
278 }
279
280 uint64_t cpu_get_tsc(CPUX86State *env)
281 {
282 return cpu_get_real_ticks();
283 }
284
285 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
286 int flags)
287 {
288 unsigned int e1, e2;
289 uint32_t *p;
290 e1 = (addr << 16) | (limit & 0xffff);
291 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
292 e2 |= flags;
293 p = ptr;
294 p[0] = tswap32(e1);
295 p[1] = tswap32(e2);
296 }
297
298 static uint64_t *idt_table;
299 #ifdef TARGET_X86_64
300 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
301 uint64_t addr, unsigned int sel)
302 {
303 uint32_t *p, e1, e2;
304 e1 = (addr & 0xffff) | (sel << 16);
305 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
306 p = ptr;
307 p[0] = tswap32(e1);
308 p[1] = tswap32(e2);
309 p[2] = tswap32(addr >> 32);
310 p[3] = 0;
311 }
312 /* only dpl matters as we do only user space emulation */
313 static void set_idt(int n, unsigned int dpl)
314 {
315 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
316 }
317 #else
318 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
319 uint32_t addr, unsigned int sel)
320 {
321 uint32_t *p, e1, e2;
322 e1 = (addr & 0xffff) | (sel << 16);
323 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
324 p = ptr;
325 p[0] = tswap32(e1);
326 p[1] = tswap32(e2);
327 }
328
329 /* only dpl matters as we do only user space emulation */
330 static void set_idt(int n, unsigned int dpl)
331 {
332 set_gate(idt_table + n, 0, dpl, 0, 0);
333 }
334 #endif
335
336 void cpu_loop(CPUX86State *env)
337 {
338 int trapnr;
339 abi_ulong pc;
340 target_siginfo_t info;
341
342 for(;;) {
343 trapnr = cpu_x86_exec(env);
344 switch(trapnr) {
345 case 0x80:
346 /* linux syscall from int $0x80 */
347 env->regs[R_EAX] = do_syscall(env,
348 env->regs[R_EAX],
349 env->regs[R_EBX],
350 env->regs[R_ECX],
351 env->regs[R_EDX],
352 env->regs[R_ESI],
353 env->regs[R_EDI],
354 env->regs[R_EBP]);
355 break;
356 #ifndef TARGET_ABI32
357 case EXCP_SYSCALL:
358 /* linux syscall from syscall intruction */
359 env->regs[R_EAX] = do_syscall(env,
360 env->regs[R_EAX],
361 env->regs[R_EDI],
362 env->regs[R_ESI],
363 env->regs[R_EDX],
364 env->regs[10],
365 env->regs[8],
366 env->regs[9]);
367 env->eip = env->exception_next_eip;
368 break;
369 #endif
370 case EXCP0B_NOSEG:
371 case EXCP0C_STACK:
372 info.si_signo = SIGBUS;
373 info.si_errno = 0;
374 info.si_code = TARGET_SI_KERNEL;
375 info._sifields._sigfault._addr = 0;
376 queue_signal(env, info.si_signo, &info);
377 break;
378 case EXCP0D_GPF:
379 /* XXX: potential problem if ABI32 */
380 #ifndef TARGET_X86_64
381 if (env->eflags & VM_MASK) {
382 handle_vm86_fault(env);
383 } else
384 #endif
385 {
386 info.si_signo = SIGSEGV;
387 info.si_errno = 0;
388 info.si_code = TARGET_SI_KERNEL;
389 info._sifields._sigfault._addr = 0;
390 queue_signal(env, info.si_signo, &info);
391 }
392 break;
393 case EXCP0E_PAGE:
394 info.si_signo = SIGSEGV;
395 info.si_errno = 0;
396 if (!(env->error_code & 1))
397 info.si_code = TARGET_SEGV_MAPERR;
398 else
399 info.si_code = TARGET_SEGV_ACCERR;
400 info._sifields._sigfault._addr = env->cr[2];
401 queue_signal(env, info.si_signo, &info);
402 break;
403 case EXCP00_DIVZ:
404 #ifndef TARGET_X86_64
405 if (env->eflags & VM_MASK) {
406 handle_vm86_trap(env, trapnr);
407 } else
408 #endif
409 {
410 /* division by zero */
411 info.si_signo = SIGFPE;
412 info.si_errno = 0;
413 info.si_code = TARGET_FPE_INTDIV;
414 info._sifields._sigfault._addr = env->eip;
415 queue_signal(env, info.si_signo, &info);
416 }
417 break;
418 case EXCP01_DB:
419 case EXCP03_INT3:
420 #ifndef TARGET_X86_64
421 if (env->eflags & VM_MASK) {
422 handle_vm86_trap(env, trapnr);
423 } else
424 #endif
425 {
426 info.si_signo = SIGTRAP;
427 info.si_errno = 0;
428 if (trapnr == EXCP01_DB) {
429 info.si_code = TARGET_TRAP_BRKPT;
430 info._sifields._sigfault._addr = env->eip;
431 } else {
432 info.si_code = TARGET_SI_KERNEL;
433 info._sifields._sigfault._addr = 0;
434 }
435 queue_signal(env, info.si_signo, &info);
436 }
437 break;
438 case EXCP04_INTO:
439 case EXCP05_BOUND:
440 #ifndef TARGET_X86_64
441 if (env->eflags & VM_MASK) {
442 handle_vm86_trap(env, trapnr);
443 } else
444 #endif
445 {
446 info.si_signo = SIGSEGV;
447 info.si_errno = 0;
448 info.si_code = TARGET_SI_KERNEL;
449 info._sifields._sigfault._addr = 0;
450 queue_signal(env, info.si_signo, &info);
451 }
452 break;
453 case EXCP06_ILLOP:
454 info.si_signo = SIGILL;
455 info.si_errno = 0;
456 info.si_code = TARGET_ILL_ILLOPN;
457 info._sifields._sigfault._addr = env->eip;
458 queue_signal(env, info.si_signo, &info);
459 break;
460 case EXCP_INTERRUPT:
461 /* just indicate that signals should be handled asap */
462 break;
463 case EXCP_DEBUG:
464 {
465 int sig;
466
467 sig = gdb_handlesig (env, TARGET_SIGTRAP);
468 if (sig)
469 {
470 info.si_signo = sig;
471 info.si_errno = 0;
472 info.si_code = TARGET_TRAP_BRKPT;
473 queue_signal(env, info.si_signo, &info);
474 }
475 }
476 break;
477 default:
478 pc = env->segs[R_CS].base + env->eip;
479 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
480 (long)pc, trapnr);
481 abort();
482 }
483 process_pending_signals(env);
484 }
485 }
486 #endif
487
488 #ifdef TARGET_ARM
489
490 static void arm_cache_flush(abi_ulong start, abi_ulong last)
491 {
492 abi_ulong addr, last1;
493
494 if (last < start)
495 return;
496 addr = start;
497 for(;;) {
498 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
499 if (last1 > last)
500 last1 = last;
501 tb_invalidate_page_range(addr, last1 + 1);
502 if (last1 == last)
503 break;
504 addr = last1 + 1;
505 }
506 }
507
508 /* Handle a jump to the kernel code page. */
509 static int
510 do_kernel_trap(CPUARMState *env)
511 {
512 uint32_t addr;
513 uint32_t cpsr;
514 uint32_t val;
515
516 switch (env->regs[15]) {
517 case 0xffff0fa0: /* __kernel_memory_barrier */
518 /* ??? No-op. Will need to do better for SMP. */
519 break;
520 case 0xffff0fc0: /* __kernel_cmpxchg */
521 /* XXX: This only works between threads, not between processes.
522 It's probably possible to implement this with native host
523 operations. However things like ldrex/strex are much harder so
524 there's not much point trying. */
525 start_exclusive();
526 cpsr = cpsr_read(env);
527 addr = env->regs[2];
528 /* FIXME: This should SEGV if the access fails. */
529 if (get_user_u32(val, addr))
530 val = ~env->regs[0];
531 if (val == env->regs[0]) {
532 val = env->regs[1];
533 /* FIXME: Check for segfaults. */
534 put_user_u32(val, addr);
535 env->regs[0] = 0;
536 cpsr |= CPSR_C;
537 } else {
538 env->regs[0] = -1;
539 cpsr &= ~CPSR_C;
540 }
541 cpsr_write(env, cpsr, CPSR_C);
542 end_exclusive();
543 break;
544 case 0xffff0fe0: /* __kernel_get_tls */
545 env->regs[0] = env->cp15.c13_tls2;
546 break;
547 default:
548 return 1;
549 }
550 /* Jump back to the caller. */
551 addr = env->regs[14];
552 if (addr & 1) {
553 env->thumb = 1;
554 addr &= ~1;
555 }
556 env->regs[15] = addr;
557
558 return 0;
559 }
560
561 void cpu_loop(CPUARMState *env)
562 {
563 int trapnr;
564 unsigned int n, insn;
565 target_siginfo_t info;
566 uint32_t addr;
567
568 for(;;) {
569 cpu_exec_start(env);
570 trapnr = cpu_arm_exec(env);
571 cpu_exec_end(env);
572 switch(trapnr) {
573 case EXCP_UDEF:
574 {
575 TaskState *ts = env->opaque;
576 uint32_t opcode;
577 int rc;
578
579 /* we handle the FPU emulation here, as Linux */
580 /* we get the opcode */
581 /* FIXME - what to do if get_user() fails? */
582 get_user_u32(opcode, env->regs[15]);
583
584 rc = EmulateAll(opcode, &ts->fpa, env);
585 if (rc == 0) { /* illegal instruction */
586 info.si_signo = SIGILL;
587 info.si_errno = 0;
588 info.si_code = TARGET_ILL_ILLOPN;
589 info._sifields._sigfault._addr = env->regs[15];
590 queue_signal(env, info.si_signo, &info);
591 } else if (rc < 0) { /* FP exception */
592 int arm_fpe=0;
593
594 /* translate softfloat flags to FPSR flags */
595 if (-rc & float_flag_invalid)
596 arm_fpe |= BIT_IOC;
597 if (-rc & float_flag_divbyzero)
598 arm_fpe |= BIT_DZC;
599 if (-rc & float_flag_overflow)
600 arm_fpe |= BIT_OFC;
601 if (-rc & float_flag_underflow)
602 arm_fpe |= BIT_UFC;
603 if (-rc & float_flag_inexact)
604 arm_fpe |= BIT_IXC;
605
606 FPSR fpsr = ts->fpa.fpsr;
607 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
608
609 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
610 info.si_signo = SIGFPE;
611 info.si_errno = 0;
612
613 /* ordered by priority, least first */
614 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
615 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
616 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
617 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
618 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
619
620 info._sifields._sigfault._addr = env->regs[15];
621 queue_signal(env, info.si_signo, &info);
622 } else {
623 env->regs[15] += 4;
624 }
625
626 /* accumulate unenabled exceptions */
627 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
628 fpsr |= BIT_IXC;
629 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
630 fpsr |= BIT_UFC;
631 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
632 fpsr |= BIT_OFC;
633 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
634 fpsr |= BIT_DZC;
635 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
636 fpsr |= BIT_IOC;
637 ts->fpa.fpsr=fpsr;
638 } else { /* everything OK */
639 /* increment PC */
640 env->regs[15] += 4;
641 }
642 }
643 break;
644 case EXCP_SWI:
645 case EXCP_BKPT:
646 {
647 env->eabi = 1;
648 /* system call */
649 if (trapnr == EXCP_BKPT) {
650 if (env->thumb) {
651 /* FIXME - what to do if get_user() fails? */
652 get_user_u16(insn, env->regs[15]);
653 n = insn & 0xff;
654 env->regs[15] += 2;
655 } else {
656 /* FIXME - what to do if get_user() fails? */
657 get_user_u32(insn, env->regs[15]);
658 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
659 env->regs[15] += 4;
660 }
661 } else {
662 if (env->thumb) {
663 /* FIXME - what to do if get_user() fails? */
664 get_user_u16(insn, env->regs[15] - 2);
665 n = insn & 0xff;
666 } else {
667 /* FIXME - what to do if get_user() fails? */
668 get_user_u32(insn, env->regs[15] - 4);
669 n = insn & 0xffffff;
670 }
671 }
672
673 if (n == ARM_NR_cacheflush) {
674 arm_cache_flush(env->regs[0], env->regs[1]);
675 } else if (n == ARM_NR_semihosting
676 || n == ARM_NR_thumb_semihosting) {
677 env->regs[0] = do_arm_semihosting (env);
678 } else if (n == 0 || n >= ARM_SYSCALL_BASE
679 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
680 /* linux syscall */
681 if (env->thumb || n == 0) {
682 n = env->regs[7];
683 } else {
684 n -= ARM_SYSCALL_BASE;
685 env->eabi = 0;
686 }
687 if ( n > ARM_NR_BASE) {
688 switch (n) {
689 case ARM_NR_cacheflush:
690 arm_cache_flush(env->regs[0], env->regs[1]);
691 break;
692 case ARM_NR_set_tls:
693 cpu_set_tls(env, env->regs[0]);
694 env->regs[0] = 0;
695 break;
696 default:
697 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
698 n);
699 env->regs[0] = -TARGET_ENOSYS;
700 break;
701 }
702 } else {
703 env->regs[0] = do_syscall(env,
704 n,
705 env->regs[0],
706 env->regs[1],
707 env->regs[2],
708 env->regs[3],
709 env->regs[4],
710 env->regs[5]);
711 }
712 } else {
713 goto error;
714 }
715 }
716 break;
717 case EXCP_INTERRUPT:
718 /* just indicate that signals should be handled asap */
719 break;
720 case EXCP_PREFETCH_ABORT:
721 addr = env->cp15.c6_insn;
722 goto do_segv;
723 case EXCP_DATA_ABORT:
724 addr = env->cp15.c6_data;
725 goto do_segv;
726 do_segv:
727 {
728 info.si_signo = SIGSEGV;
729 info.si_errno = 0;
730 /* XXX: check env->error_code */
731 info.si_code = TARGET_SEGV_MAPERR;
732 info._sifields._sigfault._addr = addr;
733 queue_signal(env, info.si_signo, &info);
734 }
735 break;
736 case EXCP_DEBUG:
737 {
738 int sig;
739
740 sig = gdb_handlesig (env, TARGET_SIGTRAP);
741 if (sig)
742 {
743 info.si_signo = sig;
744 info.si_errno = 0;
745 info.si_code = TARGET_TRAP_BRKPT;
746 queue_signal(env, info.si_signo, &info);
747 }
748 }
749 break;
750 case EXCP_KERNEL_TRAP:
751 if (do_kernel_trap(env))
752 goto error;
753 break;
754 default:
755 error:
756 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
757 trapnr);
758 cpu_dump_state(env, stderr, fprintf, 0);
759 abort();
760 }
761 process_pending_signals(env);
762 }
763 }
764
765 #endif
766
767 #ifdef TARGET_SPARC
768 #define SPARC64_STACK_BIAS 2047
769
770 //#define DEBUG_WIN
771
772 /* WARNING: dealing with register windows _is_ complicated. More info
773 can be found at http://www.sics.se/~psm/sparcstack.html */
774 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
775 {
776 index = (index + cwp * 16) % (16 * env->nwindows);
777 /* wrap handling : if cwp is on the last window, then we use the
778 registers 'after' the end */
779 if (index < 8 && env->cwp == env->nwindows - 1)
780 index += 16 * env->nwindows;
781 return index;
782 }
783
784 /* save the register window 'cwp1' */
785 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
786 {
787 unsigned int i;
788 abi_ulong sp_ptr;
789
790 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
791 #ifdef TARGET_SPARC64
792 if (sp_ptr & 3)
793 sp_ptr += SPARC64_STACK_BIAS;
794 #endif
795 #if defined(DEBUG_WIN)
796 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
797 sp_ptr, cwp1);
798 #endif
799 for(i = 0; i < 16; i++) {
800 /* FIXME - what to do if put_user() fails? */
801 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
802 sp_ptr += sizeof(abi_ulong);
803 }
804 }
805
806 static void save_window(CPUSPARCState *env)
807 {
808 #ifndef TARGET_SPARC64
809 unsigned int new_wim;
810 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
811 ((1LL << env->nwindows) - 1);
812 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
813 env->wim = new_wim;
814 #else
815 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
816 env->cansave++;
817 env->canrestore--;
818 #endif
819 }
820
821 static void restore_window(CPUSPARCState *env)
822 {
823 #ifndef TARGET_SPARC64
824 unsigned int new_wim;
825 #endif
826 unsigned int i, cwp1;
827 abi_ulong sp_ptr;
828
829 #ifndef TARGET_SPARC64
830 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
831 ((1LL << env->nwindows) - 1);
832 #endif
833
834 /* restore the invalid window */
835 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
836 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
837 #ifdef TARGET_SPARC64
838 if (sp_ptr & 3)
839 sp_ptr += SPARC64_STACK_BIAS;
840 #endif
841 #if defined(DEBUG_WIN)
842 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
843 sp_ptr, cwp1);
844 #endif
845 for(i = 0; i < 16; i++) {
846 /* FIXME - what to do if get_user() fails? */
847 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
848 sp_ptr += sizeof(abi_ulong);
849 }
850 #ifdef TARGET_SPARC64
851 env->canrestore++;
852 if (env->cleanwin < env->nwindows - 1)
853 env->cleanwin++;
854 env->cansave--;
855 #else
856 env->wim = new_wim;
857 #endif
858 }
859
860 static void flush_windows(CPUSPARCState *env)
861 {
862 int offset, cwp1;
863
864 offset = 1;
865 for(;;) {
866 /* if restore would invoke restore_window(), then we can stop */
867 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
868 #ifndef TARGET_SPARC64
869 if (env->wim & (1 << cwp1))
870 break;
871 #else
872 if (env->canrestore == 0)
873 break;
874 env->cansave++;
875 env->canrestore--;
876 #endif
877 save_window_offset(env, cwp1);
878 offset++;
879 }
880 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
881 #ifndef TARGET_SPARC64
882 /* set wim so that restore will reload the registers */
883 env->wim = 1 << cwp1;
884 #endif
885 #if defined(DEBUG_WIN)
886 printf("flush_windows: nb=%d\n", offset - 1);
887 #endif
888 }
889
890 void cpu_loop (CPUSPARCState *env)
891 {
892 int trapnr, ret;
893 target_siginfo_t info;
894
895 while (1) {
896 trapnr = cpu_sparc_exec (env);
897
898 switch (trapnr) {
899 #ifndef TARGET_SPARC64
900 case 0x88:
901 case 0x90:
902 #else
903 case 0x110:
904 case 0x16d:
905 #endif
906 ret = do_syscall (env, env->gregs[1],
907 env->regwptr[0], env->regwptr[1],
908 env->regwptr[2], env->regwptr[3],
909 env->regwptr[4], env->regwptr[5]);
910 if ((unsigned int)ret >= (unsigned int)(-515)) {
911 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
912 env->xcc |= PSR_CARRY;
913 #else
914 env->psr |= PSR_CARRY;
915 #endif
916 ret = -ret;
917 } else {
918 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
919 env->xcc &= ~PSR_CARRY;
920 #else
921 env->psr &= ~PSR_CARRY;
922 #endif
923 }
924 env->regwptr[0] = ret;
925 /* next instruction */
926 env->pc = env->npc;
927 env->npc = env->npc + 4;
928 break;
929 case 0x83: /* flush windows */
930 #ifdef TARGET_ABI32
931 case 0x103:
932 #endif
933 flush_windows(env);
934 /* next instruction */
935 env->pc = env->npc;
936 env->npc = env->npc + 4;
937 break;
938 #ifndef TARGET_SPARC64
939 case TT_WIN_OVF: /* window overflow */
940 save_window(env);
941 break;
942 case TT_WIN_UNF: /* window underflow */
943 restore_window(env);
944 break;
945 case TT_TFAULT:
946 case TT_DFAULT:
947 {
948 info.si_signo = SIGSEGV;
949 info.si_errno = 0;
950 /* XXX: check env->error_code */
951 info.si_code = TARGET_SEGV_MAPERR;
952 info._sifields._sigfault._addr = env->mmuregs[4];
953 queue_signal(env, info.si_signo, &info);
954 }
955 break;
956 #else
957 case TT_SPILL: /* window overflow */
958 save_window(env);
959 break;
960 case TT_FILL: /* window underflow */
961 restore_window(env);
962 break;
963 case TT_TFAULT:
964 case TT_DFAULT:
965 {
966 info.si_signo = SIGSEGV;
967 info.si_errno = 0;
968 /* XXX: check env->error_code */
969 info.si_code = TARGET_SEGV_MAPERR;
970 if (trapnr == TT_DFAULT)
971 info._sifields._sigfault._addr = env->dmmuregs[4];
972 else
973 info._sifields._sigfault._addr = env->tsptr->tpc;
974 queue_signal(env, info.si_signo, &info);
975 }
976 break;
977 #ifndef TARGET_ABI32
978 case 0x16e:
979 flush_windows(env);
980 sparc64_get_context(env);
981 break;
982 case 0x16f:
983 flush_windows(env);
984 sparc64_set_context(env);
985 break;
986 #endif
987 #endif
988 case EXCP_INTERRUPT:
989 /* just indicate that signals should be handled asap */
990 break;
991 case EXCP_DEBUG:
992 {
993 int sig;
994
995 sig = gdb_handlesig (env, TARGET_SIGTRAP);
996 if (sig)
997 {
998 info.si_signo = sig;
999 info.si_errno = 0;
1000 info.si_code = TARGET_TRAP_BRKPT;
1001 queue_signal(env, info.si_signo, &info);
1002 }
1003 }
1004 break;
1005 default:
1006 printf ("Unhandled trap: 0x%x\n", trapnr);
1007 cpu_dump_state(env, stderr, fprintf, 0);
1008 exit (1);
1009 }
1010 process_pending_signals (env);
1011 }
1012 }
1013
1014 #endif
1015
1016 #ifdef TARGET_PPC
1017 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1018 {
1019 /* TO FIX */
1020 return 0;
1021 }
1022
1023 uint32_t cpu_ppc_load_tbl (CPUState *env)
1024 {
1025 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1026 }
1027
1028 uint32_t cpu_ppc_load_tbu (CPUState *env)
1029 {
1030 return cpu_ppc_get_tb(env) >> 32;
1031 }
1032
1033 uint32_t cpu_ppc_load_atbl (CPUState *env)
1034 {
1035 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1036 }
1037
1038 uint32_t cpu_ppc_load_atbu (CPUState *env)
1039 {
1040 return cpu_ppc_get_tb(env) >> 32;
1041 }
1042
1043 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1044 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1045
1046 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1047 {
1048 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1049 }
1050
1051 /* XXX: to be fixed */
1052 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1053 {
1054 return -1;
1055 }
1056
1057 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1058 {
1059 return -1;
1060 }
1061
1062 #define EXCP_DUMP(env, fmt, args...) \
1063 do { \
1064 fprintf(stderr, fmt , ##args); \
1065 cpu_dump_state(env, stderr, fprintf, 0); \
1066 qemu_log(fmt, ##args); \
1067 log_cpu_state(env, 0); \
1068 } while (0)
1069
1070 void cpu_loop(CPUPPCState *env)
1071 {
1072 target_siginfo_t info;
1073 int trapnr;
1074 uint32_t ret;
1075
1076 for(;;) {
1077 trapnr = cpu_ppc_exec(env);
1078 switch(trapnr) {
1079 case POWERPC_EXCP_NONE:
1080 /* Just go on */
1081 break;
1082 case POWERPC_EXCP_CRITICAL: /* Critical input */
1083 cpu_abort(env, "Critical interrupt while in user mode. "
1084 "Aborting\n");
1085 break;
1086 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1087 cpu_abort(env, "Machine check exception while in user mode. "
1088 "Aborting\n");
1089 break;
1090 case POWERPC_EXCP_DSI: /* Data storage exception */
1091 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1092 env->spr[SPR_DAR]);
1093 /* XXX: check this. Seems bugged */
1094 switch (env->error_code & 0xFF000000) {
1095 case 0x40000000:
1096 info.si_signo = TARGET_SIGSEGV;
1097 info.si_errno = 0;
1098 info.si_code = TARGET_SEGV_MAPERR;
1099 break;
1100 case 0x04000000:
1101 info.si_signo = TARGET_SIGILL;
1102 info.si_errno = 0;
1103 info.si_code = TARGET_ILL_ILLADR;
1104 break;
1105 case 0x08000000:
1106 info.si_signo = TARGET_SIGSEGV;
1107 info.si_errno = 0;
1108 info.si_code = TARGET_SEGV_ACCERR;
1109 break;
1110 default:
1111 /* Let's send a regular segfault... */
1112 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1113 env->error_code);
1114 info.si_signo = TARGET_SIGSEGV;
1115 info.si_errno = 0;
1116 info.si_code = TARGET_SEGV_MAPERR;
1117 break;
1118 }
1119 info._sifields._sigfault._addr = env->nip;
1120 queue_signal(env, info.si_signo, &info);
1121 break;
1122 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1123 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1124 env->spr[SPR_SRR0]);
1125 /* XXX: check this */
1126 switch (env->error_code & 0xFF000000) {
1127 case 0x40000000:
1128 info.si_signo = TARGET_SIGSEGV;
1129 info.si_errno = 0;
1130 info.si_code = TARGET_SEGV_MAPERR;
1131 break;
1132 case 0x10000000:
1133 case 0x08000000:
1134 info.si_signo = TARGET_SIGSEGV;
1135 info.si_errno = 0;
1136 info.si_code = TARGET_SEGV_ACCERR;
1137 break;
1138 default:
1139 /* Let's send a regular segfault... */
1140 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1141 env->error_code);
1142 info.si_signo = TARGET_SIGSEGV;
1143 info.si_errno = 0;
1144 info.si_code = TARGET_SEGV_MAPERR;
1145 break;
1146 }
1147 info._sifields._sigfault._addr = env->nip - 4;
1148 queue_signal(env, info.si_signo, &info);
1149 break;
1150 case POWERPC_EXCP_EXTERNAL: /* External input */
1151 cpu_abort(env, "External interrupt while in user mode. "
1152 "Aborting\n");
1153 break;
1154 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1155 EXCP_DUMP(env, "Unaligned memory access\n");
1156 /* XXX: check this */
1157 info.si_signo = TARGET_SIGBUS;
1158 info.si_errno = 0;
1159 info.si_code = TARGET_BUS_ADRALN;
1160 info._sifields._sigfault._addr = env->nip - 4;
1161 queue_signal(env, info.si_signo, &info);
1162 break;
1163 case POWERPC_EXCP_PROGRAM: /* Program exception */
1164 /* XXX: check this */
1165 switch (env->error_code & ~0xF) {
1166 case POWERPC_EXCP_FP:
1167 EXCP_DUMP(env, "Floating point program exception\n");
1168 info.si_signo = TARGET_SIGFPE;
1169 info.si_errno = 0;
1170 switch (env->error_code & 0xF) {
1171 case POWERPC_EXCP_FP_OX:
1172 info.si_code = TARGET_FPE_FLTOVF;
1173 break;
1174 case POWERPC_EXCP_FP_UX:
1175 info.si_code = TARGET_FPE_FLTUND;
1176 break;
1177 case POWERPC_EXCP_FP_ZX:
1178 case POWERPC_EXCP_FP_VXZDZ:
1179 info.si_code = TARGET_FPE_FLTDIV;
1180 break;
1181 case POWERPC_EXCP_FP_XX:
1182 info.si_code = TARGET_FPE_FLTRES;
1183 break;
1184 case POWERPC_EXCP_FP_VXSOFT:
1185 info.si_code = TARGET_FPE_FLTINV;
1186 break;
1187 case POWERPC_EXCP_FP_VXSNAN:
1188 case POWERPC_EXCP_FP_VXISI:
1189 case POWERPC_EXCP_FP_VXIDI:
1190 case POWERPC_EXCP_FP_VXIMZ:
1191 case POWERPC_EXCP_FP_VXVC:
1192 case POWERPC_EXCP_FP_VXSQRT:
1193 case POWERPC_EXCP_FP_VXCVI:
1194 info.si_code = TARGET_FPE_FLTSUB;
1195 break;
1196 default:
1197 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1198 env->error_code);
1199 break;
1200 }
1201 break;
1202 case POWERPC_EXCP_INVAL:
1203 EXCP_DUMP(env, "Invalid instruction\n");
1204 info.si_signo = TARGET_SIGILL;
1205 info.si_errno = 0;
1206 switch (env->error_code & 0xF) {
1207 case POWERPC_EXCP_INVAL_INVAL:
1208 info.si_code = TARGET_ILL_ILLOPC;
1209 break;
1210 case POWERPC_EXCP_INVAL_LSWX:
1211 info.si_code = TARGET_ILL_ILLOPN;
1212 break;
1213 case POWERPC_EXCP_INVAL_SPR:
1214 info.si_code = TARGET_ILL_PRVREG;
1215 break;
1216 case POWERPC_EXCP_INVAL_FP:
1217 info.si_code = TARGET_ILL_COPROC;
1218 break;
1219 default:
1220 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1221 env->error_code & 0xF);
1222 info.si_code = TARGET_ILL_ILLADR;
1223 break;
1224 }
1225 break;
1226 case POWERPC_EXCP_PRIV:
1227 EXCP_DUMP(env, "Privilege violation\n");
1228 info.si_signo = TARGET_SIGILL;
1229 info.si_errno = 0;
1230 switch (env->error_code & 0xF) {
1231 case POWERPC_EXCP_PRIV_OPC:
1232 info.si_code = TARGET_ILL_PRVOPC;
1233 break;
1234 case POWERPC_EXCP_PRIV_REG:
1235 info.si_code = TARGET_ILL_PRVREG;
1236 break;
1237 default:
1238 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1239 env->error_code & 0xF);
1240 info.si_code = TARGET_ILL_PRVOPC;
1241 break;
1242 }
1243 break;
1244 case POWERPC_EXCP_TRAP:
1245 cpu_abort(env, "Tried to call a TRAP\n");
1246 break;
1247 default:
1248 /* Should not happen ! */
1249 cpu_abort(env, "Unknown program exception (%02x)\n",
1250 env->error_code);
1251 break;
1252 }
1253 info._sifields._sigfault._addr = env->nip - 4;
1254 queue_signal(env, info.si_signo, &info);
1255 break;
1256 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1257 EXCP_DUMP(env, "No floating point allowed\n");
1258 info.si_signo = TARGET_SIGILL;
1259 info.si_errno = 0;
1260 info.si_code = TARGET_ILL_COPROC;
1261 info._sifields._sigfault._addr = env->nip - 4;
1262 queue_signal(env, info.si_signo, &info);
1263 break;
1264 case POWERPC_EXCP_SYSCALL: /* System call exception */
1265 cpu_abort(env, "Syscall exception while in user mode. "
1266 "Aborting\n");
1267 break;
1268 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1269 EXCP_DUMP(env, "No APU instruction allowed\n");
1270 info.si_signo = TARGET_SIGILL;
1271 info.si_errno = 0;
1272 info.si_code = TARGET_ILL_COPROC;
1273 info._sifields._sigfault._addr = env->nip - 4;
1274 queue_signal(env, info.si_signo, &info);
1275 break;
1276 case POWERPC_EXCP_DECR: /* Decrementer exception */
1277 cpu_abort(env, "Decrementer interrupt while in user mode. "
1278 "Aborting\n");
1279 break;
1280 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1281 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1282 "Aborting\n");
1283 break;
1284 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1285 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1286 "Aborting\n");
1287 break;
1288 case POWERPC_EXCP_DTLB: /* Data TLB error */
1289 cpu_abort(env, "Data TLB exception while in user mode. "
1290 "Aborting\n");
1291 break;
1292 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1293 cpu_abort(env, "Instruction TLB exception while in user mode. "
1294 "Aborting\n");
1295 break;
1296 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1297 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1298 info.si_signo = TARGET_SIGILL;
1299 info.si_errno = 0;
1300 info.si_code = TARGET_ILL_COPROC;
1301 info._sifields._sigfault._addr = env->nip - 4;
1302 queue_signal(env, info.si_signo, &info);
1303 break;
1304 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1305 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1306 break;
1307 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1308 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1309 break;
1310 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1311 cpu_abort(env, "Performance monitor exception not handled\n");
1312 break;
1313 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1314 cpu_abort(env, "Doorbell interrupt while in user mode. "
1315 "Aborting\n");
1316 break;
1317 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1318 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1319 "Aborting\n");
1320 break;
1321 case POWERPC_EXCP_RESET: /* System reset exception */
1322 cpu_abort(env, "Reset interrupt while in user mode. "
1323 "Aborting\n");
1324 break;
1325 case POWERPC_EXCP_DSEG: /* Data segment exception */
1326 cpu_abort(env, "Data segment exception while in user mode. "
1327 "Aborting\n");
1328 break;
1329 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1330 cpu_abort(env, "Instruction segment exception "
1331 "while in user mode. Aborting\n");
1332 break;
1333 /* PowerPC 64 with hypervisor mode support */
1334 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1335 cpu_abort(env, "Hypervisor decrementer interrupt "
1336 "while in user mode. Aborting\n");
1337 break;
1338 case POWERPC_EXCP_TRACE: /* Trace exception */
1339 /* Nothing to do:
1340 * we use this exception to emulate step-by-step execution mode.
1341 */
1342 break;
1343 /* PowerPC 64 with hypervisor mode support */
1344 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1345 cpu_abort(env, "Hypervisor data storage exception "
1346 "while in user mode. Aborting\n");
1347 break;
1348 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1349 cpu_abort(env, "Hypervisor instruction storage exception "
1350 "while in user mode. Aborting\n");
1351 break;
1352 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1353 cpu_abort(env, "Hypervisor data segment exception "
1354 "while in user mode. Aborting\n");
1355 break;
1356 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1357 cpu_abort(env, "Hypervisor instruction segment exception "
1358 "while in user mode. Aborting\n");
1359 break;
1360 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1361 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1362 info.si_signo = TARGET_SIGILL;
1363 info.si_errno = 0;
1364 info.si_code = TARGET_ILL_COPROC;
1365 info._sifields._sigfault._addr = env->nip - 4;
1366 queue_signal(env, info.si_signo, &info);
1367 break;
1368 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1369 cpu_abort(env, "Programable interval timer interrupt "
1370 "while in user mode. Aborting\n");
1371 break;
1372 case POWERPC_EXCP_IO: /* IO error exception */
1373 cpu_abort(env, "IO error exception while in user mode. "
1374 "Aborting\n");
1375 break;
1376 case POWERPC_EXCP_RUNM: /* Run mode exception */
1377 cpu_abort(env, "Run mode exception while in user mode. "
1378 "Aborting\n");
1379 break;
1380 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1381 cpu_abort(env, "Emulation trap exception not handled\n");
1382 break;
1383 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1384 cpu_abort(env, "Instruction fetch TLB exception "
1385 "while in user-mode. Aborting");
1386 break;
1387 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1388 cpu_abort(env, "Data load TLB exception while in user-mode. "
1389 "Aborting");
1390 break;
1391 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1392 cpu_abort(env, "Data store TLB exception while in user-mode. "
1393 "Aborting");
1394 break;
1395 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1396 cpu_abort(env, "Floating-point assist exception not handled\n");
1397 break;
1398 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1399 cpu_abort(env, "Instruction address breakpoint exception "
1400 "not handled\n");
1401 break;
1402 case POWERPC_EXCP_SMI: /* System management interrupt */
1403 cpu_abort(env, "System management interrupt while in user mode. "
1404 "Aborting\n");
1405 break;
1406 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1407 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1408 "Aborting\n");
1409 break;
1410 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1411 cpu_abort(env, "Performance monitor exception not handled\n");
1412 break;
1413 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1414 cpu_abort(env, "Vector assist exception not handled\n");
1415 break;
1416 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1417 cpu_abort(env, "Soft patch exception not handled\n");
1418 break;
1419 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1420 cpu_abort(env, "Maintenance exception while in user mode. "
1421 "Aborting\n");
1422 break;
1423 case POWERPC_EXCP_STOP: /* stop translation */
1424 /* We did invalidate the instruction cache. Go on */
1425 break;
1426 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1427 /* We just stopped because of a branch. Go on */
1428 break;
1429 case POWERPC_EXCP_SYSCALL_USER:
1430 /* system call in user-mode emulation */
1431 /* WARNING:
1432 * PPC ABI uses overflow flag in cr0 to signal an error
1433 * in syscalls.
1434 */
1435 #if 0
1436 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1437 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1438 #endif
1439 env->crf[0] &= ~0x1;
1440 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1441 env->gpr[5], env->gpr[6], env->gpr[7],
1442 env->gpr[8]);
1443 if (ret > (uint32_t)(-515)) {
1444 env->crf[0] |= 0x1;
1445 ret = -ret;
1446 }
1447 env->gpr[3] = ret;
1448 #if 0
1449 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1450 #endif
1451 break;
1452 case EXCP_DEBUG:
1453 {
1454 int sig;
1455
1456 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1457 if (sig) {
1458 info.si_signo = sig;
1459 info.si_errno = 0;
1460 info.si_code = TARGET_TRAP_BRKPT;
1461 queue_signal(env, info.si_signo, &info);
1462 }
1463 }
1464 break;
1465 case EXCP_INTERRUPT:
1466 /* just indicate that signals should be handled asap */
1467 break;
1468 default:
1469 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1470 break;
1471 }
1472 process_pending_signals(env);
1473 }
1474 }
1475 #endif
1476
1477 #ifdef TARGET_MIPS
1478
1479 #define MIPS_SYS(name, args) args,
1480
1481 static const uint8_t mips_syscall_args[] = {
1482 MIPS_SYS(sys_syscall , 0) /* 4000 */
1483 MIPS_SYS(sys_exit , 1)
1484 MIPS_SYS(sys_fork , 0)
1485 MIPS_SYS(sys_read , 3)
1486 MIPS_SYS(sys_write , 3)
1487 MIPS_SYS(sys_open , 3) /* 4005 */
1488 MIPS_SYS(sys_close , 1)
1489 MIPS_SYS(sys_waitpid , 3)
1490 MIPS_SYS(sys_creat , 2)
1491 MIPS_SYS(sys_link , 2)
1492 MIPS_SYS(sys_unlink , 1) /* 4010 */
1493 MIPS_SYS(sys_execve , 0)
1494 MIPS_SYS(sys_chdir , 1)
1495 MIPS_SYS(sys_time , 1)
1496 MIPS_SYS(sys_mknod , 3)
1497 MIPS_SYS(sys_chmod , 2) /* 4015 */
1498 MIPS_SYS(sys_lchown , 3)
1499 MIPS_SYS(sys_ni_syscall , 0)
1500 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1501 MIPS_SYS(sys_lseek , 3)
1502 MIPS_SYS(sys_getpid , 0) /* 4020 */
1503 MIPS_SYS(sys_mount , 5)
1504 MIPS_SYS(sys_oldumount , 1)
1505 MIPS_SYS(sys_setuid , 1)
1506 MIPS_SYS(sys_getuid , 0)
1507 MIPS_SYS(sys_stime , 1) /* 4025 */
1508 MIPS_SYS(sys_ptrace , 4)
1509 MIPS_SYS(sys_alarm , 1)
1510 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1511 MIPS_SYS(sys_pause , 0)
1512 MIPS_SYS(sys_utime , 2) /* 4030 */
1513 MIPS_SYS(sys_ni_syscall , 0)
1514 MIPS_SYS(sys_ni_syscall , 0)
1515 MIPS_SYS(sys_access , 2)
1516 MIPS_SYS(sys_nice , 1)
1517 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1518 MIPS_SYS(sys_sync , 0)
1519 MIPS_SYS(sys_kill , 2)
1520 MIPS_SYS(sys_rename , 2)
1521 MIPS_SYS(sys_mkdir , 2)
1522 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1523 MIPS_SYS(sys_dup , 1)
1524 MIPS_SYS(sys_pipe , 0)
1525 MIPS_SYS(sys_times , 1)
1526 MIPS_SYS(sys_ni_syscall , 0)
1527 MIPS_SYS(sys_brk , 1) /* 4045 */
1528 MIPS_SYS(sys_setgid , 1)
1529 MIPS_SYS(sys_getgid , 0)
1530 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1531 MIPS_SYS(sys_geteuid , 0)
1532 MIPS_SYS(sys_getegid , 0) /* 4050 */
1533 MIPS_SYS(sys_acct , 0)
1534 MIPS_SYS(sys_umount , 2)
1535 MIPS_SYS(sys_ni_syscall , 0)
1536 MIPS_SYS(sys_ioctl , 3)
1537 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1538 MIPS_SYS(sys_ni_syscall , 2)
1539 MIPS_SYS(sys_setpgid , 2)
1540 MIPS_SYS(sys_ni_syscall , 0)
1541 MIPS_SYS(sys_olduname , 1)
1542 MIPS_SYS(sys_umask , 1) /* 4060 */
1543 MIPS_SYS(sys_chroot , 1)
1544 MIPS_SYS(sys_ustat , 2)
1545 MIPS_SYS(sys_dup2 , 2)
1546 MIPS_SYS(sys_getppid , 0)
1547 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1548 MIPS_SYS(sys_setsid , 0)
1549 MIPS_SYS(sys_sigaction , 3)
1550 MIPS_SYS(sys_sgetmask , 0)
1551 MIPS_SYS(sys_ssetmask , 1)
1552 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1553 MIPS_SYS(sys_setregid , 2)
1554 MIPS_SYS(sys_sigsuspend , 0)
1555 MIPS_SYS(sys_sigpending , 1)
1556 MIPS_SYS(sys_sethostname , 2)
1557 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1558 MIPS_SYS(sys_getrlimit , 2)
1559 MIPS_SYS(sys_getrusage , 2)
1560 MIPS_SYS(sys_gettimeofday, 2)
1561 MIPS_SYS(sys_settimeofday, 2)
1562 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1563 MIPS_SYS(sys_setgroups , 2)
1564 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1565 MIPS_SYS(sys_symlink , 2)
1566 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1567 MIPS_SYS(sys_readlink , 3) /* 4085 */
1568 MIPS_SYS(sys_uselib , 1)
1569 MIPS_SYS(sys_swapon , 2)
1570 MIPS_SYS(sys_reboot , 3)
1571 MIPS_SYS(old_readdir , 3)
1572 MIPS_SYS(old_mmap , 6) /* 4090 */
1573 MIPS_SYS(sys_munmap , 2)
1574 MIPS_SYS(sys_truncate , 2)
1575 MIPS_SYS(sys_ftruncate , 2)
1576 MIPS_SYS(sys_fchmod , 2)
1577 MIPS_SYS(sys_fchown , 3) /* 4095 */
1578 MIPS_SYS(sys_getpriority , 2)
1579 MIPS_SYS(sys_setpriority , 3)
1580 MIPS_SYS(sys_ni_syscall , 0)
1581 MIPS_SYS(sys_statfs , 2)
1582 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1583 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1584 MIPS_SYS(sys_socketcall , 2)
1585 MIPS_SYS(sys_syslog , 3)
1586 MIPS_SYS(sys_setitimer , 3)
1587 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1588 MIPS_SYS(sys_newstat , 2)
1589 MIPS_SYS(sys_newlstat , 2)
1590 MIPS_SYS(sys_newfstat , 2)
1591 MIPS_SYS(sys_uname , 1)
1592 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1593 MIPS_SYS(sys_vhangup , 0)
1594 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1595 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1596 MIPS_SYS(sys_wait4 , 4)
1597 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1598 MIPS_SYS(sys_sysinfo , 1)
1599 MIPS_SYS(sys_ipc , 6)
1600 MIPS_SYS(sys_fsync , 1)
1601 MIPS_SYS(sys_sigreturn , 0)
1602 MIPS_SYS(sys_clone , 0) /* 4120 */
1603 MIPS_SYS(sys_setdomainname, 2)
1604 MIPS_SYS(sys_newuname , 1)
1605 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1606 MIPS_SYS(sys_adjtimex , 1)
1607 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1608 MIPS_SYS(sys_sigprocmask , 3)
1609 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1610 MIPS_SYS(sys_init_module , 5)
1611 MIPS_SYS(sys_delete_module, 1)
1612 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1613 MIPS_SYS(sys_quotactl , 0)
1614 MIPS_SYS(sys_getpgid , 1)
1615 MIPS_SYS(sys_fchdir , 1)
1616 MIPS_SYS(sys_bdflush , 2)
1617 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1618 MIPS_SYS(sys_personality , 1)
1619 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1620 MIPS_SYS(sys_setfsuid , 1)
1621 MIPS_SYS(sys_setfsgid , 1)
1622 MIPS_SYS(sys_llseek , 5) /* 4140 */
1623 MIPS_SYS(sys_getdents , 3)
1624 MIPS_SYS(sys_select , 5)
1625 MIPS_SYS(sys_flock , 2)
1626 MIPS_SYS(sys_msync , 3)
1627 MIPS_SYS(sys_readv , 3) /* 4145 */
1628 MIPS_SYS(sys_writev , 3)
1629 MIPS_SYS(sys_cacheflush , 3)
1630 MIPS_SYS(sys_cachectl , 3)
1631 MIPS_SYS(sys_sysmips , 4)
1632 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1633 MIPS_SYS(sys_getsid , 1)
1634 MIPS_SYS(sys_fdatasync , 0)
1635 MIPS_SYS(sys_sysctl , 1)
1636 MIPS_SYS(sys_mlock , 2)
1637 MIPS_SYS(sys_munlock , 2) /* 4155 */
1638 MIPS_SYS(sys_mlockall , 1)
1639 MIPS_SYS(sys_munlockall , 0)
1640 MIPS_SYS(sys_sched_setparam, 2)
1641 MIPS_SYS(sys_sched_getparam, 2)
1642 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1643 MIPS_SYS(sys_sched_getscheduler, 1)
1644 MIPS_SYS(sys_sched_yield , 0)
1645 MIPS_SYS(sys_sched_get_priority_max, 1)
1646 MIPS_SYS(sys_sched_get_priority_min, 1)
1647 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1648 MIPS_SYS(sys_nanosleep, 2)
1649 MIPS_SYS(sys_mremap , 4)
1650 MIPS_SYS(sys_accept , 3)
1651 MIPS_SYS(sys_bind , 3)
1652 MIPS_SYS(sys_connect , 3) /* 4170 */
1653 MIPS_SYS(sys_getpeername , 3)
1654 MIPS_SYS(sys_getsockname , 3)
1655 MIPS_SYS(sys_getsockopt , 5)
1656 MIPS_SYS(sys_listen , 2)
1657 MIPS_SYS(sys_recv , 4) /* 4175 */
1658 MIPS_SYS(sys_recvfrom , 6)
1659 MIPS_SYS(sys_recvmsg , 3)
1660 MIPS_SYS(sys_send , 4)
1661 MIPS_SYS(sys_sendmsg , 3)
1662 MIPS_SYS(sys_sendto , 6) /* 4180 */
1663 MIPS_SYS(sys_setsockopt , 5)
1664 MIPS_SYS(sys_shutdown , 2)
1665 MIPS_SYS(sys_socket , 3)
1666 MIPS_SYS(sys_socketpair , 4)
1667 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1668 MIPS_SYS(sys_getresuid , 3)
1669 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1670 MIPS_SYS(sys_poll , 3)
1671 MIPS_SYS(sys_nfsservctl , 3)
1672 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1673 MIPS_SYS(sys_getresgid , 3)
1674 MIPS_SYS(sys_prctl , 5)
1675 MIPS_SYS(sys_rt_sigreturn, 0)
1676 MIPS_SYS(sys_rt_sigaction, 4)
1677 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1678 MIPS_SYS(sys_rt_sigpending, 2)
1679 MIPS_SYS(sys_rt_sigtimedwait, 4)
1680 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1681 MIPS_SYS(sys_rt_sigsuspend, 0)
1682 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1683 MIPS_SYS(sys_pwrite64 , 6)
1684 MIPS_SYS(sys_chown , 3)
1685 MIPS_SYS(sys_getcwd , 2)
1686 MIPS_SYS(sys_capget , 2)
1687 MIPS_SYS(sys_capset , 2) /* 4205 */
1688 MIPS_SYS(sys_sigaltstack , 0)
1689 MIPS_SYS(sys_sendfile , 4)
1690 MIPS_SYS(sys_ni_syscall , 0)
1691 MIPS_SYS(sys_ni_syscall , 0)
1692 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1693 MIPS_SYS(sys_truncate64 , 4)
1694 MIPS_SYS(sys_ftruncate64 , 4)
1695 MIPS_SYS(sys_stat64 , 2)
1696 MIPS_SYS(sys_lstat64 , 2)
1697 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1698 MIPS_SYS(sys_pivot_root , 2)
1699 MIPS_SYS(sys_mincore , 3)
1700 MIPS_SYS(sys_madvise , 3)
1701 MIPS_SYS(sys_getdents64 , 3)
1702 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1703 MIPS_SYS(sys_ni_syscall , 0)
1704 MIPS_SYS(sys_gettid , 0)
1705 MIPS_SYS(sys_readahead , 5)
1706 MIPS_SYS(sys_setxattr , 5)
1707 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1708 MIPS_SYS(sys_fsetxattr , 5)
1709 MIPS_SYS(sys_getxattr , 4)
1710 MIPS_SYS(sys_lgetxattr , 4)
1711 MIPS_SYS(sys_fgetxattr , 4)
1712 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1713 MIPS_SYS(sys_llistxattr , 3)
1714 MIPS_SYS(sys_flistxattr , 3)
1715 MIPS_SYS(sys_removexattr , 2)
1716 MIPS_SYS(sys_lremovexattr, 2)
1717 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1718 MIPS_SYS(sys_tkill , 2)
1719 MIPS_SYS(sys_sendfile64 , 5)
1720 MIPS_SYS(sys_futex , 2)
1721 MIPS_SYS(sys_sched_setaffinity, 3)
1722 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1723 MIPS_SYS(sys_io_setup , 2)
1724 MIPS_SYS(sys_io_destroy , 1)
1725 MIPS_SYS(sys_io_getevents, 5)
1726 MIPS_SYS(sys_io_submit , 3)
1727 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1728 MIPS_SYS(sys_exit_group , 1)
1729 MIPS_SYS(sys_lookup_dcookie, 3)
1730 MIPS_SYS(sys_epoll_create, 1)
1731 MIPS_SYS(sys_epoll_ctl , 4)
1732 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1733 MIPS_SYS(sys_remap_file_pages, 5)
1734 MIPS_SYS(sys_set_tid_address, 1)
1735 MIPS_SYS(sys_restart_syscall, 0)
1736 MIPS_SYS(sys_fadvise64_64, 7)
1737 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1738 MIPS_SYS(sys_fstatfs64 , 2)
1739 MIPS_SYS(sys_timer_create, 3)
1740 MIPS_SYS(sys_timer_settime, 4)
1741 MIPS_SYS(sys_timer_gettime, 2)
1742 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1743 MIPS_SYS(sys_timer_delete, 1)
1744 MIPS_SYS(sys_clock_settime, 2)
1745 MIPS_SYS(sys_clock_gettime, 2)
1746 MIPS_SYS(sys_clock_getres, 2)
1747 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1748 MIPS_SYS(sys_tgkill , 3)
1749 MIPS_SYS(sys_utimes , 2)
1750 MIPS_SYS(sys_mbind , 4)
1751 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1752 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1753 MIPS_SYS(sys_mq_open , 4)
1754 MIPS_SYS(sys_mq_unlink , 1)
1755 MIPS_SYS(sys_mq_timedsend, 5)
1756 MIPS_SYS(sys_mq_timedreceive, 5)
1757 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1758 MIPS_SYS(sys_mq_getsetattr, 3)
1759 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1760 MIPS_SYS(sys_waitid , 4)
1761 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1762 MIPS_SYS(sys_add_key , 5)
1763 MIPS_SYS(sys_request_key, 4)
1764 MIPS_SYS(sys_keyctl , 5)
1765 MIPS_SYS(sys_set_thread_area, 1)
1766 MIPS_SYS(sys_inotify_init, 0)
1767 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1768 MIPS_SYS(sys_inotify_rm_watch, 2)
1769 MIPS_SYS(sys_migrate_pages, 4)
1770 MIPS_SYS(sys_openat, 4)
1771 MIPS_SYS(sys_mkdirat, 3)
1772 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1773 MIPS_SYS(sys_fchownat, 5)
1774 MIPS_SYS(sys_futimesat, 3)
1775 MIPS_SYS(sys_fstatat64, 4)
1776 MIPS_SYS(sys_unlinkat, 3)
1777 MIPS_SYS(sys_renameat, 4) /* 4295 */
1778 MIPS_SYS(sys_linkat, 5)
1779 MIPS_SYS(sys_symlinkat, 3)
1780 MIPS_SYS(sys_readlinkat, 4)
1781 MIPS_SYS(sys_fchmodat, 3)
1782 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1783 MIPS_SYS(sys_pselect6, 6)
1784 MIPS_SYS(sys_ppoll, 5)
1785 MIPS_SYS(sys_unshare, 1)
1786 MIPS_SYS(sys_splice, 4)
1787 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1788 MIPS_SYS(sys_tee, 4)
1789 MIPS_SYS(sys_vmsplice, 4)
1790 MIPS_SYS(sys_move_pages, 6)
1791 MIPS_SYS(sys_set_robust_list, 2)
1792 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1793 MIPS_SYS(sys_kexec_load, 4)
1794 MIPS_SYS(sys_getcpu, 3)
1795 MIPS_SYS(sys_epoll_pwait, 6)
1796 MIPS_SYS(sys_ioprio_set, 3)
1797 MIPS_SYS(sys_ioprio_get, 2)
1798 };
1799
1800 #undef MIPS_SYS
1801
1802 void cpu_loop(CPUMIPSState *env)
1803 {
1804 target_siginfo_t info;
1805 int trapnr, ret;
1806 unsigned int syscall_num;
1807
1808 for(;;) {
1809 trapnr = cpu_mips_exec(env);
1810 switch(trapnr) {
1811 case EXCP_SYSCALL:
1812 syscall_num = env->active_tc.gpr[2] - 4000;
1813 env->active_tc.PC += 4;
1814 if (syscall_num >= sizeof(mips_syscall_args)) {
1815 ret = -ENOSYS;
1816 } else {
1817 int nb_args;
1818 abi_ulong sp_reg;
1819 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1820
1821 nb_args = mips_syscall_args[syscall_num];
1822 sp_reg = env->active_tc.gpr[29];
1823 switch (nb_args) {
1824 /* these arguments are taken from the stack */
1825 /* FIXME - what to do if get_user() fails? */
1826 case 8: get_user_ual(arg8, sp_reg + 28);
1827 case 7: get_user_ual(arg7, sp_reg + 24);
1828 case 6: get_user_ual(arg6, sp_reg + 20);
1829 case 5: get_user_ual(arg5, sp_reg + 16);
1830 default:
1831 break;
1832 }
1833 ret = do_syscall(env, env->active_tc.gpr[2],
1834 env->active_tc.gpr[4],
1835 env->active_tc.gpr[5],
1836 env->active_tc.gpr[6],
1837 env->active_tc.gpr[7],
1838 arg5, arg6/*, arg7, arg8*/);
1839 }
1840 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1841 env->active_tc.gpr[7] = 1; /* error flag */
1842 ret = -ret;
1843 } else {
1844 env->active_tc.gpr[7] = 0; /* error flag */
1845 }
1846 env->active_tc.gpr[2] = ret;
1847 break;
1848 case EXCP_TLBL:
1849 case EXCP_TLBS:
1850 case EXCP_CpU:
1851 case EXCP_RI:
1852 info.si_signo = TARGET_SIGILL;
1853 info.si_errno = 0;
1854 info.si_code = 0;
1855 queue_signal(env, info.si_signo, &info);
1856 break;
1857 case EXCP_INTERRUPT:
1858 /* just indicate that signals should be handled asap */
1859 break;
1860 case EXCP_DEBUG:
1861 {
1862 int sig;
1863
1864 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1865 if (sig)
1866 {
1867 info.si_signo = sig;
1868 info.si_errno = 0;
1869 info.si_code = TARGET_TRAP_BRKPT;
1870 queue_signal(env, info.si_signo, &info);
1871 }
1872 }
1873 break;
1874 default:
1875 // error:
1876 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1877 trapnr);
1878 cpu_dump_state(env, stderr, fprintf, 0);
1879 abort();
1880 }
1881 process_pending_signals(env);
1882 }
1883 }
1884 #endif
1885
1886 #ifdef TARGET_SH4
1887 void cpu_loop (CPUState *env)
1888 {
1889 int trapnr, ret;
1890 target_siginfo_t info;
1891
1892 while (1) {
1893 trapnr = cpu_sh4_exec (env);
1894
1895 switch (trapnr) {
1896 case 0x160:
1897 env->pc += 2;
1898 ret = do_syscall(env,
1899 env->gregs[3],
1900 env->gregs[4],
1901 env->gregs[5],
1902 env->gregs[6],
1903 env->gregs[7],
1904 env->gregs[0],
1905 env->gregs[1]);
1906 env->gregs[0] = ret;
1907 break;
1908 case EXCP_INTERRUPT:
1909 /* just indicate that signals should be handled asap */
1910 break;
1911 case EXCP_DEBUG:
1912 {
1913 int sig;
1914
1915 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1916 if (sig)
1917 {
1918 info.si_signo = sig;
1919 info.si_errno = 0;
1920 info.si_code = TARGET_TRAP_BRKPT;
1921 queue_signal(env, info.si_signo, &info);
1922 }
1923 }
1924 break;
1925 case 0xa0:
1926 case 0xc0:
1927 info.si_signo = SIGSEGV;
1928 info.si_errno = 0;
1929 info.si_code = TARGET_SEGV_MAPERR;
1930 info._sifields._sigfault._addr = env->tea;
1931 queue_signal(env, info.si_signo, &info);
1932 break;
1933
1934 default:
1935 printf ("Unhandled trap: 0x%x\n", trapnr);
1936 cpu_dump_state(env, stderr, fprintf, 0);
1937 exit (1);
1938 }
1939 process_pending_signals (env);
1940 }
1941 }
1942 #endif
1943
1944 #ifdef TARGET_CRIS
1945 void cpu_loop (CPUState *env)
1946 {
1947 int trapnr, ret;
1948 target_siginfo_t info;
1949
1950 while (1) {
1951 trapnr = cpu_cris_exec (env);
1952 switch (trapnr) {
1953 case 0xaa:
1954 {
1955 info.si_signo = SIGSEGV;
1956 info.si_errno = 0;
1957 /* XXX: check env->error_code */
1958 info.si_code = TARGET_SEGV_MAPERR;
1959 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1960 queue_signal(env, info.si_signo, &info);
1961 }
1962 break;
1963 case EXCP_INTERRUPT:
1964 /* just indicate that signals should be handled asap */
1965 break;
1966 case EXCP_BREAK:
1967 ret = do_syscall(env,
1968 env->regs[9],
1969 env->regs[10],
1970 env->regs[11],
1971 env->regs[12],
1972 env->regs[13],
1973 env->pregs[7],
1974 env->pregs[11]);
1975 env->regs[10] = ret;
1976 break;
1977 case EXCP_DEBUG:
1978 {
1979 int sig;
1980
1981 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1982 if (sig)
1983 {
1984 info.si_signo = sig;
1985 info.si_errno = 0;
1986 info.si_code = TARGET_TRAP_BRKPT;
1987 queue_signal(env, info.si_signo, &info);
1988 }
1989 }
1990 break;
1991 default:
1992 printf ("Unhandled trap: 0x%x\n", trapnr);
1993 cpu_dump_state(env, stderr, fprintf, 0);
1994 exit (1);
1995 }
1996 process_pending_signals (env);
1997 }
1998 }
1999 #endif
2000
2001 #ifdef TARGET_M68K
2002
2003 void cpu_loop(CPUM68KState *env)
2004 {
2005 int trapnr;
2006 unsigned int n;
2007 target_siginfo_t info;
2008 TaskState *ts = env->opaque;
2009
2010 for(;;) {
2011 trapnr = cpu_m68k_exec(env);
2012 switch(trapnr) {
2013 case EXCP_ILLEGAL:
2014 {
2015 if (ts->sim_syscalls) {
2016 uint16_t nr;
2017 nr = lduw(env->pc + 2);
2018 env->pc += 4;
2019 do_m68k_simcall(env, nr);
2020 } else {
2021 goto do_sigill;
2022 }
2023 }
2024 break;
2025 case EXCP_HALT_INSN:
2026 /* Semihosing syscall. */
2027 env->pc += 4;
2028 do_m68k_semihosting(env, env->dregs[0]);
2029 break;
2030 case EXCP_LINEA:
2031 case EXCP_LINEF:
2032 case EXCP_UNSUPPORTED:
2033 do_sigill:
2034 info.si_signo = SIGILL;
2035 info.si_errno = 0;
2036 info.si_code = TARGET_ILL_ILLOPN;
2037 info._sifields._sigfault._addr = env->pc;
2038 queue_signal(env, info.si_signo, &info);
2039 break;
2040 case EXCP_TRAP0:
2041 {
2042 ts->sim_syscalls = 0;
2043 n = env->dregs[0];
2044 env->pc += 2;
2045 env->dregs[0] = do_syscall(env,
2046 n,
2047 env->dregs[1],
2048 env->dregs[2],
2049 env->dregs[3],
2050 env->dregs[4],
2051 env->dregs[5],
2052 env->aregs[0]);
2053 }
2054 break;
2055 case EXCP_INTERRUPT:
2056 /* just indicate that signals should be handled asap */
2057 break;
2058 case EXCP_ACCESS:
2059 {
2060 info.si_signo = SIGSEGV;
2061 info.si_errno = 0;
2062 /* XXX: check env->error_code */
2063 info.si_code = TARGET_SEGV_MAPERR;
2064 info._sifields._sigfault._addr = env->mmu.ar;
2065 queue_signal(env, info.si_signo, &info);
2066 }
2067 break;
2068 case EXCP_DEBUG:
2069 {
2070 int sig;
2071
2072 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2073 if (sig)
2074 {
2075 info.si_signo = sig;
2076 info.si_errno = 0;
2077 info.si_code = TARGET_TRAP_BRKPT;
2078 queue_signal(env, info.si_signo, &info);
2079 }
2080 }
2081 break;
2082 default:
2083 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2084 trapnr);
2085 cpu_dump_state(env, stderr, fprintf, 0);
2086 abort();
2087 }
2088 process_pending_signals(env);
2089 }
2090 }
2091 #endif /* TARGET_M68K */
2092
2093 #ifdef TARGET_ALPHA
2094 void cpu_loop (CPUState *env)
2095 {
2096 int trapnr;
2097 target_siginfo_t info;
2098
2099 while (1) {
2100 trapnr = cpu_alpha_exec (env);
2101
2102 switch (trapnr) {
2103 case EXCP_RESET:
2104 fprintf(stderr, "Reset requested. Exit\n");
2105 exit(1);
2106 break;
2107 case EXCP_MCHK:
2108 fprintf(stderr, "Machine check exception. Exit\n");
2109 exit(1);
2110 break;
2111 case EXCP_ARITH:
2112 fprintf(stderr, "Arithmetic trap.\n");
2113 exit(1);
2114 break;
2115 case EXCP_HW_INTERRUPT:
2116 fprintf(stderr, "External interrupt. Exit\n");
2117 exit(1);
2118 break;
2119 case EXCP_DFAULT:
2120 fprintf(stderr, "MMU data fault\n");
2121 exit(1);
2122 break;
2123 case EXCP_DTB_MISS_PAL:
2124 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2125 exit(1);
2126 break;
2127 case EXCP_ITB_MISS:
2128 fprintf(stderr, "MMU instruction TLB miss\n");
2129 exit(1);
2130 break;
2131 case EXCP_ITB_ACV:
2132 fprintf(stderr, "MMU instruction access violation\n");
2133 exit(1);
2134 break;
2135 case EXCP_DTB_MISS_NATIVE:
2136 fprintf(stderr, "MMU data TLB miss\n");
2137 exit(1);
2138 break;
2139 case EXCP_UNALIGN:
2140 fprintf(stderr, "Unaligned access\n");
2141 exit(1);
2142 break;
2143 case EXCP_OPCDEC:
2144 fprintf(stderr, "Invalid instruction\n");
2145 exit(1);
2146 break;
2147 case EXCP_FEN:
2148 fprintf(stderr, "Floating-point not allowed\n");
2149 exit(1);
2150 break;
2151 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2152 call_pal(env, (trapnr >> 6) | 0x80);
2153 break;
2154 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2155 fprintf(stderr, "Privileged call to PALcode\n");
2156 exit(1);
2157 break;
2158 case EXCP_DEBUG:
2159 {
2160 int sig;
2161
2162 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2163 if (sig)
2164 {
2165 info.si_signo = sig;
2166 info.si_errno = 0;
2167 info.si_code = TARGET_TRAP_BRKPT;
2168 queue_signal(env, info.si_signo, &info);
2169 }
2170 }
2171 break;
2172 default:
2173 printf ("Unhandled trap: 0x%x\n", trapnr);
2174 cpu_dump_state(env, stderr, fprintf, 0);
2175 exit (1);
2176 }
2177 process_pending_signals (env);
2178 }
2179 }
2180 #endif /* TARGET_ALPHA */
2181
2182 static void usage(void)
2183 {
2184 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2185 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2186 "Linux CPU emulator (compiled for %s emulation)\n"
2187 "\n"
2188 "Standard options:\n"
2189 "-h print this help\n"
2190 "-g port wait gdb connection to port\n"
2191 "-L path set the elf interpreter prefix (default=%s)\n"
2192 "-s size set the stack size in bytes (default=%ld)\n"
2193 "-cpu model select CPU (-cpu ? for list)\n"
2194 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2195 "-E var=value sets/modifies targets environment variable(s)\n"
2196 "-U var unsets targets environment variable(s)\n"
2197 "\n"
2198 "Debug options:\n"
2199 "-d options activate log (logfile=%s)\n"
2200 "-p pagesize set the host page size to 'pagesize'\n"
2201 "-strace log system calls\n"
2202 "\n"
2203 "Environment variables:\n"
2204 "QEMU_STRACE Print system calls and arguments similar to the\n"
2205 " 'strace' program. Enable by setting to any value.\n"
2206 "You can use -E and -U options to set/unset environment variables\n"
2207 "for target process. It is possible to provide several variables\n"
2208 "by repeating the option. For example:\n"
2209 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2210 "Note that if you provide several changes to single variable\n"
2211 "last change will stay in effect.\n"
2212 ,
2213 TARGET_ARCH,
2214 interp_prefix,
2215 x86_stack_size,
2216 DEBUG_LOGFILE);
2217 exit(1);
2218 }
2219
2220 THREAD CPUState *thread_env;
2221
2222 /* Assumes contents are already zeroed. */
2223 void init_task_state(TaskState *ts)
2224 {
2225 int i;
2226
2227 ts->used = 1;
2228 ts->first_free = ts->sigqueue_table;
2229 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2230 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2231 }
2232 ts->sigqueue_table[i].next = NULL;
2233 }
2234
2235 int main(int argc, char **argv, char **envp)
2236 {
2237 const char *filename;
2238 const char *cpu_model;
2239 struct target_pt_regs regs1, *regs = &regs1;
2240 struct image_info info1, *info = &info1;
2241 TaskState ts1, *ts = &ts1;
2242 CPUState *env;
2243 int optind;
2244 const char *r;
2245 int gdbstub_port = 0;
2246 char **target_environ, **wrk;
2247 envlist_t *envlist = NULL;
2248
2249 if (argc <= 1)
2250 usage();
2251
2252 qemu_cache_utils_init(envp);
2253
2254 /* init debug */
2255 cpu_set_log_filename(DEBUG_LOGFILE);
2256
2257 if ((envlist = envlist_create()) == NULL) {
2258 (void) fprintf(stderr, "Unable to allocate envlist\n");
2259 exit(1);
2260 }
2261
2262 /* add current environment into the list */
2263 for (wrk = environ; *wrk != NULL; wrk++) {
2264 (void) envlist_setenv(envlist, *wrk);
2265 }
2266
2267 cpu_model = NULL;
2268 optind = 1;
2269 for(;;) {
2270 if (optind >= argc)
2271 break;
2272 r = argv[optind];
2273 if (r[0] != '-')
2274 break;
2275 optind++;
2276 r++;
2277 if (!strcmp(r, "-")) {
2278 break;
2279 } else if (!strcmp(r, "d")) {
2280 int mask;
2281 const CPULogItem *item;
2282
2283 if (optind >= argc)
2284 break;
2285
2286 r = argv[optind++];
2287 mask = cpu_str_to_log_mask(r);
2288 if (!mask) {
2289 printf("Log items (comma separated):\n");
2290 for(item = cpu_log_items; item->mask != 0; item++) {
2291 printf("%-10s %s\n", item->name, item->help);
2292 }
2293 exit(1);
2294 }
2295 cpu_set_log(mask);
2296 } else if (!strcmp(r, "E")) {
2297 r = argv[optind++];
2298 if (envlist_setenv(envlist, r) != 0)
2299 usage();
2300 } else if (!strcmp(r, "U")) {
2301 r = argv[optind++];
2302 if (envlist_unsetenv(envlist, r) != 0)
2303 usage();
2304 } else if (!strcmp(r, "s")) {
2305 if (optind >= argc)
2306 break;
2307 r = argv[optind++];
2308 x86_stack_size = strtol(r, (char **)&r, 0);
2309 if (x86_stack_size <= 0)
2310 usage();
2311 if (*r == 'M')
2312 x86_stack_size *= 1024 * 1024;
2313 else if (*r == 'k' || *r == 'K')
2314 x86_stack_size *= 1024;
2315 } else if (!strcmp(r, "L")) {
2316 interp_prefix = argv[optind++];
2317 } else if (!strcmp(r, "p")) {
2318 if (optind >= argc)
2319 break;
2320 qemu_host_page_size = atoi(argv[optind++]);
2321 if (qemu_host_page_size == 0 ||
2322 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2323 fprintf(stderr, "page size must be a power of two\n");
2324 exit(1);
2325 }
2326 } else if (!strcmp(r, "g")) {
2327 if (optind >= argc)
2328 break;
2329 gdbstub_port = atoi(argv[optind++]);
2330 } else if (!strcmp(r, "r")) {
2331 qemu_uname_release = argv[optind++];
2332 } else if (!strcmp(r, "cpu")) {
2333 cpu_model = argv[optind++];
2334 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
2335 /* XXX: implement xxx_cpu_list for targets that still miss it */
2336 #if defined(cpu_list)
2337 cpu_list(stdout, &fprintf);
2338 #endif
2339 exit(1);
2340 }
2341 } else if (!strcmp(r, "drop-ld-preload")) {
2342 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
2343 } else if (!strcmp(r, "strace")) {
2344 do_strace = 1;
2345 } else
2346 {
2347 usage();
2348 }
2349 }
2350 if (optind >= argc)
2351 usage();
2352 filename = argv[optind];
2353 exec_path = argv[optind];
2354
2355 /* Zero out regs */
2356 memset(regs, 0, sizeof(struct target_pt_regs));
2357
2358 /* Zero out image_info */
2359 memset(info, 0, sizeof(struct image_info));
2360
2361 /* Scan interp_prefix dir for replacement files. */
2362 init_paths(interp_prefix);
2363
2364 if (cpu_model == NULL) {
2365 #if defined(TARGET_I386)
2366 #ifdef TARGET_X86_64
2367 cpu_model = "qemu64";
2368 #else
2369 cpu_model = "qemu32";
2370 #endif
2371 #elif defined(TARGET_ARM)
2372 cpu_model = "arm926";
2373 #elif defined(TARGET_M68K)
2374 cpu_model = "any";
2375 #elif defined(TARGET_SPARC)
2376 #ifdef TARGET_SPARC64
2377 cpu_model = "TI UltraSparc II";
2378 #else
2379 cpu_model = "Fujitsu MB86904";
2380 #endif
2381 #elif defined(TARGET_MIPS)
2382 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2383 cpu_model = "20Kc";
2384 #else
2385 cpu_model = "24Kf";
2386 #endif
2387 #elif defined(TARGET_PPC)
2388 #ifdef TARGET_PPC64
2389 cpu_model = "970";
2390 #else
2391 cpu_model = "750";
2392 #endif
2393 #else
2394 cpu_model = "any";
2395 #endif
2396 }
2397 cpu_exec_init_all(0);
2398 /* NOTE: we need to init the CPU at this stage to get
2399 qemu_host_page_size */
2400 env = cpu_init(cpu_model);
2401 if (!env) {
2402 fprintf(stderr, "Unable to find CPU definition\n");
2403 exit(1);
2404 }
2405 thread_env = env;
2406
2407 if (getenv("QEMU_STRACE")) {
2408 do_strace = 1;
2409 }
2410
2411 target_environ = envlist_to_environ(envlist, NULL);
2412 envlist_free(envlist);
2413
2414 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2415 printf("Error loading %s\n", filename);
2416 _exit(1);
2417 }
2418
2419 for (wrk = target_environ; *wrk; wrk++) {
2420 free(*wrk);
2421 }
2422
2423 free(target_environ);
2424
2425 if (qemu_log_enabled()) {
2426 log_page_dump();
2427
2428 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2429 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2430 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2431 info->start_code);
2432 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2433 info->start_data);
2434 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2435 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2436 info->start_stack);
2437 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2438 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2439 }
2440
2441 target_set_brk(info->brk);
2442 syscall_init();
2443 signal_init();
2444
2445 /* build Task State */
2446 memset(ts, 0, sizeof(TaskState));
2447 init_task_state(ts);
2448 ts->info = info;
2449 env->opaque = ts;
2450
2451 #if defined(TARGET_I386)
2452 cpu_x86_set_cpl(env, 3);
2453
2454 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2455 env->hflags |= HF_PE_MASK;
2456 if (env->cpuid_features & CPUID_SSE) {
2457 env->cr[4] |= CR4_OSFXSR_MASK;
2458 env->hflags |= HF_OSFXSR_MASK;
2459 }
2460 #ifndef TARGET_ABI32
2461 /* enable 64 bit mode if possible */
2462 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2463 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2464 exit(1);
2465 }
2466 env->cr[4] |= CR4_PAE_MASK;
2467 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2468 env->hflags |= HF_LMA_MASK;
2469 #endif
2470
2471 /* flags setup : we activate the IRQs by default as in user mode */
2472 env->eflags |= IF_MASK;
2473
2474 /* linux register setup */
2475 #ifndef TARGET_ABI32
2476 env->regs[R_EAX] = regs->rax;
2477 env->regs[R_EBX] = regs->rbx;
2478 env->regs[R_ECX] = regs->rcx;
2479 env->regs[R_EDX] = regs->rdx;
2480 env->regs[R_ESI] = regs->rsi;
2481 env->regs[R_EDI] = regs->rdi;
2482 env->regs[R_EBP] = regs->rbp;
2483 env->regs[R_ESP] = regs->rsp;
2484 env->eip = regs->rip;
2485 #else
2486 env->regs[R_EAX] = regs->eax;
2487 env->regs[R_EBX] = regs->ebx;
2488 env->regs[R_ECX] = regs->ecx;
2489 env->regs[R_EDX] = regs->edx;
2490 env->regs[R_ESI] = regs->esi;
2491 env->regs[R_EDI] = regs->edi;
2492 env->regs[R_EBP] = regs->ebp;
2493 env->regs[R_ESP] = regs->esp;
2494 env->eip = regs->eip;
2495 #endif
2496
2497 /* linux interrupt setup */
2498 #ifndef TARGET_ABI32
2499 env->idt.limit = 511;
2500 #else
2501 env->idt.limit = 255;
2502 #endif
2503 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2504 PROT_READ|PROT_WRITE,
2505 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2506 idt_table = g2h(env->idt.base);
2507 set_idt(0, 0);
2508 set_idt(1, 0);
2509 set_idt(2, 0);
2510 set_idt(3, 3);
2511 set_idt(4, 3);
2512 set_idt(5, 0);
2513 set_idt(6, 0);
2514 set_idt(7, 0);
2515 set_idt(8, 0);
2516 set_idt(9, 0);
2517 set_idt(10, 0);
2518 set_idt(11, 0);
2519 set_idt(12, 0);
2520 set_idt(13, 0);
2521 set_idt(14, 0);
2522 set_idt(15, 0);
2523 set_idt(16, 0);
2524 set_idt(17, 0);
2525 set_idt(18, 0);
2526 set_idt(19, 0);
2527 set_idt(0x80, 3);
2528
2529 /* linux segment setup */
2530 {
2531 uint64_t *gdt_table;
2532 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2533 PROT_READ|PROT_WRITE,
2534 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2535 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2536 gdt_table = g2h(env->gdt.base);
2537 #ifdef TARGET_ABI32
2538 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2539 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2540 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2541 #else
2542 /* 64 bit code segment */
2543 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2544 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2545 DESC_L_MASK |
2546 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2547 #endif
2548 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2549 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2550 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2551 }
2552 cpu_x86_load_seg(env, R_CS, __USER_CS);
2553 cpu_x86_load_seg(env, R_SS, __USER_DS);
2554 #ifdef TARGET_ABI32
2555 cpu_x86_load_seg(env, R_DS, __USER_DS);
2556 cpu_x86_load_seg(env, R_ES, __USER_DS);
2557 cpu_x86_load_seg(env, R_FS, __USER_DS);
2558 cpu_x86_load_seg(env, R_GS, __USER_DS);
2559 /* This hack makes Wine work... */
2560 env->segs[R_FS].selector = 0;
2561 #else
2562 cpu_x86_load_seg(env, R_DS, 0);
2563 cpu_x86_load_seg(env, R_ES, 0);
2564 cpu_x86_load_seg(env, R_FS, 0);
2565 cpu_x86_load_seg(env, R_GS, 0);
2566 #endif
2567 #elif defined(TARGET_ARM)
2568 {
2569 int i;
2570 cpsr_write(env, regs->uregs[16], 0xffffffff);
2571 for(i = 0; i < 16; i++) {
2572 env->regs[i] = regs->uregs[i];
2573 }
2574 }
2575 #elif defined(TARGET_SPARC)
2576 {
2577 int i;
2578 env->pc = regs->pc;
2579 env->npc = regs->npc;
2580 env->y = regs->y;
2581 for(i = 0; i < 8; i++)
2582 env->gregs[i] = regs->u_regs[i];
2583 for(i = 0; i < 8; i++)
2584 env->regwptr[i] = regs->u_regs[i + 8];
2585 }
2586 #elif defined(TARGET_PPC)
2587 {
2588 int i;
2589
2590 #if defined(TARGET_PPC64)
2591 #if defined(TARGET_ABI32)
2592 env->msr &= ~((target_ulong)1 << MSR_SF);
2593 #else
2594 env->msr |= (target_ulong)1 << MSR_SF;
2595 #endif
2596 #endif
2597 env->nip = regs->nip;
2598 for(i = 0; i < 32; i++) {
2599 env->gpr[i] = regs->gpr[i];
2600 }
2601 }
2602 #elif defined(TARGET_M68K)
2603 {
2604 env->pc = regs->pc;
2605 env->dregs[0] = regs->d0;
2606 env->dregs[1] = regs->d1;
2607 env->dregs[2] = regs->d2;
2608 env->dregs[3] = regs->d3;
2609 env->dregs[4] = regs->d4;
2610 env->dregs[5] = regs->d5;
2611 env->dregs[6] = regs->d6;
2612 env->dregs[7] = regs->d7;
2613 env->aregs[0] = regs->a0;
2614 env->aregs[1] = regs->a1;
2615 env->aregs[2] = regs->a2;
2616 env->aregs[3] = regs->a3;
2617 env->aregs[4] = regs->a4;
2618 env->aregs[5] = regs->a5;
2619 env->aregs[6] = regs->a6;
2620 env->aregs[7] = regs->usp;
2621 env->sr = regs->sr;
2622 ts->sim_syscalls = 1;
2623 }
2624 #elif defined(TARGET_MIPS)
2625 {
2626 int i;
2627
2628 for(i = 0; i < 32; i++) {
2629 env->active_tc.gpr[i] = regs->regs[i];
2630 }
2631 env->active_tc.PC = regs->cp0_epc;
2632 }
2633 #elif defined(TARGET_SH4)
2634 {
2635 int i;
2636
2637 for(i = 0; i < 16; i++) {
2638 env->gregs[i] = regs->regs[i];
2639 }
2640 env->pc = regs->pc;
2641 }
2642 #elif defined(TARGET_ALPHA)
2643 {
2644 int i;
2645
2646 for(i = 0; i < 28; i++) {
2647 env->ir[i] = ((abi_ulong *)regs)[i];
2648 }
2649 env->ipr[IPR_USP] = regs->usp;
2650 env->ir[30] = regs->usp;
2651 env->pc = regs->pc;
2652 env->unique = regs->unique;
2653 }
2654 #elif defined(TARGET_CRIS)
2655 {
2656 env->regs[0] = regs->r0;
2657 env->regs[1] = regs->r1;
2658 env->regs[2] = regs->r2;
2659 env->regs[3] = regs->r3;
2660 env->regs[4] = regs->r4;
2661 env->regs[5] = regs->r5;
2662 env->regs[6] = regs->r6;
2663 env->regs[7] = regs->r7;
2664 env->regs[8] = regs->r8;
2665 env->regs[9] = regs->r9;
2666 env->regs[10] = regs->r10;
2667 env->regs[11] = regs->r11;
2668 env->regs[12] = regs->r12;
2669 env->regs[13] = regs->r13;
2670 env->regs[14] = info->start_stack;
2671 env->regs[15] = regs->acr;
2672 env->pc = regs->erp;
2673 }
2674 #else
2675 #error unsupported target CPU
2676 #endif
2677
2678 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2679 ts->stack_base = info->start_stack;
2680 ts->heap_base = info->brk;
2681 /* This will be filled in on the first SYS_HEAPINFO call. */
2682 ts->heap_limit = 0;
2683 #endif
2684
2685 if (gdbstub_port) {
2686 gdbserver_start (gdbstub_port);
2687 gdb_handlesig(env, 0);
2688 }
2689 cpu_loop(env);
2690 /* never exits */
2691 return 0;
2692 }
Patches shipped by Fedora