hw/ppce500_mpc8544ds.c

   1 /*
   2  * Qemu PowerPC MPC8544DS board emualtion
   3  *
   4  * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
   5  *
   6  * Author: Yu Liu,     <yu.liu@freescale.com>
   7  *
   8  * This file is derived from hw/ppc440_bamboo.c,
   9  * the copyright for that material belongs to the original owners.
  10  *
  11  * This is free software; you can redistribute it and/or modify
  12  * it under the terms of  the GNU General  Public License as published by
  13  * the Free Software Foundation;  either version 2 of the  License, or
  14  * (at your option) any later version.
  15  */
  16
  17 #include <dirent.h>
  18
  19 #define KVM_UPSTREAM
  20 #include "config.h"
  21 #include "qemu-common.h"
  22 #include "net.h"
  23 #include "hw.h"
  24 #include "pc.h"
  25 #include "pci.h"
  26 #include "virtio-blk.h"
  27 #include "boards.h"
  28 #include "sysemu.h"
  29 #include "kvm.h"
  30 #include "kvm_ppc.h"
  31 #include "device_tree.h"
  32 #include "openpic.h"
  33 #include "ppce500.h"
  34
  35 #define BINARY_DEVICE_TREE_FILE    "mpc8544ds.dtb"
  36 #define UIMAGE_LOAD_BASE           0
  37 #define DTB_LOAD_BASE              0x600000
  38 #define INITRD_LOAD_BASE           0x2000000
  39
  40 #define RAM_SIZES_ALIGN            (64UL << 20)
  41
  42 #define MPC8544_CCSRBAR_BASE       0xE0000000
  43 #define MPC8544_MPIC_REGS_BASE     (MPC8544_CCSRBAR_BASE + 0x40000)
  44 #define MPC8544_SERIAL0_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4500)
  45 #define MPC8544_SERIAL1_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4600)
  46 #define MPC8544_PCI_REGS_BASE      (MPC8544_CCSRBAR_BASE + 0x8000)
  47 #define MPC8544_PCI_REGS_SIZE      0x1000
  48 #define MPC8544_PCI_IO             0xE1000000
  49 #define MPC8544_PCI_IOLEN          0x10000
  50
  51 static int mpc8544_copy_soc_cell(void *fdt, const char *node, const char *prop)
  52 {
  53     uint32_t cell;
  54     int ret;
  55
  56     ret = kvmppc_read_host_property(node, prop, &cell, sizeof(cell));
  57     if (ret < 0) {
  58         fprintf(stderr, "couldn't read host %s/%s\n", node, prop);
  59         goto out;
  60     }
  61
  62     ret = qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
  63                                 prop, cell);
  64     if (ret < 0) {
  65         fprintf(stderr, "couldn't set guest /cpus/PowerPC,8544@0/%s\n", prop);
  66         goto out;
  67     }
  68
  69 out:
  70     return ret;
  71 }
  72
  73 static void *mpc8544_load_device_tree(void *addr,
  74                                      uint32_t ramsize,
  75                                      target_phys_addr_t initrd_base,
  76                                      target_phys_addr_t initrd_size,
  77                                      const char *kernel_cmdline)
  78 {
  79     void *fdt = NULL;
  80 #ifdef HAVE_FDT
  81     uint32_t mem_reg_property[] = {0, ramsize};
  82     char *path;
  83     int pathlen;
  84     int ret;
  85
  86     pathlen = snprintf(NULL, 0, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE) + 1;
  87     path = qemu_malloc(pathlen);
  88
  89     snprintf(path, pathlen, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE);
  90
  91     fdt = load_device_tree(path, addr);
  92     qemu_free(path);
  93     if (fdt == NULL)
  94         goto out;
  95
  96     /* Manipulate device tree in memory. */
  97     ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
  98                                sizeof(mem_reg_property));
  99     if (ret < 0)
 100         fprintf(stderr, "couldn't set /memory/reg\n");
 101
 102     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 103                                     initrd_base);
 104     if (ret < 0)
 105         fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
 106
 107     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 108                                     (initrd_base + initrd_size));
 109     if (ret < 0)
 110         fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
 111
 112     ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
 113                                       kernel_cmdline);
 114     if (ret < 0)
 115         fprintf(stderr, "couldn't set /chosen/bootargs\n");
 116
 117     if (kvm_enabled()) {
 118         struct dirent *dirp;
 119         DIR *dp;
 120         char buf[128];
 121
 122         if ((dp = opendir("/proc/device-tree/cpus/")) == NULL) {
 123             printf("Can't open directory /proc/device-tree/cpus/\n");
 124             goto out;
 125         }
 126
 127         buf[0] = '\0';
 128         while ((dirp = readdir(dp)) != NULL) {
 129             if (strncmp(dirp->d_name, "PowerPC", 7) == 0) {
 130                 snprintf(buf, 128, "/cpus/%s", dirp->d_name);
 131                 break;
 132             }
 133         }
 134         closedir(dp);
 135         if (buf[0] == '\0') {
 136             printf("Unknow host!\n");
 137             goto out;
 138         }
 139
 140         mpc8544_copy_soc_cell(fdt, buf, "clock-frequency");
 141         mpc8544_copy_soc_cell(fdt, buf, "timebase-frequency");
 142     }
 143
 144 out:
 145 #endif
 146
 147     return fdt;
 148 }
 149
 150 static void mpc8544ds_init(ram_addr_t ram_size, int vga_ram_size,
 151                          const char *boot_device,
 152                          const char *kernel_filename,
 153                          const char *kernel_cmdline,
 154                          const char *initrd_filename,
 155                          const char *cpu_model)
 156 {
 157     PCIBus *pci_bus;
 158     CPUState *env;
 159     uint64_t elf_entry;
 160     uint64_t elf_lowaddr;
 161     target_ulong entry=0;
 162     target_ulong loadaddr=UIMAGE_LOAD_BASE;
 163     target_long kernel_size=0;
 164     target_ulong dt_base=DTB_LOAD_BASE;
 165     target_ulong initrd_base=INITRD_LOAD_BASE;
 166     target_long initrd_size=0;
 167     void *fdt;
 168     int i=0;
 169     unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
 170     qemu_irq *irqs, *mpic, *pci_irqs;
 171     SerialState * serial[2];
 172
 173     /* Setup CPU */
 174     env = cpu_ppc_init("e500v2_v30");
 175     if (!env) {
 176         fprintf(stderr, "Unable to initialize CPU!\n");
 177         exit(1);
 178     }
 179
 180     /* Fixup Memory size on a alignment boundary */
 181     ram_size &= ~(RAM_SIZES_ALIGN - 1);
 182
 183     /* Register Memory */
 184     cpu_register_physical_memory(0, ram_size, 0);
 185
 186     /* MPIC */
 187     irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 188     irqs[OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
 189     irqs[OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
 190     mpic = mpic_init(MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
 191
 192     /* Serial */
 193     if (serial_hds[0])
 194         serial[0] = serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
 195                                0, mpic[12+26], 399193,
 196                         serial_hds[0], 1);
 197
 198     if (serial_hds[1])
 199         serial[0] = serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
 200                         0, mpic[12+26], 399193,
 201                         serial_hds[0], 1);
 202
 203     /* PCI */
 204     pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
 205     pci_irqs[0] = mpic[pci_irq_nrs[0]];
 206     pci_irqs[1] = mpic[pci_irq_nrs[1]];
 207     pci_irqs[2] = mpic[pci_irq_nrs[2]];
 208     pci_irqs[3] = mpic[pci_irq_nrs[3]];
 209     pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
 210     if (!pci_bus)
 211         printf("couldn't create PCI controller!\n");
 212
 213     isa_mmio_init(MPC8544_PCI_IO, MPC8544_PCI_IOLEN);
 214
 215     if (pci_bus) {
 216         int unit_id = 0;
 217
 218         /* Add virtio block devices. */
 219         while ((i = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
 220             virtio_blk_init(pci_bus, drives_table[i].bdrv);
 221             unit_id++;
 222         }
 223
 224         /* Register network interfaces. */
 225         for (i = 0; i < nb_nics; i++) {
 226             pci_nic_init(pci_bus, &nd_table[i], -1, "virtio");
 227         }
 228     }
 229
 230     /* Load kernel. */
 231     if (kernel_filename) {
 232         kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
 233         if (kernel_size < 0) {
 234             kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_lowaddr,
 235                                    NULL);
 236             entry = elf_entry;
 237             loadaddr = elf_lowaddr;
 238         }
 239         /* XXX try again as binary */
 240         if (kernel_size < 0) {
 241             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 242                     kernel_filename);
 243             exit(1);
 244         }
 245     }
 246
 247     /* Load initrd. */
 248     if (initrd_filename) {
 249         initrd_size = load_image(initrd_filename, phys_ram_base + initrd_base);
 250
 251         if (initrd_size < 0) {
 252             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 253                     initrd_filename);
 254             exit(1);
 255         }
 256     }
 257
 258     /* If we're loading a kernel directly, we must load the device tree too. */
 259     if (kernel_filename) {
 260         fdt = mpc8544_load_device_tree(phys_ram_base + dt_base, ram_size,
 261                                       initrd_base, initrd_size, kernel_cmdline);
 262         if (fdt == NULL) {
 263             fprintf(stderr, "couldn't load device tree\n");
 264             exit(1);
 265         }
 266
 267         /* Set initial guest state. */
 268         env->gpr[1] = (16<<20) - 8;
 269         env->gpr[3] = dt_base;
 270         env->nip = entry;
 271         /* XXX we currently depend on KVM to create some initial TLB entries. */
 272     }
 273
 274     if (kvm_enabled())
 275         kvmppc_init();
 276
 277     return;
 278 }
 279
 280 QEMUMachine mpc8544ds_machine = {
 281     .name = "mpc8544ds",
 282     .desc = "mpc8544ds",
 283     .init = mpc8544ds_init,
 284     .ram_require = RAM_SIZES_ALIGN | RAMSIZE_FIXED,
 285 };