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stellaris: Removed SSI mux
[qemu-kvm.git] / linux-user / main.c
blob9f3476ba5739a0a366928a9865852d31f5d57445
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19 #include <stdlib.h>
20 #include <stdio.h>
21 #include <stdarg.h>
22 #include <string.h>
23 #include <errno.h>
24 #include <unistd.h>
25 #include <sys/mman.h>
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
28
29 #include "qemu.h"
30 #include "qemu-common.h"
31 #include "cache-utils.h"
32 #include "cpu.h"
33 #include "tcg.h"
34 #include "qemu-timer.h"
35 #include "envlist.h"
36 #include "elf.h"
37
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
39
40 char *exec_path;
41
42 int singlestep;
43 const char *filename;
44 const char *argv0;
45 int gdbstub_port;
46 envlist_t *envlist;
47 const char *cpu_model;
48 unsigned long mmap_min_addr;
49 #if defined(CONFIG_USE_GUEST_BASE)
50 unsigned long guest_base;
51 int have_guest_base;
52 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
53 /*
54 * When running 32-on-64 we should make sure we can fit all of the possible
55 * guest address space into a contiguous chunk of virtual host memory.
56 *
57 * This way we will never overlap with our own libraries or binaries or stack
58 * or anything else that QEMU maps.
59 */
60 unsigned long reserved_va = 0xf7000000;
61 #else
62 unsigned long reserved_va;
63 #endif
64 #endif
65
66 static void usage(void);
67
68 static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
69 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
70
71 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
72 we allocate a bigger stack. Need a better solution, for example
73 by remapping the process stack directly at the right place */
74 unsigned long guest_stack_size = 8 * 1024 * 1024UL;
75
76 void gemu_log(const char *fmt, ...)
77 {
78 va_list ap;
79
80 va_start(ap, fmt);
81 vfprintf(stderr, fmt, ap);
82 va_end(ap);
83 }
84
85 #if defined(TARGET_I386)
86 int cpu_get_pic_interrupt(CPUX86State *env)
87 {
88 return -1;
89 }
90 #endif
91
92 #if defined(CONFIG_USE_NPTL)
93 /***********************************************************/
94 /* Helper routines for implementing atomic operations. */
95
96 /* To implement exclusive operations we force all cpus to syncronise.
97 We don't require a full sync, only that no cpus are executing guest code.
98 The alternative is to map target atomic ops onto host equivalents,
99 which requires quite a lot of per host/target work. */
100 static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
101 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
102 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
103 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
104 static int pending_cpus;
105
106 /* Make sure everything is in a consistent state for calling fork(). */
107 void fork_start(void)
108 {
109 pthread_mutex_lock(&tb_lock);
110 pthread_mutex_lock(&exclusive_lock);
111 mmap_fork_start();
112 }
113
114 void fork_end(int child)
115 {
116 mmap_fork_end(child);
117 if (child) {
118 /* Child processes created by fork() only have a single thread.
119 Discard information about the parent threads. */
120 first_cpu = thread_env;
121 thread_env->next_cpu = NULL;
122 pending_cpus = 0;
123 pthread_mutex_init(&exclusive_lock, NULL);
124 pthread_mutex_init(&cpu_list_mutex, NULL);
125 pthread_cond_init(&exclusive_cond, NULL);
126 pthread_cond_init(&exclusive_resume, NULL);
127 pthread_mutex_init(&tb_lock, NULL);
128 gdbserver_fork(thread_env);
129 } else {
130 pthread_mutex_unlock(&exclusive_lock);
131 pthread_mutex_unlock(&tb_lock);
132 }
133 }
134
135 /* Wait for pending exclusive operations to complete. The exclusive lock
136 must be held. */
137 static inline void exclusive_idle(void)
138 {
139 while (pending_cpus) {
140 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
141 }
142 }
143
144 /* Start an exclusive operation.
145 Must only be called from outside cpu_arm_exec. */
146 static inline void start_exclusive(void)
147 {
148 CPUArchState *other;
149 pthread_mutex_lock(&exclusive_lock);
150 exclusive_idle();
151
152 pending_cpus = 1;
153 /* Make all other cpus stop executing. */
154 for (other = first_cpu; other; other = other->next_cpu) {
155 if (other->running) {
156 pending_cpus++;
157 cpu_exit(other);
158 }
159 }
160 if (pending_cpus > 1) {
161 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
162 }
163 }
164
165 /* Finish an exclusive operation. */
166 static inline void end_exclusive(void)
167 {
168 pending_cpus = 0;
169 pthread_cond_broadcast(&exclusive_resume);
170 pthread_mutex_unlock(&exclusive_lock);
171 }
172
173 /* Wait for exclusive ops to finish, and begin cpu execution. */
174 static inline void cpu_exec_start(CPUArchState *env)
175 {
176 pthread_mutex_lock(&exclusive_lock);
177 exclusive_idle();
178 env->running = 1;
179 pthread_mutex_unlock(&exclusive_lock);
180 }
181
182 /* Mark cpu as not executing, and release pending exclusive ops. */
183 static inline void cpu_exec_end(CPUArchState *env)
184 {
185 pthread_mutex_lock(&exclusive_lock);
186 env->running = 0;
187 if (pending_cpus > 1) {
188 pending_cpus--;
189 if (pending_cpus == 1) {
190 pthread_cond_signal(&exclusive_cond);
191 }
192 }
193 exclusive_idle();
194 pthread_mutex_unlock(&exclusive_lock);
195 }
196
197 void cpu_list_lock(void)
198 {
199 pthread_mutex_lock(&cpu_list_mutex);
200 }
201
202 void cpu_list_unlock(void)
203 {
204 pthread_mutex_unlock(&cpu_list_mutex);
205 }
206 #else /* if !CONFIG_USE_NPTL */
207 /* These are no-ops because we are not threadsafe. */
208 static inline void cpu_exec_start(CPUArchState *env)
209 {
210 }
211
212 static inline void cpu_exec_end(CPUArchState *env)
213 {
214 }
215
216 static inline void start_exclusive(void)
217 {
218 }
219
220 static inline void end_exclusive(void)
221 {
222 }
223
224 void fork_start(void)
225 {
226 }
227
228 void fork_end(int child)
229 {
230 if (child) {
231 gdbserver_fork(thread_env);
232 }
233 }
234
235 void cpu_list_lock(void)
236 {
237 }
238
239 void cpu_list_unlock(void)
240 {
241 }
242 #endif
243
244
245 #ifdef TARGET_I386
246 /***********************************************************/
247 /* CPUX86 core interface */
248
249 void cpu_smm_update(CPUX86State *env)
250 {
251 }
252
253 uint64_t cpu_get_tsc(CPUX86State *env)
254 {
255 return cpu_get_real_ticks();
256 }
257
258 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
259 int flags)
260 {
261 unsigned int e1, e2;
262 uint32_t *p;
263 e1 = (addr << 16) | (limit & 0xffff);
264 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
265 e2 |= flags;
266 p = ptr;
267 p[0] = tswap32(e1);
268 p[1] = tswap32(e2);
269 }
270
271 static uint64_t *idt_table;
272 #ifdef TARGET_X86_64
273 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
274 uint64_t addr, unsigned int sel)
275 {
276 uint32_t *p, e1, e2;
277 e1 = (addr & 0xffff) | (sel << 16);
278 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
279 p = ptr;
280 p[0] = tswap32(e1);
281 p[1] = tswap32(e2);
282 p[2] = tswap32(addr >> 32);
283 p[3] = 0;
284 }
285 /* only dpl matters as we do only user space emulation */
286 static void set_idt(int n, unsigned int dpl)
287 {
288 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
289 }
290 #else
291 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
292 uint32_t addr, unsigned int sel)
293 {
294 uint32_t *p, e1, e2;
295 e1 = (addr & 0xffff) | (sel << 16);
296 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
297 p = ptr;
298 p[0] = tswap32(e1);
299 p[1] = tswap32(e2);
300 }
301
302 /* only dpl matters as we do only user space emulation */
303 static void set_idt(int n, unsigned int dpl)
304 {
305 set_gate(idt_table + n, 0, dpl, 0, 0);
306 }
307 #endif
308
309 void cpu_loop(CPUX86State *env)
310 {
311 int trapnr;
312 abi_ulong pc;
313 target_siginfo_t info;
314
315 for(;;) {
316 trapnr = cpu_x86_exec(env);
317 switch(trapnr) {
318 case 0x80:
319 /* linux syscall from int $0x80 */
320 env->regs[R_EAX] = do_syscall(env,
321 env->regs[R_EAX],
322 env->regs[R_EBX],
323 env->regs[R_ECX],
324 env->regs[R_EDX],
325 env->regs[R_ESI],
326 env->regs[R_EDI],
327 env->regs[R_EBP],
328 0, 0);
329 break;
330 #ifndef TARGET_ABI32
331 case EXCP_SYSCALL:
332 /* linux syscall from syscall instruction */
333 env->regs[R_EAX] = do_syscall(env,
334 env->regs[R_EAX],
335 env->regs[R_EDI],
336 env->regs[R_ESI],
337 env->regs[R_EDX],
338 env->regs[10],
339 env->regs[8],
340 env->regs[9],
341 0, 0);
342 env->eip = env->exception_next_eip;
343 break;
344 #endif
345 case EXCP0B_NOSEG:
346 case EXCP0C_STACK:
347 info.si_signo = SIGBUS;
348 info.si_errno = 0;
349 info.si_code = TARGET_SI_KERNEL;
350 info._sifields._sigfault._addr = 0;
351 queue_signal(env, info.si_signo, &info);
352 break;
353 case EXCP0D_GPF:
354 /* XXX: potential problem if ABI32 */
355 #ifndef TARGET_X86_64
356 if (env->eflags & VM_MASK) {
357 handle_vm86_fault(env);
358 } else
359 #endif
360 {
361 info.si_signo = SIGSEGV;
362 info.si_errno = 0;
363 info.si_code = TARGET_SI_KERNEL;
364 info._sifields._sigfault._addr = 0;
365 queue_signal(env, info.si_signo, &info);
366 }
367 break;
368 case EXCP0E_PAGE:
369 info.si_signo = SIGSEGV;
370 info.si_errno = 0;
371 if (!(env->error_code & 1))
372 info.si_code = TARGET_SEGV_MAPERR;
373 else
374 info.si_code = TARGET_SEGV_ACCERR;
375 info._sifields._sigfault._addr = env->cr[2];
376 queue_signal(env, info.si_signo, &info);
377 break;
378 case EXCP00_DIVZ:
379 #ifndef TARGET_X86_64
380 if (env->eflags & VM_MASK) {
381 handle_vm86_trap(env, trapnr);
382 } else
383 #endif
384 {
385 /* division by zero */
386 info.si_signo = SIGFPE;
387 info.si_errno = 0;
388 info.si_code = TARGET_FPE_INTDIV;
389 info._sifields._sigfault._addr = env->eip;
390 queue_signal(env, info.si_signo, &info);
391 }
392 break;
393 case EXCP01_DB:
394 case EXCP03_INT3:
395 #ifndef TARGET_X86_64
396 if (env->eflags & VM_MASK) {
397 handle_vm86_trap(env, trapnr);
398 } else
399 #endif
400 {
401 info.si_signo = SIGTRAP;
402 info.si_errno = 0;
403 if (trapnr == EXCP01_DB) {
404 info.si_code = TARGET_TRAP_BRKPT;
405 info._sifields._sigfault._addr = env->eip;
406 } else {
407 info.si_code = TARGET_SI_KERNEL;
408 info._sifields._sigfault._addr = 0;
409 }
410 queue_signal(env, info.si_signo, &info);
411 }
412 break;
413 case EXCP04_INTO:
414 case EXCP05_BOUND:
415 #ifndef TARGET_X86_64
416 if (env->eflags & VM_MASK) {
417 handle_vm86_trap(env, trapnr);
418 } else
419 #endif
420 {
421 info.si_signo = SIGSEGV;
422 info.si_errno = 0;
423 info.si_code = TARGET_SI_KERNEL;
424 info._sifields._sigfault._addr = 0;
425 queue_signal(env, info.si_signo, &info);
426 }
427 break;
428 case EXCP06_ILLOP:
429 info.si_signo = SIGILL;
430 info.si_errno = 0;
431 info.si_code = TARGET_ILL_ILLOPN;
432 info._sifields._sigfault._addr = env->eip;
433 queue_signal(env, info.si_signo, &info);
434 break;
435 case EXCP_INTERRUPT:
436 /* just indicate that signals should be handled asap */
437 break;
438 case EXCP_DEBUG:
439 {
440 int sig;
441
442 sig = gdb_handlesig (env, TARGET_SIGTRAP);
443 if (sig)
444 {
445 info.si_signo = sig;
446 info.si_errno = 0;
447 info.si_code = TARGET_TRAP_BRKPT;
448 queue_signal(env, info.si_signo, &info);
449 }
450 }
451 break;
452 default:
453 pc = env->segs[R_CS].base + env->eip;
454 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
455 (long)pc, trapnr);
456 abort();
457 }
458 process_pending_signals(env);
459 }
460 }
461 #endif
462
463 #ifdef TARGET_ARM
464
465 #define get_user_code_u32(x, gaddr, doswap) \
466 ({ abi_long __r = get_user_u32((x), (gaddr)); \
467 if (!__r && (doswap)) { \
468 (x) = bswap32(x); \
469 } \
470 __r; \
471 })
472
473 #define get_user_code_u16(x, gaddr, doswap) \
474 ({ abi_long __r = get_user_u16((x), (gaddr)); \
475 if (!__r && (doswap)) { \
476 (x) = bswap16(x); \
477 } \
478 __r; \
479 })
480
481 /*
482 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
483 * Input:
484 * r0 = pointer to oldval
485 * r1 = pointer to newval
486 * r2 = pointer to target value
487 *
488 * Output:
489 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
490 * C set if *ptr was changed, clear if no exchange happened
491 *
492 * Note segv's in kernel helpers are a bit tricky, we can set the
493 * data address sensibly but the PC address is just the entry point.
494 */
495 static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
496 {
497 uint64_t oldval, newval, val;
498 uint32_t addr, cpsr;
499 target_siginfo_t info;
500
501 /* Based on the 32 bit code in do_kernel_trap */
502
503 /* XXX: This only works between threads, not between processes.
504 It's probably possible to implement this with native host
505 operations. However things like ldrex/strex are much harder so
506 there's not much point trying. */
507 start_exclusive();
508 cpsr = cpsr_read(env);
509 addr = env->regs[2];
510
511 if (get_user_u64(oldval, env->regs[0])) {
512 env->cp15.c6_data = env->regs[0];
513 goto segv;
514 };
515
516 if (get_user_u64(newval, env->regs[1])) {
517 env->cp15.c6_data = env->regs[1];
518 goto segv;
519 };
520
521 if (get_user_u64(val, addr)) {
522 env->cp15.c6_data = addr;
523 goto segv;
524 }
525
526 if (val == oldval) {
527 val = newval;
528
529 if (put_user_u64(val, addr)) {
530 env->cp15.c6_data = addr;
531 goto segv;
532 };
533
534 env->regs[0] = 0;
535 cpsr |= CPSR_C;
536 } else {
537 env->regs[0] = -1;
538 cpsr &= ~CPSR_C;
539 }
540 cpsr_write(env, cpsr, CPSR_C);
541 end_exclusive();
542 return;
543
544 segv:
545 end_exclusive();
546 /* We get the PC of the entry address - which is as good as anything,
547 on a real kernel what you get depends on which mode it uses. */
548 info.si_signo = SIGSEGV;
549 info.si_errno = 0;
550 /* XXX: check env->error_code */
551 info.si_code = TARGET_SEGV_MAPERR;
552 info._sifields._sigfault._addr = env->cp15.c6_data;
553 queue_signal(env, info.si_signo, &info);
554
555 end_exclusive();
556 }
557
558 /* Handle a jump to the kernel code page. */
559 static int
560 do_kernel_trap(CPUARMState *env)
561 {
562 uint32_t addr;
563 uint32_t cpsr;
564 uint32_t val;
565
566 switch (env->regs[15]) {
567 case 0xffff0fa0: /* __kernel_memory_barrier */
568 /* ??? No-op. Will need to do better for SMP. */
569 break;
570 case 0xffff0fc0: /* __kernel_cmpxchg */
571 /* XXX: This only works between threads, not between processes.
572 It's probably possible to implement this with native host
573 operations. However things like ldrex/strex are much harder so
574 there's not much point trying. */
575 start_exclusive();
576 cpsr = cpsr_read(env);
577 addr = env->regs[2];
578 /* FIXME: This should SEGV if the access fails. */
579 if (get_user_u32(val, addr))
580 val = ~env->regs[0];
581 if (val == env->regs[0]) {
582 val = env->regs[1];
583 /* FIXME: Check for segfaults. */
584 put_user_u32(val, addr);
585 env->regs[0] = 0;
586 cpsr |= CPSR_C;
587 } else {
588 env->regs[0] = -1;
589 cpsr &= ~CPSR_C;
590 }
591 cpsr_write(env, cpsr, CPSR_C);
592 end_exclusive();
593 break;
594 case 0xffff0fe0: /* __kernel_get_tls */
595 env->regs[0] = env->cp15.c13_tls2;
596 break;
597 case 0xffff0f60: /* __kernel_cmpxchg64 */
598 arm_kernel_cmpxchg64_helper(env);
599 break;
600
601 default:
602 return 1;
603 }
604 /* Jump back to the caller. */
605 addr = env->regs[14];
606 if (addr & 1) {
607 env->thumb = 1;
608 addr &= ~1;
609 }
610 env->regs[15] = addr;
611
612 return 0;
613 }
614
615 static int do_strex(CPUARMState *env)
616 {
617 uint32_t val;
618 int size;
619 int rc = 1;
620 int segv = 0;
621 uint32_t addr;
622 start_exclusive();
623 addr = env->exclusive_addr;
624 if (addr != env->exclusive_test) {
625 goto fail;
626 }
627 size = env->exclusive_info & 0xf;
628 switch (size) {
629 case 0:
630 segv = get_user_u8(val, addr);
631 break;
632 case 1:
633 segv = get_user_u16(val, addr);
634 break;
635 case 2:
636 case 3:
637 segv = get_user_u32(val, addr);
638 break;
639 default:
640 abort();
641 }
642 if (segv) {
643 env->cp15.c6_data = addr;
644 goto done;
645 }
646 if (val != env->exclusive_val) {
647 goto fail;
648 }
649 if (size == 3) {
650 segv = get_user_u32(val, addr + 4);
651 if (segv) {
652 env->cp15.c6_data = addr + 4;
653 goto done;
654 }
655 if (val != env->exclusive_high) {
656 goto fail;
657 }
658 }
659 val = env->regs[(env->exclusive_info >> 8) & 0xf];
660 switch (size) {
661 case 0:
662 segv = put_user_u8(val, addr);
663 break;
664 case 1:
665 segv = put_user_u16(val, addr);
666 break;
667 case 2:
668 case 3:
669 segv = put_user_u32(val, addr);
670 break;
671 }
672 if (segv) {
673 env->cp15.c6_data = addr;
674 goto done;
675 }
676 if (size == 3) {
677 val = env->regs[(env->exclusive_info >> 12) & 0xf];
678 segv = put_user_u32(val, addr + 4);
679 if (segv) {
680 env->cp15.c6_data = addr + 4;
681 goto done;
682 }
683 }
684 rc = 0;
685 fail:
686 env->regs[15] += 4;
687 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
688 done:
689 end_exclusive();
690 return segv;
691 }
692
693 void cpu_loop(CPUARMState *env)
694 {
695 int trapnr;
696 unsigned int n, insn;
697 target_siginfo_t info;
698 uint32_t addr;
699
700 for(;;) {
701 cpu_exec_start(env);
702 trapnr = cpu_arm_exec(env);
703 cpu_exec_end(env);
704 switch(trapnr) {
705 case EXCP_UDEF:
706 {
707 TaskState *ts = env->opaque;
708 uint32_t opcode;
709 int rc;
710
711 /* we handle the FPU emulation here, as Linux */
712 /* we get the opcode */
713 /* FIXME - what to do if get_user() fails? */
714 get_user_code_u32(opcode, env->regs[15], env->bswap_code);
715
716 rc = EmulateAll(opcode, &ts->fpa, env);
717 if (rc == 0) { /* illegal instruction */
718 info.si_signo = SIGILL;
719 info.si_errno = 0;
720 info.si_code = TARGET_ILL_ILLOPN;
721 info._sifields._sigfault._addr = env->regs[15];
722 queue_signal(env, info.si_signo, &info);
723 } else if (rc < 0) { /* FP exception */
724 int arm_fpe=0;
725
726 /* translate softfloat flags to FPSR flags */
727 if (-rc & float_flag_invalid)
728 arm_fpe |= BIT_IOC;
729 if (-rc & float_flag_divbyzero)
730 arm_fpe |= BIT_DZC;
731 if (-rc & float_flag_overflow)
732 arm_fpe |= BIT_OFC;
733 if (-rc & float_flag_underflow)
734 arm_fpe |= BIT_UFC;
735 if (-rc & float_flag_inexact)
736 arm_fpe |= BIT_IXC;
737
738 FPSR fpsr = ts->fpa.fpsr;
739 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
740
741 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
742 info.si_signo = SIGFPE;
743 info.si_errno = 0;
744
745 /* ordered by priority, least first */
746 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
747 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
748 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
749 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
750 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
751
752 info._sifields._sigfault._addr = env->regs[15];
753 queue_signal(env, info.si_signo, &info);
754 } else {
755 env->regs[15] += 4;
756 }
757
758 /* accumulate unenabled exceptions */
759 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
760 fpsr |= BIT_IXC;
761 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
762 fpsr |= BIT_UFC;
763 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
764 fpsr |= BIT_OFC;
765 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
766 fpsr |= BIT_DZC;
767 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
768 fpsr |= BIT_IOC;
769 ts->fpa.fpsr=fpsr;
770 } else { /* everything OK */
771 /* increment PC */
772 env->regs[15] += 4;
773 }
774 }
775 break;
776 case EXCP_SWI:
777 case EXCP_BKPT:
778 {
779 env->eabi = 1;
780 /* system call */
781 if (trapnr == EXCP_BKPT) {
782 if (env->thumb) {
783 /* FIXME - what to do if get_user() fails? */
784 get_user_code_u16(insn, env->regs[15], env->bswap_code);
785 n = insn & 0xff;
786 env->regs[15] += 2;
787 } else {
788 /* FIXME - what to do if get_user() fails? */
789 get_user_code_u32(insn, env->regs[15], env->bswap_code);
790 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
791 env->regs[15] += 4;
792 }
793 } else {
794 if (env->thumb) {
795 /* FIXME - what to do if get_user() fails? */
796 get_user_code_u16(insn, env->regs[15] - 2,
797 env->bswap_code);
798 n = insn & 0xff;
799 } else {
800 /* FIXME - what to do if get_user() fails? */
801 get_user_code_u32(insn, env->regs[15] - 4,
802 env->bswap_code);
803 n = insn & 0xffffff;
804 }
805 }
806
807 if (n == ARM_NR_cacheflush) {
808 /* nop */
809 } else if (n == ARM_NR_semihosting
810 || n == ARM_NR_thumb_semihosting) {
811 env->regs[0] = do_arm_semihosting (env);
812 } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) {
813 /* linux syscall */
814 if (env->thumb || n == 0) {
815 n = env->regs[7];
816 } else {
817 n -= ARM_SYSCALL_BASE;
818 env->eabi = 0;
819 }
820 if ( n > ARM_NR_BASE) {
821 switch (n) {
822 case ARM_NR_cacheflush:
823 /* nop */
824 break;
825 case ARM_NR_set_tls:
826 cpu_set_tls(env, env->regs[0]);
827 env->regs[0] = 0;
828 break;
829 default:
830 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
831 n);
832 env->regs[0] = -TARGET_ENOSYS;
833 break;
834 }
835 } else {
836 env->regs[0] = do_syscall(env,
837 n,
838 env->regs[0],
839 env->regs[1],
840 env->regs[2],
841 env->regs[3],
842 env->regs[4],
843 env->regs[5],
844 0, 0);
845 }
846 } else {
847 goto error;
848 }
849 }
850 break;
851 case EXCP_INTERRUPT:
852 /* just indicate that signals should be handled asap */
853 break;
854 case EXCP_PREFETCH_ABORT:
855 addr = env->cp15.c6_insn;
856 goto do_segv;
857 case EXCP_DATA_ABORT:
858 addr = env->cp15.c6_data;
859 do_segv:
860 {
861 info.si_signo = SIGSEGV;
862 info.si_errno = 0;
863 /* XXX: check env->error_code */
864 info.si_code = TARGET_SEGV_MAPERR;
865 info._sifields._sigfault._addr = addr;
866 queue_signal(env, info.si_signo, &info);
867 }
868 break;
869 case EXCP_DEBUG:
870 {
871 int sig;
872
873 sig = gdb_handlesig (env, TARGET_SIGTRAP);
874 if (sig)
875 {
876 info.si_signo = sig;
877 info.si_errno = 0;
878 info.si_code = TARGET_TRAP_BRKPT;
879 queue_signal(env, info.si_signo, &info);
880 }
881 }
882 break;
883 case EXCP_KERNEL_TRAP:
884 if (do_kernel_trap(env))
885 goto error;
886 break;
887 case EXCP_STREX:
888 if (do_strex(env)) {
889 addr = env->cp15.c6_data;
890 goto do_segv;
891 }
892 break;
893 default:
894 error:
895 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
896 trapnr);
897 cpu_dump_state(env, stderr, fprintf, 0);
898 abort();
899 }
900 process_pending_signals(env);
901 }
902 }
903
904 #endif
905
906 #ifdef TARGET_UNICORE32
907
908 void cpu_loop(CPUUniCore32State *env)
909 {
910 int trapnr;
911 unsigned int n, insn;
912 target_siginfo_t info;
913
914 for (;;) {
915 cpu_exec_start(env);
916 trapnr = uc32_cpu_exec(env);
917 cpu_exec_end(env);
918 switch (trapnr) {
919 case UC32_EXCP_PRIV:
920 {
921 /* system call */
922 get_user_u32(insn, env->regs[31] - 4);
923 n = insn & 0xffffff;
924
925 if (n >= UC32_SYSCALL_BASE) {
926 /* linux syscall */
927 n -= UC32_SYSCALL_BASE;
928 if (n == UC32_SYSCALL_NR_set_tls) {
929 cpu_set_tls(env, env->regs[0]);
930 env->regs[0] = 0;
931 } else {
932 env->regs[0] = do_syscall(env,
933 n,
934 env->regs[0],
935 env->regs[1],
936 env->regs[2],
937 env->regs[3],
938 env->regs[4],
939 env->regs[5],
940 0, 0);
941 }
942 } else {
943 goto error;
944 }
945 }
946 break;
947 case UC32_EXCP_DTRAP:
948 case UC32_EXCP_ITRAP:
949 info.si_signo = SIGSEGV;
950 info.si_errno = 0;
951 /* XXX: check env->error_code */
952 info.si_code = TARGET_SEGV_MAPERR;
953 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
954 queue_signal(env, info.si_signo, &info);
955 break;
956 case EXCP_INTERRUPT:
957 /* just indicate that signals should be handled asap */
958 break;
959 case EXCP_DEBUG:
960 {
961 int sig;
962
963 sig = gdb_handlesig(env, TARGET_SIGTRAP);
964 if (sig) {
965 info.si_signo = sig;
966 info.si_errno = 0;
967 info.si_code = TARGET_TRAP_BRKPT;
968 queue_signal(env, info.si_signo, &info);
969 }
970 }
971 break;
972 default:
973 goto error;
974 }
975 process_pending_signals(env);
976 }
977
978 error:
979 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
980 cpu_dump_state(env, stderr, fprintf, 0);
981 abort();
982 }
983 #endif
984
985 #ifdef TARGET_SPARC
986 #define SPARC64_STACK_BIAS 2047
987
988 //#define DEBUG_WIN
989
990 /* WARNING: dealing with register windows _is_ complicated. More info
991 can be found at http://www.sics.se/~psm/sparcstack.html */
992 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
993 {
994 index = (index + cwp * 16) % (16 * env->nwindows);
995 /* wrap handling : if cwp is on the last window, then we use the
996 registers 'after' the end */
997 if (index < 8 && env->cwp == env->nwindows - 1)
998 index += 16 * env->nwindows;
999 return index;
1000 }
1001
1002 /* save the register window 'cwp1' */
1003 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
1004 {
1005 unsigned int i;
1006 abi_ulong sp_ptr;
1007
1008 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
1009 #ifdef TARGET_SPARC64
1010 if (sp_ptr & 3)
1011 sp_ptr += SPARC64_STACK_BIAS;
1012 #endif
1013 #if defined(DEBUG_WIN)
1014 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
1015 sp_ptr, cwp1);
1016 #endif
1017 for(i = 0; i < 16; i++) {
1018 /* FIXME - what to do if put_user() fails? */
1019 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
1020 sp_ptr += sizeof(abi_ulong);
1021 }
1022 }
1023
1024 static void save_window(CPUSPARCState *env)
1025 {
1026 #ifndef TARGET_SPARC64
1027 unsigned int new_wim;
1028 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
1029 ((1LL << env->nwindows) - 1);
1030 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
1031 env->wim = new_wim;
1032 #else
1033 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
1034 env->cansave++;
1035 env->canrestore--;
1036 #endif
1037 }
1038
1039 static void restore_window(CPUSPARCState *env)
1040 {
1041 #ifndef TARGET_SPARC64
1042 unsigned int new_wim;
1043 #endif
1044 unsigned int i, cwp1;
1045 abi_ulong sp_ptr;
1046
1047 #ifndef TARGET_SPARC64
1048 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
1049 ((1LL << env->nwindows) - 1);
1050 #endif
1051
1052 /* restore the invalid window */
1053 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
1054 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
1055 #ifdef TARGET_SPARC64
1056 if (sp_ptr & 3)
1057 sp_ptr += SPARC64_STACK_BIAS;
1058 #endif
1059 #if defined(DEBUG_WIN)
1060 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
1061 sp_ptr, cwp1);
1062 #endif
1063 for(i = 0; i < 16; i++) {
1064 /* FIXME - what to do if get_user() fails? */
1065 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
1066 sp_ptr += sizeof(abi_ulong);
1067 }
1068 #ifdef TARGET_SPARC64
1069 env->canrestore++;
1070 if (env->cleanwin < env->nwindows - 1)
1071 env->cleanwin++;
1072 env->cansave--;
1073 #else
1074 env->wim = new_wim;
1075 #endif
1076 }
1077
1078 static void flush_windows(CPUSPARCState *env)
1079 {
1080 int offset, cwp1;
1081
1082 offset = 1;
1083 for(;;) {
1084 /* if restore would invoke restore_window(), then we can stop */
1085 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
1086 #ifndef TARGET_SPARC64
1087 if (env->wim & (1 << cwp1))
1088 break;
1089 #else
1090 if (env->canrestore == 0)
1091 break;
1092 env->cansave++;
1093 env->canrestore--;
1094 #endif
1095 save_window_offset(env, cwp1);
1096 offset++;
1097 }
1098 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
1099 #ifndef TARGET_SPARC64
1100 /* set wim so that restore will reload the registers */
1101 env->wim = 1 << cwp1;
1102 #endif
1103 #if defined(DEBUG_WIN)
1104 printf("flush_windows: nb=%d\n", offset - 1);
1105 #endif
1106 }
1107
1108 void cpu_loop (CPUSPARCState *env)
1109 {
1110 int trapnr;
1111 abi_long ret;
1112 target_siginfo_t info;
1113
1114 while (1) {
1115 trapnr = cpu_sparc_exec (env);
1116
1117 switch (trapnr) {
1118 #ifndef TARGET_SPARC64
1119 case 0x88:
1120 case 0x90:
1121 #else
1122 case 0x110:
1123 case 0x16d:
1124 #endif
1125 ret = do_syscall (env, env->gregs[1],
1126 env->regwptr[0], env->regwptr[1],
1127 env->regwptr[2], env->regwptr[3],
1128 env->regwptr[4], env->regwptr[5],
1129 0, 0);
1130 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
1131 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1132 env->xcc |= PSR_CARRY;
1133 #else
1134 env->psr |= PSR_CARRY;
1135 #endif
1136 ret = -ret;
1137 } else {
1138 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1139 env->xcc &= ~PSR_CARRY;
1140 #else
1141 env->psr &= ~PSR_CARRY;
1142 #endif
1143 }
1144 env->regwptr[0] = ret;
1145 /* next instruction */
1146 env->pc = env->npc;
1147 env->npc = env->npc + 4;
1148 break;
1149 case 0x83: /* flush windows */
1150 #ifdef TARGET_ABI32
1151 case 0x103:
1152 #endif
1153 flush_windows(env);
1154 /* next instruction */
1155 env->pc = env->npc;
1156 env->npc = env->npc + 4;
1157 break;
1158 #ifndef TARGET_SPARC64
1159 case TT_WIN_OVF: /* window overflow */
1160 save_window(env);
1161 break;
1162 case TT_WIN_UNF: /* window underflow */
1163 restore_window(env);
1164 break;
1165 case TT_TFAULT:
1166 case TT_DFAULT:
1167 {
1168 info.si_signo = TARGET_SIGSEGV;
1169 info.si_errno = 0;
1170 /* XXX: check env->error_code */
1171 info.si_code = TARGET_SEGV_MAPERR;
1172 info._sifields._sigfault._addr = env->mmuregs[4];
1173 queue_signal(env, info.si_signo, &info);
1174 }
1175 break;
1176 #else
1177 case TT_SPILL: /* window overflow */
1178 save_window(env);
1179 break;
1180 case TT_FILL: /* window underflow */
1181 restore_window(env);
1182 break;
1183 case TT_TFAULT:
1184 case TT_DFAULT:
1185 {
1186 info.si_signo = TARGET_SIGSEGV;
1187 info.si_errno = 0;
1188 /* XXX: check env->error_code */
1189 info.si_code = TARGET_SEGV_MAPERR;
1190 if (trapnr == TT_DFAULT)
1191 info._sifields._sigfault._addr = env->dmmuregs[4];
1192 else
1193 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
1194 queue_signal(env, info.si_signo, &info);
1195 }
1196 break;
1197 #ifndef TARGET_ABI32
1198 case 0x16e:
1199 flush_windows(env);
1200 sparc64_get_context(env);
1201 break;
1202 case 0x16f:
1203 flush_windows(env);
1204 sparc64_set_context(env);
1205 break;
1206 #endif
1207 #endif
1208 case EXCP_INTERRUPT:
1209 /* just indicate that signals should be handled asap */
1210 break;
1211 case TT_ILL_INSN:
1212 {
1213 info.si_signo = TARGET_SIGILL;
1214 info.si_errno = 0;
1215 info.si_code = TARGET_ILL_ILLOPC;
1216 info._sifields._sigfault._addr = env->pc;
1217 queue_signal(env, info.si_signo, &info);
1218 }
1219 break;
1220 case EXCP_DEBUG:
1221 {
1222 int sig;
1223
1224 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1225 if (sig)
1226 {
1227 info.si_signo = sig;
1228 info.si_errno = 0;
1229 info.si_code = TARGET_TRAP_BRKPT;
1230 queue_signal(env, info.si_signo, &info);
1231 }
1232 }
1233 break;
1234 default:
1235 printf ("Unhandled trap: 0x%x\n", trapnr);
1236 cpu_dump_state(env, stderr, fprintf, 0);
1237 exit (1);
1238 }
1239 process_pending_signals (env);
1240 }
1241 }
1242
1243 #endif
1244
1245 #ifdef TARGET_PPC
1246 static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
1247 {
1248 /* TO FIX */
1249 return 0;
1250 }
1251
1252 uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
1253 {
1254 return cpu_ppc_get_tb(env);
1255 }
1256
1257 uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
1258 {
1259 return cpu_ppc_get_tb(env) >> 32;
1260 }
1261
1262 uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
1263 {
1264 return cpu_ppc_get_tb(env);
1265 }
1266
1267 uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
1268 {
1269 return cpu_ppc_get_tb(env) >> 32;
1270 }
1271
1272 uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
1273 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1274
1275 uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
1276 {
1277 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1278 }
1279
1280 /* XXX: to be fixed */
1281 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
1282 {
1283 return -1;
1284 }
1285
1286 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
1287 {
1288 return -1;
1289 }
1290
1291 #define EXCP_DUMP(env, fmt, ...) \
1292 do { \
1293 fprintf(stderr, fmt , ## __VA_ARGS__); \
1294 cpu_dump_state(env, stderr, fprintf, 0); \
1295 qemu_log(fmt, ## __VA_ARGS__); \
1296 if (qemu_log_enabled()) { \
1297 log_cpu_state(env, 0); \
1298 } \
1299 } while (0)
1300
1301 static int do_store_exclusive(CPUPPCState *env)
1302 {
1303 target_ulong addr;
1304 target_ulong page_addr;
1305 target_ulong val;
1306 int flags;
1307 int segv = 0;
1308
1309 addr = env->reserve_ea;
1310 page_addr = addr & TARGET_PAGE_MASK;
1311 start_exclusive();
1312 mmap_lock();
1313 flags = page_get_flags(page_addr);
1314 if ((flags & PAGE_READ) == 0) {
1315 segv = 1;
1316 } else {
1317 int reg = env->reserve_info & 0x1f;
1318 int size = (env->reserve_info >> 5) & 0xf;
1319 int stored = 0;
1320
1321 if (addr == env->reserve_addr) {
1322 switch (size) {
1323 case 1: segv = get_user_u8(val, addr); break;
1324 case 2: segv = get_user_u16(val, addr); break;
1325 case 4: segv = get_user_u32(val, addr); break;
1326 #if defined(TARGET_PPC64)
1327 case 8: segv = get_user_u64(val, addr); break;
1328 #endif
1329 default: abort();
1330 }
1331 if (!segv && val == env->reserve_val) {
1332 val = env->gpr[reg];
1333 switch (size) {
1334 case 1: segv = put_user_u8(val, addr); break;
1335 case 2: segv = put_user_u16(val, addr); break;
1336 case 4: segv = put_user_u32(val, addr); break;
1337 #if defined(TARGET_PPC64)
1338 case 8: segv = put_user_u64(val, addr); break;
1339 #endif
1340 default: abort();
1341 }
1342 if (!segv) {
1343 stored = 1;
1344 }
1345 }
1346 }
1347 env->crf[0] = (stored << 1) | xer_so;
1348 env->reserve_addr = (target_ulong)-1;
1349 }
1350 if (!segv) {
1351 env->nip += 4;
1352 }
1353 mmap_unlock();
1354 end_exclusive();
1355 return segv;
1356 }
1357
1358 void cpu_loop(CPUPPCState *env)
1359 {
1360 target_siginfo_t info;
1361 int trapnr;
1362 target_ulong ret;
1363
1364 for(;;) {
1365 cpu_exec_start(env);
1366 trapnr = cpu_ppc_exec(env);
1367 cpu_exec_end(env);
1368 switch(trapnr) {
1369 case POWERPC_EXCP_NONE:
1370 /* Just go on */
1371 break;
1372 case POWERPC_EXCP_CRITICAL: /* Critical input */
1373 cpu_abort(env, "Critical interrupt while in user mode. "
1374 "Aborting\n");
1375 break;
1376 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1377 cpu_abort(env, "Machine check exception while in user mode. "
1378 "Aborting\n");
1379 break;
1380 case POWERPC_EXCP_DSI: /* Data storage exception */
1381 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
1382 env->spr[SPR_DAR]);
1383 /* XXX: check this. Seems bugged */
1384 switch (env->error_code & 0xFF000000) {
1385 case 0x40000000:
1386 info.si_signo = TARGET_SIGSEGV;
1387 info.si_errno = 0;
1388 info.si_code = TARGET_SEGV_MAPERR;
1389 break;
1390 case 0x04000000:
1391 info.si_signo = TARGET_SIGILL;
1392 info.si_errno = 0;
1393 info.si_code = TARGET_ILL_ILLADR;
1394 break;
1395 case 0x08000000:
1396 info.si_signo = TARGET_SIGSEGV;
1397 info.si_errno = 0;
1398 info.si_code = TARGET_SEGV_ACCERR;
1399 break;
1400 default:
1401 /* Let's send a regular segfault... */
1402 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1403 env->error_code);
1404 info.si_signo = TARGET_SIGSEGV;
1405 info.si_errno = 0;
1406 info.si_code = TARGET_SEGV_MAPERR;
1407 break;
1408 }
1409 info._sifields._sigfault._addr = env->nip;
1410 queue_signal(env, info.si_signo, &info);
1411 break;
1412 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1413 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1414 "\n", env->spr[SPR_SRR0]);
1415 /* XXX: check this */
1416 switch (env->error_code & 0xFF000000) {
1417 case 0x40000000:
1418 info.si_signo = TARGET_SIGSEGV;
1419 info.si_errno = 0;
1420 info.si_code = TARGET_SEGV_MAPERR;
1421 break;
1422 case 0x10000000:
1423 case 0x08000000:
1424 info.si_signo = TARGET_SIGSEGV;
1425 info.si_errno = 0;
1426 info.si_code = TARGET_SEGV_ACCERR;
1427 break;
1428 default:
1429 /* Let's send a regular segfault... */
1430 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1431 env->error_code);
1432 info.si_signo = TARGET_SIGSEGV;
1433 info.si_errno = 0;
1434 info.si_code = TARGET_SEGV_MAPERR;
1435 break;
1436 }
1437 info._sifields._sigfault._addr = env->nip - 4;
1438 queue_signal(env, info.si_signo, &info);
1439 break;
1440 case POWERPC_EXCP_EXTERNAL: /* External input */
1441 cpu_abort(env, "External interrupt while in user mode. "
1442 "Aborting\n");
1443 break;
1444 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1445 EXCP_DUMP(env, "Unaligned memory access\n");
1446 /* XXX: check this */
1447 info.si_signo = TARGET_SIGBUS;
1448 info.si_errno = 0;
1449 info.si_code = TARGET_BUS_ADRALN;
1450 info._sifields._sigfault._addr = env->nip - 4;
1451 queue_signal(env, info.si_signo, &info);
1452 break;
1453 case POWERPC_EXCP_PROGRAM: /* Program exception */
1454 /* XXX: check this */
1455 switch (env->error_code & ~0xF) {
1456 case POWERPC_EXCP_FP:
1457 EXCP_DUMP(env, "Floating point program exception\n");
1458 info.si_signo = TARGET_SIGFPE;
1459 info.si_errno = 0;
1460 switch (env->error_code & 0xF) {
1461 case POWERPC_EXCP_FP_OX:
1462 info.si_code = TARGET_FPE_FLTOVF;
1463 break;
1464 case POWERPC_EXCP_FP_UX:
1465 info.si_code = TARGET_FPE_FLTUND;
1466 break;
1467 case POWERPC_EXCP_FP_ZX:
1468 case POWERPC_EXCP_FP_VXZDZ:
1469 info.si_code = TARGET_FPE_FLTDIV;
1470 break;
1471 case POWERPC_EXCP_FP_XX:
1472 info.si_code = TARGET_FPE_FLTRES;
1473 break;
1474 case POWERPC_EXCP_FP_VXSOFT:
1475 info.si_code = TARGET_FPE_FLTINV;
1476 break;
1477 case POWERPC_EXCP_FP_VXSNAN:
1478 case POWERPC_EXCP_FP_VXISI:
1479 case POWERPC_EXCP_FP_VXIDI:
1480 case POWERPC_EXCP_FP_VXIMZ:
1481 case POWERPC_EXCP_FP_VXVC:
1482 case POWERPC_EXCP_FP_VXSQRT:
1483 case POWERPC_EXCP_FP_VXCVI:
1484 info.si_code = TARGET_FPE_FLTSUB;
1485 break;
1486 default:
1487 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1488 env->error_code);
1489 break;
1490 }
1491 break;
1492 case POWERPC_EXCP_INVAL:
1493 EXCP_DUMP(env, "Invalid instruction\n");
1494 info.si_signo = TARGET_SIGILL;
1495 info.si_errno = 0;
1496 switch (env->error_code & 0xF) {
1497 case POWERPC_EXCP_INVAL_INVAL:
1498 info.si_code = TARGET_ILL_ILLOPC;
1499 break;
1500 case POWERPC_EXCP_INVAL_LSWX:
1501 info.si_code = TARGET_ILL_ILLOPN;
1502 break;
1503 case POWERPC_EXCP_INVAL_SPR:
1504 info.si_code = TARGET_ILL_PRVREG;
1505 break;
1506 case POWERPC_EXCP_INVAL_FP:
1507 info.si_code = TARGET_ILL_COPROC;
1508 break;
1509 default:
1510 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1511 env->error_code & 0xF);
1512 info.si_code = TARGET_ILL_ILLADR;
1513 break;
1514 }
1515 break;
1516 case POWERPC_EXCP_PRIV:
1517 EXCP_DUMP(env, "Privilege violation\n");
1518 info.si_signo = TARGET_SIGILL;
1519 info.si_errno = 0;
1520 switch (env->error_code & 0xF) {
1521 case POWERPC_EXCP_PRIV_OPC:
1522 info.si_code = TARGET_ILL_PRVOPC;
1523 break;
1524 case POWERPC_EXCP_PRIV_REG:
1525 info.si_code = TARGET_ILL_PRVREG;
1526 break;
1527 default:
1528 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1529 env->error_code & 0xF);
1530 info.si_code = TARGET_ILL_PRVOPC;
1531 break;
1532 }
1533 break;
1534 case POWERPC_EXCP_TRAP:
1535 cpu_abort(env, "Tried to call a TRAP\n");
1536 break;
1537 default:
1538 /* Should not happen ! */
1539 cpu_abort(env, "Unknown program exception (%02x)\n",
1540 env->error_code);
1541 break;
1542 }
1543 info._sifields._sigfault._addr = env->nip - 4;
1544 queue_signal(env, info.si_signo, &info);
1545 break;
1546 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1547 EXCP_DUMP(env, "No floating point allowed\n");
1548 info.si_signo = TARGET_SIGILL;
1549 info.si_errno = 0;
1550 info.si_code = TARGET_ILL_COPROC;
1551 info._sifields._sigfault._addr = env->nip - 4;
1552 queue_signal(env, info.si_signo, &info);
1553 break;
1554 case POWERPC_EXCP_SYSCALL: /* System call exception */
1555 cpu_abort(env, "Syscall exception while in user mode. "
1556 "Aborting\n");
1557 break;
1558 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1559 EXCP_DUMP(env, "No APU instruction allowed\n");
1560 info.si_signo = TARGET_SIGILL;
1561 info.si_errno = 0;
1562 info.si_code = TARGET_ILL_COPROC;
1563 info._sifields._sigfault._addr = env->nip - 4;
1564 queue_signal(env, info.si_signo, &info);
1565 break;
1566 case POWERPC_EXCP_DECR: /* Decrementer exception */
1567 cpu_abort(env, "Decrementer interrupt while in user mode. "
1568 "Aborting\n");
1569 break;
1570 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1571 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1572 "Aborting\n");
1573 break;
1574 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1575 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1576 "Aborting\n");
1577 break;
1578 case POWERPC_EXCP_DTLB: /* Data TLB error */
1579 cpu_abort(env, "Data TLB exception while in user mode. "
1580 "Aborting\n");
1581 break;
1582 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1583 cpu_abort(env, "Instruction TLB exception while in user mode. "
1584 "Aborting\n");
1585 break;
1586 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1587 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1588 info.si_signo = TARGET_SIGILL;
1589 info.si_errno = 0;
1590 info.si_code = TARGET_ILL_COPROC;
1591 info._sifields._sigfault._addr = env->nip - 4;
1592 queue_signal(env, info.si_signo, &info);
1593 break;
1594 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1595 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1596 break;
1597 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1598 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1599 break;
1600 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1601 cpu_abort(env, "Performance monitor exception not handled\n");
1602 break;
1603 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1604 cpu_abort(env, "Doorbell interrupt while in user mode. "
1605 "Aborting\n");
1606 break;
1607 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1608 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1609 "Aborting\n");
1610 break;
1611 case POWERPC_EXCP_RESET: /* System reset exception */
1612 cpu_abort(env, "Reset interrupt while in user mode. "
1613 "Aborting\n");
1614 break;
1615 case POWERPC_EXCP_DSEG: /* Data segment exception */
1616 cpu_abort(env, "Data segment exception while in user mode. "
1617 "Aborting\n");
1618 break;
1619 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1620 cpu_abort(env, "Instruction segment exception "
1621 "while in user mode. Aborting\n");
1622 break;
1623 /* PowerPC 64 with hypervisor mode support */
1624 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1625 cpu_abort(env, "Hypervisor decrementer interrupt "
1626 "while in user mode. Aborting\n");
1627 break;
1628 case POWERPC_EXCP_TRACE: /* Trace exception */
1629 /* Nothing to do:
1630 * we use this exception to emulate step-by-step execution mode.
1631 */
1632 break;
1633 /* PowerPC 64 with hypervisor mode support */
1634 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1635 cpu_abort(env, "Hypervisor data storage exception "
1636 "while in user mode. Aborting\n");
1637 break;
1638 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1639 cpu_abort(env, "Hypervisor instruction storage exception "
1640 "while in user mode. Aborting\n");
1641 break;
1642 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1643 cpu_abort(env, "Hypervisor data segment exception "
1644 "while in user mode. Aborting\n");
1645 break;
1646 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1647 cpu_abort(env, "Hypervisor instruction segment exception "
1648 "while in user mode. Aborting\n");
1649 break;
1650 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1651 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1652 info.si_signo = TARGET_SIGILL;
1653 info.si_errno = 0;
1654 info.si_code = TARGET_ILL_COPROC;
1655 info._sifields._sigfault._addr = env->nip - 4;
1656 queue_signal(env, info.si_signo, &info);
1657 break;
1658 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1659 cpu_abort(env, "Programmable interval timer interrupt "
1660 "while in user mode. Aborting\n");
1661 break;
1662 case POWERPC_EXCP_IO: /* IO error exception */
1663 cpu_abort(env, "IO error exception while in user mode. "
1664 "Aborting\n");
1665 break;
1666 case POWERPC_EXCP_RUNM: /* Run mode exception */
1667 cpu_abort(env, "Run mode exception while in user mode. "
1668 "Aborting\n");
1669 break;
1670 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1671 cpu_abort(env, "Emulation trap exception not handled\n");
1672 break;
1673 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1674 cpu_abort(env, "Instruction fetch TLB exception "
1675 "while in user-mode. Aborting");
1676 break;
1677 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1678 cpu_abort(env, "Data load TLB exception while in user-mode. "
1679 "Aborting");
1680 break;
1681 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1682 cpu_abort(env, "Data store TLB exception while in user-mode. "
1683 "Aborting");
1684 break;
1685 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1686 cpu_abort(env, "Floating-point assist exception not handled\n");
1687 break;
1688 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1689 cpu_abort(env, "Instruction address breakpoint exception "
1690 "not handled\n");
1691 break;
1692 case POWERPC_EXCP_SMI: /* System management interrupt */
1693 cpu_abort(env, "System management interrupt while in user mode. "
1694 "Aborting\n");
1695 break;
1696 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1697 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1698 "Aborting\n");
1699 break;
1700 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1701 cpu_abort(env, "Performance monitor exception not handled\n");
1702 break;
1703 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1704 cpu_abort(env, "Vector assist exception not handled\n");
1705 break;
1706 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1707 cpu_abort(env, "Soft patch exception not handled\n");
1708 break;
1709 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1710 cpu_abort(env, "Maintenance exception while in user mode. "
1711 "Aborting\n");
1712 break;
1713 case POWERPC_EXCP_STOP: /* stop translation */
1714 /* We did invalidate the instruction cache. Go on */
1715 break;
1716 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1717 /* We just stopped because of a branch. Go on */
1718 break;
1719 case POWERPC_EXCP_SYSCALL_USER:
1720 /* system call in user-mode emulation */
1721 /* WARNING:
1722 * PPC ABI uses overflow flag in cr0 to signal an error
1723 * in syscalls.
1724 */
1725 env->crf[0] &= ~0x1;
1726 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1727 env->gpr[5], env->gpr[6], env->gpr[7],
1728 env->gpr[8], 0, 0);
1729 if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) {
1730 /* Returning from a successful sigreturn syscall.
1731 Avoid corrupting register state. */
1732 break;
1733 }
1734 if (ret > (target_ulong)(-515)) {
1735 env->crf[0] |= 0x1;
1736 ret = -ret;
1737 }
1738 env->gpr[3] = ret;
1739 break;
1740 case POWERPC_EXCP_STCX:
1741 if (do_store_exclusive(env)) {
1742 info.si_signo = TARGET_SIGSEGV;
1743 info.si_errno = 0;
1744 info.si_code = TARGET_SEGV_MAPERR;
1745 info._sifields._sigfault._addr = env->nip;
1746 queue_signal(env, info.si_signo, &info);
1747 }
1748 break;
1749 case EXCP_DEBUG:
1750 {
1751 int sig;
1752
1753 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1754 if (sig) {
1755 info.si_signo = sig;
1756 info.si_errno = 0;
1757 info.si_code = TARGET_TRAP_BRKPT;
1758 queue_signal(env, info.si_signo, &info);
1759 }
1760 }
1761 break;
1762 case EXCP_INTERRUPT:
1763 /* just indicate that signals should be handled asap */
1764 break;
1765 default:
1766 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1767 break;
1768 }
1769 process_pending_signals(env);
1770 }
1771 }
1772 #endif
1773
1774 #ifdef TARGET_MIPS
1775
1776 #define MIPS_SYS(name, args) args,
1777
1778 static const uint8_t mips_syscall_args[] = {
1779 MIPS_SYS(sys_syscall , 8) /* 4000 */
1780 MIPS_SYS(sys_exit , 1)
1781 MIPS_SYS(sys_fork , 0)
1782 MIPS_SYS(sys_read , 3)
1783 MIPS_SYS(sys_write , 3)
1784 MIPS_SYS(sys_open , 3) /* 4005 */
1785 MIPS_SYS(sys_close , 1)
1786 MIPS_SYS(sys_waitpid , 3)
1787 MIPS_SYS(sys_creat , 2)
1788 MIPS_SYS(sys_link , 2)
1789 MIPS_SYS(sys_unlink , 1) /* 4010 */
1790 MIPS_SYS(sys_execve , 0)
1791 MIPS_SYS(sys_chdir , 1)
1792 MIPS_SYS(sys_time , 1)
1793 MIPS_SYS(sys_mknod , 3)
1794 MIPS_SYS(sys_chmod , 2) /* 4015 */
1795 MIPS_SYS(sys_lchown , 3)
1796 MIPS_SYS(sys_ni_syscall , 0)
1797 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1798 MIPS_SYS(sys_lseek , 3)
1799 MIPS_SYS(sys_getpid , 0) /* 4020 */
1800 MIPS_SYS(sys_mount , 5)
1801 MIPS_SYS(sys_oldumount , 1)
1802 MIPS_SYS(sys_setuid , 1)
1803 MIPS_SYS(sys_getuid , 0)
1804 MIPS_SYS(sys_stime , 1) /* 4025 */
1805 MIPS_SYS(sys_ptrace , 4)
1806 MIPS_SYS(sys_alarm , 1)
1807 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1808 MIPS_SYS(sys_pause , 0)
1809 MIPS_SYS(sys_utime , 2) /* 4030 */
1810 MIPS_SYS(sys_ni_syscall , 0)
1811 MIPS_SYS(sys_ni_syscall , 0)
1812 MIPS_SYS(sys_access , 2)
1813 MIPS_SYS(sys_nice , 1)
1814 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1815 MIPS_SYS(sys_sync , 0)
1816 MIPS_SYS(sys_kill , 2)
1817 MIPS_SYS(sys_rename , 2)
1818 MIPS_SYS(sys_mkdir , 2)
1819 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1820 MIPS_SYS(sys_dup , 1)
1821 MIPS_SYS(sys_pipe , 0)
1822 MIPS_SYS(sys_times , 1)
1823 MIPS_SYS(sys_ni_syscall , 0)
1824 MIPS_SYS(sys_brk , 1) /* 4045 */
1825 MIPS_SYS(sys_setgid , 1)
1826 MIPS_SYS(sys_getgid , 0)
1827 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1828 MIPS_SYS(sys_geteuid , 0)
1829 MIPS_SYS(sys_getegid , 0) /* 4050 */
1830 MIPS_SYS(sys_acct , 0)
1831 MIPS_SYS(sys_umount , 2)
1832 MIPS_SYS(sys_ni_syscall , 0)
1833 MIPS_SYS(sys_ioctl , 3)
1834 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1835 MIPS_SYS(sys_ni_syscall , 2)
1836 MIPS_SYS(sys_setpgid , 2)
1837 MIPS_SYS(sys_ni_syscall , 0)
1838 MIPS_SYS(sys_olduname , 1)
1839 MIPS_SYS(sys_umask , 1) /* 4060 */
1840 MIPS_SYS(sys_chroot , 1)
1841 MIPS_SYS(sys_ustat , 2)
1842 MIPS_SYS(sys_dup2 , 2)
1843 MIPS_SYS(sys_getppid , 0)
1844 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1845 MIPS_SYS(sys_setsid , 0)
1846 MIPS_SYS(sys_sigaction , 3)
1847 MIPS_SYS(sys_sgetmask , 0)
1848 MIPS_SYS(sys_ssetmask , 1)
1849 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1850 MIPS_SYS(sys_setregid , 2)
1851 MIPS_SYS(sys_sigsuspend , 0)
1852 MIPS_SYS(sys_sigpending , 1)
1853 MIPS_SYS(sys_sethostname , 2)
1854 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1855 MIPS_SYS(sys_getrlimit , 2)
1856 MIPS_SYS(sys_getrusage , 2)
1857 MIPS_SYS(sys_gettimeofday, 2)
1858 MIPS_SYS(sys_settimeofday, 2)
1859 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1860 MIPS_SYS(sys_setgroups , 2)
1861 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1862 MIPS_SYS(sys_symlink , 2)
1863 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1864 MIPS_SYS(sys_readlink , 3) /* 4085 */
1865 MIPS_SYS(sys_uselib , 1)
1866 MIPS_SYS(sys_swapon , 2)
1867 MIPS_SYS(sys_reboot , 3)
1868 MIPS_SYS(old_readdir , 3)
1869 MIPS_SYS(old_mmap , 6) /* 4090 */
1870 MIPS_SYS(sys_munmap , 2)
1871 MIPS_SYS(sys_truncate , 2)
1872 MIPS_SYS(sys_ftruncate , 2)
1873 MIPS_SYS(sys_fchmod , 2)
1874 MIPS_SYS(sys_fchown , 3) /* 4095 */
1875 MIPS_SYS(sys_getpriority , 2)
1876 MIPS_SYS(sys_setpriority , 3)
1877 MIPS_SYS(sys_ni_syscall , 0)
1878 MIPS_SYS(sys_statfs , 2)
1879 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1880 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1881 MIPS_SYS(sys_socketcall , 2)
1882 MIPS_SYS(sys_syslog , 3)
1883 MIPS_SYS(sys_setitimer , 3)
1884 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1885 MIPS_SYS(sys_newstat , 2)
1886 MIPS_SYS(sys_newlstat , 2)
1887 MIPS_SYS(sys_newfstat , 2)
1888 MIPS_SYS(sys_uname , 1)
1889 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1890 MIPS_SYS(sys_vhangup , 0)
1891 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1892 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1893 MIPS_SYS(sys_wait4 , 4)
1894 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1895 MIPS_SYS(sys_sysinfo , 1)
1896 MIPS_SYS(sys_ipc , 6)
1897 MIPS_SYS(sys_fsync , 1)
1898 MIPS_SYS(sys_sigreturn , 0)
1899 MIPS_SYS(sys_clone , 6) /* 4120 */
1900 MIPS_SYS(sys_setdomainname, 2)
1901 MIPS_SYS(sys_newuname , 1)
1902 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1903 MIPS_SYS(sys_adjtimex , 1)
1904 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1905 MIPS_SYS(sys_sigprocmask , 3)
1906 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1907 MIPS_SYS(sys_init_module , 5)
1908 MIPS_SYS(sys_delete_module, 1)
1909 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1910 MIPS_SYS(sys_quotactl , 0)
1911 MIPS_SYS(sys_getpgid , 1)
1912 MIPS_SYS(sys_fchdir , 1)
1913 MIPS_SYS(sys_bdflush , 2)
1914 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1915 MIPS_SYS(sys_personality , 1)
1916 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1917 MIPS_SYS(sys_setfsuid , 1)
1918 MIPS_SYS(sys_setfsgid , 1)
1919 MIPS_SYS(sys_llseek , 5) /* 4140 */
1920 MIPS_SYS(sys_getdents , 3)
1921 MIPS_SYS(sys_select , 5)
1922 MIPS_SYS(sys_flock , 2)
1923 MIPS_SYS(sys_msync , 3)
1924 MIPS_SYS(sys_readv , 3) /* 4145 */
1925 MIPS_SYS(sys_writev , 3)
1926 MIPS_SYS(sys_cacheflush , 3)
1927 MIPS_SYS(sys_cachectl , 3)
1928 MIPS_SYS(sys_sysmips , 4)
1929 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1930 MIPS_SYS(sys_getsid , 1)
1931 MIPS_SYS(sys_fdatasync , 0)
1932 MIPS_SYS(sys_sysctl , 1)
1933 MIPS_SYS(sys_mlock , 2)
1934 MIPS_SYS(sys_munlock , 2) /* 4155 */
1935 MIPS_SYS(sys_mlockall , 1)
1936 MIPS_SYS(sys_munlockall , 0)
1937 MIPS_SYS(sys_sched_setparam, 2)
1938 MIPS_SYS(sys_sched_getparam, 2)
1939 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1940 MIPS_SYS(sys_sched_getscheduler, 1)
1941 MIPS_SYS(sys_sched_yield , 0)
1942 MIPS_SYS(sys_sched_get_priority_max, 1)
1943 MIPS_SYS(sys_sched_get_priority_min, 1)
1944 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1945 MIPS_SYS(sys_nanosleep, 2)
1946 MIPS_SYS(sys_mremap , 4)
1947 MIPS_SYS(sys_accept , 3)
1948 MIPS_SYS(sys_bind , 3)
1949 MIPS_SYS(sys_connect , 3) /* 4170 */
1950 MIPS_SYS(sys_getpeername , 3)
1951 MIPS_SYS(sys_getsockname , 3)
1952 MIPS_SYS(sys_getsockopt , 5)
1953 MIPS_SYS(sys_listen , 2)
1954 MIPS_SYS(sys_recv , 4) /* 4175 */
1955 MIPS_SYS(sys_recvfrom , 6)
1956 MIPS_SYS(sys_recvmsg , 3)
1957 MIPS_SYS(sys_send , 4)
1958 MIPS_SYS(sys_sendmsg , 3)
1959 MIPS_SYS(sys_sendto , 6) /* 4180 */
1960 MIPS_SYS(sys_setsockopt , 5)
1961 MIPS_SYS(sys_shutdown , 2)
1962 MIPS_SYS(sys_socket , 3)
1963 MIPS_SYS(sys_socketpair , 4)
1964 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1965 MIPS_SYS(sys_getresuid , 3)
1966 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1967 MIPS_SYS(sys_poll , 3)
1968 MIPS_SYS(sys_nfsservctl , 3)
1969 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1970 MIPS_SYS(sys_getresgid , 3)
1971 MIPS_SYS(sys_prctl , 5)
1972 MIPS_SYS(sys_rt_sigreturn, 0)
1973 MIPS_SYS(sys_rt_sigaction, 4)
1974 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1975 MIPS_SYS(sys_rt_sigpending, 2)
1976 MIPS_SYS(sys_rt_sigtimedwait, 4)
1977 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1978 MIPS_SYS(sys_rt_sigsuspend, 0)
1979 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1980 MIPS_SYS(sys_pwrite64 , 6)
1981 MIPS_SYS(sys_chown , 3)
1982 MIPS_SYS(sys_getcwd , 2)
1983 MIPS_SYS(sys_capget , 2)
1984 MIPS_SYS(sys_capset , 2) /* 4205 */
1985 MIPS_SYS(sys_sigaltstack , 2)
1986 MIPS_SYS(sys_sendfile , 4)
1987 MIPS_SYS(sys_ni_syscall , 0)
1988 MIPS_SYS(sys_ni_syscall , 0)
1989 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1990 MIPS_SYS(sys_truncate64 , 4)
1991 MIPS_SYS(sys_ftruncate64 , 4)
1992 MIPS_SYS(sys_stat64 , 2)
1993 MIPS_SYS(sys_lstat64 , 2)
1994 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1995 MIPS_SYS(sys_pivot_root , 2)
1996 MIPS_SYS(sys_mincore , 3)
1997 MIPS_SYS(sys_madvise , 3)
1998 MIPS_SYS(sys_getdents64 , 3)
1999 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
2000 MIPS_SYS(sys_ni_syscall , 0)
2001 MIPS_SYS(sys_gettid , 0)
2002 MIPS_SYS(sys_readahead , 5)
2003 MIPS_SYS(sys_setxattr , 5)
2004 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
2005 MIPS_SYS(sys_fsetxattr , 5)
2006 MIPS_SYS(sys_getxattr , 4)
2007 MIPS_SYS(sys_lgetxattr , 4)
2008 MIPS_SYS(sys_fgetxattr , 4)
2009 MIPS_SYS(sys_listxattr , 3) /* 4230 */
2010 MIPS_SYS(sys_llistxattr , 3)
2011 MIPS_SYS(sys_flistxattr , 3)
2012 MIPS_SYS(sys_removexattr , 2)
2013 MIPS_SYS(sys_lremovexattr, 2)
2014 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
2015 MIPS_SYS(sys_tkill , 2)
2016 MIPS_SYS(sys_sendfile64 , 5)
2017 MIPS_SYS(sys_futex , 2)
2018 MIPS_SYS(sys_sched_setaffinity, 3)
2019 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
2020 MIPS_SYS(sys_io_setup , 2)
2021 MIPS_SYS(sys_io_destroy , 1)
2022 MIPS_SYS(sys_io_getevents, 5)
2023 MIPS_SYS(sys_io_submit , 3)
2024 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
2025 MIPS_SYS(sys_exit_group , 1)
2026 MIPS_SYS(sys_lookup_dcookie, 3)
2027 MIPS_SYS(sys_epoll_create, 1)
2028 MIPS_SYS(sys_epoll_ctl , 4)
2029 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
2030 MIPS_SYS(sys_remap_file_pages, 5)
2031 MIPS_SYS(sys_set_tid_address, 1)
2032 MIPS_SYS(sys_restart_syscall, 0)
2033 MIPS_SYS(sys_fadvise64_64, 7)
2034 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
2035 MIPS_SYS(sys_fstatfs64 , 2)
2036 MIPS_SYS(sys_timer_create, 3)
2037 MIPS_SYS(sys_timer_settime, 4)
2038 MIPS_SYS(sys_timer_gettime, 2)
2039 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
2040 MIPS_SYS(sys_timer_delete, 1)
2041 MIPS_SYS(sys_clock_settime, 2)
2042 MIPS_SYS(sys_clock_gettime, 2)
2043 MIPS_SYS(sys_clock_getres, 2)
2044 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
2045 MIPS_SYS(sys_tgkill , 3)
2046 MIPS_SYS(sys_utimes , 2)
2047 MIPS_SYS(sys_mbind , 4)
2048 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
2049 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
2050 MIPS_SYS(sys_mq_open , 4)
2051 MIPS_SYS(sys_mq_unlink , 1)
2052 MIPS_SYS(sys_mq_timedsend, 5)
2053 MIPS_SYS(sys_mq_timedreceive, 5)
2054 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
2055 MIPS_SYS(sys_mq_getsetattr, 3)
2056 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
2057 MIPS_SYS(sys_waitid , 4)
2058 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
2059 MIPS_SYS(sys_add_key , 5)
2060 MIPS_SYS(sys_request_key, 4)
2061 MIPS_SYS(sys_keyctl , 5)
2062 MIPS_SYS(sys_set_thread_area, 1)
2063 MIPS_SYS(sys_inotify_init, 0)
2064 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
2065 MIPS_SYS(sys_inotify_rm_watch, 2)
2066 MIPS_SYS(sys_migrate_pages, 4)
2067 MIPS_SYS(sys_openat, 4)
2068 MIPS_SYS(sys_mkdirat, 3)
2069 MIPS_SYS(sys_mknodat, 4) /* 4290 */
2070 MIPS_SYS(sys_fchownat, 5)
2071 MIPS_SYS(sys_futimesat, 3)
2072 MIPS_SYS(sys_fstatat64, 4)
2073 MIPS_SYS(sys_unlinkat, 3)
2074 MIPS_SYS(sys_renameat, 4) /* 4295 */
2075 MIPS_SYS(sys_linkat, 5)
2076 MIPS_SYS(sys_symlinkat, 3)
2077 MIPS_SYS(sys_readlinkat, 4)
2078 MIPS_SYS(sys_fchmodat, 3)
2079 MIPS_SYS(sys_faccessat, 3) /* 4300 */
2080 MIPS_SYS(sys_pselect6, 6)
2081 MIPS_SYS(sys_ppoll, 5)
2082 MIPS_SYS(sys_unshare, 1)
2083 MIPS_SYS(sys_splice, 4)
2084 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
2085 MIPS_SYS(sys_tee, 4)
2086 MIPS_SYS(sys_vmsplice, 4)
2087 MIPS_SYS(sys_move_pages, 6)
2088 MIPS_SYS(sys_set_robust_list, 2)
2089 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
2090 MIPS_SYS(sys_kexec_load, 4)
2091 MIPS_SYS(sys_getcpu, 3)
2092 MIPS_SYS(sys_epoll_pwait, 6)
2093 MIPS_SYS(sys_ioprio_set, 3)
2094 MIPS_SYS(sys_ioprio_get, 2)
2095 MIPS_SYS(sys_utimensat, 4)
2096 MIPS_SYS(sys_signalfd, 3)
2097 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */
2098 MIPS_SYS(sys_eventfd, 1)
2099 MIPS_SYS(sys_fallocate, 6) /* 4320 */
2100 MIPS_SYS(sys_timerfd_create, 2)
2101 MIPS_SYS(sys_timerfd_gettime, 2)
2102 MIPS_SYS(sys_timerfd_settime, 4)
2103 MIPS_SYS(sys_signalfd4, 4)
2104 MIPS_SYS(sys_eventfd2, 2) /* 4325 */
2105 MIPS_SYS(sys_epoll_create1, 1)
2106 MIPS_SYS(sys_dup3, 3)
2107 MIPS_SYS(sys_pipe2, 2)
2108 MIPS_SYS(sys_inotify_init1, 1)
2109 MIPS_SYS(sys_preadv, 6) /* 4330 */
2110 MIPS_SYS(sys_pwritev, 6)
2111 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2112 MIPS_SYS(sys_perf_event_open, 5)
2113 MIPS_SYS(sys_accept4, 4)
2114 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */
2115 MIPS_SYS(sys_fanotify_init, 2)
2116 MIPS_SYS(sys_fanotify_mark, 6)
2117 MIPS_SYS(sys_prlimit64, 4)
2118 MIPS_SYS(sys_name_to_handle_at, 5)
2119 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */
2120 MIPS_SYS(sys_clock_adjtime, 2)
2121 MIPS_SYS(sys_syncfs, 1)
2122 };
2123
2124 #undef MIPS_SYS
2125
2126 static int do_store_exclusive(CPUMIPSState *env)
2127 {
2128 target_ulong addr;
2129 target_ulong page_addr;
2130 target_ulong val;
2131 int flags;
2132 int segv = 0;
2133 int reg;
2134 int d;
2135
2136 addr = env->lladdr;
2137 page_addr = addr & TARGET_PAGE_MASK;
2138 start_exclusive();
2139 mmap_lock();
2140 flags = page_get_flags(page_addr);
2141 if ((flags & PAGE_READ) == 0) {
2142 segv = 1;
2143 } else {
2144 reg = env->llreg & 0x1f;
2145 d = (env->llreg & 0x20) != 0;
2146 if (d) {
2147 segv = get_user_s64(val, addr);
2148 } else {
2149 segv = get_user_s32(val, addr);
2150 }
2151 if (!segv) {
2152 if (val != env->llval) {
2153 env->active_tc.gpr[reg] = 0;
2154 } else {
2155 if (d) {
2156 segv = put_user_u64(env->llnewval, addr);
2157 } else {
2158 segv = put_user_u32(env->llnewval, addr);
2159 }
2160 if (!segv) {
2161 env->active_tc.gpr[reg] = 1;
2162 }
2163 }
2164 }
2165 }
2166 env->lladdr = -1;
2167 if (!segv) {
2168 env->active_tc.PC += 4;
2169 }
2170 mmap_unlock();
2171 end_exclusive();
2172 return segv;
2173 }
2174
2175 void cpu_loop(CPUMIPSState *env)
2176 {
2177 target_siginfo_t info;
2178 int trapnr, ret;
2179 unsigned int syscall_num;
2180
2181 for(;;) {
2182 cpu_exec_start(env);
2183 trapnr = cpu_mips_exec(env);
2184 cpu_exec_end(env);
2185 switch(trapnr) {
2186 case EXCP_SYSCALL:
2187 syscall_num = env->active_tc.gpr[2] - 4000;
2188 env->active_tc.PC += 4;
2189 if (syscall_num >= sizeof(mips_syscall_args)) {
2190 ret = -TARGET_ENOSYS;
2191 } else {
2192 int nb_args;
2193 abi_ulong sp_reg;
2194 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
2195
2196 nb_args = mips_syscall_args[syscall_num];
2197 sp_reg = env->active_tc.gpr[29];
2198 switch (nb_args) {
2199 /* these arguments are taken from the stack */
2200 case 8:
2201 if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) {
2202 goto done_syscall;
2203 }
2204 case 7:
2205 if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) {
2206 goto done_syscall;
2207 }
2208 case 6:
2209 if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) {
2210 goto done_syscall;
2211 }
2212 case 5:
2213 if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) {
2214 goto done_syscall;
2215 }
2216 default:
2217 break;
2218 }
2219 ret = do_syscall(env, env->active_tc.gpr[2],
2220 env->active_tc.gpr[4],
2221 env->active_tc.gpr[5],
2222 env->active_tc.gpr[6],
2223 env->active_tc.gpr[7],
2224 arg5, arg6, arg7, arg8);
2225 }
2226 done_syscall:
2227 if (ret == -TARGET_QEMU_ESIGRETURN) {
2228 /* Returning from a successful sigreturn syscall.
2229 Avoid clobbering register state. */
2230 break;
2231 }
2232 if ((unsigned int)ret >= (unsigned int)(-1133)) {
2233 env->active_tc.gpr[7] = 1; /* error flag */
2234 ret = -ret;
2235 } else {
2236 env->active_tc.gpr[7] = 0; /* error flag */
2237 }
2238 env->active_tc.gpr[2] = ret;
2239 break;
2240 case EXCP_TLBL:
2241 case EXCP_TLBS:
2242 case EXCP_AdEL:
2243 case EXCP_AdES:
2244 info.si_signo = TARGET_SIGSEGV;
2245 info.si_errno = 0;
2246 /* XXX: check env->error_code */
2247 info.si_code = TARGET_SEGV_MAPERR;
2248 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2249 queue_signal(env, info.si_signo, &info);
2250 break;
2251 case EXCP_CpU:
2252 case EXCP_RI:
2253 info.si_signo = TARGET_SIGILL;
2254 info.si_errno = 0;
2255 info.si_code = 0;
2256 queue_signal(env, info.si_signo, &info);
2257 break;
2258 case EXCP_INTERRUPT:
2259 /* just indicate that signals should be handled asap */
2260 break;
2261 case EXCP_DEBUG:
2262 {
2263 int sig;
2264
2265 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2266 if (sig)
2267 {
2268 info.si_signo = sig;
2269 info.si_errno = 0;
2270 info.si_code = TARGET_TRAP_BRKPT;
2271 queue_signal(env, info.si_signo, &info);
2272 }
2273 }
2274 break;
2275 case EXCP_SC:
2276 if (do_store_exclusive(env)) {
2277 info.si_signo = TARGET_SIGSEGV;
2278 info.si_errno = 0;
2279 info.si_code = TARGET_SEGV_MAPERR;
2280 info._sifields._sigfault._addr = env->active_tc.PC;
2281 queue_signal(env, info.si_signo, &info);
2282 }
2283 break;
2284 default:
2285 // error:
2286 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2287 trapnr);
2288 cpu_dump_state(env, stderr, fprintf, 0);
2289 abort();
2290 }
2291 process_pending_signals(env);
2292 }
2293 }
2294 #endif
2295
2296 #ifdef TARGET_OPENRISC
2297
2298 void cpu_loop(CPUOpenRISCState *env)
2299 {
2300 int trapnr, gdbsig;
2301
2302 for (;;) {
2303 trapnr = cpu_exec(env);
2304 gdbsig = 0;
2305
2306 switch (trapnr) {
2307 case EXCP_RESET:
2308 qemu_log("\nReset request, exit, pc is %#x\n", env->pc);
2309 exit(1);
2310 break;
2311 case EXCP_BUSERR:
2312 qemu_log("\nBus error, exit, pc is %#x\n", env->pc);
2313 gdbsig = SIGBUS;
2314 break;
2315 case EXCP_DPF:
2316 case EXCP_IPF:
2317 cpu_dump_state(env, stderr, fprintf, 0);
2318 gdbsig = TARGET_SIGSEGV;
2319 break;
2320 case EXCP_TICK:
2321 qemu_log("\nTick time interrupt pc is %#x\n", env->pc);
2322 break;
2323 case EXCP_ALIGN:
2324 qemu_log("\nAlignment pc is %#x\n", env->pc);
2325 gdbsig = SIGBUS;
2326 break;
2327 case EXCP_ILLEGAL:
2328 qemu_log("\nIllegal instructionpc is %#x\n", env->pc);
2329 gdbsig = SIGILL;
2330 break;
2331 case EXCP_INT:
2332 qemu_log("\nExternal interruptpc is %#x\n", env->pc);
2333 break;
2334 case EXCP_DTLBMISS:
2335 case EXCP_ITLBMISS:
2336 qemu_log("\nTLB miss\n");
2337 break;
2338 case EXCP_RANGE:
2339 qemu_log("\nRange\n");
2340 gdbsig = SIGSEGV;
2341 break;
2342 case EXCP_SYSCALL:
2343 env->pc += 4; /* 0xc00; */
2344 env->gpr[11] = do_syscall(env,
2345 env->gpr[11], /* return value */
2346 env->gpr[3], /* r3 - r7 are params */
2347 env->gpr[4],
2348 env->gpr[5],
2349 env->gpr[6],
2350 env->gpr[7],
2351 env->gpr[8], 0, 0);
2352 break;
2353 case EXCP_FPE:
2354 qemu_log("\nFloating point error\n");
2355 break;
2356 case EXCP_TRAP:
2357 qemu_log("\nTrap\n");
2358 gdbsig = SIGTRAP;
2359 break;
2360 case EXCP_NR:
2361 qemu_log("\nNR\n");
2362 break;
2363 default:
2364 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n",
2365 trapnr);
2366 cpu_dump_state(env, stderr, fprintf, 0);
2367 gdbsig = TARGET_SIGILL;
2368 break;
2369 }
2370 if (gdbsig) {
2371 gdb_handlesig(env, gdbsig);
2372 if (gdbsig != TARGET_SIGTRAP) {
2373 exit(1);
2374 }
2375 }
2376
2377 process_pending_signals(env);
2378 }
2379 }
2380
2381 #endif /* TARGET_OPENRISC */
2382
2383 #ifdef TARGET_SH4
2384 void cpu_loop(CPUSH4State *env)
2385 {
2386 int trapnr, ret;
2387 target_siginfo_t info;
2388
2389 while (1) {
2390 trapnr = cpu_sh4_exec (env);
2391
2392 switch (trapnr) {
2393 case 0x160:
2394 env->pc += 2;
2395 ret = do_syscall(env,
2396 env->gregs[3],
2397 env->gregs[4],
2398 env->gregs[5],
2399 env->gregs[6],
2400 env->gregs[7],
2401 env->gregs[0],
2402 env->gregs[1],
2403 0, 0);
2404 env->gregs[0] = ret;
2405 break;
2406 case EXCP_INTERRUPT:
2407 /* just indicate that signals should be handled asap */
2408 break;
2409 case EXCP_DEBUG:
2410 {
2411 int sig;
2412
2413 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2414 if (sig)
2415 {
2416 info.si_signo = sig;
2417 info.si_errno = 0;
2418 info.si_code = TARGET_TRAP_BRKPT;
2419 queue_signal(env, info.si_signo, &info);
2420 }
2421 }
2422 break;
2423 case 0xa0:
2424 case 0xc0:
2425 info.si_signo = SIGSEGV;
2426 info.si_errno = 0;
2427 info.si_code = TARGET_SEGV_MAPERR;
2428 info._sifields._sigfault._addr = env->tea;
2429 queue_signal(env, info.si_signo, &info);
2430 break;
2431
2432 default:
2433 printf ("Unhandled trap: 0x%x\n", trapnr);
2434 cpu_dump_state(env, stderr, fprintf, 0);
2435 exit (1);
2436 }
2437 process_pending_signals (env);
2438 }
2439 }
2440 #endif
2441
2442 #ifdef TARGET_CRIS
2443 void cpu_loop(CPUCRISState *env)
2444 {
2445 int trapnr, ret;
2446 target_siginfo_t info;
2447
2448 while (1) {
2449 trapnr = cpu_cris_exec (env);
2450 switch (trapnr) {
2451 case 0xaa:
2452 {
2453 info.si_signo = SIGSEGV;
2454 info.si_errno = 0;
2455 /* XXX: check env->error_code */
2456 info.si_code = TARGET_SEGV_MAPERR;
2457 info._sifields._sigfault._addr = env->pregs[PR_EDA];
2458 queue_signal(env, info.si_signo, &info);
2459 }
2460 break;
2461 case EXCP_INTERRUPT:
2462 /* just indicate that signals should be handled asap */
2463 break;
2464 case EXCP_BREAK:
2465 ret = do_syscall(env,
2466 env->regs[9],
2467 env->regs[10],
2468 env->regs[11],
2469 env->regs[12],
2470 env->regs[13],
2471 env->pregs[7],
2472 env->pregs[11],
2473 0, 0);
2474 env->regs[10] = ret;
2475 break;
2476 case EXCP_DEBUG:
2477 {
2478 int sig;
2479
2480 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2481 if (sig)
2482 {
2483 info.si_signo = sig;
2484 info.si_errno = 0;
2485 info.si_code = TARGET_TRAP_BRKPT;
2486 queue_signal(env, info.si_signo, &info);
2487 }
2488 }
2489 break;
2490 default:
2491 printf ("Unhandled trap: 0x%x\n", trapnr);
2492 cpu_dump_state(env, stderr, fprintf, 0);
2493 exit (1);
2494 }
2495 process_pending_signals (env);
2496 }
2497 }
2498 #endif
2499
2500 #ifdef TARGET_MICROBLAZE
2501 void cpu_loop(CPUMBState *env)
2502 {
2503 int trapnr, ret;
2504 target_siginfo_t info;
2505
2506 while (1) {
2507 trapnr = cpu_mb_exec (env);
2508 switch (trapnr) {
2509 case 0xaa:
2510 {
2511 info.si_signo = SIGSEGV;
2512 info.si_errno = 0;
2513 /* XXX: check env->error_code */
2514 info.si_code = TARGET_SEGV_MAPERR;
2515 info._sifields._sigfault._addr = 0;
2516 queue_signal(env, info.si_signo, &info);
2517 }
2518 break;
2519 case EXCP_INTERRUPT:
2520 /* just indicate that signals should be handled asap */
2521 break;
2522 case EXCP_BREAK:
2523 /* Return address is 4 bytes after the call. */
2524 env->regs[14] += 4;
2525 ret = do_syscall(env,
2526 env->regs[12],
2527 env->regs[5],
2528 env->regs[6],
2529 env->regs[7],
2530 env->regs[8],
2531 env->regs[9],
2532 env->regs[10],
2533 0, 0);
2534 env->regs[3] = ret;
2535 env->sregs[SR_PC] = env->regs[14];
2536 break;
2537 case EXCP_HW_EXCP:
2538 env->regs[17] = env->sregs[SR_PC] + 4;
2539 if (env->iflags & D_FLAG) {
2540 env->sregs[SR_ESR] |= 1 << 12;
2541 env->sregs[SR_PC] -= 4;
2542 /* FIXME: if branch was immed, replay the imm as well. */
2543 }
2544
2545 env->iflags &= ~(IMM_FLAG | D_FLAG);
2546
2547 switch (env->sregs[SR_ESR] & 31) {
2548 case ESR_EC_DIVZERO:
2549 info.si_signo = SIGFPE;
2550 info.si_errno = 0;
2551 info.si_code = TARGET_FPE_FLTDIV;
2552 info._sifields._sigfault._addr = 0;
2553 queue_signal(env, info.si_signo, &info);
2554 break;
2555 case ESR_EC_FPU:
2556 info.si_signo = SIGFPE;
2557 info.si_errno = 0;
2558 if (env->sregs[SR_FSR] & FSR_IO) {
2559 info.si_code = TARGET_FPE_FLTINV;
2560 }
2561 if (env->sregs[SR_FSR] & FSR_DZ) {
2562 info.si_code = TARGET_FPE_FLTDIV;
2563 }
2564 info._sifields._sigfault._addr = 0;
2565 queue_signal(env, info.si_signo, &info);
2566 break;
2567 default:
2568 printf ("Unhandled hw-exception: 0x%x\n",
2569 env->sregs[SR_ESR] & ESR_EC_MASK);
2570 cpu_dump_state(env, stderr, fprintf, 0);
2571 exit (1);
2572 break;
2573 }
2574 break;
2575 case EXCP_DEBUG:
2576 {
2577 int sig;
2578
2579 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2580 if (sig)
2581 {
2582 info.si_signo = sig;
2583 info.si_errno = 0;
2584 info.si_code = TARGET_TRAP_BRKPT;
2585 queue_signal(env, info.si_signo, &info);
2586 }
2587 }
2588 break;
2589 default:
2590 printf ("Unhandled trap: 0x%x\n", trapnr);
2591 cpu_dump_state(env, stderr, fprintf, 0);
2592 exit (1);
2593 }
2594 process_pending_signals (env);
2595 }
2596 }
2597 #endif
2598
2599 #ifdef TARGET_M68K
2600
2601 void cpu_loop(CPUM68KState *env)
2602 {
2603 int trapnr;
2604 unsigned int n;
2605 target_siginfo_t info;
2606 TaskState *ts = env->opaque;
2607
2608 for(;;) {
2609 trapnr = cpu_m68k_exec(env);
2610 switch(trapnr) {
2611 case EXCP_ILLEGAL:
2612 {
2613 if (ts->sim_syscalls) {
2614 uint16_t nr;
2615 nr = lduw(env->pc + 2);
2616 env->pc += 4;
2617 do_m68k_simcall(env, nr);
2618 } else {
2619 goto do_sigill;
2620 }
2621 }
2622 break;
2623 case EXCP_HALT_INSN:
2624 /* Semihosing syscall. */
2625 env->pc += 4;
2626 do_m68k_semihosting(env, env->dregs[0]);
2627 break;
2628 case EXCP_LINEA:
2629 case EXCP_LINEF:
2630 case EXCP_UNSUPPORTED:
2631 do_sigill:
2632 info.si_signo = SIGILL;
2633 info.si_errno = 0;
2634 info.si_code = TARGET_ILL_ILLOPN;
2635 info._sifields._sigfault._addr = env->pc;
2636 queue_signal(env, info.si_signo, &info);
2637 break;
2638 case EXCP_TRAP0:
2639 {
2640 ts->sim_syscalls = 0;
2641 n = env->dregs[0];
2642 env->pc += 2;
2643 env->dregs[0] = do_syscall(env,
2644 n,
2645 env->dregs[1],
2646 env->dregs[2],
2647 env->dregs[3],
2648 env->dregs[4],
2649 env->dregs[5],
2650 env->aregs[0],
2651 0, 0);
2652 }
2653 break;
2654 case EXCP_INTERRUPT:
2655 /* just indicate that signals should be handled asap */
2656 break;
2657 case EXCP_ACCESS:
2658 {
2659 info.si_signo = SIGSEGV;
2660 info.si_errno = 0;
2661 /* XXX: check env->error_code */
2662 info.si_code = TARGET_SEGV_MAPERR;
2663 info._sifields._sigfault._addr = env->mmu.ar;
2664 queue_signal(env, info.si_signo, &info);
2665 }
2666 break;
2667 case EXCP_DEBUG:
2668 {
2669 int sig;
2670
2671 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2672 if (sig)
2673 {
2674 info.si_signo = sig;
2675 info.si_errno = 0;
2676 info.si_code = TARGET_TRAP_BRKPT;
2677 queue_signal(env, info.si_signo, &info);
2678 }
2679 }
2680 break;
2681 default:
2682 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2683 trapnr);
2684 cpu_dump_state(env, stderr, fprintf, 0);
2685 abort();
2686 }
2687 process_pending_signals(env);
2688 }
2689 }
2690 #endif /* TARGET_M68K */
2691
2692 #ifdef TARGET_ALPHA
2693 static void do_store_exclusive(CPUAlphaState *env, int reg, int quad)
2694 {
2695 target_ulong addr, val, tmp;
2696 target_siginfo_t info;
2697 int ret = 0;
2698
2699 addr = env->lock_addr;
2700 tmp = env->lock_st_addr;
2701 env->lock_addr = -1;
2702 env->lock_st_addr = 0;
2703
2704 start_exclusive();
2705 mmap_lock();
2706
2707 if (addr == tmp) {
2708 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
2709 goto do_sigsegv;
2710 }
2711
2712 if (val == env->lock_value) {
2713 tmp = env->ir[reg];
2714 if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) {
2715 goto do_sigsegv;
2716 }
2717 ret = 1;
2718 }
2719 }
2720 env->ir[reg] = ret;
2721 env->pc += 4;
2722
2723 mmap_unlock();
2724 end_exclusive();
2725 return;
2726
2727 do_sigsegv:
2728 mmap_unlock();
2729 end_exclusive();
2730
2731 info.si_signo = TARGET_SIGSEGV;
2732 info.si_errno = 0;
2733 info.si_code = TARGET_SEGV_MAPERR;
2734 info._sifields._sigfault._addr = addr;
2735 queue_signal(env, TARGET_SIGSEGV, &info);
2736 }
2737
2738 void cpu_loop(CPUAlphaState *env)
2739 {
2740 int trapnr;
2741 target_siginfo_t info;
2742 abi_long sysret;
2743
2744 while (1) {
2745 trapnr = cpu_alpha_exec (env);
2746
2747 /* All of the traps imply a transition through PALcode, which
2748 implies an REI instruction has been executed. Which means
2749 that the intr_flag should be cleared. */
2750 env->intr_flag = 0;
2751
2752 switch (trapnr) {
2753 case EXCP_RESET:
2754 fprintf(stderr, "Reset requested. Exit\n");
2755 exit(1);
2756 break;
2757 case EXCP_MCHK:
2758 fprintf(stderr, "Machine check exception. Exit\n");
2759 exit(1);
2760 break;
2761 case EXCP_SMP_INTERRUPT:
2762 case EXCP_CLK_INTERRUPT:
2763 case EXCP_DEV_INTERRUPT:
2764 fprintf(stderr, "External interrupt. Exit\n");
2765 exit(1);
2766 break;
2767 case EXCP_MMFAULT:
2768 env->lock_addr = -1;
2769 info.si_signo = TARGET_SIGSEGV;
2770 info.si_errno = 0;
2771 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
2772 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
2773 info._sifields._sigfault._addr = env->trap_arg0;
2774 queue_signal(env, info.si_signo, &info);
2775 break;
2776 case EXCP_UNALIGN:
2777 env->lock_addr = -1;
2778 info.si_signo = TARGET_SIGBUS;
2779 info.si_errno = 0;
2780 info.si_code = TARGET_BUS_ADRALN;
2781 info._sifields._sigfault._addr = env->trap_arg0;
2782 queue_signal(env, info.si_signo, &info);
2783 break;
2784 case EXCP_OPCDEC:
2785 do_sigill:
2786 env->lock_addr = -1;
2787 info.si_signo = TARGET_SIGILL;
2788 info.si_errno = 0;
2789 info.si_code = TARGET_ILL_ILLOPC;
2790 info._sifields._sigfault._addr = env->pc;
2791 queue_signal(env, info.si_signo, &info);
2792 break;
2793 case EXCP_ARITH:
2794 env->lock_addr = -1;
2795 info.si_signo = TARGET_SIGFPE;
2796 info.si_errno = 0;
2797 info.si_code = TARGET_FPE_FLTINV;
2798 info._sifields._sigfault._addr = env->pc;
2799 queue_signal(env, info.si_signo, &info);
2800 break;
2801 case EXCP_FEN:
2802 /* No-op. Linux simply re-enables the FPU. */
2803 break;
2804 case EXCP_CALL_PAL:
2805 env->lock_addr = -1;
2806 switch (env->error_code) {
2807 case 0x80:
2808 /* BPT */
2809 info.si_signo = TARGET_SIGTRAP;
2810 info.si_errno = 0;
2811 info.si_code = TARGET_TRAP_BRKPT;
2812 info._sifields._sigfault._addr = env->pc;
2813 queue_signal(env, info.si_signo, &info);
2814 break;
2815 case 0x81:
2816 /* BUGCHK */
2817 info.si_signo = TARGET_SIGTRAP;
2818 info.si_errno = 0;
2819 info.si_code = 0;
2820 info._sifields._sigfault._addr = env->pc;
2821 queue_signal(env, info.si_signo, &info);
2822 break;
2823 case 0x83:
2824 /* CALLSYS */
2825 trapnr = env->ir[IR_V0];
2826 sysret = do_syscall(env, trapnr,
2827 env->ir[IR_A0], env->ir[IR_A1],
2828 env->ir[IR_A2], env->ir[IR_A3],
2829 env->ir[IR_A4], env->ir[IR_A5],
2830 0, 0);
2831 if (trapnr == TARGET_NR_sigreturn
2832 || trapnr == TARGET_NR_rt_sigreturn) {
2833 break;
2834 }
2835 /* Syscall writes 0 to V0 to bypass error check, similar
2836 to how this is handled internal to Linux kernel.
2837 (Ab)use trapnr temporarily as boolean indicating error. */
2838 trapnr = (env->ir[IR_V0] != 0 && sysret < 0);
2839 env->ir[IR_V0] = (trapnr ? -sysret : sysret);
2840 env->ir[IR_A3] = trapnr;
2841 break;
2842 case 0x86:
2843 /* IMB */
2844 /* ??? We can probably elide the code using page_unprotect
2845 that is checking for self-modifying code. Instead we
2846 could simply call tb_flush here. Until we work out the
2847 changes required to turn off the extra write protection,
2848 this can be a no-op. */
2849 break;
2850 case 0x9E:
2851 /* RDUNIQUE */
2852 /* Handled in the translator for usermode. */
2853 abort();
2854 case 0x9F:
2855 /* WRUNIQUE */
2856 /* Handled in the translator for usermode. */
2857 abort();
2858 case 0xAA:
2859 /* GENTRAP */
2860 info.si_signo = TARGET_SIGFPE;
2861 switch (env->ir[IR_A0]) {
2862 case TARGET_GEN_INTOVF:
2863 info.si_code = TARGET_FPE_INTOVF;
2864 break;
2865 case TARGET_GEN_INTDIV:
2866 info.si_code = TARGET_FPE_INTDIV;
2867 break;
2868 case TARGET_GEN_FLTOVF:
2869 info.si_code = TARGET_FPE_FLTOVF;
2870 break;
2871 case TARGET_GEN_FLTUND:
2872 info.si_code = TARGET_FPE_FLTUND;
2873 break;
2874 case TARGET_GEN_FLTINV:
2875 info.si_code = TARGET_FPE_FLTINV;
2876 break;
2877 case TARGET_GEN_FLTINE:
2878 info.si_code = TARGET_FPE_FLTRES;
2879 break;
2880 case TARGET_GEN_ROPRAND:
2881 info.si_code = 0;
2882 break;
2883 default:
2884 info.si_signo = TARGET_SIGTRAP;
2885 info.si_code = 0;
2886 break;
2887 }
2888 info.si_errno = 0;
2889 info._sifields._sigfault._addr = env->pc;
2890 queue_signal(env, info.si_signo, &info);
2891 break;
2892 default:
2893 goto do_sigill;
2894 }
2895 break;
2896 case EXCP_DEBUG:
2897 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
2898 if (info.si_signo) {
2899 env->lock_addr = -1;
2900 info.si_errno = 0;
2901 info.si_code = TARGET_TRAP_BRKPT;
2902 queue_signal(env, info.si_signo, &info);
2903 }
2904 break;
2905 case EXCP_STL_C:
2906 case EXCP_STQ_C:
2907 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C);
2908 break;
2909 case EXCP_INTERRUPT:
2910 /* Just indicate that signals should be handled asap. */
2911 break;
2912 default:
2913 printf ("Unhandled trap: 0x%x\n", trapnr);
2914 cpu_dump_state(env, stderr, fprintf, 0);
2915 exit (1);
2916 }
2917 process_pending_signals (env);
2918 }
2919 }
2920 #endif /* TARGET_ALPHA */
2921
2922 #ifdef TARGET_S390X
2923 void cpu_loop(CPUS390XState *env)
2924 {
2925 int trapnr;
2926 target_siginfo_t info;
2927
2928 while (1) {
2929 trapnr = cpu_s390x_exec (env);
2930
2931 switch (trapnr) {
2932 case EXCP_INTERRUPT:
2933 /* just indicate that signals should be handled asap */
2934 break;
2935 case EXCP_DEBUG:
2936 {
2937 int sig;
2938
2939 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2940 if (sig) {
2941 info.si_signo = sig;
2942 info.si_errno = 0;
2943 info.si_code = TARGET_TRAP_BRKPT;
2944 queue_signal(env, info.si_signo, &info);
2945 }
2946 }
2947 break;
2948 case EXCP_SVC:
2949 {
2950 int n = env->int_svc_code;
2951 if (!n) {
2952 /* syscalls > 255 */
2953 n = env->regs[1];
2954 }
2955 env->psw.addr += env->int_svc_ilc;
2956 env->regs[2] = do_syscall(env, n,
2957 env->regs[2],
2958 env->regs[3],
2959 env->regs[4],
2960 env->regs[5],
2961 env->regs[6],
2962 env->regs[7],
2963 0, 0);
2964 }
2965 break;
2966 case EXCP_ADDR:
2967 {
2968 info.si_signo = SIGSEGV;
2969 info.si_errno = 0;
2970 /* XXX: check env->error_code */
2971 info.si_code = TARGET_SEGV_MAPERR;
2972 info._sifields._sigfault._addr = env->__excp_addr;
2973 queue_signal(env, info.si_signo, &info);
2974 }
2975 break;
2976 case EXCP_SPEC:
2977 {
2978 fprintf(stderr,"specification exception insn 0x%08x%04x\n", ldl(env->psw.addr), lduw(env->psw.addr + 4));
2979 info.si_signo = SIGILL;
2980 info.si_errno = 0;
2981 info.si_code = TARGET_ILL_ILLOPC;
2982 info._sifields._sigfault._addr = env->__excp_addr;
2983 queue_signal(env, info.si_signo, &info);
2984 }
2985 break;
2986 default:
2987 printf ("Unhandled trap: 0x%x\n", trapnr);
2988 cpu_dump_state(env, stderr, fprintf, 0);
2989 exit (1);
2990 }
2991 process_pending_signals (env);
2992 }
2993 }
2994
2995 #endif /* TARGET_S390X */
2996
2997 THREAD CPUArchState *thread_env;
2998
2999 void task_settid(TaskState *ts)
3000 {
3001 if (ts->ts_tid == 0) {
3002 #ifdef CONFIG_USE_NPTL
3003 ts->ts_tid = (pid_t)syscall(SYS_gettid);
3004 #else
3005 /* when no threads are used, tid becomes pid */
3006 ts->ts_tid = getpid();
3007 #endif
3008 }
3009 }
3010
3011 void stop_all_tasks(void)
3012 {
3013 /*
3014 * We trust that when using NPTL, start_exclusive()
3015 * handles thread stopping correctly.
3016 */
3017 start_exclusive();
3018 }
3019
3020 /* Assumes contents are already zeroed. */
3021 void init_task_state(TaskState *ts)
3022 {
3023 int i;
3024
3025 ts->used = 1;
3026 ts->first_free = ts->sigqueue_table;
3027 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
3028 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
3029 }
3030 ts->sigqueue_table[i].next = NULL;
3031 }
3032
3033 static void handle_arg_help(const char *arg)
3034 {
3035 usage();
3036 }
3037
3038 static void handle_arg_log(const char *arg)
3039 {
3040 int mask;
3041 const CPULogItem *item;
3042
3043 mask = cpu_str_to_log_mask(arg);
3044 if (!mask) {
3045 printf("Log items (comma separated):\n");
3046 for (item = cpu_log_items; item->mask != 0; item++) {
3047 printf("%-10s %s\n", item->name, item->help);
3048 }
3049 exit(1);
3050 }
3051 cpu_set_log(mask);
3052 }
3053
3054 static void handle_arg_log_filename(const char *arg)
3055 {
3056 cpu_set_log_filename(arg);
3057 }
3058
3059 static void handle_arg_set_env(const char *arg)
3060 {
3061 char *r, *p, *token;
3062 r = p = strdup(arg);
3063 while ((token = strsep(&p, ",")) != NULL) {
3064 if (envlist_setenv(envlist, token) != 0) {
3065 usage();
3066 }
3067 }
3068 free(r);
3069 }
3070
3071 static void handle_arg_unset_env(const char *arg)
3072 {
3073 char *r, *p, *token;
3074 r = p = strdup(arg);
3075 while ((token = strsep(&p, ",")) != NULL) {
3076 if (envlist_unsetenv(envlist, token) != 0) {
3077 usage();
3078 }
3079 }
3080 free(r);
3081 }
3082
3083 static void handle_arg_argv0(const char *arg)
3084 {
3085 argv0 = strdup(arg);
3086 }
3087
3088 static void handle_arg_stack_size(const char *arg)
3089 {
3090 char *p;
3091 guest_stack_size = strtoul(arg, &p, 0);
3092 if (guest_stack_size == 0) {
3093 usage();
3094 }
3095
3096 if (*p == 'M') {
3097 guest_stack_size *= 1024 * 1024;
3098 } else if (*p == 'k' || *p == 'K') {
3099 guest_stack_size *= 1024;
3100 }
3101 }
3102
3103 static void handle_arg_ld_prefix(const char *arg)
3104 {
3105 interp_prefix = strdup(arg);
3106 }
3107
3108 static void handle_arg_pagesize(const char *arg)
3109 {
3110 qemu_host_page_size = atoi(arg);
3111 if (qemu_host_page_size == 0 ||
3112 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
3113 fprintf(stderr, "page size must be a power of two\n");
3114 exit(1);
3115 }
3116 }
3117
3118 static void handle_arg_gdb(const char *arg)
3119 {
3120 gdbstub_port = atoi(arg);
3121 }
3122
3123 static void handle_arg_uname(const char *arg)
3124 {
3125 qemu_uname_release = strdup(arg);
3126 }
3127
3128 static void handle_arg_cpu(const char *arg)
3129 {
3130 cpu_model = strdup(arg);
3131 if (cpu_model == NULL || is_help_option(cpu_model)) {
3132 /* XXX: implement xxx_cpu_list for targets that still miss it */
3133 #if defined(cpu_list)
3134 cpu_list(stdout, &fprintf);
3135 #endif
3136 exit(1);
3137 }
3138 }
3139
3140 #if defined(CONFIG_USE_GUEST_BASE)
3141 static void handle_arg_guest_base(const char *arg)
3142 {
3143 guest_base = strtol(arg, NULL, 0);
3144 have_guest_base = 1;
3145 }
3146
3147 static void handle_arg_reserved_va(const char *arg)
3148 {
3149 char *p;
3150 int shift = 0;
3151 reserved_va = strtoul(arg, &p, 0);
3152 switch (*p) {
3153 case 'k':
3154 case 'K':
3155 shift = 10;
3156 break;
3157 case 'M':
3158 shift = 20;
3159 break;
3160 case 'G':
3161 shift = 30;
3162 break;
3163 }
3164 if (shift) {
3165 unsigned long unshifted = reserved_va;
3166 p++;
3167 reserved_va <<= shift;
3168 if (((reserved_va >> shift) != unshifted)
3169 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3170 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3171 #endif
3172 ) {
3173 fprintf(stderr, "Reserved virtual address too big\n");
3174 exit(1);
3175 }
3176 }
3177 if (*p) {
3178 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
3179 exit(1);
3180 }
3181 }
3182 #endif
3183
3184 static void handle_arg_singlestep(const char *arg)
3185 {
3186 singlestep = 1;
3187 }
3188
3189 static void handle_arg_strace(const char *arg)
3190 {
3191 do_strace = 1;
3192 }
3193
3194 static void handle_arg_version(const char *arg)
3195 {
3196 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION
3197 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
3198 exit(0);
3199 }
3200
3201 struct qemu_argument {
3202 const char *argv;
3203 const char *env;
3204 bool has_arg;
3205 void (*handle_opt)(const char *arg);
3206 const char *example;
3207 const char *help;
3208 };
3209
3210 static const struct qemu_argument arg_table[] = {
3211 {"h", "", false, handle_arg_help,
3212 "", "print this help"},
3213 {"g", "QEMU_GDB", true, handle_arg_gdb,
3214 "port", "wait gdb connection to 'port'"},
3215 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix,
3216 "path", "set the elf interpreter prefix to 'path'"},
3217 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size,
3218 "size", "set the stack size to 'size' bytes"},
3219 {"cpu", "QEMU_CPU", true, handle_arg_cpu,
3220 "model", "select CPU (-cpu help for list)"},
3221 {"E", "QEMU_SET_ENV", true, handle_arg_set_env,
3222 "var=value", "sets targets environment variable (see below)"},
3223 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env,
3224 "var", "unsets targets environment variable (see below)"},
3225 {"0", "QEMU_ARGV0", true, handle_arg_argv0,
3226 "argv0", "forces target process argv[0] to be 'argv0'"},
3227 {"r", "QEMU_UNAME", true, handle_arg_uname,
3228 "uname", "set qemu uname release string to 'uname'"},
3229 #if defined(CONFIG_USE_GUEST_BASE)
3230 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
3231 "address", "set guest_base address to 'address'"},
3232 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
3233 "size", "reserve 'size' bytes for guest virtual address space"},
3234 #endif
3235 {"d", "QEMU_LOG", true, handle_arg_log,
3236 "options", "activate log"},
3237 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename,
3238 "logfile", "override default logfile location"},
3239 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize,
3240 "pagesize", "set the host page size to 'pagesize'"},
3241 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep,
3242 "", "run in singlestep mode"},
3243 {"strace", "QEMU_STRACE", false, handle_arg_strace,
3244 "", "log system calls"},
3245 {"version", "QEMU_VERSION", false, handle_arg_version,
3246 "", "display version information and exit"},
3247 {NULL, NULL, false, NULL, NULL, NULL}
3248 };
3249
3250 static void usage(void)
3251 {
3252 const struct qemu_argument *arginfo;
3253 int maxarglen;
3254 int maxenvlen;
3255
3256 printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
3257 "Linux CPU emulator (compiled for " TARGET_ARCH " emulation)\n"
3258 "\n"
3259 "Options and associated environment variables:\n"
3260 "\n");
3261
3262 maxarglen = maxenvlen = 0;
3263
3264 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3265 if (strlen(arginfo->env) > maxenvlen) {
3266 maxenvlen = strlen(arginfo->env);
3267 }
3268 if (strlen(arginfo->argv) > maxarglen) {
3269 maxarglen = strlen(arginfo->argv);
3270 }
3271 }
3272
3273 printf("%-*s%-*sDescription\n", maxarglen+3, "Argument",
3274 maxenvlen+1, "Env-variable");
3275
3276 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3277 if (arginfo->has_arg) {
3278 printf("-%s %-*s %-*s %s\n", arginfo->argv,
3279 (int)(maxarglen-strlen(arginfo->argv)), arginfo->example,
3280 maxenvlen, arginfo->env, arginfo->help);
3281 } else {
3282 printf("-%-*s %-*s %s\n", maxarglen+1, arginfo->argv,
3283 maxenvlen, arginfo->env,
3284 arginfo->help);
3285 }
3286 }
3287
3288 printf("\n"
3289 "Defaults:\n"
3290 "QEMU_LD_PREFIX = %s\n"
3291 "QEMU_STACK_SIZE = %ld byte\n"
3292 "QEMU_LOG = %s\n",
3293 interp_prefix,
3294 guest_stack_size,
3295 DEBUG_LOGFILE);
3296
3297 printf("\n"
3298 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3299 "QEMU_UNSET_ENV environment variables to set and unset\n"
3300 "environment variables for the target process.\n"
3301 "It is possible to provide several variables by separating them\n"
3302 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3303 "provide the -E and -U options multiple times.\n"
3304 "The following lines are equivalent:\n"
3305 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3306 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3307 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3308 "Note that if you provide several changes to a single variable\n"
3309 "the last change will stay in effect.\n");
3310
3311 exit(1);
3312 }
3313
3314 static int parse_args(int argc, char **argv)
3315 {
3316 const char *r;
3317 int optind;
3318 const struct qemu_argument *arginfo;
3319
3320 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3321 if (arginfo->env == NULL) {
3322 continue;
3323 }
3324
3325 r = getenv(arginfo->env);
3326 if (r != NULL) {
3327 arginfo->handle_opt(r);
3328 }
3329 }
3330
3331 optind = 1;
3332 for (;;) {
3333 if (optind >= argc) {
3334 break;
3335 }
3336 r = argv[optind];
3337 if (r[0] != '-') {
3338 break;
3339 }
3340 optind++;
3341 r++;
3342 if (!strcmp(r, "-")) {
3343 break;
3344 }
3345
3346 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3347 if (!strcmp(r, arginfo->argv)) {
3348 if (arginfo->has_arg) {
3349 if (optind >= argc) {
3350 usage();
3351 }
3352 arginfo->handle_opt(argv[optind]);
3353 optind++;
3354 } else {
3355 arginfo->handle_opt(NULL);
3356 }
3357 break;
3358 }
3359 }
3360
3361 /* no option matched the current argv */
3362 if (arginfo->handle_opt == NULL) {
3363 usage();
3364 }
3365 }
3366
3367 if (optind >= argc) {
3368 usage();
3369 }
3370
3371 filename = argv[optind];
3372 exec_path = argv[optind];
3373
3374 return optind;
3375 }
3376
3377 int main(int argc, char **argv, char **envp)
3378 {
3379 const char *log_file = DEBUG_LOGFILE;
3380 struct target_pt_regs regs1, *regs = &regs1;
3381 struct image_info info1, *info = &info1;
3382 struct linux_binprm bprm;
3383 TaskState *ts;
3384 CPUArchState *env;
3385 int optind;
3386 char **target_environ, **wrk;
3387 char **target_argv;
3388 int target_argc;
3389 int i;
3390 int ret;
3391
3392 module_call_init(MODULE_INIT_QOM);
3393
3394 qemu_cache_utils_init(envp);
3395
3396 if ((envlist = envlist_create()) == NULL) {
3397 (void) fprintf(stderr, "Unable to allocate envlist\n");
3398 exit(1);
3399 }
3400
3401 /* add current environment into the list */
3402 for (wrk = environ; *wrk != NULL; wrk++) {
3403 (void) envlist_setenv(envlist, *wrk);
3404 }
3405
3406 /* Read the stack limit from the kernel. If it's "unlimited",
3407 then we can do little else besides use the default. */
3408 {
3409 struct rlimit lim;
3410 if (getrlimit(RLIMIT_STACK, &lim) == 0
3411 && lim.rlim_cur != RLIM_INFINITY
3412 && lim.rlim_cur == (target_long)lim.rlim_cur) {
3413 guest_stack_size = lim.rlim_cur;
3414 }
3415 }
3416
3417 cpu_model = NULL;
3418 #if defined(cpudef_setup)
3419 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3420 #endif
3421
3422 /* init debug */
3423 cpu_set_log_filename(log_file);
3424 optind = parse_args(argc, argv);
3425
3426 /* Zero out regs */
3427 memset(regs, 0, sizeof(struct target_pt_regs));
3428
3429 /* Zero out image_info */
3430 memset(info, 0, sizeof(struct image_info));
3431
3432 memset(&bprm, 0, sizeof (bprm));
3433
3434 /* Scan interp_prefix dir for replacement files. */
3435 init_paths(interp_prefix);
3436
3437 if (cpu_model == NULL) {
3438 #if defined(TARGET_I386)
3439 #ifdef TARGET_X86_64
3440 cpu_model = "qemu64";
3441 #else
3442 cpu_model = "qemu32";
3443 #endif
3444 #elif defined(TARGET_ARM)
3445 cpu_model = "any";
3446 #elif defined(TARGET_UNICORE32)
3447 cpu_model = "any";
3448 #elif defined(TARGET_M68K)
3449 cpu_model = "any";
3450 #elif defined(TARGET_SPARC)
3451 #ifdef TARGET_SPARC64
3452 cpu_model = "TI UltraSparc II";
3453 #else
3454 cpu_model = "Fujitsu MB86904";
3455 #endif
3456 #elif defined(TARGET_MIPS)
3457 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3458 cpu_model = "20Kc";
3459 #else
3460 cpu_model = "24Kf";
3461 #endif
3462 #elif defined TARGET_OPENRISC
3463 cpu_model = "or1200";
3464 #elif defined(TARGET_PPC)
3465 #ifdef TARGET_PPC64
3466 cpu_model = "970fx";
3467 #else
3468 cpu_model = "750";
3469 #endif
3470 #else
3471 cpu_model = "any";
3472 #endif
3473 }
3474 tcg_exec_init(0);
3475 cpu_exec_init_all();
3476 /* NOTE: we need to init the CPU at this stage to get
3477 qemu_host_page_size */
3478 env = cpu_init(cpu_model);
3479 if (!env) {
3480 fprintf(stderr, "Unable to find CPU definition\n");
3481 exit(1);
3482 }
3483 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3484 cpu_reset(ENV_GET_CPU(env));
3485 #endif
3486
3487 thread_env = env;
3488
3489 if (getenv("QEMU_STRACE")) {
3490 do_strace = 1;
3491 }
3492
3493 target_environ = envlist_to_environ(envlist, NULL);
3494 envlist_free(envlist);
3495
3496 #if defined(CONFIG_USE_GUEST_BASE)
3497 /*
3498 * Now that page sizes are configured in cpu_init() we can do
3499 * proper page alignment for guest_base.
3500 */
3501 guest_base = HOST_PAGE_ALIGN(guest_base);
3502
3503 if (reserved_va || have_guest_base) {
3504 guest_base = init_guest_space(guest_base, reserved_va, 0,
3505 have_guest_base);
3506 if (guest_base == (unsigned long)-1) {
3507 fprintf(stderr, "Unable to reserve 0x%lx bytes of virtual address "
3508 "space for use as guest address space (check your virtual "
3509 "memory ulimit setting or reserve less using -R option)\n",
3510 reserved_va);
3511 exit(1);
3512 }
3513
3514 if (reserved_va) {
3515 mmap_next_start = reserved_va;
3516 }
3517 }
3518 #endif /* CONFIG_USE_GUEST_BASE */
3519
3520 /*
3521 * Read in mmap_min_addr kernel parameter. This value is used
3522 * When loading the ELF image to determine whether guest_base
3523 * is needed. It is also used in mmap_find_vma.
3524 */
3525 {
3526 FILE *fp;
3527
3528 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
3529 unsigned long tmp;
3530 if (fscanf(fp, "%lu", &tmp) == 1) {
3531 mmap_min_addr = tmp;
3532 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
3533 }
3534 fclose(fp);
3535 }
3536 }
3537
3538 /*
3539 * Prepare copy of argv vector for target.
3540 */
3541 target_argc = argc - optind;
3542 target_argv = calloc(target_argc + 1, sizeof (char *));
3543 if (target_argv == NULL) {
3544 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
3545 exit(1);
3546 }
3547
3548 /*
3549 * If argv0 is specified (using '-0' switch) we replace
3550 * argv[0] pointer with the given one.
3551 */
3552 i = 0;
3553 if (argv0 != NULL) {
3554 target_argv[i++] = strdup(argv0);
3555 }
3556 for (; i < target_argc; i++) {
3557 target_argv[i] = strdup(argv[optind + i]);
3558 }
3559 target_argv[target_argc] = NULL;
3560
3561 ts = g_malloc0 (sizeof(TaskState));
3562 init_task_state(ts);
3563 /* build Task State */
3564 ts->info = info;
3565 ts->bprm = &bprm;
3566 env->opaque = ts;
3567 task_settid(ts);
3568
3569 ret = loader_exec(filename, target_argv, target_environ, regs,
3570 info, &bprm);
3571 if (ret != 0) {
3572 printf("Error %d while loading %s\n", ret, filename);
3573 _exit(1);
3574 }
3575
3576 for (wrk = target_environ; *wrk; wrk++) {
3577 free(*wrk);
3578 }
3579
3580 free(target_environ);
3581
3582 if (qemu_log_enabled()) {
3583 #if defined(CONFIG_USE_GUEST_BASE)
3584 qemu_log("guest_base 0x%lx\n", guest_base);
3585 #endif
3586 log_page_dump();
3587
3588 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
3589 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
3590 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
3591 info->start_code);
3592 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
3593 info->start_data);
3594 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
3595 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
3596 info->start_stack);
3597 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
3598 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
3599 }
3600
3601 target_set_brk(info->brk);
3602 syscall_init();
3603 signal_init();
3604
3605 #if defined(CONFIG_USE_GUEST_BASE)
3606 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3607 generating the prologue until now so that the prologue can take
3608 the real value of GUEST_BASE into account. */
3609 tcg_prologue_init(&tcg_ctx);
3610 #endif
3611
3612 #if defined(TARGET_I386)
3613 cpu_x86_set_cpl(env, 3);
3614
3615 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
3616 env->hflags |= HF_PE_MASK;
3617 if (env->cpuid_features & CPUID_SSE) {
3618 env->cr[4] |= CR4_OSFXSR_MASK;
3619 env->hflags |= HF_OSFXSR_MASK;
3620 }
3621 #ifndef TARGET_ABI32
3622 /* enable 64 bit mode if possible */
3623 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
3624 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
3625 exit(1);
3626 }
3627 env->cr[4] |= CR4_PAE_MASK;
3628 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
3629 env->hflags |= HF_LMA_MASK;
3630 #endif
3631
3632 /* flags setup : we activate the IRQs by default as in user mode */
3633 env->eflags |= IF_MASK;
3634
3635 /* linux register setup */
3636 #ifndef TARGET_ABI32
3637 env->regs[R_EAX] = regs->rax;
3638 env->regs[R_EBX] = regs->rbx;
3639 env->regs[R_ECX] = regs->rcx;
3640 env->regs[R_EDX] = regs->rdx;
3641 env->regs[R_ESI] = regs->rsi;
3642 env->regs[R_EDI] = regs->rdi;
3643 env->regs[R_EBP] = regs->rbp;
3644 env->regs[R_ESP] = regs->rsp;
3645 env->eip = regs->rip;
3646 #else
3647 env->regs[R_EAX] = regs->eax;
3648 env->regs[R_EBX] = regs->ebx;
3649 env->regs[R_ECX] = regs->ecx;
3650 env->regs[R_EDX] = regs->edx;
3651 env->regs[R_ESI] = regs->esi;
3652 env->regs[R_EDI] = regs->edi;
3653 env->regs[R_EBP] = regs->ebp;
3654 env->regs[R_ESP] = regs->esp;
3655 env->eip = regs->eip;
3656 #endif
3657
3658 /* linux interrupt setup */
3659 #ifndef TARGET_ABI32
3660 env->idt.limit = 511;
3661 #else
3662 env->idt.limit = 255;
3663 #endif
3664 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
3665 PROT_READ|PROT_WRITE,
3666 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3667 idt_table = g2h(env->idt.base);
3668 set_idt(0, 0);
3669 set_idt(1, 0);
3670 set_idt(2, 0);
3671 set_idt(3, 3);
3672 set_idt(4, 3);
3673 set_idt(5, 0);
3674 set_idt(6, 0);
3675 set_idt(7, 0);
3676 set_idt(8, 0);
3677 set_idt(9, 0);
3678 set_idt(10, 0);
3679 set_idt(11, 0);
3680 set_idt(12, 0);
3681 set_idt(13, 0);
3682 set_idt(14, 0);
3683 set_idt(15, 0);
3684 set_idt(16, 0);
3685 set_idt(17, 0);
3686 set_idt(18, 0);
3687 set_idt(19, 0);
3688 set_idt(0x80, 3);
3689
3690 /* linux segment setup */
3691 {
3692 uint64_t *gdt_table;
3693 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
3694 PROT_READ|PROT_WRITE,
3695 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3696 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
3697 gdt_table = g2h(env->gdt.base);
3698 #ifdef TARGET_ABI32
3699 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3700 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3701 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3702 #else
3703 /* 64 bit code segment */
3704 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3705 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3706 DESC_L_MASK |
3707 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3708 #endif
3709 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
3710 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3711 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
3712 }
3713 cpu_x86_load_seg(env, R_CS, __USER_CS);
3714 cpu_x86_load_seg(env, R_SS, __USER_DS);
3715 #ifdef TARGET_ABI32
3716 cpu_x86_load_seg(env, R_DS, __USER_DS);
3717 cpu_x86_load_seg(env, R_ES, __USER_DS);
3718 cpu_x86_load_seg(env, R_FS, __USER_DS);
3719 cpu_x86_load_seg(env, R_GS, __USER_DS);
3720 /* This hack makes Wine work... */
3721 env->segs[R_FS].selector = 0;
3722 #else
3723 cpu_x86_load_seg(env, R_DS, 0);
3724 cpu_x86_load_seg(env, R_ES, 0);
3725 cpu_x86_load_seg(env, R_FS, 0);
3726 cpu_x86_load_seg(env, R_GS, 0);
3727 #endif
3728 #elif defined(TARGET_ARM)
3729 {
3730 int i;
3731 cpsr_write(env, regs->uregs[16], 0xffffffff);
3732 for(i = 0; i < 16; i++) {
3733 env->regs[i] = regs->uregs[i];
3734 }
3735 /* Enable BE8. */
3736 if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
3737 && (info->elf_flags & EF_ARM_BE8)) {
3738 env->bswap_code = 1;
3739 }
3740 }
3741 #elif defined(TARGET_UNICORE32)
3742 {
3743 int i;
3744 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
3745 for (i = 0; i < 32; i++) {
3746 env->regs[i] = regs->uregs[i];
3747 }
3748 }
3749 #elif defined(TARGET_SPARC)
3750 {
3751 int i;
3752 env->pc = regs->pc;
3753 env->npc = regs->npc;
3754 env->y = regs->y;
3755 for(i = 0; i < 8; i++)
3756 env->gregs[i] = regs->u_regs[i];
3757 for(i = 0; i < 8; i++)
3758 env->regwptr[i] = regs->u_regs[i + 8];
3759 }
3760 #elif defined(TARGET_PPC)
3761 {
3762 int i;
3763
3764 #if defined(TARGET_PPC64)
3765 #if defined(TARGET_ABI32)
3766 env->msr &= ~((target_ulong)1 << MSR_SF);
3767 #else
3768 env->msr |= (target_ulong)1 << MSR_SF;
3769 #endif
3770 #endif
3771 env->nip = regs->nip;
3772 for(i = 0; i < 32; i++) {
3773 env->gpr[i] = regs->gpr[i];
3774 }
3775 }
3776 #elif defined(TARGET_M68K)
3777 {
3778 env->pc = regs->pc;
3779 env->dregs[0] = regs->d0;
3780 env->dregs[1] = regs->d1;
3781 env->dregs[2] = regs->d2;
3782 env->dregs[3] = regs->d3;
3783 env->dregs[4] = regs->d4;
3784 env->dregs[5] = regs->d5;
3785 env->dregs[6] = regs->d6;
3786 env->dregs[7] = regs->d7;
3787 env->aregs[0] = regs->a0;
3788 env->aregs[1] = regs->a1;
3789 env->aregs[2] = regs->a2;
3790 env->aregs[3] = regs->a3;
3791 env->aregs[4] = regs->a4;
3792 env->aregs[5] = regs->a5;
3793 env->aregs[6] = regs->a6;
3794 env->aregs[7] = regs->usp;
3795 env->sr = regs->sr;
3796 ts->sim_syscalls = 1;
3797 }
3798 #elif defined(TARGET_MICROBLAZE)
3799 {
3800 env->regs[0] = regs->r0;
3801 env->regs[1] = regs->r1;
3802 env->regs[2] = regs->r2;
3803 env->regs[3] = regs->r3;
3804 env->regs[4] = regs->r4;
3805 env->regs[5] = regs->r5;
3806 env->regs[6] = regs->r6;
3807 env->regs[7] = regs->r7;
3808 env->regs[8] = regs->r8;
3809 env->regs[9] = regs->r9;
3810 env->regs[10] = regs->r10;
3811 env->regs[11] = regs->r11;
3812 env->regs[12] = regs->r12;
3813 env->regs[13] = regs->r13;
3814 env->regs[14] = regs->r14;
3815 env->regs[15] = regs->r15;
3816 env->regs[16] = regs->r16;
3817 env->regs[17] = regs->r17;
3818 env->regs[18] = regs->r18;
3819 env->regs[19] = regs->r19;
3820 env->regs[20] = regs->r20;
3821 env->regs[21] = regs->r21;
3822 env->regs[22] = regs->r22;
3823 env->regs[23] = regs->r23;
3824 env->regs[24] = regs->r24;
3825 env->regs[25] = regs->r25;
3826 env->regs[26] = regs->r26;
3827 env->regs[27] = regs->r27;
3828 env->regs[28] = regs->r28;
3829 env->regs[29] = regs->r29;
3830 env->regs[30] = regs->r30;
3831 env->regs[31] = regs->r31;
3832 env->sregs[SR_PC] = regs->pc;
3833 }
3834 #elif defined(TARGET_MIPS)
3835 {
3836 int i;
3837
3838 for(i = 0; i < 32; i++) {
3839 env->active_tc.gpr[i] = regs->regs[i];
3840 }
3841 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
3842 if (regs->cp0_epc & 1) {
3843 env->hflags |= MIPS_HFLAG_M16;
3844 }
3845 }
3846 #elif defined(TARGET_OPENRISC)
3847 {
3848 int i;
3849
3850 for (i = 0; i < 32; i++) {
3851 env->gpr[i] = regs->gpr[i];
3852 }
3853
3854 env->sr = regs->sr;
3855 env->pc = regs->pc;
3856 }
3857 #elif defined(TARGET_SH4)
3858 {
3859 int i;
3860
3861 for(i = 0; i < 16; i++) {
3862 env->gregs[i] = regs->regs[i];
3863 }
3864 env->pc = regs->pc;
3865 }
3866 #elif defined(TARGET_ALPHA)
3867 {
3868 int i;
3869
3870 for(i = 0; i < 28; i++) {
3871 env->ir[i] = ((abi_ulong *)regs)[i];
3872 }
3873 env->ir[IR_SP] = regs->usp;
3874 env->pc = regs->pc;
3875 }
3876 #elif defined(TARGET_CRIS)
3877 {
3878 env->regs[0] = regs->r0;
3879 env->regs[1] = regs->r1;
3880 env->regs[2] = regs->r2;
3881 env->regs[3] = regs->r3;
3882 env->regs[4] = regs->r4;
3883 env->regs[5] = regs->r5;
3884 env->regs[6] = regs->r6;
3885 env->regs[7] = regs->r7;
3886 env->regs[8] = regs->r8;
3887 env->regs[9] = regs->r9;
3888 env->regs[10] = regs->r10;
3889 env->regs[11] = regs->r11;
3890 env->regs[12] = regs->r12;
3891 env->regs[13] = regs->r13;
3892 env->regs[14] = info->start_stack;
3893 env->regs[15] = regs->acr;
3894 env->pc = regs->erp;
3895 }
3896 #elif defined(TARGET_S390X)
3897 {
3898 int i;
3899 for (i = 0; i < 16; i++) {
3900 env->regs[i] = regs->gprs[i];
3901 }
3902 env->psw.mask = regs->psw.mask;
3903 env->psw.addr = regs->psw.addr;
3904 }
3905 #else
3906 #error unsupported target CPU
3907 #endif
3908
3909 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
3910 ts->stack_base = info->start_stack;
3911 ts->heap_base = info->brk;
3912 /* This will be filled in on the first SYS_HEAPINFO call. */
3913 ts->heap_limit = 0;
3914 #endif
3915
3916 if (gdbstub_port) {
3917 if (gdbserver_start(gdbstub_port) < 0) {
3918 fprintf(stderr, "qemu: could not open gdbserver on port %d\n",
3919 gdbstub_port);
3920 exit(1);
3921 }
3922 gdb_handlesig(env, 0);
3923 }
3924 cpu_loop(env);
3925 /* never exits */
3926 return 0;
3927 }
QEMU modified to work with kvm