hw/i82374.c

   1 /*
   2  * QEMU Intel 82374 emulation (Enhanced DMA controller)
   3  *
   4  * Copyright (c) 2010 Hervé Poussineau
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "isa.h"
  26
  27 //#define DEBUG_I82374
  28
  29 #ifdef DEBUG_I82374
  30 #define DPRINTF(fmt, ...) \
  31 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
  32 #else
  33 #define DPRINTF(fmt, ...) \
  34 do {} while (0)
  35 #endif
  36 #define BADF(fmt, ...) \
  37 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
  38
  39 typedef struct I82374State {
  40     uint8_t commands[8];
  41 } I82374State;
  42
  43 static const VMStateDescription vmstate_i82374 = {
  44     .name = "i82374",
  45     .version_id = 0,
  46     .minimum_version_id = 0,
  47     .fields = (VMStateField[]) {
  48         VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
  49         VMSTATE_END_OF_LIST()
  50     },
  51 };
  52
  53 static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
  54 {
  55     uint32_t val = 0;
  56
  57     BADF("%s: %08x\n", __func__, nport);
  58
  59     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  60     return val;
  61 }
  62
  63 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
  64 {
  65     DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
  66
  67     if (data != 0x42) {
  68         /* Not Stop S/G command */
  69         BADF("%s: %08x=%08x\n", __func__, nport, data);
  70     }
  71 }
  72
  73 static uint32_t i82374_read_status(void *opaque, uint32_t nport)
  74 {
  75     uint32_t val = 0;
  76
  77     BADF("%s: %08x\n", __func__, nport);
  78
  79     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  80     return val;
  81 }
  82
  83 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
  84 {
  85     DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
  86
  87     BADF("%s: %08x=%08x\n", __func__, nport, data);
  88 }
  89
  90 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
  91 {
  92     uint32_t val = 0;
  93
  94     BADF("%s: %08x\n", __func__, nport);
  95
  96     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  97     return val;
  98 }
  99
 100 static void i82374_init(I82374State *s)
 101 {
 102     DMA_init(1, NULL);
 103     memset(s->commands, 0, sizeof(s->commands));
 104 }
 105
 106 typedef struct ISAi82374State {
 107     ISADevice dev;
 108     uint32_t iobase;
 109     I82374State state;
 110 } ISAi82374State;
 111
 112 static const VMStateDescription vmstate_isa_i82374 = {
 113     .name = "isa-i82374",
 114     .version_id = 0,
 115     .minimum_version_id = 0,
 116     .fields = (VMStateField[]) {
 117         VMSTATE_STRUCT(state, ISAi82374State, 0, vmstate_i82374, I82374State),
 118         VMSTATE_END_OF_LIST()
 119     },
 120 };
 121
 122 static int i82374_isa_init(ISADevice *dev)
 123 {
 124     ISAi82374State *isa = DO_UPCAST(ISAi82374State, dev, dev);
 125     I82374State *s = &isa->state;
 126
 127     register_ioport_read(isa->iobase + 0x0A, 1, 1, i82374_read_isr, s);
 128     register_ioport_write(isa->iobase + 0x10, 8, 1, i82374_write_command, s);
 129     register_ioport_read(isa->iobase + 0x18, 8, 1, i82374_read_status, s);
 130     register_ioport_write(isa->iobase + 0x20, 0x20, 1, i82374_write_descriptor, s);
 131     register_ioport_read(isa->iobase + 0x20, 0x20, 1, i82374_read_descriptor, s);
 132
 133     i82374_init(s);
 134
 135     return 0;
 136 }
 137
 138 static void i82374_class_init(ObjectClass *klass, void *data)
 139 {
 140     ISADeviceClass *k = ISA_DEVICE_CLASS(klass);
 141
 142     k->init       = i82374_isa_init;
 143 }
 144
 145 static DeviceInfo i82374_isa_info = {
 146     .name  = "i82374",
 147     .size  = sizeof(ISAi82374State),
 148     .vmsd  = &vmstate_isa_i82374,
 149     .class_init = i82374_class_init,
 150     .props = (Property[]) {
 151         DEFINE_PROP_HEX32("iobase", ISAi82374State, iobase, 0x400),
 152         DEFINE_PROP_END_OF_LIST()
 153     },
 154 };
 155
 156 static void i82374_register_devices(void)
 157 {
 158     isa_qdev_register(&i82374_isa_info);
 159 }
 160
 161 device_init(i82374_register_devices)