hw/device-assignment.h

   1 /*
   2  * Copyright (c) 2007, Neocleus Corporation.
   3  * Copyright (c) 2007, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  16  * Place - Suite 330, Boston, MA 02111-1307 USA.
  17  *
  18  *  Data structures for storing PCI state
  19  *
  20  *  Adapted to kvm by Qumranet
  21  *
  22  *  Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
  23  *  Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
  24  *  Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
  25  *  Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
  26  */
  27
  28 #ifndef __DEVICE_ASSIGNMENT_H__
  29 #define __DEVICE_ASSIGNMENT_H__
  30
  31 #include <sys/mman.h>
  32 #include "qemu-common.h"
  33 #include "qemu-queue.h"
  34 #include "pci.h"
  35
  36 /* From include/linux/pci.h in the kernel sources */
  37 #define PCI_DEVFN(slot, func)   ((((slot) & 0x1f) << 3) | ((func) & 0x07))
  38
  39 typedef struct PCIHostDevice {
  40     int seg;
  41     int bus;
  42     int dev;
  43     int func;
  44 } PCIHostDevice;
  45
  46 typedef struct {
  47     int type;           /* Memory or port I/O */
  48     int valid;
  49     uint32_t base_addr;
  50     uint32_t size;    /* size of the region */
  51     int resource_fd;
  52 } PCIRegion;
  53
  54 typedef struct {
  55     uint8_t bus, dev, func; /* Bus inside domain, device and function */
  56     int irq;                /* IRQ number */
  57     uint16_t region_number; /* number of active regions */
  58
  59     /* Port I/O or MMIO Regions */
  60     PCIRegion regions[PCI_NUM_REGIONS - 1];
  61     int config_fd;
  62 } PCIDevRegions;
  63
  64 typedef struct {
  65     MemoryRegion container;
  66     MemoryRegion real_iomem;
  67     union {
  68         void *r_virtbase;    /* mmapped access address for memory regions */
  69         uint32_t r_baseport; /* the base guest port for I/O regions */
  70     } u;
  71     int num;            /* our index within v_addrs[] */
  72     pcibus_t e_size;    /* emulated size of region in bytes */
  73     pcibus_t r_size;    /* real size of region in bytes */
  74     PCIRegion *region;
  75 } AssignedDevRegion;
  76
  77 #define ASSIGNED_DEVICE_USE_IOMMU_BIT   0
  78 #define ASSIGNED_DEVICE_PREFER_MSI_BIT  1
  79
  80 #define ASSIGNED_DEVICE_USE_IOMMU_MASK  (1 << ASSIGNED_DEVICE_USE_IOMMU_BIT)
  81 #define ASSIGNED_DEVICE_PREFER_MSI_MASK (1 << ASSIGNED_DEVICE_PREFER_MSI_BIT)
  82
  83 typedef struct {
  84     uint32_t addr_lo;
  85     uint32_t addr_hi;
  86     uint32_t data;
  87     uint32_t ctrl;
  88 } MSIXTableEntry;
  89
  90 typedef struct AssignedDevice {
  91     PCIDevice dev;
  92     PCIHostDevice host;
  93     uint32_t features;
  94     int intpin;
  95     uint8_t debug_flags;
  96     AssignedDevRegion v_addrs[PCI_NUM_REGIONS - 1];
  97     PCIDevRegions real_device;
  98     int run;
  99     int girq;
 100     uint16_t h_segnr;
 101     uint8_t h_busnr;
 102     uint8_t h_devfn;
 103     int irq_requested_type;
 104     int bound;
 105     struct {
 106 #define ASSIGNED_DEVICE_CAP_MSI (1 << 0)
 107 #define ASSIGNED_DEVICE_CAP_MSIX (1 << 1)
 108         uint32_t available;
 109 #define ASSIGNED_DEVICE_MSI_ENABLED (1 << 0)
 110 #define ASSIGNED_DEVICE_MSIX_ENABLED (1 << 1)
 111 #define ASSIGNED_DEVICE_MSIX_MASKED (1 << 2)
 112         uint32_t state;
 113     } cap;
 114     uint8_t emulate_config_read[PCI_CONFIG_SPACE_SIZE];
 115     uint8_t emulate_config_write[PCI_CONFIG_SPACE_SIZE];
 116     int irq_entries_nr;
 117     struct kvm_irq_routing_entry *entry;
 118     MSIXTableEntry *msix_table;
 119     target_phys_addr_t msix_table_addr;
 120     uint16_t msix_max;
 121     MemoryRegion mmio;
 122     char *configfd_name;
 123     int32_t bootindex;
 124     QLIST_ENTRY(AssignedDevice) next;
 125 } AssignedDevice;
 126
 127 void assigned_dev_update_irqs(void);
 128
 129 #endif              /* __DEVICE_ASSIGNMENT_H__ */