2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
23 #include <isl/schedule.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
29 #include "ppcg_options.h"
31 /* The fields stride, shift and shift_map only contain valid information
33 * If so, they express that current index is such that if you add shift,
34 * then the result is always a multiple of stride.
35 * shift_map contains the mapping
37 * i -> (i + shift)/stride
39 * Let D represent the initial shared_len dimensions of the computed schedule.
40 * The spaces of "lb" and "shift" are of the form
44 * "shift_map" is of the form
46 * [D -> i] -> [D -> (i + shift(D))/stride]
48 struct gpu_array_bound
{
54 isl_basic_map
*shift_map
;
57 /* A tile of an array.
59 * n is the dimension of the array.
60 * bound is an array of size "n" representing the lower bound
61 * and size for each index.
63 struct gpu_array_tile
{
65 struct gpu_array_bound
*bound
;
68 struct gpu_array_info
;
70 /* A group of array references in a kernel that should be handled together.
71 * If private_tile is not NULL, then it is mapped to registers.
72 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
73 * Otherwise, it is accessed from global memory.
75 struct gpu_array_ref_group
{
76 /* The references in this group access this array. */
77 struct gpu_array_info
*array
;
78 /* Position of this group in the list of reference groups of array. */
81 /* The following fields are use during the construction of the groups.
82 * access is the combined access relation relative to the shared
83 * memory tiling. In particular, the domain of the map corresponds
84 * to the first shared_len dimensions of the computed schedule.
85 * write is set if any access in the group is a write.
90 /* The shared memory tile, NULL if none. */
91 struct gpu_array_tile
*shared_tile
;
93 /* The private memory tile, NULL if none. */
94 struct gpu_array_tile
*private_tile
;
96 /* References in this group; point to elements of a linked list. */
98 struct gpu_stmt_access
**refs
;
100 /* Last shared memory tile dimension that affects tile of this group. */
106 struct ppcg_options
*options
;
108 struct gpu_prog
*prog
;
110 /* tile, grid and block sizes for each kernel */
111 isl_union_map
*sizes
;
113 /* Identifier of current kernel. */
115 /* Pointer to the current kernel. */
116 struct ppcg_kernel
*kernel
;
118 /* First tile dimension. */
120 /* Number of tile dimensions. */
122 /* Number of initial parallel loops among tile dimensions. */
125 /* Number of dimensions determining shared memory. */
128 /* Number of rows in the untiled schedule. */
130 /* Number of rows in the tiled schedule. */
132 /* Number of rows in schedule after tiling/wrapping over threads. */
133 int thread_tiled_len
;
135 /* Global untiled schedule. */
136 isl_union_map
*sched
;
137 /* Local (per kernel launch) tiled schedule. */
138 isl_union_map
*tiled_sched
;
139 /* Local schedule per shared memory tile loop iteration. */
140 isl_union_map
*local_sched
;
142 /* Local tiled schedule projected onto the shared tile loops and
143 * the loops that will be wrapped over the threads,
144 * with all shared tile loops parametrized.
146 isl_union_map
*shared_sched
;
147 /* Projects out the loops that will be wrapped over the threads
150 isl_union_map
*shared_proj
;
152 /* A map that takes the range of shared_sched as input,
153 * wraps the appropriate loops over the threads and then projects
156 isl_map
*privatization
;
158 /* A map from the shared memory tile loops and the thread indices
159 * (as parameters) to the set of accessed memory elements that
160 * will be accessed through private copies.
162 isl_union_map
*private_access
;
164 /* The schedule for the current private/shared access
165 * (within print_private_access or print_shared_access).
168 /* The array reference group corresponding to copy_sched. */
169 struct gpu_array_ref_group
*copy_group
;
171 /* First loop to unroll (or -1 if none) in the current part of the
178 /* Note: in the input file, the sizes of the grid and the blocks
179 * are specified in the order x, y, z, but internally, the sizes
180 * are stored in reverse order, so that the last element always
181 * refers to the x dimension.
188 /* Print the name of the local copy of a given group of array references.
190 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
191 struct gpu_array_ref_group
*group
)
195 if (group
->private_tile
)
196 p
= isl_printer_print_str(p
, "private_");
197 else if (group
->shared_tile
)
198 p
= isl_printer_print_str(p
, "shared_");
201 p
= isl_printer_print_str(p
, group
->array
->name
);
202 if (!global
&& group
->array
->n_group
> 1) {
203 p
= isl_printer_print_str(p
, "_");
204 p
= isl_printer_print_int(p
, group
->nr
);
210 /* Collect all references to the given array and store pointers to them
213 static void collect_references(struct gpu_prog
*prog
,
214 struct gpu_array_info
*array
)
220 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
221 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
222 struct gpu_stmt_access
*access
;
224 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
226 name
= isl_map_get_tuple_name(access
->access
,
228 if (name
&& !strcmp(array
->name
, name
))
234 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
238 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
239 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
240 struct gpu_stmt_access
*access
;
242 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
244 name
= isl_map_get_tuple_name(access
->access
,
246 if (!name
|| strcmp(array
->name
, name
))
249 array
->refs
[n
++] = access
;
254 /* Create a gpu_array_tile for an array of dimension "n_index".
256 static struct gpu_array_tile
*create_tile(isl_ctx
*ctx
, int n_index
)
259 struct gpu_array_tile
*tile
;
261 tile
= isl_calloc_type(ctx
, struct gpu_array_tile
);
266 tile
->bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
269 for (i
= 0; i
< n_index
; ++i
) {
270 tile
->bound
[i
].size
= NULL
;
271 tile
->bound
[i
].lb
= NULL
;
272 tile
->bound
[i
].stride
= NULL
;
273 tile
->bound
[i
].shift
= NULL
;
274 tile
->bound
[i
].shift_map
= NULL
;
280 static void *free_tile(struct gpu_array_tile
*tile
)
287 for (j
= 0; j
< tile
->n
; ++j
) {
288 isl_val_free(tile
->bound
[j
].size
);
289 isl_val_free(tile
->bound
[j
].stride
);
290 isl_aff_free(tile
->bound
[j
].lb
);
291 isl_aff_free(tile
->bound
[j
].shift
);
292 isl_basic_map_free(tile
->bound
[j
].shift_map
);
300 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
301 __isl_keep isl_set
*accessed
)
306 id
= isl_set_get_tuple_id(accessed
);
308 for (i
= 0; i
< scop
->n_array
; ++i
) {
311 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
318 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
321 /* Compute and return the extent of "array", taking into account the set of
324 * In particular, the extent in the outer dimension is taken
325 * from "accessed", while then extent in the remaing dimensions
326 * are taken from array->extent.
328 * The extent in the outer dimension cannot be taken from array->extent
329 * because that may be unbounded. Furthermore, even if it is bounded,
330 * it may be larger than the piece of the array that is being accessed.
332 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
333 __isl_keep isl_set
*accessed
)
340 extent
= isl_set_copy(array
->extent
);
342 n_index
= isl_set_dim(accessed
, isl_dim_set
);
346 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
347 outer
= isl_set_copy(accessed
);
348 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
349 extent
= isl_set_flat_product(outer
, extent
);
350 id
= isl_set_get_tuple_id(accessed
);
351 extent
= isl_set_set_tuple_id(extent
, id
);
356 /* Compute bounds on the host arrays based on the accessed elements
357 * and collect all references to the array.
359 * If the array is zero-dimensional, i.e., a scalar, we check
360 * whether it is read-only.
362 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
365 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
369 struct pet_array
*pa
;
372 n_index
= isl_set_dim(array
, isl_dim_set
);
373 name
= isl_set_get_tuple_name(array
);
374 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
375 isl_pw_aff
*, n_index
);
377 prog
->array
[prog
->n_array
].dim
= isl_set_get_space(array
);
378 prog
->array
[prog
->n_array
].name
= strdup(name
);
379 prog
->array
[prog
->n_array
].n_index
= n_index
;
380 prog
->array
[prog
->n_array
].bound
= bounds
;
382 pa
= find_array(prog
->scop
, array
);
385 prog
->array
[prog
->n_array
].type
= strdup(pa
->element_type
);
386 prog
->array
[prog
->n_array
].size
= pa
->element_size
;
387 prog
->array
[prog
->n_array
].local
= pa
->declared
&& !pa
->exposed
;
391 isl_union_map
*write
;
394 write
= isl_union_map_copy(prog
->write
);
395 space
= isl_set_universe(isl_set_get_space(array
));
396 write
= isl_union_map_intersect_range(write
,
397 isl_union_set_from_set(space
));
398 empty
= isl_union_map_is_empty(write
);
399 isl_union_map_free(write
);
401 prog
->array
[prog
->n_array
].read_only
= empty
;
404 extent
= compute_extent(pa
, array
);
405 for (i
= 0; i
< n_index
; ++i
) {
411 bound
= isl_set_dim_max(isl_set_copy(extent
), i
);
413 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
414 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
415 one
= isl_aff_zero_on_domain(ls
);
416 one
= isl_aff_add_constant_si(one
, 1);
417 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
418 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
422 prog
->array
[prog
->n_array
].extent
= extent
;
424 collect_references(prog
, &prog
->array
[prog
->n_array
]);
432 void collect_array_info(struct gpu_prog
*prog
)
434 isl_union_set
*arrays
;
436 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
437 arrays
= isl_union_set_union(arrays
,
438 isl_union_map_range(isl_union_map_copy(prog
->write
)));
439 arrays
= isl_union_set_coalesce(arrays
);
441 prog
->n_array
= isl_union_set_n_set(arrays
);
442 prog
->array
= isl_alloc_array(prog
->ctx
,
443 struct gpu_array_info
, prog
->n_array
);
446 isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
447 isl_union_set_free(arrays
);
450 static void free_array_info(struct gpu_prog
*prog
)
454 for (i
= 0; i
< prog
->n_array
; ++i
) {
455 int n_index
= prog
->array
[i
].n_index
;
456 free(prog
->array
[i
].type
);
457 free(prog
->array
[i
].name
);
458 for (j
= 0; j
< n_index
; ++j
)
459 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
460 isl_space_free(prog
->array
[i
].dim
);
461 isl_set_free(prog
->array
[i
].extent
);
462 free(prog
->array
[i
].bound
);
463 free(prog
->array
[i
].refs
);
468 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
469 * as an array or through a pointer reference, but as single data element. At
470 * the moment, scalars are represented as zero dimensional arrays.
472 int gpu_array_is_scalar(struct gpu_array_info
*array
)
474 return (array
->n_index
== 0);
477 /* Is "array" a read-only scalar?
479 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
481 return gpu_array_is_scalar(array
) && array
->read_only
;
484 /* Internal data structure for extract_size_of_type.
485 * "type" specifies the name of the space that we want to extract.
486 * "res" is used to store the subset of that space.
488 struct ppcg_extract_size_data
{
493 /* This function is called for each set in a union_set.
494 * If the name of the set matches data->type, we store the
497 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
499 struct ppcg_extract_size_data
*data
= user
;
502 name
= isl_set_get_tuple_name(size
);
503 if (name
&& !strcmp(name
, data
->type
)) {
512 /* Given a union map { kernel[i] -> *[...] },
513 * return the range in the space called "type" for the kernel with
514 * sequence number "id".
516 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
517 const char *type
, int id
)
521 isl_union_set
*local_sizes
;
522 struct ppcg_extract_size_data data
= { type
, NULL
};
527 space
= isl_union_map_get_space(sizes
);
528 space
= isl_space_set_from_params(space
);
529 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
530 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
531 dom
= isl_set_universe(space
);
532 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
534 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
535 isl_union_map_copy(sizes
));
536 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
537 isl_union_set_free(local_sizes
);
541 /* Given a singleton set, extract the first (at most *len) elements
542 * of the single integer tuple into *sizes and update *len if needed.
544 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
552 dim
= isl_set_dim(set
, isl_dim_set
);
556 for (i
= 0; i
< *len
; ++i
) {
559 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
562 sizes
[i
] = isl_val_get_num_si(v
);
569 /* Extract user specified "tile" sizes from the "sizes" command line option,
570 * defaulting to option->tile_size in each dimension.
572 static void read_tile_sizes(struct gpu_gen
*gen
)
577 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
578 assert(gen
->tile_size
);
579 for (n
= 0; n
< gen
->tile_len
; ++n
)
580 gen
->tile_size
[n
] = gen
->options
->tile_size
;
582 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
583 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
585 if (gen
->n_parallel
> gen
->tile_len
)
586 gen
->n_parallel
= gen
->tile_len
;
589 /* Extract user specified "block" sizes from the "sizes" command line option,
590 * after filling in some potentially useful defaults.
592 static void read_block_sizes(struct gpu_gen
*gen
)
598 gen
->n_block
= (n
<= 3) ? n
: 3;
599 switch (gen
->n_block
) {
601 gen
->block_dim
[0] = 512;
604 gen
->block_dim
[0] = 32;
605 gen
->block_dim
[1] = 16;
608 gen
->block_dim
[0] = 32;
609 gen
->block_dim
[1] = 4;
610 gen
->block_dim
[2] = 4;
614 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
615 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
618 /* Extract user specified "grid" sizes from the "sizes" command line option,
619 * after filling in some potentially useful defaults.
621 static void read_grid_sizes(struct gpu_gen
*gen
)
623 int n
= gen
->n_parallel
;
626 gen
->n_grid
= (n
<= 2) ? n
: 2;
627 switch (gen
->n_grid
) {
629 gen
->grid_dim
[0] = 32768;
632 gen
->grid_dim
[0] = 256;
633 gen
->grid_dim
[1] = 256;
637 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
638 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
641 /* Extract user specified sizes from the "sizes" command line option
642 * after filling in some potentially useful defaults.
644 static void read_sizes(struct gpu_gen
*gen
)
646 read_tile_sizes(gen
);
647 read_block_sizes(gen
);
648 read_grid_sizes(gen
);
651 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
658 for (i
= 0; i
< n
; ++i
) {
659 struct gpu_stmt_access
*access
, *next
;
661 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
663 isl_map_free(access
->access
);
667 isl_id_free(stmts
[i
].id
);
674 void clear_gpu_gen(struct gpu_gen
*gen
)
676 isl_union_map_free(gen
->sizes
);
677 isl_union_map_free(gen
->sched
);
680 /* Construct a map from a domain of dimensionality "len"
681 * to a domain of dimensionality "len" + "tile_len" that tiles
682 * the "tile_len" coordinates starting at "first".
683 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
684 * "dim" prescribes the parameters.
686 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
687 int first
, int tile_len
, int *tile_size
)
694 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
695 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
696 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
697 ls
= isl_local_space_from_space(dim
);
699 for (i
= 0; i
< len
- tile_len
; ++i
) {
700 int j
= i
< first
? i
: i
+ tile_len
;
701 int k
= i
< first
? i
: i
+ 2 * tile_len
;
703 c
= isl_equality_alloc(isl_local_space_copy(ls
));
704 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
705 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
706 bmap
= isl_basic_map_add_constraint(bmap
, c
);
709 for (i
= 0; i
< tile_len
; ++i
) {
710 c
= isl_equality_alloc(isl_local_space_copy(ls
));
711 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
713 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
714 first
+ i
, tile_size
[i
]);
715 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
716 first
+ i
+ tile_len
, 1);
717 bmap
= isl_basic_map_add_constraint(bmap
, c
);
719 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
720 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
721 first
+ i
+ tile_len
, 1);
722 bmap
= isl_basic_map_add_constraint(bmap
, c
);
724 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
725 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
726 first
+ i
+ tile_len
, -1);
727 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
728 bmap
= isl_basic_map_add_constraint(bmap
, c
);
731 isl_local_space_free(ls
);
733 return isl_map_from_basic_map(bmap
);
736 /* Construct a map from a domain of dimensionality "len"
737 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
738 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
739 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
740 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
741 * that are projected out at the end.
742 * "dim" prescribes the parameters.
744 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
745 int first
, int wrap_len
, int *wrap_size
)
752 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
753 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
754 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
755 ls
= isl_local_space_from_space(dim
);
757 for (i
= 0; i
< len
; ++i
) {
758 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
760 c
= isl_equality_alloc(isl_local_space_copy(ls
));
761 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
762 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
763 bmap
= isl_basic_map_add_constraint(bmap
, c
);
766 for (i
= 0; i
< wrap_len
; ++i
) {
767 c
= isl_equality_alloc(isl_local_space_copy(ls
));
768 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
770 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
771 first
+ wrap_len
+ i
, 1);
772 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
773 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
774 bmap
= isl_basic_map_add_constraint(bmap
, c
);
776 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
777 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
778 first
+ wrap_len
+ i
, 1);
779 bmap
= isl_basic_map_add_constraint(bmap
, c
);
781 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
782 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
783 first
+ wrap_len
+ i
, -1);
784 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
785 bmap
= isl_basic_map_add_constraint(bmap
, c
);
788 isl_local_space_free(ls
);
790 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
791 first
+ 2 * wrap_len
, wrap_len
);
793 return isl_map_from_basic_map(bmap
);
796 /* Add "n" parameters named prefix%d.
798 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
799 int n
, const char *prefix
)
805 nparam
= isl_set_dim(set
, isl_dim_param
);
806 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
808 for (i
= 0; i
< n
; ++i
) {
809 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
810 set
= isl_set_set_dim_name(set
, isl_dim_param
,
817 /* Equate the "n" dimensions of "set" starting at "first" to
818 * freshly created parameters named prefix%d.
820 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
821 int first
, int n
, const char *prefix
)
826 nparam
= isl_set_dim(set
, isl_dim_param
);
828 set
= add_params(set
, n
, prefix
);
830 for (i
= 0; i
< n
; ++i
)
831 set
= isl_set_equate(set
, isl_dim_param
, nparam
+ i
,
832 isl_dim_set
, first
+ i
);
837 /* Given a parameter space "space", create a set of dimension "len"
838 * of which the "n" dimensions starting at "first" are equated to
839 * freshly created parameters named prefix%d.
841 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
842 int len
, int first
, int n
, const char *prefix
)
846 space
= isl_space_set_from_params(space
);
847 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
848 set
= isl_set_universe(space
);
850 return parametrize(set
, first
, n
, prefix
);
853 /* Tile the B loops over the tile sizes and then tile/wrap
854 * the T1 loops over the blocks.
856 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
857 __isl_take isl_union_map
*sched
)
860 isl_map
*tiling
, *block_tiling
;
862 dim
= isl_union_map_get_space(sched
);
863 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
864 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
866 if (gen
->options
->wrap
)
867 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
868 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
870 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
871 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
873 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
875 tiling
= isl_map_apply_range(tiling
, block_tiling
);
877 sched
= isl_union_map_apply_range(sched
,
878 isl_union_map_from_map(tiling
));
880 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
885 /* Equate the "T1P" iterators in the tiled schedule "sched"
886 * to the block dimensions.
888 static __isl_give isl_union_map
*parametrize_tiled_schedule(
889 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
894 dim
= isl_union_map_get_space(sched
);
895 par
= parametrization(dim
, gen
->tiled_len
,
896 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
897 sched
= isl_union_map_intersect_range(sched
,
898 isl_union_set_from_set(par
));
903 /* Tile/wrap the P1 loops over the threads.
905 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
906 __isl_take isl_union_map
*sched
)
912 dim
= isl_union_map_get_space(sched
);
914 if (gen
->options
->wrap
)
915 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
916 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
918 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
919 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
920 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
922 sched
= isl_union_map_apply_range(sched
,
923 isl_union_map_from_map(tiling
));
925 par
= parametrization(dim
, gen
->thread_tiled_len
,
926 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
928 sched
= isl_union_map_intersect_range(sched
,
929 isl_union_set_from_set(par
));
931 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
936 /* If the user asked for it, scale the shared memory tile loops
937 * (T1T and T2) of "sched" by gen->tile_size[i].
938 * If we are not performing "wrapping", then additionally scale the T1P
939 * loops by gen->grid_dim[i].
941 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
942 __isl_take isl_union_map
*sched
)
946 isl_basic_map
*scale
;
950 if (!gen
->options
->scale_tile_loops
)
953 dim
= isl_union_map_get_space(sched
);
954 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
955 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
956 scale
= isl_basic_map_universe(isl_space_copy(dim
));
957 ls
= isl_local_space_from_space(dim
);
959 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
962 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
963 f
= gen
->tile_size
[i
- gen
->tile_first
];
964 if (!gen
->options
->wrap
)
965 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
966 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
967 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
968 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
971 c
= isl_equality_alloc(isl_local_space_copy(ls
));
972 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
973 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
974 scale
= isl_basic_map_add_constraint(scale
, c
);
977 isl_local_space_free(ls
);
979 sched
= isl_union_map_apply_range(sched
,
980 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
985 /* If we are not performing "wrapping" and if the user asked for it,
986 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
988 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
989 __isl_take isl_union_map
*sched
)
993 isl_basic_map
*scale
;
997 if (gen
->options
->wrap
)
999 if (!gen
->options
->scale_tile_loops
)
1002 dim
= isl_union_map_get_space(sched
);
1003 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
1004 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
1005 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1006 ls
= isl_local_space_from_space(dim
);
1008 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1011 if (i
>= gen
->shared_len
&&
1012 i
< gen
->shared_len
+ gen
->n_block
)
1013 f
= gen
->block_dim
[i
- gen
->shared_len
];
1015 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1016 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1017 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1018 scale
= isl_basic_map_add_constraint(scale
, c
);
1021 isl_local_space_free(ls
);
1023 sched
= isl_union_map_apply_range(sched
,
1024 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1029 /* If we are not performing "wrapping" and if the user asked for it,
1030 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1032 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1033 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1037 isl_basic_map
*scale
;
1039 isl_local_space
*ls
;
1041 if (gen
->options
->wrap
)
1043 if (!gen
->options
->scale_tile_loops
)
1046 dim
= isl_union_map_get_space(sched
);
1047 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1048 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1049 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1050 ls
= isl_local_space_from_space(dim
);
1052 for (i
= 0; i
< len
; ++i
) {
1055 if (i
>= first
&& i
< first
+ n_tile
)
1056 f
= gen
->kernel
->block_dim
[i
- first
];
1058 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1059 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1060 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1061 scale
= isl_basic_map_add_constraint(scale
, c
);
1064 isl_local_space_free(ls
);
1066 sched
= isl_union_map_apply_range(sched
,
1067 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1072 /* Add "len" parameters p[i] called prefix%d,
1073 * with bounds to 0 <= p[i] < size[i].
1075 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1076 int len
, int *size
, const char *prefix
)
1081 isl_basic_set
*bset
;
1083 isl_local_space
*ls
;
1086 nparam
= isl_set_dim(set
, isl_dim_param
);
1087 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1089 for (i
= 0; i
< len
; ++i
) {
1090 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1091 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1095 dim
= isl_set_get_space(set
);
1096 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1097 ls
= isl_local_space_from_space(dim
);
1099 for (i
= 0; i
< len
; ++i
) {
1100 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1101 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1103 bset
= isl_basic_set_add_constraint(bset
, c
);
1105 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1106 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1108 c
= isl_constraint_set_constant_si(c
, size
[i
] - 1);
1109 bset
= isl_basic_set_add_constraint(bset
, c
);
1112 isl_local_space_free(ls
);
1114 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1117 /* Add "len" parameters p[i] called prefix%d,
1118 * with bounds to 0 <= p[i] < size[i].
1120 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1121 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1127 isl_local_space
*ls
;
1130 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1131 nparam
= isl_set_dim(set
, isl_dim_param
);
1132 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1134 for (i
= 0; i
< len
; ++i
) {
1135 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1136 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1140 space
= isl_space_params(isl_set_get_space(set
));
1141 ls
= isl_local_space_from_space(space
);
1142 for (i
= 0; i
< len
; ++i
) {
1143 isl_pw_aff
*param
, *size_i
, *zero
;
1146 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1147 isl_dim_param
, nparam
+ i
);
1149 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1150 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1151 set
= isl_set_intersect_params(set
, bound
);
1153 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1154 bound
= isl_pw_aff_ge_set(param
, zero
);
1155 set
= isl_set_intersect_params(set
, bound
);
1157 isl_local_space_free(ls
);
1162 /* Given a mapping "sched" of the form
1164 * [D -> A] -> [D -> T(A)]
1166 * apply the mapping encoded in tile->bound[i].shift_map
1167 * to the range of "sched".
1168 * The mappings in tile->bound[i].shift_map are of the form
1170 * [D -> a] -> [D -> s(D,a)]
1172 * We first compose them with a mapping
1176 * (If tile->bound[i].shift_map is not set, then it is assumed to be
1177 * an identity mapping and then we use this second mapping instead.)
1180 * [D -> a] -> s(D,a)
1182 * We precompose them with a projection on the i th dimension to obtain
1184 * [D -> T] -> s(D,T)
1186 * and collect these into
1188 * [D -> T] -> S(D,T)
1190 * Introducing D in the range yields
1192 * [D -> T] -> [D -> S(D,T)]
1194 * and application to "sched" yields
1196 * [D -> A] -> [D -> S(D,T(A))]
1198 static __isl_give isl_map
*pre_shift(__isl_take isl_map
*sched
,
1199 struct gpu_array_tile
*tile
)
1202 isl_ctx
*ctx
= isl_map_get_ctx(sched
);
1203 isl_space
*space
, *space2
;
1205 isl_map
*map
, *id
, *pre_shift
;
1207 space
= isl_space_range(isl_map_get_space(sched
));
1208 space2
= isl_space_from_domain(isl_space_copy(space
));
1209 pre_shift
= isl_map_universe(space2
);
1210 space
= isl_space_domain(isl_space_unwrap(space
));
1211 id
= isl_map_identity(isl_space_map_from_set(isl_space_copy(space
)));
1212 space
= isl_space_from_domain(space
);
1213 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
1214 def
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1216 for (i
= 0; i
< tile
->n
; ++i
) {
1217 isl_basic_map
*bmap
, *drop
;
1220 space
= isl_space_alloc(ctx
, 0, tile
->n
, tile
->n
);
1221 proj
= isl_map_identity(space
);
1222 proj
= isl_map_project_out(proj
, isl_dim_out
,
1223 i
+ 1, tile
->n
- (i
+ 1));
1224 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, i
);
1225 proj
= isl_map_product(isl_map_copy(id
), proj
);
1227 if (!tile
->bound
[i
].shift_map
)
1228 bmap
= isl_basic_map_copy(def
);
1230 bmap
= isl_basic_map_copy(tile
->bound
[i
].shift_map
);
1231 bmap
= isl_basic_map_apply_range(bmap
,
1232 isl_basic_map_copy(def
));
1235 map
= isl_map_from_basic_map(bmap
);
1236 map
= isl_map_apply_range(proj
, map
);
1237 pre_shift
= isl_map_flat_range_product(pre_shift
, map
);
1241 isl_basic_map_free(def
);
1243 space
= isl_space_domain(isl_map_get_space(pre_shift
));
1244 map
= isl_map_domain_map(isl_map_universe(isl_space_unwrap(space
)));
1245 pre_shift
= isl_map_range_product(map
, pre_shift
);
1247 sched
= isl_map_apply_range(sched
, pre_shift
);
1252 /* Given an access relation to a tile of an array, construct a map that
1253 * maps each element in the space of the access relation
1254 * to a copy of the tile shifted to the origin
1255 * (based on the lower bounds in group->private_tile or group->shared_tile).
1256 * If any of the indices is strided, then
1257 * {private,shared}_tile->bound[i].shift_map is applied to the index first.
1258 * The domain space of the resulting map is that of access "access",
1259 * while the range space is anonymous.
1260 * The resulting map only encodes the mapping to the shift tile and
1261 * not the constraints of "access".
1263 * Let the space of the access relation be
1267 * We first construct an identity relation on a wrapped copy of this space,
1268 * except that it strips off the name of array
1270 * [D -> A] -> [D -> T(A)] (1)
1272 * The bounds in tile->bound[i].lb are of the form
1276 * We collect them into
1280 * and then transform them into
1282 * [D -> T] -> T - B(D) (2)
1284 * Combining those two mappings (1) and (2) yields
1286 * [D -> A] -> T(A) - B(D)
1288 * If there are any strides, then (1) is first transformed into (1')
1290 * [D -> A] -> [D -> T'(A)] (1')
1292 * by a call to pre_shift.
1294 static __isl_give isl_map
*shift_access(__isl_take isl_map
*access
,
1295 struct gpu_array_ref_group
*group
)
1303 struct gpu_array_tile
*tile
;
1304 int n_index
= group
->array
->n_index
;
1306 tile
= group
->private_tile
;
1308 tile
= group
->shared_tile
;
1310 space
= isl_space_domain(isl_map_get_space(access
));
1311 space
= isl_space_map_from_set(space
);
1312 id1
= isl_map_identity(space
);
1313 space
= isl_space_range(isl_map_get_space(access
));
1314 space
= isl_space_map_from_set(space
);
1315 space
= isl_space_set_tuple_name(space
, isl_dim_out
, NULL
);
1316 id2
= isl_map_identity(space
);
1317 sched
= isl_map_product(id1
, id2
);
1319 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(sched
)));
1320 space
= isl_space_from_domain(isl_space_domain(space
));
1321 shift
= isl_map_universe(space
);
1322 for (i
= 0; i
< n_index
; ++i
) {
1323 map
= isl_map_from_aff(isl_aff_copy(tile
->bound
[i
].lb
));
1324 shift
= isl_map_flat_range_product(shift
, map
);
1327 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(sched
)));
1328 map
= isl_map_universe(space
);
1329 id1
= isl_map_range_map(isl_map_copy(map
));
1330 map
= isl_map_domain_map(map
);
1331 shift
= isl_map_neg(shift
);
1332 shift
= isl_map_apply_range(map
, shift
);
1333 shift
= isl_map_sum(id1
, shift
);
1335 for (i
= 0; i
< n_index
; ++i
)
1336 if (tile
->bound
[i
].shift_map
)
1340 sched
= pre_shift(sched
, tile
);
1342 sched
= isl_map_apply_range(sched
, shift
);
1344 isl_map_free(access
);
1349 /* Does "map" have an obviously fixed value at variable "pos" of "type"?
1351 static int map_plain_is_fixed(isl_map
*map
, enum isl_dim_type type
,
1357 v
= isl_map_plain_get_val_if_fixed(map
, type
, pos
);
1360 fixed
= isl_val_is_int(v
);
1366 /* Given a schedule that iterates over all elements in a piece of an array,
1367 * perform tiling/wrapping over the threads.
1369 * In particular, we tile the final iterators so that the final thread
1370 * dimension runs over the final array dimension.
1371 * However, if those final iterators have only a single iteration,
1372 * we try to tile earlier iterators instead.
1374 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1375 __isl_take isl_map
*sched
)
1378 isl_union_map
*usched
;
1381 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1385 n_tile
= gen
->kernel
->n_block
;
1386 if (n_tile
> nvar
) {
1388 sched
= isl_map_insert_dims(sched
,
1389 isl_dim_out
, 0, n_tile
- nvar
);
1390 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1391 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1395 first
= nvar
- n_tile
;
1397 for (; first
> 0; first
--)
1398 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1401 dim
= isl_map_get_space(sched
);
1402 dim
= isl_space_params(dim
);
1403 if (gen
->options
->wrap
)
1404 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1405 n_tile
, gen
->kernel
->block_dim
);
1407 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1408 n_tile
, gen
->kernel
->block_dim
);
1409 sched
= isl_map_apply_range(sched
, tiling
);
1411 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1412 sched
= isl_map_intersect_range(sched
, par
);
1414 usched
= isl_union_map_from_map(sched
);
1415 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1417 sched
= isl_map_from_union_map(usched
);
1422 /* Given an index expression "pa" into a tile of an array, adjust the expression
1423 * to a shift of the tile to the origin
1424 * (based on the lower bounds in "bound".
1425 * If the index is strided, then we first add
1426 * bound->shift and divide by bound->stride.
1427 * In the end, we compute the gist with respect to "domain".
1429 * All of the input expression "pa", the set "domain" and
1430 * the output are expressed in terms of the AST schedule domain.
1431 * The expressions in "bound" are expressed
1432 * in terms of the first shared_len dimensions of the schedule computed by PPCG.
1433 * The mapping "sched2shared" maps the former domain to the latter domain.
1435 static __isl_give isl_pw_aff
*shift_index(__isl_take isl_pw_aff
*pa
,
1436 struct gpu_array_info
*array
,
1437 struct gpu_array_bound
*bound
, __isl_take isl_set
*domain
,
1438 __isl_take isl_map
*sched2shared
)
1442 isl_pw_multi_aff
*pma
;
1445 map
= isl_map_from_aff(isl_aff_copy(bound
->shift
));
1446 map
= isl_map_apply_range(isl_map_copy(sched2shared
), map
);
1447 pma
= isl_pw_multi_aff_from_map(map
);
1448 tmp
= isl_pw_multi_aff_get_pw_aff(pma
, 0);
1449 isl_pw_multi_aff_free(pma
);
1450 pa
= isl_pw_aff_add(pa
, tmp
);
1451 pa
= isl_pw_aff_scale_down_val(pa
, isl_val_copy(bound
->stride
));
1455 map
= isl_map_from_aff(isl_aff_copy(bound
->lb
));
1456 map
= isl_map_apply_range(sched2shared
, map
);
1457 pma
= isl_pw_multi_aff_from_map(map
);
1458 tmp
= isl_pw_multi_aff_get_pw_aff(pma
, 0);
1459 isl_pw_multi_aff_free(pma
);
1460 pa
= isl_pw_aff_sub(pa
, tmp
);
1461 pa
= isl_pw_aff_coalesce(pa
);
1462 pa
= isl_pw_aff_gist(pa
, domain
);
1467 /* Return the union of all read (read = 1) and/or write (write = 1)
1468 * access relations in the group.
1470 static __isl_give isl_union_map
*group_access_relation(
1471 struct gpu_array_ref_group
*group
, int read
, int write
)
1474 isl_union_map
*access
;
1476 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1477 for (i
= 0; i
< group
->n_ref
; ++i
) {
1480 if (!((read
&& group
->refs
[i
]->read
) ||
1481 (write
&& group
->refs
[i
]->write
)))
1483 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1484 access
= isl_union_map_union(access
,
1485 isl_union_map_from_map(map_i
));
1491 /* Return a map from the first shared_len dimensions of the computed
1492 * schedule to the values of the given index "i"
1493 * of the elements in the array tile in global memory that corresponds
1494 * to the shared memory copy.
1495 * In particular, if a is the index, then the range of the map
1499 * is constrained as follows
1501 * tile_offset(D) <= a <= tile_offset(D) + tile_size - 1 (1)
1505 * 0 <= a <= array_size - 1 (2)
1508 * Note that if some stride has been detected (i.e., when
1509 * group->shared_tile->bound[i].shift is set), then offset and size (i.e.,
1510 * constraints (1)) apply to the shifted and scaled down copy of the tile.
1511 * These constraints therefore have to be mapped back to the original
1512 * array space using the inverse of the shift_map.
1514 static __isl_give isl_map
*group_tile_dim(struct gpu_array_ref_group
*group
,
1519 isl_map
*map
, *tile
, *gt
;
1522 map
= isl_map_from_aff(isl_aff_copy(group
->shared_tile
->bound
[i
].lb
));
1523 space
= isl_space_range(isl_map_get_space(map
));
1524 map
= isl_map_apply_range(map
, isl_map_lex_le(isl_space_copy(space
)));
1527 aff
= isl_aff_copy(group
->shared_tile
->bound
[i
].lb
);
1528 aff
= isl_aff_add_constant_val(aff
,
1529 isl_val_copy(group
->shared_tile
->bound
[i
].size
));
1530 map
= isl_map_from_aff(aff
);
1531 gt
= isl_map_lex_gt(space
);
1532 map
= isl_map_apply_range(map
, isl_map_copy(gt
));
1533 tile
= isl_map_intersect(tile
, map
);
1535 if (group
->shared_tile
->bound
[i
].shift
) {
1536 isl_basic_map
*shift
;
1537 shift
= isl_basic_map_copy(group
->shared_tile
->bound
[i
].shift_map
);
1538 shift
= isl_basic_map_reverse(shift
);
1539 tile
= isl_set_unwrap(isl_set_apply(isl_map_wrap(tile
),
1540 isl_map_from_basic_map(shift
)));
1543 tile
= isl_map_lower_bound_si(tile
, isl_dim_out
, 0, 0);
1545 bound
= isl_set_from_pw_aff(isl_pw_aff_copy(group
->array
->bound
[i
]));
1546 bound
= isl_set_apply(bound
, gt
);
1547 tile
= isl_map_intersect_range(tile
, bound
);
1552 /* Return a map from the first shared_len dimensions of the computed
1553 * schedule to the array tile in
1554 * global memory that corresponds to the shared memory copy.
1556 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1559 int n_index
= group
->array
->n_index
;
1562 tile
= group_tile_dim(group
, 0);
1563 for (i
= 1; i
< n_index
; ++i
) {
1566 tile_i
= group_tile_dim(group
, i
);
1567 tile
= isl_map_flat_range_product(tile
, tile_i
);
1570 tile
= isl_map_set_tuple_name(tile
, isl_dim_out
, group
->array
->name
);
1575 /* Given a mapping "sched" from the AST schedule to a domain,
1576 * return the corresponding mapping from the AST schedule to
1577 * to the first shared_len dimensions of the schedule computed by PPCG.
1579 static __isl_give isl_map
*compute_sched_to_shared(struct gpu_gen
*gen
,
1580 __isl_take isl_map
*sched
)
1582 isl_union_map
*umap
;
1586 space
= isl_space_range(isl_map_get_space(sched
));
1587 space
= isl_space_from_domain(space
);
1588 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1590 umap
= isl_union_map_copy(gen
->shared_sched
);
1591 umap
= isl_union_map_apply_range(umap
,
1592 isl_union_map_copy(gen
->shared_proj
));
1593 map
= isl_union_map_extract_map(umap
, space
);
1594 isl_union_map_free(umap
);
1596 sched
= isl_map_apply_range(sched
, map
);
1597 sched
= isl_map_detect_equalities(sched
);
1602 /* Set unroll[j] if the input dimension j is involved in
1603 * the index expression represented by ma.
1605 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1609 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1610 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1613 for (i
= 0; i
< n_out
; ++i
) {
1616 aff
= isl_multi_aff_get_aff(ma
, i
);
1617 for (j
= 0; j
< n_in
; ++j
)
1618 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1624 isl_multi_aff_free(ma
);
1628 /* Given an array pos mapping input dimensions to the corresponding
1629 * output dimension, construct the corresponding map.
1631 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1636 isl_basic_map
*bmap
;
1637 isl_local_space
*ls
;
1639 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1640 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1641 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1642 ls
= isl_local_space_from_space(dim
);
1644 for (i
= 0; i
< len
; ++i
) {
1645 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1646 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1648 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1650 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1652 isl_local_space_free(ls
);
1654 return isl_map_from_basic_map(bmap
);
1657 /* Find all loops involved in any of the index expressions for any of
1658 * the private accesses, move them innermost and then mark them as
1659 * requiring unrolling by setting gen->first_unroll.
1660 * The loops involved should all be parallel because of the checks
1661 * we performed in check_private_group_access. Moving them innermost
1662 * is therefore a valid transformation.
1664 * Loops up to gen->shared_len are generated before the mapping to
1665 * threads is applied. They should therefore be ignored.
1667 * We compute the hidden equalities of the schedule first
1668 * since we will need them in our calls to isl_pw_multi_aff_from_map
1669 * and because we want to make sure that the same equalities
1670 * are also available to the code generator.
1672 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1673 __isl_take isl_union_map
*sched
)
1676 int unroll
[gen
->thread_tiled_len
];
1677 int perm
[gen
->thread_tiled_len
];
1680 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1682 gen
->first_unroll
= -1;
1684 sched
= isl_union_map_detect_equalities(sched
);
1685 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1687 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1688 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1690 for (j
= 0; j
< array
->n_group
; ++j
) {
1691 isl_union_map
*access
;
1693 isl_pw_multi_aff
*pma
;
1695 if (!array
->groups
[j
]->private_tile
)
1698 access
= group_access_relation(array
->groups
[j
], 1, 1);
1699 access
= isl_union_map_apply_domain(access
,
1700 isl_union_map_copy(sched
));
1702 acc
= isl_map_from_union_map(access
);
1703 pma
= isl_pw_multi_aff_from_map(acc
);
1704 isl_pw_multi_aff_foreach_piece(pma
,
1705 &check_unroll
, unroll
);
1707 isl_pw_multi_aff_free(pma
);
1711 for (i
= gen
->shared_len
; i
< len
; ++i
)
1718 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1723 for (i
= 0; i
< gen
->shared_len
; ++i
)
1725 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1728 gen
->first_unroll
= j
- gen
->shared_len
;
1729 for (i
= gen
->shared_len
; i
< len
; ++i
)
1733 dim
= isl_union_map_get_space(sched
);
1734 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1735 sched
= isl_union_map_apply_range(sched
,
1736 isl_union_map_from_map(permute
));
1741 /* Given a constraint
1743 * a(p,i) + j = g f(e)
1745 * or -a(p,i) - j = g f(e) if sign < 0,
1746 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1747 * a(p,i) is assumed to be an expression in only the parameters
1748 * and the input dimensions.
1750 static void extract_stride(__isl_keep isl_constraint
*c
,
1751 struct gpu_array_bound
*bound
, __isl_keep isl_val
*stride
, int sign
)
1760 isl_val_free(bound
->stride
);
1761 bound
->stride
= isl_val_copy(stride
);
1763 space
= isl_constraint_get_space(c
);
1764 space
= isl_space_domain(space
);
1766 nparam
= isl_space_dim(space
, isl_dim_param
);
1767 nvar
= isl_space_dim(space
, isl_dim_set
);
1769 v
= isl_constraint_get_constant_val(c
);
1772 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1773 aff
= isl_aff_set_constant_val(aff
, v
);
1775 for (i
= 0; i
< nparam
; ++i
) {
1776 if (!isl_constraint_involves_dims(c
, isl_dim_param
, i
, 1))
1778 v
= isl_constraint_get_coefficient_val(c
, isl_dim_param
, i
);
1781 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_param
, i
, v
);
1784 for (i
= 0; i
< nvar
; ++i
) {
1785 if (!isl_constraint_involves_dims(c
, isl_dim_in
, i
, 1))
1787 v
= isl_constraint_get_coefficient_val(c
, isl_dim_in
, i
);
1790 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_in
, i
, v
);
1796 /* Given an equality constraint of a map with a single output dimension j,
1797 * check if the constraint is of the form
1799 * a(p,i) + j = g f(e)
1801 * with a(p,i) an expression in the parameters and input dimensions
1802 * and f(e) an expression in the existentially quantified variables.
1803 * If so, and if g is larger than any such g from a previously considered
1804 * constraint, then call extract_stride to record the stride information
1807 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1813 struct gpu_array_bound
*bound
= user
;
1815 ctx
= isl_constraint_get_ctx(c
);
1816 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1817 v
= isl_constraint_get_coefficient_val(c
, isl_dim_out
, 0);
1819 if (n_div
&& (isl_val_is_one(v
) || isl_val_is_negone(v
))) {
1820 int s
= isl_val_sgn(v
);
1821 isl_val
*stride
= isl_val_zero(ctx
);
1824 for (i
= 0; i
< n_div
; ++i
) {
1825 v
= isl_constraint_get_coefficient_val(c
,
1827 stride
= isl_val_gcd(stride
, v
);
1829 if (!isl_val_is_zero(stride
) &&
1830 isl_val_gt(stride
, bound
->stride
))
1831 extract_stride(c
, bound
, stride
, s
);
1833 isl_val_free(stride
);
1837 isl_constraint_free(c
);
1841 /* Given contraints on an array index i, check if we can find
1842 * a shift a(p) and a stride g such that
1844 * a(p) + i = 0 mod g
1846 * If so, record the information in bound and apply the mapping
1847 * i -> (i + a(p))/g to the array index in bounds and return
1848 * the new constraints.
1849 * If not, simply return the original constraints.
1851 * If bounds is a subset of the space
1855 * then the bound recorded in bound->shift is of the form
1859 * with s(D) equal to a(p) above.
1860 * The mapping recorded in bound->shift_map is of the form
1862 * [D -> i] -> [D -> (i + S(D))/g]
1864 * This mapping is computed as follows.
1865 * We first introduce "i" in the domain through precomposition
1866 * with [D -> i] -> D obtaining
1870 * Adding [D -> i] -> i produces
1872 * [D -> i] -> i + s(D)
1874 * and the domain product with [D -> i] -> D yields
1876 * [D -> i] -> [D -> i + s(D)]
1878 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
1880 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
1881 __isl_take isl_basic_map
*bounds
)
1884 isl_basic_map
*hull
;
1885 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
1886 isl_basic_set
*bset
;
1889 bound
->stride
= NULL
;
1891 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
1893 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
1895 isl_basic_map_free(hull
);
1900 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
1901 space
= isl_basic_map_get_space(bounds
);
1902 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1903 shift
= isl_basic_map_apply_range(bmap
, shift
);
1904 space
= isl_basic_map_get_space(bounds
);
1905 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1906 shift
= isl_basic_map_sum(id
, shift
);
1907 space
= isl_basic_map_get_space(bounds
);
1908 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1909 shift
= isl_basic_map_range_product(id
, shift
);
1911 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
1912 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
1913 space
= isl_space_range(isl_basic_map_get_space(bounds
));
1914 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1915 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1916 aff
= isl_aff_scale_down_val(aff
, isl_val_copy(bound
->stride
));
1917 scale
= isl_basic_map_from_aff(aff
);
1918 scale
= isl_basic_map_product(id
, scale
);
1920 bound
->shift_map
= isl_basic_map_apply_range(shift
, scale
);
1921 bmap
= isl_basic_map_copy(bound
->shift_map
);
1922 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
1923 bounds
= isl_basic_set_unwrap(bset
);
1928 /* Data used in compute_array_dim_size and compute_size_in_direction.
1930 * pos is the position of the variable representing the array index,
1931 * i.e., the variable for which want to compute the size. This variable
1932 * is also the last variable in the set.
1934 struct gpu_size_info
{
1935 isl_basic_set
*bset
;
1936 struct gpu_array_bound
*bound
;
1940 /* Given a constraint from the basic set describing the bounds on
1941 * an array index, check if it is a lower bound, say m i >= b(x), and,
1942 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
1943 * upper bound. If so, and if this bound is smaller than any bound
1944 * derived from earlier constraints, set the size to this bound on
1945 * the expression and the lower bound to ceil(b(x)/m).
1947 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
1949 struct gpu_size_info
*size
= user
;
1956 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
1957 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1959 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
) ||
1960 !isl_constraint_is_lower_bound(c
, isl_dim_set
, size
->pos
)) {
1961 isl_constraint_free(c
);
1965 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
1966 aff
= isl_aff_ceil(aff
);
1968 lb
= isl_aff_copy(aff
);
1970 aff
= isl_aff_neg(aff
);
1971 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
1973 v
= isl_basic_set_max_val(size
->bset
, aff
);
1976 if (isl_val_is_int(v
)) {
1977 v
= isl_val_add_ui(v
, 1);
1978 if (!size
->bound
->size
|| isl_val_lt(v
, size
->bound
->size
)) {
1979 isl_val_free(size
->bound
->size
);
1980 size
->bound
->size
= isl_val_copy(v
);
1981 lb
= isl_aff_drop_dims(lb
, isl_dim_in
, size
->pos
, 1);
1982 isl_aff_free(size
->bound
->lb
);
1983 size
->bound
->lb
= isl_aff_copy(lb
);
1989 isl_constraint_free(c
);
1994 /* Given a basic map "bounds" that maps parameters and input dimensions
1995 * to a single output dimension, look for an expression in the parameters
1996 * and input dimensions such that the range of the output dimension shifted
1997 * by this expression is a constant.
1999 * In particular, we currently only consider lower bounds on the output
2000 * dimension as candidate expressions.
2002 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
2003 __isl_take isl_basic_map
*bounds
)
2005 struct gpu_size_info size
;
2007 bounds
= isl_basic_map_detect_equalities(bounds
);
2008 bounds
= check_stride(bound
, bounds
);
2014 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2015 size
.bset
= isl_basic_map_wrap(bounds
);
2016 size
.bset
= isl_basic_set_flatten(size
.bset
);
2017 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
2018 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2020 isl_basic_set_free(size
.bset
);
2022 return bound
->size
? 0 : -1;
2025 /* Check if we can find a memory tile for the given array
2026 * based on the given accesses, and if so, put the results in "tile".
2028 * We project the accesses on each index in turn and look for a parametric
2029 * offset such that the size is constant.
2031 static int can_tile(__isl_keep isl_map
*access
, struct gpu_array_tile
*tile
)
2035 for (i
= 0; i
< tile
->n
; ++i
) {
2037 isl_basic_map
*hull
;
2039 access_i
= isl_map_copy(access
);
2040 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2041 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2042 1, tile
->n
- (i
+ 1));
2043 access_i
= isl_map_compute_divs(access_i
);
2044 hull
= isl_map_simple_hull(access_i
);
2045 if (compute_array_dim_size(&tile
->bound
[i
], hull
) < 0)
2052 /* Construct a map with input the shared tile loops and the loops that
2053 * will be wrapped around the threads that relates these later loops
2054 * to the thread indices and then projects them out.
2056 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
2064 dim
= isl_union_map_get_space(gen
->shared_sched
);
2066 if (gen
->options
->wrap
)
2067 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2068 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2070 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2071 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2075 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2076 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2079 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2080 priv
= isl_map_intersect_range(priv
, par
);
2082 dim
= isl_map_get_space(priv
);
2083 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2084 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2085 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2088 priv
= isl_map_apply_range(priv
, proj
);
2093 /* Construct a map from domain_dim to domain_dim that increments
2094 * the dimension at position "pos" and leaves all other dimensions
2097 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2100 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2102 isl_basic_map
*next
;
2103 isl_local_space
*ls
;
2105 dim
= isl_space_map_from_set(domain_dim
);
2106 next
= isl_basic_map_universe(isl_space_copy(dim
));
2107 ls
= isl_local_space_from_space(dim
);
2109 for (i
= 0; i
< len
; ++i
) {
2112 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2113 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2114 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2116 c
= isl_constraint_set_constant_si(c
, 1);
2117 next
= isl_basic_map_add_constraint(next
, c
);
2120 isl_local_space_free(ls
);
2122 return isl_map_from_basic_map(next
);
2125 /* Check if the given access is coalesced.
2126 * That is, check whether incrementing the dimension that will get
2127 * wrapped over the last thread index results in incrementing
2128 * the last array index.
2130 * This function is only called for access relations without reuse.
2132 static int access_is_coalesced(struct gpu_gen
*gen
,
2133 __isl_keep isl_union_map
*access
)
2136 isl_map
*access_map
;
2137 isl_map
*next_thread_x
;
2138 isl_map
*next_element
;
2142 access
= isl_union_map_copy(access
);
2143 access
= isl_union_map_apply_domain(access
,
2144 isl_union_map_copy(gen
->tiled_sched
));
2145 access_map
= isl_map_from_union_map(access
);
2147 dim
= isl_map_get_space(access_map
);
2148 dim
= isl_space_domain(dim
);
2149 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2151 dim
= isl_map_get_space(access_map
);
2152 dim
= isl_space_range(dim
);
2153 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2155 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2156 map
= isl_map_apply_range(map
, access_map
);
2158 coalesced
= isl_map_is_subset(map
, next_element
);
2160 isl_map_free(next_element
);
2166 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
2167 * dimensions of the computed schedule, check if it is bijective for
2168 * fixed values of the first gen->shared_len dimensions.
2169 * We perform this check by equating these dimensions to parameters.
2171 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
2177 access
= isl_map_copy(access
);
2178 space
= isl_space_params(isl_map_get_space(access
));
2179 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
2180 0, gen
->shared_len
, "s");
2181 access
= isl_map_intersect_domain(access
, par
);
2182 res
= isl_map_is_bijective(access
);
2183 isl_map_free(access
);
2188 /* Look for the last shared tile loop that affects the offset of "tile"
2189 * and return the result.
2190 * If there is no such loop, then return the index of the loop
2191 * before the first shared tile loop, in particular gen->tile_first - 1.
2193 static int compute_tile_last_shared(struct gpu_gen
*gen
,
2194 struct gpu_array_tile
*tile
)
2198 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2199 for (i
= 0; i
< tile
->n
; ++i
) {
2203 lb
= tile
->bound
[i
].lb
;
2204 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2207 shift
= tile
->bound
[i
].shift
;
2210 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2220 /* Look for the last shared tile loop that affects the offset of the
2221 * shared or private tile and store the result in group->last_shared.
2222 * If there is no such loop, then group->last_shared is set to a value
2223 * before the first shared tile loop, in particular gen->tile_first - 1.
2224 * If there is no tile defined on the array reference group,
2225 * then set group->last_shared to gen->shared_len - 1.
2227 static void set_last_shared(struct gpu_gen
*gen
,
2228 struct gpu_array_ref_group
*group
)
2230 struct gpu_array_tile
*tile
;
2232 group
->last_shared
= gen
->shared_len
- 1;
2234 tile
= group
->private_tile
;
2236 tile
= group
->shared_tile
;
2240 group
->last_shared
= compute_tile_last_shared(gen
, tile
);
2243 /* Compute a privatized copy of all access relations from reference groups that
2244 * are mapped to private memory and store the result in gen->privatization.
2246 static void compute_private_access(struct gpu_gen
*gen
)
2249 isl_union_map
*private;
2251 if (!gen
->options
->use_private_memory
)
2254 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
2256 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2257 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2259 if (gpu_array_is_read_only_scalar(array
))
2262 for (j
= 0; j
< array
->n_group
; ++j
) {
2263 if (!array
->groups
[j
]->private_tile
)
2266 private = isl_union_map_union(private,
2267 group_access_relation(array
->groups
[j
], 1, 1));
2271 if (isl_union_map_is_empty(private))
2272 isl_union_map_free(private);
2274 isl_union_map
*priv
;
2276 private = isl_union_map_apply_domain(private,
2277 isl_union_map_copy(gen
->shared_sched
));
2278 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2279 private = isl_union_map_apply_domain(private, priv
);
2280 gen
->private_access
= private;
2284 /* Compute the size of the tile specified by "tile"
2285 * in number of elements and return the result.
2287 static __isl_give isl_val
*tile_size(isl_ctx
*ctx
, struct gpu_array_tile
*tile
)
2292 size
= isl_val_one(ctx
);
2294 for (i
= 0; i
< tile
->n
; ++i
)
2295 size
= isl_val_mul(size
, isl_val_copy(tile
->bound
[i
].size
));
2300 /* If max_shared_memory is not set to infinity (-1), then make
2301 * sure that the total amount of shared memory required by the
2302 * array reference groups mapped to shared memory is no larger
2303 * than this maximum.
2305 * We apply a greedy approach and discard (keep in global memory)
2306 * those groups that would result in a total memory size that
2307 * is larger than the maximum.
2309 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2312 isl_val
*left
, *size
;
2314 if (gen
->options
->max_shared_memory
< 0)
2317 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
2319 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2320 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2322 for (j
= 0; j
< array
->n_group
; ++j
) {
2323 struct gpu_array_ref_group
*group
;
2325 group
= array
->groups
[j
];
2326 if (!group
->shared_tile
)
2329 size
= tile_size(gen
->ctx
, group
->shared_tile
);
2330 size
= isl_val_mul_ui(size
, array
->size
);
2332 if (isl_val_le(size
, left
)) {
2333 left
= isl_val_sub(left
, size
);
2338 group
->shared_tile
= free_tile(group
->shared_tile
);
2345 /* Fill up the groups array with singleton groups, i.e., one group
2346 * per reference, initializing the array, access, write, n_ref and refs fields.
2347 * In particular the access field is initialized to the scheduled
2348 * access relation of the array reference.
2350 * Return the number of elements initialized, i.e., the number of
2351 * active references in the current kernel.
2353 static int populate_array_references(struct gpu_array_info
*array
,
2354 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2358 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2361 for (i
= 0; i
< array
->n_ref
; ++i
) {
2362 isl_union_map
*umap
;
2364 struct gpu_array_ref_group
*group
;
2365 struct gpu_stmt_access
*access
= array
->refs
[i
];
2367 map
= isl_map_copy(access
->access
);
2368 umap
= isl_union_map_from_map(map
);
2369 umap
= isl_union_map_apply_domain(umap
,
2370 isl_union_map_copy(sched
));
2372 if (isl_union_map_is_empty(umap
)) {
2373 isl_union_map_free(umap
);
2377 map
= isl_map_from_union_map(umap
);
2378 map
= isl_map_detect_equalities(map
);
2380 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2382 group
->array
= array
;
2383 group
->access
= map
;
2384 group
->write
= access
->write
;
2385 group
->refs
= &array
->refs
[i
];
2388 groups
[n
++] = group
;
2394 /* If group->n_ref == 1, then group->refs was set by
2395 * populate_array_references to point directly into
2396 * group->array->refs and should not be freed.
2397 * If group->n_ref > 1, then group->refs was set by join_groups
2398 * to point to a newly allocated array.
2400 static void free_array_ref_group(struct gpu_array_ref_group
*group
)
2404 free_tile(group
->shared_tile
);
2405 free_tile(group
->private_tile
);
2406 isl_map_free(group
->access
);
2407 if (group
->n_ref
> 1)
2412 /* Given a map where the input dimensions represent the tile loops,
2413 * eliminate the innermost of those that have a fixed value
2414 * until we reach one that does not (obviously) have a fixed value.
2416 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2417 __isl_take isl_map
*access
)
2421 n
= isl_map_dim(access
, isl_dim_in
);
2423 for (i
= n
- 1; i
>= 0; --i
) {
2424 if (!map_plain_is_fixed(access
, isl_dim_in
, i
))
2426 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2431 /* Check if the access relations of group1 and group2 overlap within
2432 * the innermost loop. In particular, ignore any inner dimension
2433 * with a fixed value.
2434 * The copying to and from shared memory will be performed within
2435 * the innermost actual loop so we are only allowed to consider
2436 * the dimensions up to that innermost loop while checking whether
2437 * two access relations overlap.
2439 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2440 struct gpu_array_ref_group
*group2
)
2443 isl_map
*access1
, *access2
;
2445 access1
= isl_map_copy(group1
->access
);
2446 access1
= eliminate_fixed_inner_loops(access1
);
2447 access2
= isl_map_copy(group2
->access
);
2448 access2
= eliminate_fixed_inner_loops(access2
);
2449 access1
= isl_map_intersect(access1
, access2
);
2450 empty
= isl_map_is_empty(access1
);
2451 isl_map_free(access1
);
2456 /* Combine the given two groups into a single group, containing
2457 * the references of both groups.
2459 static struct gpu_array_ref_group
*join_groups(
2460 struct gpu_array_ref_group
*group1
,
2461 struct gpu_array_ref_group
*group2
)
2465 struct gpu_array_ref_group
*group
;
2467 ctx
= isl_map_get_ctx(group1
->access
);
2468 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2470 group
->array
= group1
->array
;
2471 group
->access
= isl_map_union(isl_map_copy(group1
->access
),
2472 isl_map_copy(group2
->access
));
2473 group
->write
= group1
->write
|| group2
->write
;
2474 group
->n_ref
= group1
->n_ref
+ group2
->n_ref
;
2475 group
->refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2477 assert(group
->refs
);
2478 for (i
= 0; i
< group1
->n_ref
; ++i
)
2479 group
->refs
[i
] = group1
->refs
[i
];
2480 for (i
= 0; i
< group2
->n_ref
; ++i
)
2481 group
->refs
[group1
->n_ref
+ i
] = group2
->refs
[i
];
2486 /* Combine the given two groups into a single group and free
2487 * the original two groups.
2489 static struct gpu_array_ref_group
*join_groups_and_free(
2490 struct gpu_array_ref_group
*group1
,
2491 struct gpu_array_ref_group
*group2
)
2493 struct gpu_array_ref_group
*group
;
2495 group
= join_groups(group1
, group2
);
2496 free_array_ref_group(group1
);
2497 free_array_ref_group(group2
);
2501 /* Compute the private and/or shared memory tiles for the array
2502 * reference group "group" of array "array".
2504 * If the array is a read-only scalar or if the user requested
2505 * not to use shared or private memory, then we do not need to do anything.
2507 * We only try to compute a shared memory tile if there is any reuse
2508 * or if the access is not coalesced.
2510 * For computing a private memory tile, we also require that there is
2511 * some reuse. Moreover, we require that the access is private
2512 * to the thread. That is, we check that any given array element
2513 * is only accessed by a single thread.
2514 * We compute an access relation that maps the shared tile loop iterators
2515 * and the shared point loop iterators that will be wrapped over the
2516 * threads to the array elements.
2517 * We actually check that those iterators that will be wrapped
2518 * partition the array space. This check is stricter than necessary
2519 * since several iterations may be mapped onto the same thread
2520 * and then they could be allowed to access the same memory elements,
2521 * but our check does not allow this situation.
2523 * We also check that the index expression only depends on parallel
2524 * loops. That way, we can move those loops innermost and unroll them.
2525 * Again, we use a test that is stricter than necessary.
2526 * We actually check whether the index expression only depends
2527 * on the iterators that are wrapped over the threads.
2528 * These are necessarily parallel, but there may be more parallel loops.
2530 * Combining the injectivity of the first test with the single-valuedness
2531 * of the second test, we simply test for bijectivity.
2533 * If it turns out we can use registers, we compute the private memory
2534 * tile size using can_tile, after introducing a dependence
2535 * on the thread indices.
2537 static void compute_group_bounds_core(struct gpu_gen
*gen
,
2538 struct gpu_array_ref_group
*group
)
2540 isl_ctx
*ctx
= isl_space_get_ctx(group
->array
->dim
);
2541 isl_union_map
*access
;
2542 int n_index
= group
->array
->n_index
;
2545 int use_shared
= gen
->options
->use_shared_memory
;
2546 int use_private
= gen
->options
->use_private_memory
;
2548 if (!use_shared
&& !use_private
)
2550 if (gpu_array_is_read_only_scalar(group
->array
))
2553 access
= group_access_relation(group
, 1, 1);
2554 no_reuse
= isl_union_map_is_injective(access
);
2556 if (use_shared
&& (!no_reuse
|| !access_is_coalesced(gen
, access
))) {
2557 group
->shared_tile
= create_tile(ctx
, group
->array
->n_index
);
2558 if (!can_tile(group
->access
, group
->shared_tile
))
2559 group
->shared_tile
= free_tile(group
->shared_tile
);
2562 if (!use_private
|| no_reuse
) {
2563 isl_union_map_free(access
);
2567 access
= isl_union_map_apply_domain(access
,
2568 isl_union_map_copy(gen
->shared_sched
));
2570 acc
= isl_map_from_union_map(access
);
2572 if (!access_is_bijective(gen
, acc
)) {
2577 group
->private_tile
= create_tile(gen
->ctx
, n_index
);
2578 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2579 if (!can_tile(acc
, group
->private_tile
))
2580 group
->private_tile
= free_tile(group
->private_tile
);
2585 /* Compute the private and/or shared memory tiles for the array
2586 * reference group "group" of array "array" and set last_shared.
2588 static void compute_group_bounds(struct gpu_gen
*gen
,
2589 struct gpu_array_ref_group
*group
)
2591 compute_group_bounds_core(gen
, group
);
2592 set_last_shared(gen
, group
);
2595 /* If two groups have overlapping access relations (as determined by
2596 * the "overlap" function) and if one of them involves a write,
2597 * then merge the two groups into one.
2598 * If "compute_bounds" is set, then call compute_group_bounds
2599 * on the merged groups.
2601 * Return the updated number of groups.
2603 static int group_writes(struct gpu_gen
*gen
,
2604 int n
, struct gpu_array_ref_group
**groups
,
2605 int (*overlap
)(struct gpu_array_ref_group
*group1
,
2606 struct gpu_array_ref_group
*group2
), int compute_bounds
)
2610 for (i
= 0; i
< n
; ++i
) {
2611 for (j
= n
- 1; j
> i
; --j
) {
2612 if (!groups
[i
]->write
&& !groups
[j
]->write
)
2615 if (!overlap(groups
[i
], groups
[j
]))
2618 groups
[i
] = join_groups_and_free(groups
[i
], groups
[j
]);
2620 compute_group_bounds(gen
, groups
[i
]);
2622 groups
[j
] = groups
[n
- 1];
2630 /* If two groups have overlapping access relations (within the innermost
2631 * loop) and if one of them involves a write, then merge the two groups
2634 * Return the updated number of groups.
2636 static int group_overlapping_writes(struct gpu_gen
*gen
,
2637 int n
, struct gpu_array_ref_group
**groups
)
2639 return group_writes(gen
, n
, groups
, &accesses_overlap
, 0);
2642 /* Check if the access relations of group1 and group2 overlap within
2643 * the outermost min(group1->last_shared, group2->last_shared) loops.
2645 static int last_shared_accesses_overlap(struct gpu_array_ref_group
*group1
,
2646 struct gpu_array_ref_group
*group2
)
2651 isl_map
*map_i
, *map_j
, *map
;
2653 last_shared
= group1
->last_shared
;
2654 if (group2
->last_shared
< last_shared
)
2655 last_shared
= group2
->last_shared
;
2656 map_i
= isl_map_copy(group1
->access
);
2657 dim
= isl_map_dim(map_i
, isl_dim_in
);
2658 map_i
= isl_map_eliminate(map_i
, isl_dim_in
,
2659 last_shared
+ 1, dim
- (last_shared
+ 1));
2660 map_j
= isl_map_copy(group2
->access
);
2661 map_j
= isl_map_eliminate(map_j
, isl_dim_in
,
2662 last_shared
+ 1, dim
- (last_shared
+ 1));
2663 map
= isl_map_intersect(map_i
, map_j
);
2664 empty
= isl_map_is_empty(map
);
2670 /* If two groups have overlapping access relations (within the outer
2671 * last_shared loops) and if one of them involves a write,
2672 * then merge the two groups into one.
2674 * Return the updated number of groups.
2676 static int group_last_shared_overlapping_writes(struct gpu_gen
*gen
, int n
,
2677 struct gpu_array_ref_group
**groups
)
2679 return group_writes(gen
, n
, groups
, &last_shared_accesses_overlap
, 1);
2682 /* Is the size of the tile specified by "tile" smaller than the sum of
2683 * the sizes of the tiles specified by "tile1" and "tile2"?
2685 static int smaller_tile(isl_ctx
*ctx
, struct gpu_array_tile
*tile
,
2686 struct gpu_array_tile
*tile1
, struct gpu_array_tile
*tile2
)
2689 isl_val
*size
, *size1
, *size2
;
2691 size
= tile_size(ctx
, tile
);
2692 size1
= tile_size(ctx
, tile1
);
2693 size2
= tile_size(ctx
, tile2
);
2695 size
= isl_val_sub(size
, size1
);
2696 size
= isl_val_sub(size
, size2
);
2697 smaller
= isl_val_is_neg(size
);
2704 /* Given an initial grouping of array references and shared memory tiles
2705 * for each group that allows for a shared memory tile, merge two groups
2706 * if both have a shared memory tile, the merged group also has
2707 * a shared memory tile and the size of the tile for the merge group
2708 * is smaller than the sum of the tile sizes of the individual groups.
2710 * If merging two groups decreases the "last_shared" dimension of
2711 * one or both of the two groups, then we need to check for overlapping
2714 * Return the number of groups after merging.
2716 static int group_common_shared_memory_tile(struct gpu_gen
*gen
,
2717 struct gpu_array_info
*array
, int n
,
2718 struct gpu_array_ref_group
**groups
)
2721 int recompute_overlap
= 0;
2722 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
2724 for (i
= 0; i
< n
; ++i
) {
2725 if (!groups
[i
]->shared_tile
)
2727 for (j
= n
- 1; j
> i
; --j
) {
2730 struct gpu_array_ref_group
*group
;
2732 if (!groups
[j
]->shared_tile
)
2735 map
= isl_map_intersect(isl_map_copy(groups
[i
]->access
),
2736 isl_map_copy(groups
[j
]->access
));
2737 empty
= isl_map_is_empty(map
);
2743 group
= join_groups(groups
[i
], groups
[j
]);
2744 compute_group_bounds(gen
, group
);
2745 if (!group
->shared_tile
||
2746 !smaller_tile(ctx
, group
->shared_tile
,
2747 groups
[i
]->shared_tile
,
2748 groups
[j
]->shared_tile
)) {
2749 free_array_ref_group(group
);
2753 if (group
->last_shared
< groups
[i
]->last_shared
||
2754 group
->last_shared
< groups
[j
]->last_shared
)
2755 recompute_overlap
= 1;
2756 free_array_ref_group(groups
[i
]);
2757 free_array_ref_group(groups
[j
]);
2760 groups
[j
] = groups
[n
- 1];
2765 if (recompute_overlap
)
2766 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
2770 /* Set array->n_group and array->groups to n and groups.
2772 * Additionally, set the "nr" field of each group
2773 * and the "group" field of each reference in each group.
2775 static void set_array_groups(struct gpu_array_info
*array
,
2776 int n
, struct gpu_array_ref_group
**groups
)
2781 array
->groups
= groups
;
2783 for (i
= 0; i
< n
; ++i
) {
2786 for (j
= 0; j
< groups
[i
]->n_ref
; ++j
)
2787 groups
[i
]->refs
[j
]->group
= i
;
2791 /* Group array references that should be considered together when
2792 * deciding whether to access them from private, shared or global memory.
2794 * In particular, if two array references overlap and if one of them
2795 * is a write, then the two references are grouped together.
2796 * We first perform an initial grouping based only on the access relation.
2797 * After computing shared and private memory tiles, we check for
2798 * overlapping writes again, but this time taking into account
2799 * the "last_shared" property.
2801 * Furthermore, if two groups admit a shared memory tile and if the
2802 * combination of the two also admits a shared memory tile, we merge
2805 static void group_array_references(struct gpu_gen
*gen
,
2806 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
2810 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2811 struct gpu_array_ref_group
**groups
;
2813 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
2817 n
= populate_array_references(array
, sched
, groups
);
2819 n
= group_overlapping_writes(gen
, n
, groups
);
2821 for (i
= 0; i
< n
; ++i
)
2822 compute_group_bounds(gen
, groups
[i
]);
2824 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
2826 n
= group_common_shared_memory_tile(gen
, array
, n
, groups
);
2828 set_array_groups(array
, n
, groups
);
2831 /* Take tiled_sched, project it onto the shared tile loops and
2832 * the loops that will be wrapped over the threads and
2833 * store the result in gen->shared_sched.
2834 * Also compute a projection that projects out the loops that will be
2835 * wrapped over the threads and store this projection in gen->shared_proj.
2837 static void compute_shared_sched(struct gpu_gen
*gen
)
2842 isl_union_map
*sched
;
2844 sched
= isl_union_map_copy(gen
->tiled_sched
);
2846 dim
= isl_union_map_get_space(sched
);
2847 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
2848 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
2850 dim
= isl_union_map_get_space(sched
);
2851 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
2853 gen
->shared_sched
= sched
;
2854 gen
->shared_proj
= isl_union_map_from_map(proj
);
2857 /* Group references of all arrays in the program.
2859 static void group_references(struct gpu_gen
*gen
)
2862 isl_union_map
*sched
;
2864 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
2865 isl_union_map_copy(gen
->shared_proj
));
2867 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
2868 group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
2870 isl_union_map_free(sched
);
2873 /* Free all array information that is local to the current kernel.
2875 static void free_local_array_info(struct gpu_gen
*gen
)
2879 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2880 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2882 for (j
= 0; j
< array
->n_group
; ++j
)
2883 free_array_ref_group(array
->groups
[j
]);
2884 free(array
->groups
);
2888 /* Compute the size of a bounding box around the origin and "set",
2889 * where "set" is assumed to contain only non-negative elements.
2890 * In particular, compute the maximal value of "set" in each direction
2893 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
2894 __isl_keep isl_set
*context
)
2897 isl_multi_pw_aff
*mpa
;
2899 n
= isl_set_dim(set
, isl_dim_set
);
2900 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
2901 for (i
= 0; i
< n
; ++i
) {
2906 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
2907 bound
= isl_pw_aff_coalesce(bound
);
2908 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
2910 space
= isl_pw_aff_get_domain_space(bound
);
2911 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
2912 one
= isl_aff_add_constant_si(one
, 1);
2913 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
2914 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
2921 /* Compute the effective grid size as a list of the sizes in each dimension.
2923 * The grid size specified by the user or set by default
2924 * in read_grid_sizes() and applied in tile_schedule(),
2925 * may be too large for the given code in the sense that
2926 * it may contain blocks that don't need to execute anything.
2927 * We therefore don't return this grid size, but instead the
2928 * smallest grid size that ensures that all blocks that actually
2929 * execute code are included in the grid.
2931 * We first extract a description of the grid, i.e., the possible values
2932 * of the block ids, from gen->tiled_sched.
2933 * The block ids are parameters in gen->tiled_sched.
2934 * We simply need to change them into set dimensions.
2936 * Then, for each block dimension, we compute the maximal value of the block id
2939 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
2940 struct ppcg_kernel
*kernel
)
2945 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
2946 grid
= isl_set_from_params(grid
);
2947 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
2948 for (i
= 0; i
< gen
->n_grid
; ++i
) {
2952 snprintf(name
, sizeof(name
), "b%d", i
);
2953 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
2955 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
2956 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
2959 return extract_size(grid
, kernel
->context
);
2962 /* Compute the size of a fixed bounding box around the origin and "set",
2963 * where "set" is assumed to contain only non-negative elements,
2964 * and store the results in "size".
2965 * In particular, compute the maximal value of "set" in each direction
2968 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
2971 isl_local_space
*ls
;
2974 n
= isl_set_dim(set
, isl_dim_set
);
2975 ls
= isl_local_space_from_space(isl_set_get_space(set
));
2976 obj
= isl_aff_zero_on_domain(ls
);
2977 for (i
= 0; i
< n
; ++i
) {
2980 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
2981 max
= isl_set_max_val(set
, obj
);
2982 size
[i
] = isl_val_get_num_si(max
) + 1;
2984 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
2990 /* Compute the effective block size as a list of the sizes in each dimension
2991 * and store the sizes in kernel->block_dim.
2993 * The block size specified by the user or set by default
2994 * in read_block_sizes() and applied in thread_tile_schedule(),
2995 * may be too large for the given code in the sense that
2996 * it may contain threads that don't need to execute anything.
2997 * We therefore don't store this block size in kernel->block_dim,
2998 * but instead the smallest block size that ensures that all threads
2999 * that actually execute code are included in the block.
3001 * The current implementation eliminates all parameters, ensuring
3002 * that the size is a fixed constant in each dimension.
3003 * In principle we could also compute parametric sizes.
3004 * We would have to make sure to project out all b%d and t%d parameters,
3007 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3012 isl_multi_pw_aff
*mpa
;
3014 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
3015 block
= isl_set_from_params(block
);
3016 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
3017 kernel
->n_block
= gen
->n_block
;
3018 for (i
= 0; i
< gen
->n_block
; ++i
) {
3022 snprintf(name
, sizeof(name
), "t%d", i
);
3023 pos
= isl_set_find_dim_by_name(block
, isl_dim_param
, name
);
3025 block
= isl_set_equate(block
, isl_dim_param
, pos
,
3028 nparam
= isl_set_dim(block
, isl_dim_param
);
3029 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
3031 extract_fixed_size(block
, kernel
->block_dim
);
3034 void ppcg_kernel_free(void *user
)
3036 struct ppcg_kernel
*kernel
= user
;
3042 isl_multi_pw_aff_free(kernel
->grid_size
);
3043 isl_set_free(kernel
->context
);
3044 isl_union_set_free(kernel
->arrays
);
3045 isl_space_free(kernel
->space
);
3046 isl_ast_node_free(kernel
->tree
);
3048 for (i
= 0; i
< kernel
->n_array
; ++i
)
3049 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
3050 free(kernel
->array
);
3052 for (i
= 0; i
< kernel
->n_var
; ++i
) {
3053 free(kernel
->var
[i
].name
);
3054 isl_vec_free(kernel
->var
[i
].size
);
3061 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
3062 struct ppcg_kernel_var
*var
)
3065 struct gpu_array_tile
*tile
;
3069 var
->array
= group
->array
;
3071 tile
= group
->private_tile
;
3072 var
->type
= ppcg_access_private
;
3074 tile
= group
->shared_tile
;
3075 var
->type
= ppcg_access_shared
;
3078 p
= isl_printer_to_str(ctx
);
3079 p
= print_array_name(p
, group
);
3080 var
->name
= isl_printer_get_str(p
);
3081 isl_printer_free(p
);
3083 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
3085 for (j
= 0; j
< group
->array
->n_index
; ++j
)
3086 var
->size
= isl_vec_set_element_val(var
->size
, j
,
3087 isl_val_copy(tile
->bound
[j
].size
));
3090 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3095 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3096 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3098 for (j
= 0; j
< array
->n_group
; ++j
) {
3099 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3100 if (group
->private_tile
|| group
->shared_tile
)
3106 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
3107 assert(kernel
->var
);
3110 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3111 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3113 for (j
= 0; j
< array
->n_group
; ++j
) {
3114 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3115 if (!group
->private_tile
&& !group
->shared_tile
)
3117 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
3123 /* The sizes of the arrays on the host that have been computed by
3124 * extract_array_info may depend on the parameters. Use the extra
3125 * constraints on the parameters that are valid at "host_domain"
3126 * to simplify these expressions and store the results in kernel->array.
3128 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
3129 __isl_keep isl_set
*host_domain
)
3134 kernel
->array
= isl_calloc_array(gen
->ctx
,
3135 struct gpu_local_array_info
, gen
->prog
->n_array
);
3136 assert(kernel
->array
);
3137 kernel
->n_array
= gen
->prog
->n_array
;
3139 context
= isl_set_copy(host_domain
);
3140 context
= isl_set_params(context
);
3142 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3143 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3144 isl_pw_aff_list
*local
;
3146 if (array
->n_group
== 0)
3149 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
3151 for (j
= 0; j
< array
->n_index
; ++j
) {
3154 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3155 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3156 local
= isl_pw_aff_list_add(local
, pwaff
);
3159 kernel
->array
[i
].bound
= local
;
3161 isl_set_free(context
);
3164 /* Find the element in gen->stmt that has the given "id".
3165 * Return NULL if no such gpu_stmt can be found.
3167 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
3171 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
3172 if (id
== prog
->stmts
[i
].id
)
3176 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
3179 /* Set gen->tile_len and gen->n_parallel to those of the statement
3180 * affected by the first map (part of the schedule)
3181 * on which this function is called.
3182 * Because of the way the schedule is constructed, the other statements
3183 * in the list, if any, should have the same values for these properties.
3185 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
3187 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3189 struct gpu_stmt
*stmt
;
3191 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3192 stmt
= find_stmt(gen
->prog
, id
);
3198 isl_die(gen
->ctx
, isl_error_unknown
,
3199 "statement not found", return -1);
3201 gen
->tile_len
= stmt
->tile_len
;
3202 gen
->n_parallel
= stmt
->n_parallel
;
3207 void ppcg_kernel_stmt_free(void *user
)
3210 struct ppcg_kernel_stmt
*stmt
= user
;
3215 switch (stmt
->type
) {
3216 case ppcg_kernel_copy
:
3217 isl_ast_expr_free(stmt
->u
.c
.index
);
3218 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3220 case ppcg_kernel_domain
:
3221 for (i
= 0; i
< stmt
->u
.d
.n_access
; ++i
) {
3222 isl_ast_expr_list_free(stmt
->u
.d
.access
[i
].index
);
3223 free(stmt
->u
.d
.access
[i
].local_name
);
3225 free(stmt
->u
.d
.access
);
3227 case ppcg_kernel_sync
:
3234 /* Set the options of "context" to
3236 * { space -> [x] : x >= first }
3238 static __isl_give isl_ast_build
*set_unroll(
3239 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3246 ctx
= isl_ast_build_get_ctx(build
);
3248 space
= isl_space_from_domain(space
);
3249 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3250 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3251 unroll
= isl_map_universe(space
);
3252 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3253 opt
= isl_union_map_from_map(unroll
);
3255 build
= isl_ast_build_set_options(build
, opt
);
3260 /* Return a list of isl_ids of the form "prefix%d".
3262 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3263 int n
, const char *prefix
)
3269 names
= isl_id_list_alloc(ctx
, n
);
3270 for (i
= 0; i
< n
; ++i
) {
3273 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3274 id
= isl_id_alloc(ctx
, name
, NULL
);
3275 names
= isl_id_list_add(names
, id
);
3281 /* Extend the schedule "schedule" with the part of "extension"
3282 * starting at "first" up to "len".
3284 static __isl_give isl_union_map
*extend_schedule(
3285 __isl_take isl_union_map
*schedule
,
3286 __isl_take isl_union_map
*extension
, int first
, int len
)
3290 isl_union_map
*umap
;
3293 space
= isl_union_map_get_space(schedule
);
3294 space
= isl_space_set_from_params(space
);
3295 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3296 proj
= isl_set_identity(isl_set_universe(space
));
3297 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3298 extension
= isl_union_map_apply_range(extension
,
3299 isl_union_map_from_map(proj
));
3301 schedule
= isl_union_map_range_product(schedule
, extension
);
3306 /* This function is called for each access to an array in each instance
3307 * in the kernel of some statement in the original code.
3308 * Replace that access by an access to global, shared or private memory
3309 * and store the results in *kernel_access.
3311 * Since the array in shared or private memory is just
3312 * a shifted copy of part of the original array, we simply need
3313 * to subtract the lower bound, which was computed in can_tile.
3314 * If any of the indices is strided, then we first add
3315 * shared_tile->bound[i].shift and divide by shared_tile->bound[i].stride.
3317 * If the given array is accessed directly from global memory,
3318 * we don't need to perform any shifting and simply simplify
3319 * the expression in the context of the domain instead.
3321 * If the array space (range of access) has no name, then we are
3322 * accessing an iterator in the original program.
3324 * The input stmt_access->access relation maps the iteration domain
3325 * of the current statement to an array element.
3326 * The first step is to reformulate
3327 * this access relation in terms of the loop iterators of the generated
3328 * code through precomposition with gen->stmt_it.
3330 * The expressions in "tile" are formulated in terms of the first
3331 * gen->shared_len dimensions of the computed schedule using the mapping
3332 * sched2shared which maps the loop iterators to these dimensions.
3334 static void compute_index_expression(struct gpu_gen
*gen
,
3335 struct ppcg_kernel_access
*kernel_access
,
3336 struct gpu_stmt_access
*stmt_access
, __isl_keep isl_map
*stmt_it
,
3337 __isl_keep isl_map
*sched2shared
, __isl_keep isl_ast_build
*build
)
3340 isl_pw_multi_aff
*pma
;
3343 struct gpu_array_tile
*tile
= NULL
;
3345 if (isl_map_has_tuple_name(stmt_access
->access
, isl_dim_out
)) {
3348 struct gpu_array_ref_group
*group
;
3351 name
= isl_map_get_tuple_name(stmt_access
->access
, isl_dim_out
);
3353 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3354 if (strcmp(name
, gen
->prog
->array
[i
].name
))
3356 kernel_access
->array
= &gen
->prog
->array
[i
];
3357 kernel_access
->local_array
= &gen
->kernel
->array
[i
];
3359 assert(kernel_access
->array
);
3360 group
= kernel_access
->array
->groups
[stmt_access
->group
];
3361 p
= isl_printer_to_str(gen
->ctx
);
3362 p
= print_array_name(p
, group
);
3363 kernel_access
->local_name
= isl_printer_get_str(p
);
3364 isl_printer_free(p
);
3365 tile
= group
->private_tile
;
3366 kernel_access
->type
= ppcg_access_private
;
3368 tile
= group
->shared_tile
;
3369 kernel_access
->type
= ppcg_access_shared
;
3373 kernel_access
->type
= ppcg_access_global
;
3375 n_index
= isl_map_dim(stmt_access
->access
, isl_dim_out
);
3376 kernel_access
->index
= isl_ast_expr_list_alloc(gen
->ctx
, n_index
);
3381 access
= isl_map_copy(stmt_access
->access
);
3382 access
= isl_map_apply_range(isl_map_copy(stmt_it
), access
);
3383 pma
= isl_pw_multi_aff_from_map(access
);
3384 pma
= isl_pw_multi_aff_coalesce(pma
);
3386 for (i
= 0; i
< n_index
; ++i
) {
3391 index
= isl_pw_multi_aff_get_pw_aff(pma
, i
);
3393 if (!kernel_access
->array
) {
3395 domain
= isl_map_domain(isl_map_copy(stmt_it
));
3396 index
= isl_pw_aff_coalesce(index
);
3397 index
= isl_pw_aff_gist(index
, domain
);
3399 domain
= isl_map_domain(isl_map_copy(stmt_it
));
3400 index
= shift_index(index
, kernel_access
->array
,
3401 &tile
->bound
[i
], domain
,
3402 isl_map_copy(sched2shared
));
3405 expr
= isl_ast_build_expr_from_pw_aff(build
, index
);
3407 kernel_access
->index
= isl_ast_expr_list_add(
3408 kernel_access
->index
, expr
);
3411 isl_pw_multi_aff_free(pma
);
3414 /* This function is called for each instance of a user statement
3417 * We attach a struct ppcg_kernel_stmt to the "node", containing
3418 * local information about the accesses.
3419 * This information is computed from stmt_it, which expresses the domain
3420 * elements in terms of the generated loops, and sched2shared,
3421 * which expresses the first shared_len dimensions of the schedule
3422 * computed by PPCG in terms of the generated loops.
3424 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
3425 __isl_keep isl_ast_build
*build
, void *user
)
3427 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3428 struct ppcg_kernel_stmt
*stmt
;
3430 isl_map
*stmt_it
, *sched2shared
;
3431 isl_ast_expr
*expr
, *arg
;
3432 isl_union_map
*schedule
;
3434 struct gpu_stmt_access
*access
;
3436 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3438 return isl_ast_node_free(node
);
3440 expr
= isl_ast_node_user_get_expr(node
);
3441 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3442 id
= isl_ast_expr_get_id(arg
);
3444 schedule
= isl_ast_build_get_schedule(build
);
3445 stmt_it
= isl_map_reverse(isl_map_from_union_map(schedule
));
3446 sched2shared
= compute_sched_to_shared(gen
, isl_map_copy(stmt_it
));
3448 stmt
->type
= ppcg_kernel_domain
;
3449 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
3450 if (!stmt
->u
.d
.stmt
)
3454 for (access
= stmt
->u
.d
.stmt
->accesses
; access
; access
= access
->next
)
3457 stmt
->u
.d
.access
= isl_calloc_array(gen
->ctx
,
3458 struct ppcg_kernel_access
, n
);
3459 if (!stmt
->u
.d
.access
)
3462 stmt
->u
.d
.n_access
= n
;
3464 access
= stmt
->u
.d
.stmt
->accesses
;
3465 for (i
= 0; i
< n
; ++i
, access
= access
->next
) {
3466 compute_index_expression(gen
, &stmt
->u
.d
.access
[i
], access
,
3467 stmt_it
, sched2shared
, build
);
3471 isl_map_free(stmt_it
);
3472 isl_map_free(sched2shared
);
3473 isl_ast_expr_free(arg
);
3474 isl_ast_expr_free(expr
);
3476 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3477 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3478 return isl_ast_node_set_annotation(node
, id
);
3481 isl_map_free(stmt_it
);
3482 ppcg_kernel_stmt_free(stmt
);
3483 isl_map_free(sched2shared
);
3484 return isl_ast_node_free(node
);
3487 /* This function is called when code has been generated for the shared
3488 * tile loops. The "schedule" refers only to the original statements.
3490 * We extend the schedule with that part of gen->local_sched that hasn't
3491 * been taken into account yet. This introduces parameters referring
3492 * to thread ids in the schedule, so we add them (with the appropriate
3493 * bounds to the context as well).
3494 * Finally, we set the appropriate unrolling options
3495 * if gen->first_unroll is set.
3497 static __isl_give isl_ast_node
*create_domain_leaf(
3498 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
3501 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3503 isl_union_map
*sched
;
3506 isl_id_list
*iterators
;
3509 schedule
= extend_schedule(schedule
,
3510 isl_union_map_copy(gen
->local_sched
),
3511 gen
->shared_len
, gen
->thread_tiled_len
);
3513 space
= isl_ast_build_get_schedule_space(build
);
3514 set
= isl_set_universe(space
);
3515 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
3516 gen
->kernel
->block_dim
, "t");
3517 build
= isl_ast_build_restrict(build
, set
);
3519 n
= gen
->thread_tiled_len
- gen
->shared_len
;
3521 if (gen
->first_unroll
>= 0) {
3522 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
3523 build
= set_unroll(build
, space
, gen
->first_unroll
);
3525 iterators
= generate_names(gen
->ctx
, n
, "c");
3526 build
= isl_ast_build_set_iterators(build
, iterators
);
3527 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
3528 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
3529 isl_ast_build_free(build
);
3534 /* This function is called for each statement node in the AST of the code
3535 * for copying to or from shared/private memory.
3536 * Attach a pointer to a ppcg_kernel_stmt representing the copy
3537 * statement to the node.
3538 * The statement name is {read,write}_{shared,private}_<array>.
3540 * The schedule is of the form
3544 * where A refers to a piece of an array and T to the corresponding
3545 * shifted tile. We split this schedule into mappings L -> A and L -> T
3546 * and store the corresponding expressions in stmt->index and stmt->local_index,
3547 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
3549 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
3550 __isl_keep isl_ast_build
*build
, void *user
)
3552 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3553 struct ppcg_kernel_stmt
*stmt
;
3557 isl_map
*access
, *local_access
, *map
;
3558 isl_pw_multi_aff
*pma
;
3562 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3564 return isl_ast_node_free(node
);
3566 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
3567 name
= isl_map_get_tuple_name(access
, isl_dim_in
);
3568 stmt
->u
.c
.read
= !strncmp(name
, "read", 4);
3569 access
= isl_map_reverse(access
);
3570 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
3571 local_access
= isl_map_copy(access
);
3573 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
3574 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
3575 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3576 access
= isl_map_apply_range(access
, map
);
3577 pma
= isl_pw_multi_aff_from_map(access
);
3578 expr
= isl_ast_build_call_from_pw_multi_aff(build
, pma
);
3579 stmt
->u
.c
.index
= expr
;
3581 map
= isl_map_range_map(isl_map_universe(space
));
3582 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
3583 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3584 local_access
= isl_map_apply_range(local_access
, map
);
3585 pma
= isl_pw_multi_aff_from_map(local_access
);
3586 expr
= isl_ast_build_call_from_pw_multi_aff(build
, pma
);
3587 stmt
->u
.c
.local_index
= expr
;
3589 stmt
->u
.c
.array
= gen
->copy_group
->array
;
3590 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
3591 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
3592 stmt
->type
= ppcg_kernel_copy
;
3594 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3595 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3596 return isl_ast_node_set_annotation(node
, id
);
3599 /* Given a schedule of the form
3603 * (with S the first shared_len dimensions of the computed schedule,
3604 * A the array and L the schedule correponding to the generated loops),
3605 * indicating where the copying the array elements that need to be copied,
3606 * construct code for performing the copying.
3608 * "group" is the array reference group that is being copied
3609 * "type" is either "read" or "write"
3610 * private is set if copying needs to be performed to/from registers
3612 * We first construct a mapping to a shifted tile of the array,
3614 * [S -> A] -> T(S,A) (1)
3616 * If private is set, then we also use this mapping as a schedule
3617 * (which is already thread-specific and will be completely unrolled).
3618 * Otherwise, we wrap/tile the range over the threads.
3621 * [S -> A] -> T'(S,A)
3623 * Combined with the given schedule, we have
3625 * [S -> A] -> [L -> T'(S,A)] (2)
3627 * From the shifted tile mapping, we construct a mapping
3629 * [S -> A] -> [A -> T(S,A)]
3631 * and apply it to the schedule (2), obtaining
3633 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
3635 * Note that we can project out S because it is uniquely defined by L.
3637 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
3638 __isl_take isl_map
*sched
,
3639 const char *type
, struct gpu_array_ref_group
*group
,
3640 __isl_take isl_ast_build
*build
, int private)
3642 const char *array_name
;
3643 const char *mem
= private ? "private" : "shared";
3647 isl_map
*schedule
, *shift
, *map
;
3649 isl_id_list
*iterators
;
3652 shift
= isl_set_unwrap(isl_map_domain(isl_map_copy(sched
)));
3653 array_name
= isl_map_get_tuple_name(shift
, isl_dim_out
);
3654 shift
= shift_access(shift
, group
);
3656 schedule
= isl_map_copy(shift
);
3658 schedule
= tile_access_schedule(gen
, schedule
);
3660 n
= isl_map_dim(schedule
, isl_dim_out
);
3661 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
3662 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
3663 gen
->kernel
->block_dim
, "t");
3665 schedule
= isl_map_range_product(sched
, schedule
);
3668 name
= isl_alloc_array(gen
->ctx
, char,
3669 strlen(type
) + sizeof("_private_") + strlen(array_name
) + 20);
3670 if (group
->array
->n_group
> 1)
3671 sprintf(name
, "%s_%s_%s_%d", type
, mem
, array_name
, group
->nr
);
3673 sprintf(name
, "%s_%s_%s", type
, mem
, array_name
);
3674 shift
= isl_map_set_tuple_name(shift
,
3675 isl_dim_out
, name
+ strlen(type
) + 1);
3677 space
= isl_space_domain(isl_map_get_space(shift
));
3678 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
3679 map
= isl_map_range_product(map
, shift
);
3681 schedule
= isl_map_apply_domain(schedule
, map
);
3683 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, name
);
3686 build
= isl_ast_build_restrict(build
, set
);
3688 gen
->copy_group
= group
;
3691 space
= isl_space_range(isl_map_get_space(schedule
));
3692 space
= isl_space_range(isl_space_unwrap(space
));
3693 build
= set_unroll(build
, space
, 0);
3695 iterators
= generate_names(gen
->ctx
, n
, "c");
3696 build
= isl_ast_build_set_iterators(build
, iterators
);
3697 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
3698 tree
= isl_ast_build_ast_from_schedule(build
,
3699 isl_union_map_from_map(schedule
));
3700 isl_ast_build_free(build
);
3705 /* Return code for reading into or writing from shared memory
3706 * the given array reference group.
3708 * If we are performing a read from global memory to shared memory and
3709 * if the array involved is not a scalar, then we copy
3710 * the entire tile to shared memory. This may result in some extra
3711 * elements getting copied, but it should lead to simpler code
3712 * (which means that fewer registers may be needed) and less divergence.
3714 * Otherwise, we only copy the elements that will be read or have been written
3718 * The input "sched" is of the form.
3722 * with S the first shared_len dimensions of the computed schedule,
3723 * A the array and L the schedule correponding to the generated loops.
3725 * We first drop "type",
3729 * If the above conditions are satisfied, we project out A,
3734 * and then introduce the group tile [S -> T], resulting in
3738 static __isl_give isl_ast_node
*copy_group_shared_accesses(
3739 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3740 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
3744 isl_union_map
*access
;
3746 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
3747 read
= !strcmp(type
, "read");
3749 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
3751 if (read
&& group
->array
->n_index
> 0) {
3755 space
= isl_space_domain(isl_map_get_space(sched
));
3756 space
= isl_space_unwrap(space
);
3757 map
= isl_map_domain_map(isl_map_universe(space
));
3758 sched
= isl_map_apply_domain(sched
, map
);
3760 map
= group_tile(group
);
3761 map
= isl_map_reverse(isl_map_domain_map(map
));
3762 sched
= isl_map_apply_domain(sched
, map
);
3765 return copy_access(gen
, sched
, type
, group
, build
, 0);
3768 /* Return code for reading into or writing from private memory
3769 * the given array reference group.
3771 * Let S be the first shared_len dimensions of the computed schedule,
3772 * D the iteration domains, A the array and L the schedule correponding
3773 * to the generated loops.
3774 * "sched" is of the form
3778 * where type is either "read" or "write".
3779 * We apply the privatization D -> S(t), with t the thread ids,
3780 * to the access relation D -> A to obtain the privatized access relation
3784 * We drop the type from "sched" and intersect with the privatized access
3785 * relation to obtain
3789 static __isl_give isl_ast_node
*copy_group_private_accesses(
3790 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3791 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
3795 isl_union_map
*priv
;
3796 isl_union_map
*access
;
3797 isl_map
*access_map
;
3799 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
3800 read
= !strcmp(type
, "read");
3802 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
3803 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3806 access
= group_access_relation(group
, read
, !read
);
3807 access
= isl_union_map_apply_domain(access
, priv
);
3808 access_map
= isl_map_from_union_map(access
);
3810 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
3811 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
3813 return copy_access(gen
, sched
, type
, group
, build
, 1);
3816 /* Return code for reading into or writing from shared or private memory.
3818 * "schedule" is of the form
3822 * with S be the first shared_len dimensions of the computed schedule,
3823 * A the array and L the schedule correponding to the generated loops.
3824 * The array reference group is attached to "type".
3826 static __isl_give isl_ast_node
*create_access_leaf(
3827 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
3828 __isl_take isl_ast_build
*build
)
3830 struct gpu_array_ref_group
*group
;
3833 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
3834 group
= isl_id_get_user(id
);
3837 if (group
->private_tile
)
3838 return copy_group_private_accesses(gen
, group
, schedule
,
3841 return copy_group_shared_accesses(gen
, group
, schedule
,
3845 /* Create a domain node representing a synchronization.
3847 static __isl_give isl_ast_node
*create_sync_leaf(
3848 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
3849 __isl_take isl_ast_build
*build
)
3851 struct ppcg_kernel_stmt
*stmt
;
3857 isl_map_free(schedule
);
3859 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3863 stmt
->type
= ppcg_kernel_sync
;
3865 space
= isl_ast_build_get_schedule_space(build
);
3866 space
= isl_space_from_domain(space
);
3867 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
3868 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
3869 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
3870 node
= isl_ast_node_alloc_user(expr
);
3871 isl_ast_build_free(build
);
3873 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3874 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3875 return isl_ast_node_set_annotation(node
, id
);
3878 /* This function is called during the code generation at the point
3879 * where the schedule domain element is completely determined by
3880 * the generated code. The input schedule contains the original
3881 * statements as well as synchronization and copy "statements".
3882 * The latter are scheduled at different points than any of the original
3883 * statements, so they will only arrive here in isolation.
3885 * If the current schedule only refers to a single statement,
3886 * we check if it is a copy or synchronization statement and
3887 * call the appropriate functions.
3888 * Otherwise, we assume we are dealing with the original statements
3889 * and we call create_domain_leaf.
3891 static __isl_give isl_ast_node
*create_kernel_leaf(
3892 __isl_take isl_ast_build
*build
, void *user
)
3894 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3896 isl_union_map
*schedule
;
3899 schedule
= isl_ast_build_get_schedule(build
);
3901 if (isl_union_map_n_map(schedule
) != 1)
3902 return create_domain_leaf(schedule
, build
, user
);
3904 map
= isl_map_from_union_map(schedule
);
3905 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
3906 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
3907 return create_access_leaf(gen
, map
, build
);
3908 if (!strcmp(name
, "sync"))
3909 return create_sync_leaf(gen
, map
, build
);
3911 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
3914 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
3915 * have value 0) and all even schedule dimensions as "unroll".
3917 * That is, the options look as follows
3919 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
3920 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
3922 * The even positions are used to be able to schedule copying blocks
3923 * and synchronization before or after each level of the shared memory
3924 * tile loops and we want to make sure that code for these is generated
3925 * separately (within each level).
3927 static __isl_give isl_ast_build
*set_atomic_and_unroll(
3928 __isl_take isl_ast_build
*build
,
3929 __isl_take isl_space
*space
, int sched_len
)
3935 isl_local_space
*ls
;
3938 ctx
= isl_ast_build_get_ctx(build
);
3940 space
= isl_space_params(space
);
3941 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
3942 space
= isl_space_from_domain(space
);
3943 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
3944 map
= isl_map_universe(isl_space_copy(space
));
3945 for (i
= 0; i
< sched_len
; i
+= 2)
3946 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
3947 ls
= isl_local_space_from_space(isl_map_get_space(map
));
3948 c
= isl_equality_alloc(ls
);
3949 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
3950 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
3951 c
= isl_constraint_set_constant_si(c
, 1);
3952 map
= isl_map_add_constraint(map
, c
);
3953 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
3954 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
3955 opt
= isl_union_map_from_map(map
);
3957 map
= isl_map_universe(space
);
3958 ls
= isl_local_space_from_space(isl_map_get_space(map
));
3959 c
= isl_equality_alloc(ls
);
3960 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
3961 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
3962 map
= isl_map_add_constraint(map
, c
);
3963 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
3964 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
3965 opt
= isl_union_map_add_map(opt
, map
);
3967 build
= isl_ast_build_set_options(build
, opt
);
3972 /* Return a map that maps a space of dimension gen->shared_len
3973 * to its last dimensions starting at gen->tile_first.
3974 * The range is of dimension
3976 * 2 * (gen->shared_len - gen->tile_first) + 1
3978 * The input dimensions are mapped to the odd dimensions in the output,
3979 * while the even dimensions (except 2*pos) are fixed to 0.
3980 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
3981 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
3982 * are mapped to the output. The remaining input dimensions are projected
3983 * out and the corresponding output dimensions are fixed to 0.
3985 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
3986 __isl_take isl_space
*space
, int pos
, int val
)
3991 space
= isl_space_set_from_params(space
);
3992 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
3993 space
= isl_space_map_from_set(space
);
3994 proj
= isl_map_identity(space
);
3995 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
3996 n
= gen
->shared_len
- gen
->tile_first
;
3997 for (i
= 0; i
<= n
; ++i
) {
3998 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
4000 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
4002 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
4008 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
4009 gen
->shared_len
- (gen
->tile_first
+ pos
));
4010 for (i
= pos
; i
< n
; ++i
)
4011 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
4016 /* Given the AST context schedule "schedule" and the mapping from
4017 * domains to the shared tile loops "shared_sched", add a schedule
4018 * for a synchronization operation at position "val" of loop level "pos".
4020 * schedule is of the form
4024 * (with D the iteration domains and L the already generated loops),
4025 * while shared_sched is of the form
4029 * We combine them into
4035 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4037 * and use the result as a schedule for "sync".
4039 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
4040 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4041 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
4044 isl_map
*proj
, *map
;
4046 shared_sched
= isl_union_map_copy(shared_sched
);
4047 schedule
= isl_union_map_copy(schedule
);
4049 space
= isl_union_map_get_space(shared_sched
);
4050 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
4051 map
= isl_map_from_union_map(schedule
);
4053 proj
= insert_even(gen
, space
, pos
, val
);
4054 map
= isl_map_apply_range(map
, proj
);
4055 map
= isl_map_from_range(isl_map_wrap(map
));
4056 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
4058 res
= isl_union_map_add_map(res
, map
);
4063 /* Given the AST context schedule "schedule" and the mapping from
4064 * domains to the shared tile loops "shared_sched", add a schedule
4065 * for copying an array reference group to/from shared/private memory.
4066 * "read" is set if data should be copied from global memory
4067 * to shared/private memory.
4068 * "k" represents the current group
4069 * "s" is the total number of groups
4071 * We schedule an operation before or after the innermost loop
4072 * of "shared_sched" that affects the tile of the array reference group.
4074 * schedule is of the form
4078 * (with D the iteration domains and L the already generated loops),
4079 * while shared_sched is of the form
4083 * We first compute the access relation for the reference group
4087 * and combine it with shared_sched into
4091 * If this results in an empty relation, no copying needs to be performed
4093 * Otherwise, we invert the relation and combine it with "schedule" into
4097 * The actual additional piece of the schedule is obtained from combining
4103 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4105 * The position of "val" corresponds to the innermost loop that affects
4106 * the tile and the value indicates where the copying is scheduled
4107 * with respect to the actual kernel code (at value 0).
4108 * Reads are schedule before the code, writes to global memory from
4109 * private memory are scheduled at values 1 to s, writes to global
4110 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
4112 * If we are scheduling a read from global memory to shared memory,
4113 * we insert a synchronization before the kernel code (at the innermost
4115 * If we are scheduling a write to global memory, then we add
4116 * a synchronization after all writes (at value 2 *s + 2).
4117 * However, there is no need for a synchronization after the outermost loop.
4118 * A write to global memory from private memory at the innermost level
4119 * does not require a synchronization, because it is covered by
4120 * the synchronization after the kernel inserted by body_schedule.
4122 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
4123 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4124 __isl_keep isl_union_map
*shared_sched
,
4125 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
4130 isl_union_map
*access
;
4131 isl_map
*map
, *proj
, *access_map
;
4134 access
= group_access_relation(group
, read
, !read
);
4135 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
4138 if (isl_union_map_is_empty(access
)) {
4139 isl_union_map_free(access
);
4143 access
= isl_union_map_reverse(access
);
4144 access
= isl_union_map_apply_range(access
,
4145 isl_union_map_copy(schedule
));
4146 access_map
= isl_map_from_union_map(access
);
4148 space
= isl_space_copy(group
->array
->dim
);
4149 space
= isl_space_from_range(space
);
4150 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
4151 map
= isl_map_domain_map(isl_map_universe(space
));
4153 space
= isl_union_map_get_space(schedule
);
4154 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
4158 else if (group
->private_tile
)
4161 val
= 1 + s
+ 1 + k
;
4162 proj
= insert_even(gen
, space
, pos
, val
);
4163 map
= isl_map_apply_range(map
, proj
);
4165 access_map
= isl_map_range_product(access_map
, map
);
4167 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
4168 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
4170 res
= isl_union_map_add_map(res
, access_map
);
4172 n
= gen
->shared_len
- gen
->tile_first
;
4174 if (!group
->private_tile
)
4175 res
= add_sync_schedule(gen
, res
, schedule
,
4176 shared_sched
, n
, -1);
4180 if (pos
== n
&& group
->private_tile
)
4182 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4189 /* Return a schedule for the shared tile loops based on the current
4190 * AST context schedule.
4192 * We create a "shared_sched" that maps the domains to the first
4193 * shared_len dimensions of the computed schedule, project out the
4194 * first tile_first dimensions (as these are already covered by
4195 * the host code) and insert "statement-level" dimensions at even
4196 * positions so that we can schedule copy blocks and synchronization
4197 * before/after each level.
4199 * In particular, copy blocks are inserted inside the innermost
4200 * level that affect the tile. For the copying to global memory,
4201 * those from private memory are scheduled before those from shared
4202 * memory such that synchronization can be inserted between the two
4203 * at the innermost level.
4204 * Synchronization is inserted at the innermost level before the
4205 * actual kernel code if there is any copying from global memory
4206 * to shared memory. It is inserted unconditionally at the innermost
4207 * level after the actual kernel code and the copying to global memory
4208 * from private memory (if any). Finally, it is inserted after
4209 * any copying to global memory, except at the outermost level
4210 * and at the innermost level if there is no copying from shared
4211 * memory. The copying from private memory is covered by the unconditional
4212 * synchronization at the innermost level.
4214 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
4215 __isl_take isl_union_map
*schedule
)
4219 isl_union_map
*shared_sched
;
4220 isl_union_map
*sched
;
4221 isl_map
*proj
, *map
;
4224 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
4225 proj
= projection(isl_union_map_get_space(shared_sched
),
4226 gen
->tiled_len
, gen
->shared_len
);
4227 shared_sched
= isl_union_map_apply_range(shared_sched
,
4228 isl_union_map_from_map(proj
));
4229 space
= isl_union_map_get_space(shared_sched
);
4230 proj
= insert_even(gen
, space
, -1, 0);
4231 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
4232 isl_union_map_from_map(proj
));
4234 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
4237 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
4238 s
+= gen
->prog
->array
[i
].n_group
;
4241 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4242 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
4244 for (j
= 0; j
< array
->n_group
; ++j
) {
4245 struct gpu_array_ref_group
*group
;
4247 group
= array
->groups
[j
];
4248 if (!group
->private_tile
&& !group
->shared_tile
)
4250 res
= add_group_schedule(gen
, res
, schedule
,
4251 shared_sched
, group
, 0, k
, s
);
4252 res
= add_group_schedule(gen
, res
, schedule
,
4253 shared_sched
, group
, 1, k
, s
);
4258 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4259 gen
->shared_len
- gen
->tile_first
, 1 + s
);
4261 isl_union_map_free(shared_sched
);
4262 isl_union_map_free(schedule
);
4267 /* Generate code for "kernel" in the given "context".
4269 * We first generate code for the shared tile loops (T1T, T1P and T2)
4270 * in a context that includes the block ids.
4271 * Within each iteration of these loops an additional code generation
4272 * is performed (within create_kernel_leaf) for the rest of the schedule
4273 * in a context that includes the thread ids.
4275 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
4276 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
4277 __isl_keep isl_multi_pw_aff
*grid_size
)
4281 isl_id_list
*iterators
;
4282 isl_union_map
*schedule
;
4286 schedule
= isl_ast_build_get_schedule(build
);
4288 build
= isl_ast_build_copy(build
);
4289 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
4290 space
= isl_ast_build_get_schedule_space(build
);
4291 set
= isl_set_universe(isl_space_copy(space
));
4292 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
4293 build
= isl_ast_build_restrict(build
, set
);
4295 schedule
= body_schedule(gen
, schedule
);
4297 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
4299 build
= set_atomic_and_unroll(build
, space
, sched_len
);
4300 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
4301 build
= isl_ast_build_set_iterators(build
, iterators
);
4302 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
4303 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4304 isl_ast_build_free(build
);
4309 /* Attach "id" to the given node.
4311 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
4312 __isl_keep isl_ast_build
*build
, void *user
)
4316 node
= isl_ast_node_set_annotation(node
, id
);
4321 /* Construct an AST node for performing a kernel launch and attach
4322 * the information about the kernel to that node.
4324 * The kernel AST has been constructed in the context of the range
4325 * of "schedule". In particular, the grid size has been computed
4326 * in the context. We therefore still need to make sure that these
4327 * constraints are expressed in the code. We do this by creating a schedule
4329 * kernel[] -> [S -> []]
4331 * where S is the schedule domain, i.e., the range of "schedule".
4332 * The AST generation will then create a single call surrounded by
4333 * all the condition in "S" that have not been expressed yet.
4335 * The kernel information is attached to this node in attach_id.
4337 static __isl_give isl_ast_node
*construct_launch(
4338 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
4339 __isl_take
struct ppcg_kernel
*kernel
)
4343 isl_union_set
*domain
;
4348 ctx
= isl_ast_build_get_ctx(build
);
4350 id
= isl_id_alloc(ctx
, NULL
, kernel
);
4351 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
4353 domain
= isl_union_map_range(schedule
);
4354 set
= isl_set_from_union_set(domain
);
4355 map
= isl_map_from_domain(set
);
4356 map
= isl_map_from_range(isl_map_wrap(map
));
4357 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
4358 schedule
= isl_union_map_from_map(map
);
4360 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
4361 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
4362 isl_ast_build_free(build
);
4367 /* This function is called for each leaf in the AST of the host code.
4368 * We first specialize the schedule to the site of the leaf, compute
4369 * the size of shared memory and then construct the body of host code
4370 * and the associated kernel.
4372 * The necessary information for printing the kernel launch is
4373 * stored in a struct ppcg_kernel and attached to the leaf node
4374 * created to represent the launch.
4376 static __isl_give isl_ast_node
*create_host_leaf(
4377 __isl_take isl_ast_build
*build
, void *user
)
4379 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4382 struct ppcg_kernel
*kernel
;
4383 isl_set
*host_domain
;
4384 isl_union_map
*schedule
;
4385 isl_union_map
*local_sched
;
4386 isl_union_map
*access
;
4387 isl_union_set
*domain
;
4390 schedule
= isl_ast_build_get_schedule(build
);
4392 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
4395 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
4397 local_sched
= isl_union_map_copy(gen
->sched
);
4398 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
4399 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
4400 isl_union_map_copy(gen
->prog
->write
));
4401 access
= isl_union_map_apply_domain(access
,
4402 isl_union_map_copy(local_sched
));
4404 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
4405 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
4406 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
4408 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
4409 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
4410 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
4412 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
4416 kernel
->id
= gen
->kernel_id
++;
4417 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
4418 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
4419 extract_block_size(gen
, kernel
);
4420 kernel
->arrays
= isl_union_map_range(access
);
4421 kernel
->space
= isl_ast_build_get_schedule_space(build
);
4423 gen
->private_access
= NULL
;
4424 compute_shared_sched(gen
);
4425 gen
->privatization
= compute_privatization(gen
);
4426 group_references(gen
);
4427 compute_private_access(gen
);
4428 check_shared_memory_bound(gen
);
4429 host_domain
= isl_set_from_union_set(isl_union_map_range(
4430 isl_union_map_copy(schedule
)));
4431 localize_bounds(gen
, kernel
, host_domain
);
4433 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
4435 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
4437 create_kernel_vars(gen
, kernel
);
4439 free_local_array_info(gen
);
4440 isl_map_free(gen
->privatization
);
4441 isl_union_map_free(gen
->private_access
);
4442 isl_union_map_free(gen
->local_sched
);
4443 isl_union_map_free(gen
->tiled_sched
);
4444 isl_union_map_free(gen
->shared_sched
);
4445 isl_union_map_free(gen
->shared_proj
);
4446 isl_set_free(host_domain
);
4447 free(gen
->tile_size
);
4449 node
= construct_launch(build
, schedule
, kernel
);
4453 isl_union_map_free(schedule
);
4457 /* Use isl to generate code for the outer gen->tile_first loops
4458 * of the global schedule in gen->sched, resulting in the host code.
4459 * Within each iteration of this partial schedule, i.e., for each kernel
4460 * launch, create_host_leaf takes care of generating the kernel code.
4462 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
4464 isl_ast_build
*build
;
4466 isl_union_map
*sched
;
4468 isl_id_list
*iterators
;
4470 sched
= isl_union_map_copy(gen
->sched
);
4471 proj
= projection(isl_union_map_get_space(sched
),
4472 gen
->untiled_len
, gen
->tile_first
);
4473 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4475 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
4476 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
4477 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
4478 build
= isl_ast_build_set_iterators(build
, iterators
);
4479 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
4480 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
4481 isl_ast_build_free(build
);
4486 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
4490 return isl_union_map_read_from_str(ctx
, str
);
4493 /* Information about the outermost tilable bands in the forest of bands.
4495 * tile_len and n_parallel are only sets on band_info structures
4496 * that correspond to outermost bands. For other bands (in particular,
4497 * ancestors of the outermost bands), n_parallal is set to 0.
4499 * prefix is the (padded) schedule leading up to the outermost tilable bands.
4501 * tile_first is the number of schedule dimensions in prefix.
4503 * suffix is the schedule of the outermost tilable bands and their descendants.
4506 struct gpu_gen
*gen
;
4510 isl_union_map
*prefix
;
4511 isl_union_map
*suffix
;
4514 /* Set tile_len and n_parallel of the statement to that of
4515 * their outermost band, recorded in the band_info.
4517 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
4519 struct band_info
*info
= user
;
4520 struct gpu_stmt
*stmt
;
4523 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
4524 stmt
= find_stmt(info
->gen
->prog
, id
);
4527 stmt
->tile_len
= info
->tile_len
;
4528 stmt
->n_parallel
= info
->n_parallel
;
4535 static void list_select_outer_band(struct gpu_gen
*gen
,
4536 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
4538 /* Check if this band has any parallel loops. If so, take it as
4539 * the outermost tilable band. If not, continue looking for the
4540 * outermost tilable band in the children of the current band.
4542 static void band_select_outer_band(struct gpu_gen
*gen
,
4543 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
4545 int n
= isl_band_n_member(band
);
4548 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
4549 if (!isl_band_member_is_zero_distance(band
, n_parallel
))
4552 info
->n_parallel
= n_parallel
;
4555 info
->tile_first
= pos
;
4557 info
->prefix
= isl_band_get_prefix_schedule(band
);
4558 info
->suffix
= isl_union_map_flat_range_product(
4559 isl_band_get_partial_schedule(band
),
4560 isl_band_get_suffix_schedule(band
));
4561 isl_union_map_foreach_map(info
->prefix
,
4562 &set_stmt_tile_len
, info
);
4563 } else if (isl_band_has_children(band
)) {
4564 isl_band_list
*children
;
4565 children
= isl_band_get_children(band
);
4566 list_select_outer_band(gen
, children
, pos
+ n
, info
);
4569 info
->tile_first
= pos
+ n
;
4571 info
->prefix
= isl_union_map_flat_range_product(
4572 isl_band_get_prefix_schedule(band
),
4573 isl_band_get_partial_schedule(band
));
4574 info
->suffix
= isl_band_get_suffix_schedule(band
);
4575 isl_union_map_foreach_map(info
->prefix
,
4576 &set_stmt_tile_len
, info
);
4579 isl_band_free(band
);
4582 /* Comparison function that returns a non-zero value for band_infos
4583 * with different tile_len fields or different n_parallel fields.
4585 static int cmp_band(const void *p1
, const void *p2
)
4587 const struct band_info
*info1
= p1
;
4588 const struct band_info
*info2
= p2
;
4590 if (info1
->tile_len
!= info2
->tile_len
)
4591 return info1
->tile_len
- info2
->tile_len
;
4593 return info1
->n_parallel
- info2
->n_parallel
;
4596 /* Extend "umap" with coordinates with fixed value "val"
4597 * to a total length of "dst_len", assuming the original dimension is "src_len".
4599 static __isl_give isl_union_map
*extend_range(
4600 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
4606 dim
= isl_union_map_get_space(umap
);
4607 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
4608 for (i
= src_len
; i
< dst_len
; ++i
)
4609 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
4611 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
4616 /* Group bands with the same values for tile_len and n_parallel.
4617 * The prefix schedule is then extended with a fixed coordinate that
4618 * is different for each such group.
4619 * Note that the actual values for this coordinate are not important.
4620 * The bands have already been effectively separated at a higher level
4621 * or they are independent and may be executed in parallel.
4622 * The list of band_info has been sorted before this functions is called.
4624 static void separate_bands(struct band_info
*info
, int n
)
4629 for (i
= 0; i
< n
; ++i
) {
4630 int l
= info
[i
].tile_first
;
4633 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
4634 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
4637 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4639 info
[i
].tile_first
= l
+ 1;
4643 /* Select the outermost bands in the elements of the list, align
4644 * their prefix schedules, separate bands with different values
4645 * for tile_len and/or n_parallel and then combine the resulting
4646 * prefix and suffix schedules into a single pair of prefix and
4647 * suffix schedules for the entire list.
4649 static void list_select_outer_band(struct gpu_gen
*gen
,
4650 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
4654 int n
= isl_band_list_n_band(list
);
4655 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
4656 struct band_info
*info
;
4658 isl_union_map
*prefix
;
4659 isl_union_map
*suffix
;
4662 info
= isl_calloc_array(ctx
, struct band_info
, n
);
4666 for (i
= 0; i
< n
; ++i
) {
4667 band
= isl_band_list_get_band(list
, i
);
4668 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
4669 if (info
[i
].tile_first
> max_tile_first
)
4670 max_tile_first
= info
[i
].tile_first
;
4673 for (i
= 0; i
< n
; ++i
) {
4674 if (info
[i
].tile_first
== max_tile_first
)
4676 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4677 info
[i
].tile_first
, max_tile_first
, 0);
4678 info
[i
].tile_first
= max_tile_first
;
4681 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
4683 for (i
= 0; i
< n
- 1; ++i
)
4684 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
4685 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
4689 separate_bands(info
, n
);
4691 prefix
= info
[0].prefix
;
4692 suffix
= info
[0].suffix
;
4694 for (i
= 1; i
< n
; ++i
) {
4695 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4696 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4699 list_info
->tile_first
= info
[0].tile_first
;
4700 list_info
->tile_len
= -1;
4701 list_info
->prefix
= prefix
;
4702 list_info
->suffix
= suffix
;
4704 isl_band_list_free(list
);
4708 /* Select the outermost tilable band that (by construction)
4709 * has at least one parallel loop.
4710 * The starting position of the aligned band is stored in the pair
4712 * The sizes and number of parallel loops may be different in different
4713 * parts of the band forest and are therefore stored in the gpu_stmts.
4715 * Return the complete schedule, with the tilable bands aligned
4716 * at gen->tile_first and padded with zero, if needed.
4718 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
4719 __isl_keep isl_schedule
*schedule
)
4721 isl_band_list
*list
;
4722 struct band_info info
;
4724 gen
->n_parallel
= 0;
4727 list
= isl_schedule_get_band_forest(schedule
);
4729 list_select_outer_band(gen
, list
, 0, &info
);
4731 gen
->tile_first
= info
.tile_first
;
4732 info
.suffix
= align_range(info
.suffix
);
4734 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
4737 /* Set gen->untiled_len to the number of scheduling dimensions
4738 * for the schedule of the first domain.
4739 * We assume here that this number is the same for all domains.
4741 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
4743 unsigned *untiled_len
= user
;
4745 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
4751 /* Compute an appropriate schedule based on the accesses in
4752 * gen->read and gen->write.
4754 * We use the dependences in gen->prog->scop to compute
4755 * a schedule that has a parallel loop in each tilable band.
4756 * Finally, we select the outermost tilable band.
4758 static void compute_schedule(struct gpu_gen
*gen
)
4760 isl_union_set
*domain
;
4761 isl_union_map
*dep_raw
, *dep
;
4762 isl_union_map
*sched
;
4763 isl_schedule
*schedule
;
4765 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4767 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
4768 dep
= isl_union_map_union(dep
, dep_raw
);
4769 dep
= isl_union_map_coalesce(dep
);
4771 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
4772 domain
= isl_union_set_intersect_params(domain
,
4773 isl_set_copy(gen
->prog
->scop
->context
));
4774 schedule
= isl_union_set_compute_schedule(isl_union_set_copy(domain
),
4775 isl_union_map_copy(dep
), dep
);
4776 if (gen
->options
->debug
->dump_schedule
)
4777 isl_schedule_dump(schedule
);
4779 sched
= select_outer_tilable_band(gen
, schedule
);
4781 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4782 sched
= isl_union_map_intersect_domain(sched
, domain
);
4785 isl_schedule_free(schedule
);
4788 /* Compute the sets of array elements that need to be copied in and out.
4790 * In particular, for each array that is written anywhere in gen->prog and
4791 * that is visible outside the corresponding scop, we copy out its entire
4794 * Any array elements that is read without first being written needs
4795 * to be copied in. Furthermore, if there are any array elements that
4796 * are copied out, but that are not written inside gen->prog, then
4797 * they also need to be copied in to ensure that the value after execution
4798 * is the same as the value before execution.
4799 * While computing the set of array elements that
4800 * are copied out but not written, we intersect both sets with the context.
4801 * This helps in those cases where the arrays are declared with a fixed size,
4802 * while the accesses are parametric and the context assigns a fixed value
4803 * to the parameters.
4805 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
4808 isl_union_set
*write
;
4809 isl_union_set
*copy_in
, *copy_out
;
4810 isl_union_set
*not_written
;
4811 isl_union_map
*uninitialized
;
4813 write
= isl_union_map_range(isl_union_map_copy(gen
->prog
->write
));
4814 write
= isl_union_set_intersect_params(write
,
4815 isl_set_copy(gen
->prog
->context
));
4816 copy_out
= isl_union_set_empty(isl_union_set_get_space(write
));
4818 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4823 if (gen
->prog
->array
[i
].local
)
4826 space
= isl_space_copy(gen
->prog
->array
[i
].dim
);
4827 write_i
= isl_union_set_extract_set(write
, space
);
4828 empty
= isl_set_fast_is_empty(write_i
);
4829 isl_set_free(write_i
);
4833 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
4834 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
4837 copy_out
= isl_union_set_intersect_params(copy_out
,
4838 isl_set_copy(gen
->prog
->context
));
4840 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
4842 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
4843 copy_in
= isl_union_map_range(uninitialized
);
4845 not_written
= isl_union_set_subtract(copy_out
, write
);
4846 copy_in
= isl_union_set_union(copy_in
, not_written
);
4847 gen
->prog
->copy_in
= copy_in
;
4850 static struct gpu_stmt_access
**expr_extract_access(struct pet_expr
*expr
,
4851 struct gpu_stmt_access
**next_access
)
4853 struct gpu_stmt_access
*access
;
4854 isl_ctx
*ctx
= isl_map_get_ctx(expr
->acc
.access
);
4856 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
4858 access
->next
= NULL
;
4859 access
->read
= expr
->acc
.read
;
4860 access
->write
= expr
->acc
.write
;
4861 access
->access
= isl_map_copy(expr
->acc
.access
);
4863 *next_access
= access
;
4864 next_access
= &(*next_access
)->next
;
4868 static struct gpu_stmt_access
**expr_extract_accesses(struct pet_expr
*expr
,
4869 struct gpu_stmt_access
**next_access
)
4873 for (i
= 0; i
< expr
->n_arg
; ++i
)
4874 next_access
= expr_extract_accesses(expr
->args
[i
],
4877 if (expr
->type
== pet_expr_access
)
4878 next_access
= expr_extract_access(expr
, next_access
);
4883 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
)
4885 struct gpu_stmt_access
**next_access
= &stmt
->accesses
;
4887 stmt
->accesses
= NULL
;
4888 expr_extract_accesses(stmt
->body
, next_access
);
4891 /* Return an array of gpu_stmt representing the statements in "scop".
4893 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
4894 __isl_keep isl_set
*context
)
4897 struct gpu_stmt
*stmts
;
4899 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->n_stmt
);
4903 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
4904 struct gpu_stmt
*s
= &stmts
[i
];
4906 s
->id
= isl_set_get_tuple_id(scop
->stmts
[i
]->domain
);
4907 s
->body
= scop
->stmts
[i
]->body
;
4908 pet_stmt_extract_accesses(s
);
4914 /* Replace the scop in the "input" file by equivalent code
4915 * that uses the GPU. "scop" is assumed to correspond to this scop.
4917 * We first compute a schedule that respects the dependences
4918 * of the original program and select the outermost band
4919 * of tilable dimensions that has at least one parallel loop.
4920 * We then have three blocks of dimensions
4924 * The tilable band "B" is first tiled according to "tile" sizes, resulting
4929 * For each iteration of the T loop and for each array, we compute
4930 * the array elements accessed by that iteration, construct a rectangular
4931 * box around it and shift it to the origin. The result is used
4932 * as shared memory for the array.
4934 * We then split off at most 2 parallel loops from the T loops and
4935 * at most 3 parallel loops from the P loops
4939 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4940 * according to "grid"/"block" sizes.
4942 * H T1T T1P T2 P1T P1P P2 G
4944 * Finally, the T1P and P1P iterators are equated to the block and
4945 * thread dimensions respectively and so are effectively removed.
4946 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4947 * are run on the GPU.
4949 * Code is generated in three stages. We first generate code for the
4950 * host (the H loops), with iterators h%d. Then, for each leaf node
4951 * of the resulting AST, we generate code for the shared loops (up to
4952 * and including T2), with iterators g%d and after equating the H loops
4953 * to h%d parameters and the T1P loops to the block dimensions.
4954 * Finally, we generate code for the remaining loops in a similar fashion.
4956 __isl_give isl_ast_node
*generate_gpu(isl_ctx
*ctx
, struct gpu_prog
*prog
,
4957 struct ppcg_options
*options
)
4959 isl_union_map
*sched
;
4968 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
4969 gen
.options
= options
;
4971 compute_schedule(&gen
);
4972 compute_copy_in_and_out(&gen
);
4975 tree
= generate_host_code(&gen
);
4977 clear_gpu_gen(&gen
);
4982 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
4984 struct gpu_prog
*prog
;
4989 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
4994 prog
->context
= isl_set_copy(scop
->context
);
4995 prog
->n_stmts
= scop
->n_stmt
;
4996 prog
->stmts
= extract_stmts(ctx
, scop
, prog
->context
);
4997 prog
->read
= isl_union_map_copy(scop
->reads
);
4998 prog
->write
= isl_union_map_copy(scop
->writes
);
5001 return gpu_prog_free(prog
);
5003 collect_array_info(prog
);
5008 void *gpu_prog_free(struct gpu_prog
*prog
)
5012 free_array_info(prog
);
5013 free_stmts(prog
->stmts
, prog
->n_stmts
);
5014 isl_union_set_free(prog
->copy_in
);
5015 isl_union_set_free(prog
->copy_out
);
5016 isl_union_map_free(prog
->read
);
5017 isl_union_map_free(prog
->write
);
5018 isl_set_free(prog
->context
);